Duty-ratio-adjustable pulse signal output circuit, constant-power power frequency circuit and equipment

Abstract

The embodiment of the invention provides a duty-ratio-adjustable pulse signal output circuit, a constant-power power frequency circuit and equipment, and belongs to the technical field of electronic circuits. The circuit comprises a rectifier module, a partial pressure sampling module, a triangular wave signal acquisition module, a peak signal acquisition module and an error amplification module; a pulse signal with double power frequency and capable of automatically adjusting pulse width or duty ratio according to power frequency voltage is generated by using an analog circuit instead of depending on an inductive or capacitive element. When the power frequency voltage fluctuates within a certain range, the pulse width or the duty ratio of the pulse signal output by the circuit is automatically adjusted according to the power frequency voltage, and then it is ensured that a load connected with the circuit works at a stable power level. The circuit has a self-adaptive capability, and can maintain constant power output of the load under the condition that the power frequency voltage changes, so that the load can still operate normally under an unstable power supply condition, the influence of power fluctuation on equipment performance is avoided, and the equipment stability and the working efficiency are improved.

Description

Technical Field

[0001] This invention relates to the field of electronic circuit technology, and in particular to a duty cycle adjustable pulse signal output circuit, a constant power frequency circuit, and related equipment. Background Technology

[0002] Power frequency refers to the 50 Hz or 60 Hz power supply frequency commonly used in power systems, and it forms the basis for various power generation, transmission, transformation, and distribution equipment. Power frequency circuits belong to the low-frequency circuit category, and their low operating frequency is a prominent characteristic. Compared to high-frequency circuits, power frequency circuits have weaker electromagnetic radiation, less interference, and relatively less noise. Due to their low frequency, power frequency circuits offer stable and reliable signal transmission. In industrial, civil, aerospace, and energy fields, power frequency circuits are widely used in various electrical and electronic devices, such as motors, lighting fixtures, power supplies, chargers, UPS systems, air conditioners, and televisions.

[0003] However, in a power grid environment, voltage fluctuations are a common problem affecting the normal operation of equipment. The voltage in the power grid is not always constant; fluctuations can occur due to load changes, excessive transmission distances, equipment aging, or other factors. For many electrical devices, especially those requiring stable power output, such as motors, UPS systems, and industrial control equipment, voltage fluctuations can lead to unstable equipment performance and even damage to critical components. Voltage changes directly affect the operating state of the equipment, potentially causing unstable output power. This fluctuation not only affects the normal operation of the equipment but can also lead to decreased energy efficiency and increased maintenance and replacement costs. In applications requiring high precision and stability, such as industrial automation, aerospace, and critical power equipment, maintaining stable power output is crucial. Therefore, ensuring that power frequency circuits can still achieve constant power output under voltage fluctuations is particularly important. Summary of the Invention

[0004] In view of this, embodiments of the present invention provide a duty cycle adjustable pulse signal output circuit, a constant power frequency circuit and device, to solve the problem of unstable power in the voltage waveform of the existing power frequency circuit.

[0005] In a first aspect, embodiments of the present invention provide a duty cycle adjustable pulse signal output circuit, the circuit comprising: a rectifier module, a voltage divider sampling module, a triangular wave signal acquisition module, a peak signal acquisition module, and an error amplification module, wherein the output terminal of the rectifier module is electrically connected to the input terminal of the voltage divider sampling module, the output terminal of the voltage divider sampling module is electrically connected to the output terminal of the triangular wave signal acquisition module and the input terminal of the peak signal acquisition module, the output terminals of the triangular wave signal acquisition module and the peak signal acquisition module are electrically connected to the input terminal of the error amplification module, a power frequency AC signal is rectified by the rectifier module and output as a frequency-doubled DC signal, the frequency-doubled DC signal is rectified by the voltage divider sampling module and output as a first DC signal and a second DC signal, wherein the first DC signal is rectified by the triangular wave signal acquisition module and output as a triangular wave signal, the second DC signal is rectified by the peak signal acquisition module and output as a second peak signal, and the triangular wave signal and the second peak signal are rectified by the error amplification module and output as a duty cycle adjustable pulse signal, wherein the duty cycle of the duty cycle adjustable pulse signal is inversely proportional to the voltage of the power frequency AC signal.

[0006] Preferably, the rectifier module includes a full-bridge rectifier, the AC input terminal of which is connected to the power frequency AC signal, the positive DC output terminal is electrically connected to the voltage divider sampling module, and the negative DC output terminal is grounded.

[0007] Preferably, the voltage divider sampling module includes a first voltage divider unit and a second voltage divider unit connected in parallel. The first voltage divider unit includes a first resistor and a second resistor connected in series. The series node of the first resistor and the second resistor is electrically connected to the triangular wave signal acquisition module. The second voltage divider unit includes a fifth resistor and a sixth resistor connected in series. The series node of the fifth resistor and the sixth resistor is electrically connected to the peak signal acquisition module. The frequency-doubled DC signal is output as a first DC signal after passing through the first voltage divider unit, and as a second DC signal after passing through the second voltage divider unit.

[0008] Preferably, the triangular wave signal acquisition module includes a comparison unit and an integration unit, wherein the input terminal of the comparison unit is electrically connected to the first voltage divider unit and the output terminal is electrically connected to the input terminal of the integration unit, and the output terminal of the integration unit is electrically connected to the error amplification module. The first DC signal is output as a square wave signal after passing through the comparison unit, and the square wave signal is output as the triangular wave signal after passing through the integration unit.

[0009] Preferably, the comparison unit includes a first comparator and a first capacitor, wherein the first capacitor is electrically connected between the positive input terminal of the first comparator and the first voltage divider unit, the negative input terminal of the first comparator is grounded, and the inverting output terminal of the first comparator is electrically connected to the integrator unit.

[0010] Preferably, the integration unit includes a second comparator, a third resistor, a fourth resistor, a second capacitor, and a reference voltage source, wherein the third resistor is electrically connected between the negative input terminal of the second comparator and the output terminal of the comparator unit, the fourth resistor and the second capacitor are connected in parallel between the output terminal and the negative input terminal of the second comparator, and the reference voltage source is electrically connected between the positive input terminal of the second comparator and ground.

[0011] Preferably, the peak signal acquisition module includes a peak detection unit and a voltage-controlled voltage source unit, wherein the input terminal of the peak detection unit is electrically connected to the second voltage divider unit and the output terminal is electrically connected to the input terminal of the voltage-controlled voltage source unit, the output terminal of the voltage-controlled voltage source unit is electrically connected to the error amplification module, the second DC signal is output as a first peak signal after passing through the peak detection unit, and the first peak signal is output as the second peak signal after being adjusted by the voltage-controlled voltage source.

[0012] Preferably, the peak detection unit includes a third comparator, a seventh resistor, a second diode, and a third capacitor, wherein the positive input terminal of the third comparator is electrically connected to the second voltage divider unit, the seventh resistor is electrically connected between the negative input terminal and the output terminal of the third comparator, the anode of the second diode is electrically connected to the output terminal of the third comparator, and the cathode is electrically connected to the input terminal of the voltage-controlled voltage source unit, and one end of the third capacitor is electrically connected to the cathode of the second diode, and the other end is grounded.

[0013] Preferably, the voltage-controlled voltage source unit includes a first voltage-controlled voltage source and an eighth resistor, wherein the current input terminal and current output terminal of the first voltage-controlled voltage source are grounded, the voltage output terminal is electrically connected to the output terminal of the peak detection unit, and the voltage output terminal is electrically connected to the error amplification module via the eighth resistor.

[0014] Preferably, the error amplification module includes a fourth comparator, wherein the positive input terminal of the fourth comparator is electrically connected to the output terminal of the triangular wave signal acquisition module, and the negative input terminal is electrically connected to the output terminal of the peak signal acquisition module, and the triangular wave signal and the second peak signal are output as the duty cycle adjustable pulse signal after passing through the fourth comparator.

[0015] Secondly, embodiments of the present invention provide a constant power frequency circuit, the circuit comprising a duty cycle adjustable pulse signal output circuit as described in any of the first aspects, a load, a transistor, and a bias resistor, wherein the base of the transistor is electrically connected to the output terminal of the duty cycle adjustable pulse signal output circuit, the collector is electrically connected to the negative terminal of the load, and the emitter is grounded via the bias resistor. The power frequency AC signal is input to the positive terminal of the load after DC rectification. When the voltage of the power frequency AC signal increases, the duty cycle of the duty cycle adjustable pulse signal output by the duty cycle adjustable pulse signal output circuit decreases accordingly. When the voltage of the power frequency AC signal decreases, the duty cycle of the duty cycle adjustable pulse signal output by the duty cycle adjustable pulse signal output circuit increases accordingly, thereby achieving constant load power.

[0016] Thirdly, embodiments of the present invention provide a power frequency grid device, the device including a duty cycle adjustable pulse signal output circuit as described in any of the first aspects or a constant power frequency circuit as described in the second aspect.

[0017] In summary, the beneficial effects of the present invention are as follows:

[0018] The duty cycle adjustable pulse signal output circuit, constant power frequency circuit, and device provided in this invention utilize a rectifier module to convert a power frequency AC signal into a frequency-multiplied DC signal. After voltage division and sampling processing, the two DC signals after voltage division enter a triangular wave signal acquisition module and a peak signal acquisition module, respectively. Through the triangular wave signal acquisition module, one DC signal is converted into a stable triangular wave signal. At the same time, the peak signal acquisition module performs peak detection on the other DC signal and acquires the peak signal. The triangular wave signal and the peak signal work together on the error amplification module to realize the output of a pulse signal with an adjustable duty cycle. The duty cycle of the output pulse signal is dynamically adjusted according to the voltage change of the input power frequency AC signal, forming a duty cycle adjustment mechanism that is inversely proportional to the voltage. This allows the circuit to automatically adjust the duty cycle of the output pulse under different input voltages.

[0019] The duty cycle adjustable pulse signal output circuit generates a pulse signal at twice the power frequency using analog circuitry instead of relying on inductive or capacitive components. This pulse signal automatically adjusts its pulse width or duty cycle based on the power frequency voltage. When the power frequency voltage fluctuates within a certain range, the pulse width or duty cycle of the output pulse signal from the circuit automatically adjusts accordingly, ensuring that the load connected to the circuit operates at a stable power level. This circuit possesses adaptive capability, maintaining a constant power output to the load even with varying power frequency voltages. This allows the load to operate normally under unstable power conditions, avoiding the impact of power fluctuations on equipment performance and significantly improving equipment stability and efficiency. Attached Figure Description

[0020] To more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings used in the embodiments of the present invention will be briefly introduced below. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort, and these are all within the protection scope of the present invention.

[0021] Figure 1 This is a schematic diagram of the structure of the duty cycle adjustable pulse signal output circuit according to an embodiment of the present invention.

[0022] Figure 2 This is a schematic diagram of the structure of the duty cycle adjustable pulse signal output circuit according to an embodiment of the present invention.

[0023] Figure 3 This is a detailed circuit diagram of the duty cycle adjustable pulse signal output circuit according to an embodiment of the present invention.

[0024] Figure 4 This is a waveform diagram of an embodiment of the present invention.

[0025] Figure 5 This is a schematic diagram of the structure of the constant power frequency circuit according to an embodiment of the present invention. Detailed Implementation

[0026] The features and exemplary embodiments of various aspects of the present invention will now be described in detail. To make the objectives, technical solutions, and advantages of the present invention clearer, the present invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only configured to explain the present invention and are not configured to limit the present invention. For those skilled in the art, the present invention can be practiced without some of these specific details. The following description of the embodiments is merely intended to provide a better understanding of the present invention by illustrating examples of the invention.

[0027] It should be noted that, in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element. The embodiments described below are merely illustrative; the division of modules or circuits is only a logical functional division, and other division methods may exist in actual implementation. In this embodiment and the accompanying drawings, elements unrelated to the present invention have been omitted and are not shown, and the dimensional relationships between the elements in the drawings are for ease of understanding only and are not intended to limit the actual scale.

[0028] Please see Figure 1This invention provides a duty cycle adjustable pulse signal output circuit, comprising: a rectifier module 1, a voltage divider sampling module 2, a triangular wave signal acquisition module 3, a peak signal acquisition module 4, and an error amplification module 5. The output terminal of the rectifier module 1 is electrically connected to the input terminal of the voltage divider sampling module 2. The output terminal of the voltage divider sampling module 2 is electrically connected to the output terminal of the triangular wave signal acquisition module 3 and the input terminal of the peak signal acquisition module 4, respectively. The output terminals of the triangular wave signal acquisition module 3 and the peak signal acquisition module 4 are electrically connected to the input terminal of the error amplification module 5, respectively. A power frequency AC signal is rectified by the rectifier module... The output module 2 generates a DC signal with a frequency twice that of the power frequency AC signal. This DC signal is called a frequency-doubled DC signal. After passing through the voltage divider sampling module 2, the frequency-doubled DC signal is output as a first DC signal and a second DC signal. The first DC signal is output as a triangular wave signal after passing through the triangular wave signal acquisition module 3. The second DC signal is output as a voltage signal after passing through the peak signal acquisition module 4. The voltage value of this voltage signal is basically maintained at a fixed value and is called the second peak signal. The voltage value of the second peak signal is closely related to the voltage of the power frequency AC signal. When the voltage of the power frequency AC signal changes, the voltage value of the second peak signal changes accordingly. The triangular wave signal and the second peak signal are respectively input into the error amplification module 5. The error amplification module 5 compares the triangular wave signal and the second peak signal. When the voltage value of the triangular wave signal is greater than the voltage value of the second peak signal, it outputs a high level; when the voltage value of the triangular wave signal is less than the voltage value of the second peak signal, it outputs a low level. The output terminal of the error amplification module 5 outputs a pulse signal. Since the voltage value of the second peak signal changes with the voltage value of the power frequency AC signal, when the power frequency AC signal voltage increases, the voltage value of the second peak signal increases, and the high-level pulse width and duty cycle of the pulse signal decrease. Conversely, when the power frequency AC signal voltage decreases, the voltage value of the second peak signal decreases, and the high-level pulse width and duty cycle of the pulse signal increase. Thus, an adjustable pulse width or adjustable duty cycle pulse signal is output, denoted as an adjustable duty cycle pulse signal. The duty cycle of the adjustable duty cycle pulse signal is inversely proportional to the voltage of the power frequency AC signal.

[0029] In one embodiment, see Figure 3The rectifier module includes a full-bridge rectifier D1. The AC input terminal of the full-bridge rectifier D1 is connected to the power frequency AC signal VAC, the positive DC output terminal is electrically connected to the voltage divider sampling module 2, and the negative DC output terminal is grounded. After passing through the full-bridge rectifier, the power frequency AC signal VAC outputs a DC signal with a frequency twice that of the power frequency AC signal VAC. The rectifier module converts the power frequency AC signal into a pulsating DC signal and outputs a stable DC voltage. The rectified DC signal is provided to other modules in the circuit, such as the voltage divider sampling module, to ensure that subsequent processing in the circuit can operate based on a stable DC signal.

[0030] In one embodiment, see Figure 2 or Figure 3 The voltage divider sampling module 2 includes a first voltage divider unit 21 and a second voltage divider unit 22 connected in parallel. The first voltage divider unit 21 includes a first resistor R1 and a second resistor R2 connected in series. One end of the first resistor R1 is electrically connected to the output terminal of the rectifier module 1, and the other end is electrically connected to one end of the second resistor R2. The other end of the second resistor R2 is grounded. The series connection of the first resistor R1 and the second resistor R2 is electrically connected to the triangular wave signal acquisition module 3. The second voltage divider unit 22 includes a fifth resistor R5 and a sixth resistor R6 connected in series. One end of the fifth resistor R5 is electrically connected to the output terminal of the rectifier module 1, and the other end is electrically connected to one end of the sixth resistor R6. The other end of the sixth resistor R6 is grounded. The series connection of the fifth resistor R5 and the sixth resistor R6 is electrically connected to the peak signal acquisition module 4. The frequency-doubled DC signal is output as a first DC signal after passing through the first voltage divider unit 21, and as a second DC signal after passing through the second voltage divider unit 22. The voltage divider sampling module 2 reduces the high-voltage signal to a suitable voltage range for subsequent circuit processing by dividing the rectified frequency-doubled DC signal. The first voltage divider unit converts the frequency-doubled DC signal into a first DC signal for generating a triangular wave. Precise voltage adjustment is achieved through series resistors, providing a stable and suitable input signal to the triangular wave signal acquisition module, ensuring the accuracy and stability of subsequent triangular wave signal generation. The second voltage divider unit acquires a second DC signal, which is provided to the peak signal acquisition module for detecting the peak voltage of the input signal, thus obtaining the peak signal. The voltage divider sampling module divides the high-voltage frequency-doubled DC signal into a low-voltage DC signal suitable for subsequent module processing, effectively preventing overload or damage to subsequent circuit modules caused by the high-voltage signal, and ensuring the accuracy and reliability of signal processing.

[0031] In one embodiment, such as Figure 2 or Figure 3As shown, the triangular wave signal acquisition module 3 includes a comparison unit 31 and an integration unit 32. The input terminal of the comparison unit 31 is electrically connected to the first voltage divider unit 21, and the output terminal is electrically connected to the input terminal of the integration unit 32. The output terminal of the integration unit 32 is electrically connected to the error amplification module 5. The first DC signal is output as a square wave signal after passing through the comparison unit 31, and the square wave signal is output as the triangular wave signal after passing through the integration unit 32.

[0032] Preferably, such as Figure 3 As shown, the comparison unit includes a first comparator U1 and a first capacitor C1, wherein the first capacitor C1 is electrically connected between the positive input terminal of the first comparator U1 and the first voltage divider unit 21, the negative input terminal of the first comparator U1 is grounded, and the inverting output terminal of the first comparator U1 is electrically connected to the integrator unit. The comparison unit compares the input first DC signal with a reference voltage (zero voltage) and outputs a square wave signal with consistent high and low level widths, which is provided to the integrator unit 32 to generate a stable triangular wave signal.

[0033] Preferably, such as Figure 3 As shown, the integration unit includes a second comparator U2, a third resistor R3, a fourth resistor R4, a second capacitor C2, and a reference voltage source Vref. The third resistor R3 is electrically connected between the negative input terminal of the second comparator U2 and the output terminal of the comparator unit 21. The fourth resistor R4 and the second capacitor C2 are connected in parallel between the output terminal and the negative input terminal of the second comparator. The reference voltage source Vref is electrically connected between the positive input terminal of the second comparator and ground. The integration unit 32 integrates the square wave signal, smoothing its pulse changes, and ultimately generating a stable triangular wave signal. The parallel structure of the second capacitor C2 and the fourth resistor R4 ensures the smoothness of the integration process, while the reference voltage source Vref provides a reliable reference voltage for the integration process. Through the comparator unit and the integration unit, the triangular wave signal acquisition module can generate a triangular wave signal with stable frequency and amplitude.

[0034] In one embodiment, such as Figure 2 and Figure 3 As shown, the peak signal acquisition module 4 includes a peak detection unit 41 and a voltage-controlled voltage source unit 42. The input terminal of the peak detection unit 41 is electrically connected to the second voltage divider unit 22, and the output terminal is electrically connected to the input terminal of the voltage-controlled voltage source unit 42. The output terminal of the voltage-controlled voltage source unit 42 is electrically connected to the error amplification module 5. The second DC signal is output as a first peak signal after passing through the peak detection unit 41. The first peak signal is adjusted by the voltage-controlled power supply 42 and then output as the second peak signal.

[0035] Preferably, please refer to Figure 3 The peak detection unit 41 includes a third comparator U3, a seventh resistor R7, a second diode D2, and a third capacitor C3. The positive input terminal of the third comparator U3 is electrically connected to the second voltage divider unit 21. The seventh resistor R7 is electrically connected between the negative input terminal and the output terminal of the third comparator U3. The anode of the second diode D2 is electrically connected to the output terminal of the third comparator U3, and the cathode is electrically connected to the input terminal of the voltage-controlled voltage source unit 42. One end of the third capacitor C3 is electrically connected to the cathode of the second diode D2, and the other end is grounded. The output terminal of the third comparator U3 is electrically connected to the negative input terminal to form a voltage follower. After buffering and amplifying the input second DC signal, a stable first peak signal is output via the peak detector composed of the second diode and the third capacitor.

[0036] Preferably, the voltage-controlled voltage source unit includes a first voltage-controlled voltage source E1 and an eighth resistor R8, wherein the current input and current output terminals of the first voltage-controlled voltage source E1 are grounded, the voltage output terminal is electrically connected to the output terminal of the peak detection unit 41, and the voltage output terminal is electrically connected to the error amplification module 5 via the eighth resistor R8. The voltage-controlled voltage source E1 further adjusts and amplifies the first peak signal before outputting a second peak signal. The peak signal acquisition module, through the coordinated operation of the peak detection unit and the voltage-controlled voltage source unit, achieves the conversion from a second DC signal to a stable second peak signal.

[0037] In one embodiment, see Figure 3The error amplification module 5 includes a fourth comparator U4, wherein the positive input terminal of the fourth comparator U4 is electrically connected to the output terminal of the triangular wave signal acquisition module 3, and the negative input terminal is electrically connected to the output terminal of the peak signal acquisition module 4. The fourth comparator U4 compares the triangular wave signal and the second peak signal. When the voltage value of the triangular wave signal is greater than the voltage value of the second peak signal, the output terminal of the fourth comparator U4 outputs a high level. When the voltage value of the triangular wave signal is less than the voltage value of the second peak signal, the output terminal of the fourth comparator U4 outputs a low level. The pulse signal with high and low levels is output according to the voltage and frequency of the triangular wave signal. The frequency of the pulse signal is the same as the frequency of the triangular wave signal, and the frequency of the triangular wave signal is the same as the frequency of the multiplied DC signal. Because the voltage value of the second peak signal changes with the voltage value of the power frequency AC signal, when the power frequency AC signal voltage increases, the voltage value of the second peak signal increases, the high-level pulse width of the pulse signal decreases, and the duty cycle decreases. Conversely, when the power frequency AC signal voltage decreases, the voltage value of the second peak signal decreases, the high-level pulse width of the pulse signal increases, and the duty cycle increases. This achieves a pulse width-adjustable or duty cycle-adjustable pulse signal, and the duty cycle of the duty cycle-adjustable pulse signal is inversely proportional to the voltage of the power frequency AC signal. Figure 3 As shown, signal sampling is performed at each sampling point (VAC, VDC, square, TRIA, peak_V, OUT) to obtain the following results: Figure 4 The signal waveforms at each sampling point are shown. Figure 4 As shown, when the AC voltage of the power frequency signal VAC increases (the sine waveform shown by the dashed line), the duty cycle of the final output OUT pulse signal (the pulse waveform shown by the dashed line) decreases.

[0038] The duty cycle adjustable pulse signal can be used to enable the load in the power frequency circuit to operate stably at a constant power even when the external power frequency AC signal voltage fluctuates. For details, please refer to Example 2.

[0039] In summary, the duty cycle adjustable pulse signal output circuit provided in this embodiment of the invention utilizes a rectifier module to convert the power frequency AC signal into a frequency-doubled DC signal. After voltage division and sampling processing, the two DC signals after voltage division enter a triangular wave signal acquisition module and a peak signal acquisition module, respectively. Through the triangular wave signal acquisition module, one DC signal is converted into a stable triangular wave signal. Simultaneously, the peak signal acquisition module performs peak detection on the other DC signal and acquires the peak signal. The triangular wave signal and the peak signal together act on the error amplification module, realizing a duty cycle adjustable pulse signal output. The duty cycle of the output pulse signal is dynamically adjusted according to the voltage change of the input power frequency AC signal, forming a duty cycle adjustment mechanism that is inversely proportional to the voltage. This allows the circuit to automatically adjust the duty cycle of the output pulse under different input voltages. The circuit of this invention generates a pulse signal with twice the power frequency and can automatically adjust the pulse width or duty cycle according to the power frequency voltage by using analog circuits instead of relying on inductive or capacitive components. When the power frequency voltage fluctuates within a certain range, the pulse width or duty cycle of the pulse signal output by the xxx circuit will automatically adjust according to the power frequency voltage, thereby ensuring that the load operates at a stable power level. This circuit has adaptive capability, maintaining a constant power output from the load even when the power frequency voltage changes. This allows the load to operate normally under unstable power conditions, avoiding the impact of power fluctuations on equipment performance and greatly improving equipment stability and operating efficiency.

[0040] Example 2

[0041] Based on the above embodiment one, please refer to Figure 5 This invention provides a constant power frequency circuit, comprising a duty cycle adjustable pulse signal output circuit as described in Embodiment 1, a load, a transistor, and a bias resistor. In this constant power frequency circuit, the base of the transistor Q0 is electrically connected to the output terminal of the duty cycle adjustable pulse signal output circuit, the collector is electrically connected to the negative terminal of the load, and the emitter is grounded via the bias resistor R0. Figure 5 As shown, after being rectified by the rectifier module, the power frequency AC signal is connected to the positive terminal of the load on one hand, and to the voltage divider sampling module on the other hand, and then to the subsequent modules to obtain a duty cycle adjustable pulse signal. When the voltage of the power frequency AC signal increases, the duty cycle of the duty cycle adjustable pulse signal output by the duty cycle adjustable pulse signal output circuit decreases accordingly. When the voltage of the power frequency AC signal decreases, the duty cycle of the duty cycle adjustable pulse signal output by the duty cycle adjustable pulse signal output circuit increases accordingly, so that even if the external power frequency AC signal changes within a certain voltage range, the load can still operate stably at a constant power.

[0042] Example 3

[0043] Based on the above embodiments one or two, this invention provides a power frequency grid device, which includes an adjustable duty cycle pulse signal output circuit as described in embodiment one or a constant power frequency circuit as described in embodiment two. This power frequency grid device, such as a UPS, uninterruptible power supply, industrial motor control, and voltage protection device for household appliances, can maintain stable power even when the voltage fluctuates within a certain range. It exhibits high stability and energy efficiency, which helps reduce maintenance costs.

[0044] The duty cycle adjustable pulse signal output circuit provided by this invention has been described in detail above. Those skilled in the art will further understand that the various illustrative logic blocks, modules, circuits, and algorithm steps described in conjunction with the embodiments disclosed herein can be implemented as electronic hardware, computer software, or a combination of both. To clearly illustrate hardware-software interchangeability, various illustrative components, blocks, modules, circuits, and steps have been described above in terms of functionality. Whether the functionality is implemented as hardware or software depends on the specific use and the design constraints imposed on the overall system. Those skilled in the art can implement the described functionality in different ways for each specific use. Any equivalent structural or procedural transformations made using the content of this specification and drawings, or direct or indirect applications in other related technical fields, are similarly included within the scope of patent protection of this invention. This should not be construed as a limitation of the invention.

[0045] The above description is merely a specific embodiment of the present invention. Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the specific working processes of the systems, modules, and units described above can be referred to the corresponding processes in the foregoing method embodiments, and will not be repeated here. It should be understood that the protection scope of the present invention is not limited thereto. Any person skilled in the art can easily conceive of various equivalent modifications or substitutions within the technical scope disclosed in the present invention, and these modifications or substitutions should all be covered within the protection scope of the present invention.

Claims

1. A pulse signal output circuit with adjustable duty cycle, characterized in that, The circuit includes a rectifier module, a voltage divider sampling module, a triangular wave signal acquisition module, a peak signal acquisition module, and an error amplification module. The output terminal of the rectifier module is electrically connected to the input terminal of the voltage divider sampling module. The output terminal of the voltage divider sampling module is electrically connected to the input terminals of the triangular wave signal acquisition module and the peak signal acquisition module, respectively. The output terminals of the triangular wave signal acquisition module and the peak signal acquisition module are electrically connected to the input terminal of the error amplification module, respectively. The power frequency AC signal is rectified by the rectifier module and output as a frequency-doubled DC signal. The frequency-doubled DC signal is then processed by the voltage divider sampling module and output as a first DC signal and a second DC signal, respectively. The first DC signal is processed by the triangular wave signal acquisition module and output as a triangular wave signal. The second DC signal is processed by the peak signal acquisition module and output as a second peak signal. The triangular wave signal and the second peak signal are processed by the error amplification module and output as a duty cycle adjustable pulse signal. The duty cycle of the duty cycle adjustable pulse signal is inversely proportional to the voltage of the power frequency AC signal.

2. The duty cycle adjustable pulse signal output circuit according to claim 1, characterized in that, The voltage divider sampling module includes a first voltage divider unit and a second voltage divider unit connected in parallel. The first voltage divider unit includes a first resistor and a second resistor connected in series. The series node of the first resistor and the second resistor is electrically connected to the triangular wave signal acquisition module. The second voltage divider unit includes a fifth resistor and a sixth resistor connected in series. The series node of the fifth resistor and the sixth resistor is electrically connected to the peak signal acquisition module. The frequency-doubled DC signal is output as a first DC signal after passing through the first voltage divider unit, and as a second DC signal after passing through the second voltage divider unit.

3. The duty cycle adjustable pulse signal output circuit according to claim 2, characterized in that, The triangular wave signal acquisition module includes a comparison unit and an integration unit. The input terminal of the comparison unit is electrically connected to the first voltage divider unit, and the output terminal is electrically connected to the input terminal of the integration unit. The output terminal of the integration unit is electrically connected to the error amplification module. The first DC signal is output as a square wave signal after passing through the comparison unit, and the square wave signal is output as the triangular wave signal after passing through the integration unit.

4. The duty cycle adjustable pulse signal output circuit according to claim 3, characterized in that, The comparison unit includes a first comparator and a first capacitor, wherein the first capacitor is electrically connected between the positive input terminal of the first comparator and the first voltage divider unit, the negative input terminal of the first comparator is grounded, and the inverting output terminal of the first comparator is electrically connected to the integrator unit.

5. The duty cycle adjustable pulse signal output circuit according to claim 3, characterized in that, The integration unit includes a second comparator, a third resistor, a fourth resistor, a second capacitor, and a reference voltage source. The third resistor is electrically connected between the negative input terminal of the second comparator and the output terminal of the comparator unit. The fourth resistor and the second capacitor are connected in parallel between the output terminal and the negative input terminal of the second comparator. The reference voltage source is electrically connected between the positive input terminal of the second comparator and ground.

6. The duty cycle adjustable pulse signal output circuit according to claim 2, characterized in that, The peak signal acquisition module includes a peak detection unit and a voltage-controlled voltage source unit. The input terminal of the peak detection unit is electrically connected to the second voltage divider unit, and the output terminal is electrically connected to the input terminal of the voltage-controlled voltage source unit. The output terminal of the voltage-controlled voltage source unit is electrically connected to the error amplification module. The second DC signal is output as a first peak signal after passing through the peak detection unit. The first peak signal is adjusted by the voltage-controlled voltage source and then output as the second peak signal.

7. The duty cycle adjustable pulse signal output circuit according to claim 6, characterized in that, The peak detection unit includes a third comparator, a seventh resistor, a second diode, and a third capacitor. The positive input terminal of the third comparator is electrically connected to the second voltage divider unit. The seventh resistor is electrically connected between the negative input terminal and the output terminal of the third comparator. The anode of the second diode is electrically connected to the output terminal of the third comparator, and the cathode is electrically connected to the input terminal of the voltage-controlled voltage source unit. One end of the third capacitor is electrically connected to the cathode of the second diode, and the other end is grounded. The voltage-controlled voltage source unit includes a first voltage-controlled voltage source and an eighth resistor. The current input terminal and current output terminal of the first voltage-controlled voltage source are grounded, the voltage output terminal is electrically connected to the output terminal of the peak detection unit, and the voltage output terminal is electrically connected to the error amplification module via the eighth resistor.

8. The duty cycle adjustable pulse signal output circuit according to any one of claims 1-7, characterized in that, The error amplification module includes a fourth comparator, wherein the positive input terminal of the fourth comparator is electrically connected to the output terminal of the triangular wave signal acquisition module, and the negative input terminal is electrically connected to the output terminal of the peak signal acquisition module. The triangular wave signal and the second peak signal are output as the duty cycle adjustable pulse signal after passing through the fourth comparator.

9. A constant power frequency circuit, characterized in that, The circuit includes a duty cycle adjustable pulse signal output circuit as described in any one of claims 1 to 9, a load, a transistor, and a bias resistor. The base of the transistor is electrically connected to the output terminal of the duty cycle adjustable pulse signal output circuit, the collector is electrically connected to the negative terminal of the load, and the emitter is grounded via the bias resistor. The power frequency AC signal is rectified by DC and input to the positive terminal of the load. When the power frequency AC signal voltage increases, the duty cycle of the duty cycle adjustable pulse signal output by the duty cycle adjustable pulse signal output circuit decreases accordingly. When the power frequency AC signal voltage decreases, the duty cycle of the duty cycle adjustable pulse signal output by the duty cycle adjustable pulse signal output circuit increases accordingly, thereby achieving constant load power.

10. A power frequency grid device, characterized in that, The device includes a duty cycle adjustable pulse signal output circuit as described in any one of claims 1 to 8 or a constant power frequency circuit as described in claim 9.

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