Complex programmable logic device refreshing method and electronic device

Abstract

The disclosure provides a complex programmable logic device refreshing method and electronic equipment, and relates to the technical field of communication. In the case that first state information in a first register of a first complex programmable logic device in a complex programmable logic device set is idle state information, a first baseboard management controller in a plurality of baseboard management controllers is controlled to refresh the first complex programmable logic device, and the first state information is modified to refreshing state information. In the case that it is determined that the first complex programmable logic device is refreshed completely, the first state information is modified to the idle state information, and the first baseboard management controller is controlled to refresh a second complex programmable logic device according to a refreshing sequence corresponding to the complex programmable logic device set, second state information of the second complex programmable logic device and a second register. The complex programmable logic device can be upgraded without being fixed on a certain BMC, and the probability of refreshing failure caused by refreshing conflict can be reduced.

Description

TECHNICAL FIELD

[0001] The present disclosure relates to the technical field of communication, and particularly relates to a complex programmable logic device refreshing method and an electronic device. BACKGROUND

[0002] With the development of science and technology, computing power has become a bottleneck restricting development. As the requirement for computing power is getting higher and higher, the number of deployed servers is getting larger and larger. Among them, the multi-node server is a server for high-density computing scenarios, and the application scenarios include but are not limited to teaching and research, scientific research, simulation, etc. When the multi-node baseboard management controller (BMC) refreshes the backplane complex programmable logic device (CPLD), the refresh rhythm is inconsistent, which causes a control conflict when the multi-node baseboard management controller (BMC) refreshes the backplane complex programmable logic device (CPLD), and the problem that the backplane upgrade can only be fixed on one node BMC. SUMMARY

[0003] The present disclosure provides a complex programmable logic device refreshing method and an electronic device. The main purpose is to solve the problem of control conflict when the multi-node baseboard management controller (BMC) refreshes the backplane complex programmable logic device (CPLD), and the problem that the backplane upgrade can only be fixed on one node BMC.

[0004] According to a first aspect of the present disclosure, a complex programmable logic device refreshing method is provided, comprising:

[0005] obtaining first state information in a first register of a first complex programmable logic device in a complex programmable logic device set, wherein the complex programmable logic device set comprises at least two complex programmable logic devices;

[0006] in the case that the first state information is idle state information, controlling a first baseboard management controller in a plurality of baseboard management controllers to refresh the first complex programmable logic device, and modifying the first state information to refresh state information;

[0007] in the case that it is determined that the first complex programmable logic device is refreshed completely, modifying the first state information to the idle state information, and obtaining a second complex programmable logic device according to a refreshing order corresponding to the complex programmable logic device set, wherein the second complex programmable logic device is a next complex programmable logic device to be refreshed adjacent to the first complex programmable logic device in the complex programmable logic device set;

[0008] controlling the first baseboard management controller to refresh the second complex programmable logic device according to the second complex programmable logic device and second state information of a second register of the second complex programmable logic device.

[0009] According to a second aspect of the present disclosure, a complex programmable logic device refreshing apparatus is provided, comprising:

[0010] an information obtaining unit, configured to obtain first state information in a first register of a first complex programmable logic device in a complex programmable logic device set, wherein the complex programmable logic device set comprises at least two complex programmable logic devices;

[0011] a device refreshing unit, configured to control a first baseboard management controller in a plurality of baseboard management controllers to refresh the first complex programmable logic device and modify the first state information to refresh state information in a case that the first state information is idle state information;

[0012] an information modifying unit, configured to modify the first state information to the idle state information and obtain a second complex programmable logic device according to a refreshing order corresponding to the complex programmable logic device set in a case that it is determined that the first complex programmable logic device is refreshed, wherein the second complex programmable logic device is a next complex programmable logic device to be refreshed adjacent to the first complex programmable logic device in the complex programmable logic device set;

[0013] the device refreshing unit is further configured to control the first baseboard management controller to refresh the second complex programmable logic device according to the second complex programmable logic device and second state information in a second register of the second complex programmable logic device.

[0014] According to a third aspect of the present disclosure, an electronic device is provided, comprising:

[0015] at least one processor; and

[0016] a memory connected with the at least one processor in communication; wherein

[0017] the memory stores instructions executable by the at least one processor, and the instructions are executed by the at least one processor to enable the at least one processor to perform the method of the first aspect.

[0018] According to a fourth aspect of the present disclosure, a non-transitory computer readable storage medium storing computer instructions is provided, wherein the computer instructions are used to enable the computer to perform the method of the first aspect.

[0019] According to a fifth aspect of the present disclosure, a computer program product is provided, comprising a computer program, wherein the computer program, when executed by a processor, implements the method of the first aspect.

[0020] Through this disclosure, by acquiring the first state information in the first register of a first complex programmable logic device in a complex programmable logic device set, wherein the complex programmable logic device set includes at least two complex programmable logic devices; when the first state information is idle state information, controlling the first baseboard management controller among multiple baseboard management controllers to refresh the first complex programmable logic device and modifying the first state information to refresh state information; when it is determined that the first complex programmable logic device has been refreshed, modifying the first state information to the idle state information, and acquiring a second complex programmable logic device according to the refresh order corresponding to the complex programmable logic device set, wherein the second complex programmable logic device is the next complex programmable logic device to be refreshed adjacent to the first complex programmable logic device in the complex programmable logic device set; and controlling the first baseboard management controller to refresh the second complex programmable logic device according to the second complex programmable logic device and the second state information of the second complex programmable logic device's second register. Therefore, the backplane CPLD of a multi-node baseboard management controller (BMC) can be refreshed based on the status information of multiple complex programmable logic devices, reducing control conflicts when refreshing the backplane CPLD. In the production environment, it is not necessary to upgrade a single baseboard management controller. A mechanism can be provided for multiple BMCs to refresh the backplane CPLD simultaneously. The status information of the CPLD can be obtained each time the BMC is refreshed, and the refresh operation can be performed based on the obtained status information. This can reduce the probability of refresh failure due to refresh conflicts and improve the production efficiency of multi-node servers on the production line and the operation and maintenance efficiency of server clusters.

[0021] It should be understood that the description in this section is not intended to identify key or essential features of the embodiments of this disclosure, nor is it intended to limit the scope of this disclosure. Other features of this disclosure will become readily apparent from the following description. Attached Figure Description

[0022] The accompanying drawings are provided to better understand this solution and do not constitute a limitation of this disclosure. Wherein:

[0023] Figure 1 This is a schematic diagram illustrating an example of the spatial distribution of RAID 10 provided in an embodiment of this disclosure;

[0024] Figure 2 This is a schematic diagram illustrating an example of a read / write I / O process for RAID 10 provided in an embodiment of this disclosure;

[0025] Figure 3 This is a schematic diagram illustrating an example of a refresh architecture for a complex programmable logic device provided in an embodiment of this disclosure.

[0026] Figure 4 This is a schematic diagram illustrating an example of a refresh method for a complex programmable logic device provided in an embodiment of this disclosure.

[0027] Figure 5 This is a schematic diagram of the structure of a complex programmable logic device refresh device provided in an embodiment of this disclosure. Detailed Implementation

[0028] The exemplary embodiments of this disclosure are described below with reference to the accompanying drawings, including various details of the embodiments to aid understanding, and should be considered merely exemplary. Therefore, those skilled in the art will recognize that various changes and modifications can be made to the embodiments described herein without departing from the scope and spirit of this disclosure. Similarly, for clarity and brevity, descriptions of well-known functions and structures are omitted in the following description.

[0029] With the rapid development of the national digital economy, computing power has become a bottleneck restricting development. In particular, the application of large-scale AI models has created a huge computing power gap. Computing power refers to the ability of data center servers to process data and output results. With the development of AI technology and the application of large-scale models, the demand for computing power will increase, requiring a greater number of servers to be deployed. For example, many internet customers will join the wave of artificial intelligence, increasing investment in data center construction and servers, thereby increasing the computing power of their data centers.

[0030] According to some embodiments, backplane CPLD upgrades in multi-node servers present issues related to the control of the multi-node Baseboard Management Controller (BMC) for refreshing the backplane CPLD, and the logic of refreshing the backplane with dual CPLD chips. This prevents the production diagnostics (Diag) from performing backplane upgrades on a single node BMC, thus limiting the task to multiple nodes simultaneously. This is particularly problematic when a backplane has two CPLD chips, as refreshing a CPLD requires a power-off process. Since powering multiple nodes cannot be interrupted, the status of the refreshed CPLD is crucial for determining whether to perform a power-off operation and refresh the other CPLD. Consequently, when multiple BMCs simultaneously refresh both CPLDs on the backplane, refresh failures occur, and the production line Diag program is limited to refreshing CPLDs on a fixed node.

[0031] Specifically, the CPLD refresh method in some embodiments determines that if multiple nodes' BMCs are refreshed simultaneously, refresh chaos will occur. For example, switching the I2C link during BMC refresh will cause refresh failure. In addition, inconsistent refresh rhythms of different nodes' BMCs will lead to abnormal data being flashed into the CPLD, causing the backplane to fail to start and affecting its monitoring and use. Furthermore, when the production line's Diag refreshes the backplane CPLD, it also sends refresh tasks to multiple node BMCs within the band. If multiple nodes refresh dual CPLDs simultaneously, failure will occur, causing the Diag program to stop and affecting production line efficiency. Similarly, refreshing a single node's BMC will also affect production line efficiency.

[0032] The following description, with reference to the accompanying drawings, describes a method for refreshing a complex programmable logic device and an electronic device according to embodiments of the present disclosure.

[0033] Figure 1 This is a flowchart illustrating a method for refreshing a complex programmable logic device according to an embodiment of this disclosure. Figure 1 As shown, the method includes the following steps:

[0034] Step 101: Obtain the first state information in the first register of the first complex programmable logic device in the complex programmable logic device set, wherein the complex programmable logic device set includes at least two complex programmable logic devices.

[0035] According to some embodiments, the implementing entity of this disclosure may be, for example, an electronic device. The name of the electronic device is not limited. For example, the electronic device may also be called a computer device, a terminal device, etc. The electronic device does not specifically refer to a particular fixed device. For example, when the structure of the electronic device changes, the electronic device may also change accordingly. For example, when the device identifier of the electronic device changes, the electronic device may also change accordingly.

[0036] The technical solution of this disclosure can be applied to scenarios where multiple BMCs simultaneously refresh dual CPLD chips on the backplane.

[0037] In some embodiments, the complex programmable logic device (CPLD) set includes at least two CPLDs. A CPLD is an integrated circuit that allows a user to program various complex logic functions by constructing logic functions according to their needs. This CPLD set is not specifically defined as a fixed set. For example, the CPLD set may change as the number of CPLDs changes. For instance, the CPLD set may include two CPLDs.

[0038] In some embodiments, the first complex programmable logic device (CPLD) may be the CPLD to be refreshed determined by the first baseboard management controller when performing a CPLD refresh task. This first CPLD does not specifically refer to a fixed device. For example, when the device determination method changes, the first CPLD may also change accordingly. For example, when the device identifier corresponding to the first CPLD changes, the first CPLD may also change accordingly.

[0039] In some embodiments, a register may be used to record the status information of a complex programmable logic device (CLP). This register is not specifically a fixed register. Different CLPs may correspond to different registers. One CLP may correspond to one register. For example, when the storage capacity corresponding to a register changes, the register may also change accordingly. This register may also be called a status register.

[0040] According to some embodiments, the first register may be, for example, a register corresponding to a first complex programmable logic device. The "first" in the first register is used to distinguish it from the other registers and does not specifically refer to a particular fixed register.

[0041] According to some embodiments, the status information can be used, for example, to indicate whether a complex programmable logic device is in a refresh state. This status information does not specifically refer to any fixed information. For example, the status information can change accordingly when the time point at which it is acquired changes. The first status information can, for example, be the status information corresponding to a first complex programmable logic device.

[0042] In some embodiments, first state information in the first register of a first complex programmable logic device in a complex programmable logic device set can be obtained, wherein the complex programmable logic device set includes at least two complex programmable logic devices.

[0043] Step 102: When the first state information is idle state information, control the first baseboard management controller among the multiple baseboard management controllers to refresh the first complex programmable logic device and modify the first state information to refresh state information.

[0044] According to some embodiments, idle state information can be used, for example, to indicate that the first complex programmable logic device is not in a refresh state. The name of this idle state information is not limited. For example, the idle state information can also be referred to as "not in refresh state information."

[0045] According to some embodiments, the multiple baseboard management controllers may be, for example, multiple baseboard management controllers corresponding to multiple node servers. These multiple baseboard management controllers do not specifically refer to a single fixed controller. For example, when the number of controllers corresponding to the multiple baseboard management controllers changes, the multiple baseboard management controllers may also change accordingly. For example, when one of the multiple baseboard management controllers changes, the multiple baseboard management controllers may also change accordingly.

[0046] According to some embodiments, the BMC (Baseboard Management Controller) is the core control unit of a server, a motherboard processor on an ARM architecture used to manage the server. OpenBMC, an open-source software architecture, is used to build a dedicated Linux system image for a complete BMC. OpenBMC employs a novel boost asio technology, offering advantages over traditional BMC development such as modular programming, modular debugging, and asynchronous scheme management. In the server field, the BMC, as a core component, plays a significant role in detecting overall server performance, sensor monitoring (threshold sensors, discrete sensors), fault alarms, power consumption, logging (System Event Log (SEL) / Fault Diagnostic Log (IDL), etc.), thermal management, component monitoring, BIOS interaction, kernel-based Virtual Machine (KVM) decoding, network configuration, and fault diagnosis.

[0047] According to some embodiments, the first substrate management controller may be, for example, the substrate management controller that currently needs to perform the refresh task. This first substrate management controller does not specifically refer to a particular fixed substrate management controller. For example, when the controller identifier corresponding to the first substrate management controller changes, the first substrate management controller may also change accordingly. The refresh in this disclosure embodiment can also be referred to as an upgrade.

[0048] In some embodiments, refresh status information can be used to indicate that the first complex programmable logic device (CPLD) is in a refresh state, i.e., that the BMC is refreshing the first CPLD. This refresh status information can also be referred to as busy status information or simply busy status information.

[0049] In some embodiments, when the first state information is idle state information, the first substrate management controller among multiple substrate management controllers is controlled to refresh the first complex programmable logic device and modify the first state information to refresh state information. For example, the first state information can be modified from idle state information to refresh state information.

[0050] Step 103: If it is determined that the first complex programmable logic device has been refreshed, the first state information is modified to idle state information, and the second complex programmable logic device is obtained according to the refresh order corresponding to the set of complex programmable logic devices. The second complex programmable logic device is the next complex programmable logic device to be refreshed adjacent to the first complex programmable logic device in the set of complex programmable logic devices.

[0051] According to some embodiments, the refresh order corresponding to a complex programmable logic device (CPL) set can be, for example, an order in which a BMC refreshes each CPL device in the CPL set. This refresh order does not specifically refer to a fixed order. For example, different BMCs can correspond to different refresh orders.

[0052] According to some embodiments, the second complex programmable logic device (CPLD) may be, for example, the next CPLD to be refreshed adjacent to the first CPLD in the set of CPLDs. That is, the second CPLD is the next CPLD to be refreshed after the first CPLD has been refreshed. This second CPLD does not specifically refer to any particular device. For example, when the set of CPLDs changes or the refresh order changes, the second CPLD may also change accordingly.

[0053] According to some embodiments, when it is determined that the first complex programmable logic device has been refreshed, the first state information is modified to idle state information, and the second complex programmable logic device is obtained according to the refresh order corresponding to the set of complex programmable logic devices. The second complex programmable logic device is the next complex programmable logic device to be refreshed adjacent to the first complex programmable logic device in the set of complex programmable logic devices.

[0054] According to some embodiments, when it is determined that the first complex programmable logic device has been refreshed, the first state information is modified to idle state information, that is, the first state information can be changed from refresh state information to idle state information.

[0055] Step 104: Based on the second state information of the second register of the second complex programmable logic device, control the first substrate management controller to refresh the second complex programmable logic device.

[0056] According to some embodiments, the second state information can be used, for example, to indicate the state information of the second complex programmable logic device. The first substrate management controller can be controlled to refresh the second complex programmable logic device based on the second state information of the second register of the second complex programmable logic device.

[0057] In some embodiments, the complex programmable logic device (CPL) set can be traversed to refresh each CPL device in the CPL set using the first basic management control.

[0058] Through this disclosure, by acquiring the first state information in the first register of a first complex programmable logic device in a complex programmable logic device set, wherein the complex programmable logic device set includes at least two complex programmable logic devices; when the first state information is idle state information, controlling the first baseboard management controller among multiple baseboard management controllers to refresh the first complex programmable logic device and modifying the first state information to refresh state information; when it is determined that the refresh of the first complex programmable logic device is completed, modifying the first state information to idle state information, and acquiring the second complex programmable logic device according to the refresh order corresponding to the complex programmable logic device set, wherein the second complex programmable logic device is the next complex programmable logic device to be refreshed adjacent to the first complex programmable logic device in the complex programmable logic device set; and controlling the first baseboard management controller to refresh the second complex programmable logic device according to the second state information of the second register of the second complex programmable logic device and the second complex programmable logic device. Therefore, the backplane CPLD of a multi-node baseboard management controller (BMC) can be refreshed based on the status information of multiple complex programmable logic devices, reducing control conflicts when refreshing the backplane CPLD. In the production environment, it is not necessary to upgrade a single baseboard management controller. A mechanism can be provided for multiple BMCs to refresh the backplane CPLD simultaneously. The status information of the CPLD can be obtained each time the BMC is refreshed, and the refresh operation can be performed based on the obtained status information. This can reduce the probability of refresh failure due to refresh conflicts and improve the production efficiency of multi-node servers on the production line and the operation and maintenance efficiency of server clusters.

[0059] Furthermore, in one possible implementation of this embodiment, Figure 2 This is a flowchart illustrating another method for refreshing a complex programmable logic device provided in an embodiment of this disclosure. Figure 2 As shown, the method includes the following steps:

[0060] Step 201: If the first baseboard management controller has been started and it is determined that there is a complex programmable logic device set refresh task corresponding to the first baseboard management controller, the first complex programmable logic device is obtained according to the refresh order corresponding to the complex programmable logic device set.

[0061] According to some embodiments, the implementing entity of this disclosure may be, for example, an electronic device. The name of the electronic device is not limited. For example, the electronic device may also be called a computer device, a terminal device, etc. The electronic device does not specifically refer to a particular fixed device. For example, when the structure of the electronic device changes, the electronic device may also change accordingly. For example, when the device identifier of the electronic device changes, the electronic device may also change accordingly.

[0062] The relevant processes can be described as above, and will not be repeated here.

[0063] In some embodiments, Figure 3 This is a schematic diagram illustrating an example of a refresh architecture for a complex programmable logic device provided in an embodiment of this disclosure. Figure 3 As shown, the multi-node server includes four nodes. Each node's BMC can access the backplane, and each node's BMC can also refresh the backplane's CPLD. This architecture can include four BMC nodes and a hard disk backplane. The hard disk backplane can, for example, include two CPLD chips, namely BMC node 1, BMC node 2, BMC node 3, BMC node 4, and CPLD chip 1 and CPLD chip 2. CPLD chip 1 can also be referred to as CPLD1, and CPLD chip 2 can also be referred to as CPLD2.

[0064] According to some embodiments, when multiple node BMCs simultaneously refresh the backplane CPLD, the node that first executes the refresh task has the highest priority. Other node BMCs, when refreshing the CPLD, can first obtain the refresh task state machine from the CPLD1 chip. If the CPLD1 chip's refresh state machine is idle (IDL), it indicates that CPLD1 is in an idle state and can be refreshed, meaning no other node BMC is refreshing the CPLD1 chip. In this case, the node BMC then executes the task of refreshing the CPLD1 chip image. The refresh state machine is a state machine used to control the CPLD refresh operation. It manages the CPLD refresh process through a series of predefined states and state transition conditions.

[0065] In some embodiments, Figure 4This is a schematic diagram illustrating an example of a refresh method for a complex programmable logic device provided in an embodiment of this disclosure. Figure 4 As shown, specifically, after the multi-node server is powered on and the BMC starts up, the BMC refresh backplane CPLD monitoring process starts and monitors in real time whether there is a task to refresh the CPLD.

[0066] Step 202: Control the first baseboard management controller to access the first register of the first complex programmable logic device through a serial communication protocol to obtain the first status information;

[0067] The relevant processes can be described as above, and will not be repeated here.

[0068] In some embodiments, when an upgrade task, i.e., a CPLD refresh task, exists, the first baseboard management controller (BMC) can access the first register of the first complex programmable logic device (CPLD1) via a serial communication protocol to obtain first state information. This serial communication protocol can be, for example, I2C. Specifically, the BMC accesses the UFM register of the CPLD1 chip via I2C to obtain the refresh state machine.

[0069] Step 203: When the first state information is idle state information, control the first baseboard management controller among the multiple baseboard management controllers to refresh the first complex programmable logic device and modify the first state information to refresh state information.

[0070] The relevant processes can be described as above, and will not be repeated here.

[0071] According to some embodiments, when the first baseboard management controller among multiple baseboard management controllers refreshes the first complex programmable logic device, the state machine value of the CPLD1 chip's UFM register can be set to Busy to ensure that other node BMCs besides the first baseboard management controller do not affect the entire task of refreshing the CPLD1 chip image. That is, other BMCs cannot perform refresh tasks on the CPLD1 chip.

[0072] According to some embodiments, controlling a first substrate management controller among a plurality of substrate management controllers to refresh a first complex programmable logic device and modifying first state information to refresh state information includes:

[0073] During the process of refreshing the first complex programmable logic device by the first baseboard management controller among multiple baseboard management controllers, the first refresh information of the refresh task of the complex programmable logic device set corresponding to the first baseboard management controller is monitored.

[0074] If the first refresh information meets the first information requirements, the first status information is modified to refresh status information. Therefore, during the refresh process of the first complex programmable logic device, it is possible to monitor whether the refresh task is normal, which can improve the accuracy of refresh task execution, reduce the acquisition time of abnormal refresh task execution, and improve refresh efficiency.

[0075] According to some embodiments, the method further includes:

[0076] If the first refresh information does not meet the first information requirements, the first state information is set to idle state information, and the refresh task of the complex programmable logic device set corresponding to the first substrate management controller is terminated. This reduces the situation where other substrate management controllers cannot refresh the first complex programmable logic device when the first substrate management controller fails to refresh the first complex programmable logic device, thereby improving the accuracy of refresh task execution.

[0077] Specifically, if the refresh state machine of the CPLD1 chip is in the IDL state, it indicates that the CPLD1 chip is in an idle state, and the first node BMC can execute the refresh task for the CPLD1 chip. During the refresh process, the refresh task is monitored to determine if it is normal. If the refresh is normal, the state machine value of the CPLD1 UFM register is updated to Busy in real time to prevent other nodes' BMCs from executing refresh tasks, until the refresh of CPLD1 is completed and the refresh task for the CPLD2 chip is executed. If the refresh task of CPLD1 fails, the state machine value of the CPLD1 UFM register is changed to IDL state to prevent subsequent refresh tasks from being unacceptable after a refresh failure.

[0078] According to some embodiments, after modifying the first state information to refresh the state information, the method further includes:

[0079] During the process of refreshing the first complex programmable logic device by the first baseboard management controller among multiple baseboard management controllers, a refresh task for the complex programmable logic device set corresponding to the second baseboard management controller is obtained.

[0080] According to the refresh task of the complex programmable logic device set corresponding to the second baseboard management controller, when it is determined that the first state information in the first register of the first complex programmable logic device is refresh state information, the control of the second baseboard management controller to refresh the first complex programmable logic device is stopped. The second baseboard management controller is any baseboard management controller other than the first baseboard management controller among multiple baseboard management controllers. Therefore, when the first complex programmable logic device is in the refresh state, other baseboard management controllers cannot refresh the first complex programmable logic device, which can reduce refresh conflicts, reduce the probability of refresh failure, and increase the probability of refresh success.

[0081] Specifically, when CPLD1 is in the Busy state, it means that the CPLD1 chip is being refreshed and will not accept new refresh tasks. For example, when the first node BMC performs a refresh operation on the CPLD1 chip, the second node BMC will skip the CPLD1 chip refresh task and then perform the CPLD2 chip refresh task.

[0082] According to some embodiments, the method further includes:

[0083] According to the refresh task of the complex programmable logic device set corresponding to the second baseboard management controller, when it is determined that the first status information in the first register of the first complex programmable logic device is the refresh status information, the second complex programmable logic device is obtained according to the refresh order corresponding to the complex programmable logic device set, wherein the second complex programmable logic device is the next complex programmable logic device to be refreshed adjacent to the first complex programmable logic device in the complex programmable logic device set.

[0084] Obtain the second state information of the second register of the second complex programmable logic device;

[0085] When the second state information is idle, the second baseboard management controller refreshes the second complex programmable logic device (CPLD) and modifies the second state information to refresh state information. Therefore, by using the state information corresponding to the CPLD, it is possible to determine whether to refresh it, reducing the probability of conflicts when multiple baseboard management controllers refresh a set of CPLDs and improving the refresh success rate.

[0086] According to some embodiments, to execute a refresh task for CPLD2, the value of the state machine of the UFM register of the CPLD2 chip can be obtained first. If the value is IDL state, it means that the CPLD2 chip is in an idle state and can accept refresh tasks, and then the refresh task of the CPLD2 chip will be executed.

[0087] Step 204: If it is determined that the first complex programmable logic device has been refreshed, the first state information is modified to idle state information, and the second complex programmable logic device is obtained according to the refresh order corresponding to the set of complex programmable logic devices. The second complex programmable logic device is the next complex programmable logic device to be refreshed adjacent to the first complex programmable logic device in the set of complex programmable logic devices.

[0088] The relevant processes can be described as above, and will not be repeated here.

[0089] Step 205: Based on the second state information of the second register of the second complex programmable logic device, control the first substrate management controller to refresh the second complex programmable logic device.

[0090] The relevant processes can be described as above, and will not be repeated here.

[0091] According to some embodiments, controlling the first substrate management controller to refresh the second complex programmable logic device includes:

[0092] When the second state information of the second register of the second complex programmable logic device is idle state information, listen for the second refresh information of the complex programmable logic device set refresh task corresponding to the first baseboard management controller.

[0093] If the second refresh information meets the requirements of the second information, the second status information is modified to refresh status information;

[0094] If the second refresh information does not meet the requirements of the second information, the refresh task of the complex programmable logic device set corresponding to the first substrate management controller is terminated.

[0095] According to some embodiments, the second refresh information may be, for example, relevant information when the first substrate management controller refreshes the second complex programmable logic device, and the second refresh information may include, for example, refresh progress information, refresh data information, etc.

[0096] According to some embodiments, after obtaining the first state information in the first register of the first complex programmable logic device in the complex programmable logic device set, the method further includes:

[0097] If the first status information is refresh status information, the second complex programmable logic device is obtained according to the refresh order corresponding to the complex programmable logic device set.

[0098] Obtain the second state information of the second register in the second complex programmable logic device;

[0099] When the second state information is idle state information, the first substrate management controller is controlled to refresh the second complex programmable logic device and modify the second state information to refresh state information.

[0100] Once it is determined that the second complex programmable logic device has completed its refresh, the second state information is modified to idle state information.

[0101] According to some embodiments, the method further includes:

[0102] If the second status information is refresh status information, the refresh task of the complex programmable logic device set corresponding to the first substrate management controller is terminated.

[0103] According to some embodiments, for example, if the UFM refresh state machine of the CPLD1 chip is in a Busy state, it indicates that CPLD1 is being refreshed by another node's BMC. In this case, the BMC will reject the request to refresh the CPLD1 image. After rejection, the node's BMC will skip the CPLD1 chip refresh process and begin refreshing the CPLD2 image. At this time, the node's BMC will first retrieve the CPLD2 chip's state machine value from the CPLD2 chip's UFM register. If the state machine value is IDL, it indicates that the CPLD2 chip is in an idle state and can accept refresh image requests from the BMC. The node's BMC will then initiate the refresh task for the CPLD2 chip. If the CPLD2 chip's state machine value is Busy, it indicates that CPLD2 is currently undergoing a refresh task and will not accept refresh task requests from other node's BMC. In this case, the node's BMC will end the CPLD2 chip refresh task, and the node's BMC's backplane CPLD refresh task will be completed.

[0104] According to some embodiments, when the value of the CPLD2 chip UFM register state machine is Busy, it means that the CPLD2 chip is in the process of refreshing and cannot receive new refresh tasks. At this time, the BMC will terminate the refresh task of CPLD2 and then end the refresh task of the entire backplane CPLD.

[0105] According to some embodiments, when the CPLD2 chip's refresh state machine is in the IDL state, the first node BMC can execute the CPLD2 chip refresh process. It can monitor the entire refresh process and update the Busy state machine bit of the CPLD2 chip's UFM register in real time during the refresh, preventing other nodes' BMCs from executing refresh tasks and causing refresh task failure. After a successful CPLD2 refresh, the first node BMC sets the CPLD2 chip's UFM register state machine to the IDL state, and the entire backplane CPLD refresh task for the first node BMC ends. If a refresh failure occurs, the CPLD2 refresh task exits, and the CPLD2 chip's UFM register state machine value is set to the IDL state.

[0106] In one or related embodiments, when the first baseboard management controller has been started and it is determined that there is a refresh task for the set of complex programmable logic devices corresponding to the first baseboard management controller, the first complex programmable logic device can be obtained according to the refresh order corresponding to the set of complex programmable logic devices; the first baseboard management controller can be controlled to access the first register of the first complex programmable logic device through a serial communication protocol to obtain the first status information; this can improve the accuracy of status information acquisition, improve the accuracy of refresh operation, and improve refresh efficiency.

[0107] According to embodiments of this disclosure, this disclosure also provides a refresh device for a complex programmable logic device.

[0108] For example, Figure 5 This is a schematic diagram of a complex programmable logic device refresh device 500 provided in an embodiment of the present disclosure. The complex programmable logic device refresh device 500 includes: an information acquisition unit 501, a device refresh unit 502, and an information modification unit 503; wherein...

[0109] Information acquisition unit 501 is used to acquire first status information in the first register of the first complex programmable logic device in the complex programmable logic device set, wherein the complex programmable logic device set includes at least two complex programmable logic devices.

[0110] The device refresh unit 502 is used to control the first substrate management controller among multiple substrate management controllers to refresh the first complex programmable logic device and modify the first status information to refresh status information when the first status information is idle status information.

[0111] The information modification unit 503 is used to modify the first state information to idle state information when it is determined that the first complex programmable logic device has been refreshed, and to obtain the second complex programmable logic device according to the refresh order corresponding to the set of complex programmable logic devices, wherein the second complex programmable logic device is the next complex programmable logic device to be refreshed adjacent to the first complex programmable logic device in the set of complex programmable logic devices.

[0112] The device refresh unit 502 is also used to control the first substrate management controller to refresh the second complex programmable logic device according to the second state information of the second register of the second complex programmable logic device.

[0113] Furthermore, the information acquisition unit 501, when acquiring the first state information in the first register of the first complex programmable logic device in the complex programmable logic device set, is specifically used for:

[0114] When the first baseboard management controller is started and it is determined that there is a complex programmable logic device set refresh task corresponding to the first baseboard management controller, the first complex programmable logic device is obtained according to the refresh order corresponding to the complex programmable logic device set.

[0115] The first baseboard management controller accesses the first register of the first complex programmable logic device through a serial communication protocol to obtain the first status information.

[0116] Furthermore, the device refresh unit 502 is also used to modify the first state information to refresh the state information:

[0117] During the process of refreshing the first complex programmable logic device by the first baseboard management controller among multiple baseboard management controllers, a refresh task for the complex programmable logic device set corresponding to the second baseboard management controller is obtained.

[0118] According to the complex programmable logic device set refresh task corresponding to the second baseboard management controller, when it is determined that the first status information in the first register of the first complex programmable logic device is refresh status information, the control of the second baseboard management controller to refresh the first complex programmable logic device is stopped. The second baseboard management controller is any baseboard management controller other than the first baseboard management controller among multiple baseboard management controllers.

[0119] Furthermore, the device refresh unit 502 is also used for:

[0120] According to the refresh task of the complex programmable logic device set corresponding to the second baseboard management controller, when it is determined that the first status information in the first register of the first complex programmable logic device is the refresh status information, the second complex programmable logic device is obtained according to the refresh order corresponding to the complex programmable logic device set, wherein the second complex programmable logic device is the next complex programmable logic device to be refreshed adjacent to the first complex programmable logic device in the complex programmable logic device set.

[0121] Obtain the second state information of the second register of the second complex programmable logic device;

[0122] When the second state information is idle state information, the second substrate management controller is controlled to refresh the second complex programmable logic device and modify the second state information to refresh state information.

[0123] Furthermore, the device refresh unit 502, used to control the first substrate management controller among multiple substrate management controllers to refresh the first complex programmable logic device and modify the first state information to refresh state information, specifically is used for:

[0124] During the process of refreshing the first complex programmable logic device by the first baseboard management controller among multiple baseboard management controllers, the first refresh information of the refresh task of the complex programmable logic device set corresponding to the first baseboard management controller is monitored.

[0125] If the first refresh information meets the first information requirements, the first status information is modified to refresh status information.

[0126] Furthermore, the device refresh unit 502 is also used for:

[0127] If the first refresh information does not meet the first information requirements, the first state information is set to idle state information, and the refresh task of the complex programmable logic device set corresponding to the first substrate management controller is terminated.

[0128] Furthermore, the device refresh unit 502, when controlling the first substrate management controller to refresh the second complex programmable logic device, is specifically used for:

[0129] When the second state information of the second register of the second complex programmable logic device is idle state information, listen for the second refresh information of the complex programmable logic device set refresh task corresponding to the first baseboard management controller;

[0130] If the second refresh information meets the requirements of the second information, the second status information is modified to refresh status information;

[0131] If the second refresh information does not meet the requirements of the second information, the refresh task of the complex programmable logic device set corresponding to the first substrate management controller is terminated.

[0132] Furthermore, after obtaining the first state information from the first register of the first complex programmable logic device in the complex programmable logic device set, the device refresh unit 502 is also specifically used for:

[0133] If the first status information is refresh status information, the second complex programmable logic device is obtained according to the refresh order corresponding to the complex programmable logic device set.

[0134] Obtain the second state information of the second register in the second complex programmable logic device;

[0135] When the second state information is idle state information, the first substrate management controller is controlled to refresh the second complex programmable logic device and modify the second state information to refresh state information.

[0136] Once it is determined that the second complex programmable logic device has completed its refresh, the second state information is modified to idle state information.

[0137] Furthermore, the device refresh unit 502 is also used for:

[0138] If the second status information is refresh status information, the refresh task of the complex programmable logic device set corresponding to the first substrate management controller is terminated.

[0139] It should be noted that the description of the features in the embodiment corresponding to the complex programmable logic device refresh device can be found in the relevant description of the embodiment corresponding to the complex programmable logic device refresh method, and will not be repeated here.

[0140] Embodiments of this disclosure also provide an electronic device including a memory and a processor, the memory storing a computer program, the processor being configured to run the computer program to perform the steps in any of the above embodiments of the complex programmable logic device refresh method.

[0141] Embodiments of this disclosure also provide a computer-readable storage medium storing a computer program configured to execute the steps in any of the embodiments of the complex programmable logic device refresh method described above.

[0142] In one exemplary embodiment, the aforementioned computer-readable storage medium may include, but is not limited to, various media capable of storing computer programs, such as a USB flash drive, read-only memory (ROM), random access memory (RAM), portable hard disk, magnetic disk, or optical disk.

[0143] Embodiments of this disclosure also provide a computer program product, which includes a computer program that, when executed by a processor, implements the steps in any of the embodiments of the complex programmable logic device refresh method described above.

[0144] Embodiments of this disclosure also provide another computer program product, including a non-volatile computer-readable storage medium storing a computer program that, when executed by a processor, implements the steps in any of the above embodiments of the complex programmable logic device refresh method.

[0145] Those skilled in the art will further recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of both. To clearly illustrate the interchangeability of hardware and software, the components and steps of the various examples have been generally described in terms of functionality in the foregoing description. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this disclosure.

[0146] The above provides a detailed description of a method for refreshing a complex programmable logic device. Specific examples have been used to illustrate the principles and implementation methods of this disclosure. The descriptions of the embodiments above are merely for the purpose of helping to understand the method and its core ideas. It should be noted that those skilled in the art can make various improvements and modifications to this disclosure without departing from its principles, and these improvements and modifications also fall within the protection scope of the claims of this disclosure.

Claims

1. A complex programmable logic device refresh method, characterized by, The method comprises: obtaining first state information in a first register of a first complex programmable logic device in a complex programmable logic device set, wherein the complex programmable logic device set comprises at least two complex programmable logic devices, the first state information is generated by a refresh state machine in the first complex programmable logic device, and is used to indicate the state information of the first complex programmable logic device during refresh, and the state information comprises an idle state and a refresh state; in the case that the first state information is idle state information, controlling a first baseboard management controller in a plurality of baseboard management controllers to refresh the first complex programmable logic device, and modifying the first state information to refresh state information; in the case that it is determined that the first complex programmable logic device is refreshed completely, modifying the first state information to the idle state information, and obtaining a second complex programmable logic device according to a refresh sequence corresponding to the complex programmable logic device set, wherein the second complex programmable logic device is a next complex programmable logic device to be refreshed adjacent to the first complex programmable logic device in the complex programmable logic device set; obtaining second state information of a second register in the second complex programmable logic device; controlling the first baseboard management controller to refresh the second complex programmable logic device according to the second complex programmable logic device and the second state information of the second register of the second complex programmable logic device, and in the case that the second state information is idle state information, controlling the first baseboard management controller to refresh the second complex programmable logic device, and modifying the second state information to refresh state information; The method further comprises: in the process of controlling the first baseboard management controller in a plurality of baseboard management controllers to refresh the first complex programmable logic device, obtaining a complex programmable logic device set refresh task corresponding to a second baseboard management controller; in the case that it is determined that the first state information in the first register of the first complex programmable logic device is refresh state information according to the complex programmable logic device set refresh task corresponding to the second baseboard management controller, stopping controlling the second baseboard management controller to refresh the first complex programmable logic device, wherein the second baseboard management controller is any baseboard management controller in the plurality of baseboard management controllers except the first baseboard management controller; in the case that the second state information is idle state information, controlling the second baseboard management controller to refresh the second complex programmable logic device, and modifying the second state information to refresh state information; in the case that it is determined that the second complex programmable logic device is refreshed completely, modifying the second state information to the idle state information.

2. The method of claim 1, wherein, The method of obtaining first state information in a first register of a first complex programmable logic device in a complex programmable logic device set comprises: In a case where the first baseboard management controller starts up completely and it is determined that there is a complex programmable logic device set refresh task corresponding to the first baseboard management controller, the first complex programmable logic device is acquired according to a refresh order corresponding to the complex programmable logic device set. The first baseboard management controller is controlled to access a first register of the first complex programmable logic device through a serial communication protocol, and the first state information is acquired.

3. The method of claim 1, wherein, The method for controlling the first baseboard management controller in the plurality of baseboard management controllers to refresh the first complex programmable logic device and modifying the first state information into refresh state information comprises: In a process of controlling the first baseboard management controller in the plurality of baseboard management controllers to refresh the first complex programmable logic device, the first refresh information of the complex programmable logic device set refresh task corresponding to the first baseboard management controller is listened to. In a case where the first refresh information meets first information requirements, the first state information is modified into refresh state information.

4. The method of claim 3, wherein, The method further comprises: In a case where the first refresh information does not meet the first information requirements, the first state information is set as idle state information, and the complex programmable logic device set refresh task corresponding to the first baseboard management controller is ended.

5. The method of claim 1, wherein, The method further comprises: In a case where the second state information of the second register of the second complex programmable logic device is idle state information, the second refresh information of the complex programmable logic device set refresh task corresponding to the first baseboard management controller is listened to. In a case where the second refresh information meets second information requirements, the second state information is modified into refresh state information. In a case where the second refresh information does not meet the second information requirements, the complex programmable logic device set refresh task corresponding to the first baseboard management controller is ended.

6. The method according to claim 1 or 5, characterized in that, The method further comprises: In a case where the second state information is refresh state information, the complex programmable logic device set refresh task corresponding to the first baseboard management controller is ended.

7. An electronic device, comprising: Comprise: A processor; A memory for storing instructions executable by the processor; The processor is configured to execute the instructions to implement the complex programmable logic device refresh method according to any one of claims 1 to 6.

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