Processor configuration method and electronic equipment

Abstract

The invention provides a processor configuration method and electronic equipment, which can be applied to the technical field of computer technology and hardware configuration. The method comprises the following steps: in response to a processor configuration request, updating current core isolation information stored in a core space by using a client module running in a user mode based on a to-be-isolated target processor core indicated by the processor configuration request to obtain target core isolation information; a to-be-configured target global processor affinity mask is generated based on the target core isolation information by using a server module running in a kernel mode, and the target global processor affinity mask is used for representing a binding relationship between the task and the processor core; and using the target global processor affinity mask to update respective current processor affinity masks for the plurality of tasks to bind the plurality of tasks with other processor cores except the target processor core, and using the other processor cores except the target processor core to execute the plurality of tasks.

Description

Technical Field

[0001] This application relates to the fields of computer technology and hardware configuration technology, and more specifically to a processor configuration method and an electronic device. Background Technology

[0002] Processor isolation technology divides processor resources into independent regions through hardware, operating systems, or virtualization, allowing specific tasks to exclusively use certain resources and avoiding interference between different tasks. Its core value is ensuring the reliability, real-time performance, and security of critical tasks. Among related technologies, static isolation is typically used to achieve processor resource isolation, which involves pre-setting the processor resources that need to be isolated before the processor starts up.

[0003] In the process of implementing this application, it was found that the relevant technology has at least the following problems: the configuration method of static isolation technology lacks flexibility, and when it is necessary to change the isolation method, the processor needs to be restarted to implement the change, which limits the processing efficiency of the processor. Summary of the Invention

[0004] In view of the above problems, this application provides a processor configuration method and an electronic device.

[0005] According to a first aspect of this application, a processor configuration method is provided, comprising: responding to a processor configuration request, using a client module, updating current core isolation information stored in the kernel space based on a target processor core to be isolated indicated by the processor configuration request, to obtain target core isolation information, the current core isolation information including the current isolation status of each of multiple processor cores; using a server module, generating a target global processor affinity mask to be configured based on the target core isolation information, the target global processor affinity mask being used to characterize the binding relationship between tasks and processor cores; using the target global processor affinity mask, updating the current processor affinity masks for each of multiple tasks, to bind the multiple tasks to other processor cores besides the target processor core, and using the other processor cores besides the target processor core to execute the multiple tasks.

[0006] A second aspect of this application provides a processor configuration apparatus, comprising: an information update module, configured to, in response to a processor configuration request, update current kernel isolation information stored in the kernel space using a client module, based on a target processor core to be isolated as indicated in the processor configuration request, to obtain target kernel isolation information, the current kernel isolation information including the current isolation status of each of multiple processor cores; a mask generation module, configured to, using a server module, generate a target global processor affinity mask to be configured based on the target kernel isolation information, the target global processor affinity mask being used to characterize the binding relationship between tasks and processor cores; and a mask update module, configured to, using the target global processor affinity mask, update the current processor affinity masks for each of multiple tasks, so as to bind multiple tasks to processor cores other than the target processor core, and execute multiple tasks using the other processor cores other than the target processor core.

[0007] A third aspect of this application provides an electronic device comprising: one or more processors; and a memory for storing one or more computer programs, wherein the one or more processors execute the one or more computer programs to implement the steps of the method described above.

[0008] A fourth aspect of this application also provides a computer-readable storage medium having a computer program or instructions stored thereon, which, when executed by a processor, implement the steps of the above-described method.

[0009] The fifth aspect of this application also provides a computer program product, including a computer program or instructions that, when executed by a processor, implement the steps of the above-described method. Attached Figure Description

[0010] The above-mentioned contents, other objects, features and advantages of this application will become clearer from the following description of embodiments of this application with reference to the accompanying drawings.

[0011] Figure 1 The diagram illustrates an application scenario of a processor configuration method and an electronic device according to embodiments of this application.

[0012] Figure 2 A flowchart of a processor configuration method according to an embodiment of this application is shown.

[0013] Figure 3 A schematic diagram of a client module and a server module according to an embodiment of this application is shown.

[0014] Figure 4 A flowchart illustrating how a client module updates data in the kernel space according to an embodiment of this application is shown.

[0015] Figure 5A flowchart illustrating the configuration of a server module based on data in the kernel space according to an embodiment of this application is shown.

[0016] Figure 6 A structural block diagram of a processor configuration apparatus according to an embodiment of this application is shown.

[0017] Figure 7 A block diagram of an electronic device suitable for implementing a processor configuration method according to an embodiment of this application is shown. Detailed Implementation

[0018] The embodiments of this application will now be described with reference to the accompanying drawings. However, it should be understood that these descriptions are exemplary only and are not intended to limit the scope of this application. In the following detailed description, numerous specific details are set forth to provide a thorough understanding of the embodiments of this application for ease of explanation. However, it will be apparent that one or more embodiments may be implemented without these specific details. Furthermore, descriptions of well-known structures and technologies are omitted in the following description to avoid unnecessarily obscuring the concepts of this application.

[0019] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the scope of this application. The terms “comprising,” “including,” etc., as used herein indicate the presence of the stated features, steps, operations, and / or components, but do not exclude the presence or addition of one or more other features, steps, operations, or components.

[0020] All terms used herein (including technical and scientific terms) have the meanings commonly understood by those skilled in the art, unless otherwise defined. It should be noted that the terms used herein are to be interpreted in a manner consistent with the context of this specification, and not in an idealized or overly rigid way.

[0021] When using expressions such as "at least one of A, B and C", they should generally be interpreted in accordance with the meaning that is commonly understood by those skilled in the art (e.g., "a system having at least one of A, B and C" should include, but is not limited to, a system having A alone, a system having B alone, a system having C alone, a system having A and B, a system having A and C, a system having B and C, and / or a system having A, B and C, etc.).

[0022] Because the relevant technology uses static partitioning to isolate and allocate processors, the isolated processor resources will be dedicated to processing the same business for a long time. When the workload of the business is small, the processor resources will be in a low-load or idle state for a long time, resulting in low processor resource utilization.

[0023] Embodiments of this application provide a processor configuration method, comprising: responding to a processor configuration request, using a client module to update the current core isolation information stored in the kernel space based on the target processor core to be isolated indicated by the processor configuration request, to obtain target core isolation information, wherein the current core isolation information includes the current isolation status of each of multiple processor cores; using a server module to generate a target global processor affinity mask to be configured based on the target core isolation information, wherein the target global processor affinity mask is used to characterize the binding relationship between tasks and processor cores; using the target global processor affinity mask to update the current processor affinity masks for each of multiple tasks, so as to bind the multiple tasks to other processor cores besides the target processor core, and use the other processor cores besides the target processor core to execute the multiple tasks.

[0024] Figure 1 The diagram illustrates an application scenario of a processor configuration method and an electronic device according to embodiments of this application.

[0025] like Figure 1 As shown, application scenario 100 according to this embodiment may include a first terminal device 101, a second terminal device 102, a third terminal device 103, a network 104, and a server 105. The network 104 serves as a medium for providing a communication link between the first terminal device 101, the second terminal device 102, the third terminal device 103, and the server 105. The network 104 may include various connection types, such as wired or wireless communication links, or fiber optic cables, etc.

[0026] Users can use the first terminal device 101, the second terminal device 102, and the third terminal device 103 to interact with the server 105 via the network 104 to receive or send messages, etc. Various communication client applications can be installed on the first terminal device 101, the second terminal device 102, and the third terminal device 103, such as shopping applications, web browser applications, search applications, instant messaging tools, email client modules, social media platform software, etc. (for example only).

[0027] The first terminal device 101, the second terminal device 102, and the third terminal device 103 can be various electronic devices with displays and support web browsing, including but not limited to smartphones, tablets, laptops, and desktop computers.

[0028] Server 105 can be a server that provides various services, such as a backend management server that supports websites browsed by users using the first terminal device 101, the second terminal device 102, and the third terminal device 103 (this is just an example). The backend management server can analyze and process data such as received user requests, and feed back the processing results (such as web pages, information, or data obtained or generated according to user requests) to the terminal devices.

[0029] It should be noted that the processor configuration method provided in this application embodiment can generally be executed by server 105. Correspondingly, the processor configuration device provided in this application embodiment can generally be located in server 105. The processor configuration method provided in this application embodiment can also be executed by a server or server cluster that is different from server 105 and capable of communicating with the first terminal device 101, the second terminal device 102, the third terminal device 103, and / or server 105. Correspondingly, the processor configuration device provided in this application embodiment can also be located in a server or server cluster that is different from server 105 and capable of communicating with the first terminal device 101, the second terminal device 102, the third terminal device 103, and / or server 105.

[0030] It should be understood that Figure 1 The number of first terminal devices, second terminal devices, third terminal devices, networks, and servers shown in the diagram is merely illustrative. Depending on implementation needs, any number of first terminal devices, second terminal devices, third terminal devices, networks, and servers can be included.

[0031] Figure 2 A flowchart of a processor configuration method according to an embodiment of this application is shown.

[0032] like Figure 2 As shown, the processor configuration method of this embodiment includes operations S210 to S230. This processor configuration method can be applied to a processor configuration platform, which includes a client module running in user mode and a server module running in kernel mode.

[0033] In operation S210, in response to a processor configuration request, the client module running in user space updates the current kernel isolation information stored in the kernel space based on the target processor core to be isolated indicated in the processor configuration request, thereby obtaining the target kernel isolation information.

[0034] The processor configuration request is generated by the user based on the planning of multiple tasks and sent to the client module. The processor configuration request includes the target processor cores that need to be isolated through operation.

[0035] By isolating the target processor core, the processor resources corresponding to the target processor core can be separated at the logical level, completely isolated from the running environment of other tasks or programs, ensuring that it is not disturbed by other tasks or programs and can focus on processing specific tasks or programs.

[0036] The client module can parse the processor configuration request, determine the target processor core indicated by it, and update the current kernel isolation information stored in the kernel space to the target kernel isolation information according to the target processor core. The current kernel isolation information includes the current isolation status of each of the multiple processor cores.

[0037] The kernel space is the storage space corresponding to the kernel mode. User processes running in user mode, such as the client module in this application, can access the kernel space through system calls and other means. By storing kernel isolation information in the kernel space, hot loading of the target kernel isolation information is achieved without needing to restart the processor to change the kernel isolation information.

[0038] When operating the S220, the server module running in kernel mode generates a target global processor affinity mask to be configured based on the target kernel isolation information.

[0039] The server module can obtain the target core isolation information updated by the client module, and based on the target core isolation information, determine the isolation status of each of the multiple processor cores indicated by the target core isolation information, and then generate a target global processor affinity mask, which is used to characterize the binding relationship between the task and the processor core.

[0040] In operation S230, the target global processor affinity mask is used to update the current processor affinity mask for each of multiple tasks, so as to bind multiple tasks to processor cores other than the target processor core and execute multiple tasks using processor cores other than the target processor core.

[0041] By using the target global processor affinity mask, updating the current processor affinity mask for each of multiple tasks can make the current processor affinity mask consistent with the target global processor affinity mask.

[0042] The target global processor affinity mask and the current processor affinity mask have the same format, both represented by strings consisting of multiple binary characters. Each character corresponds to a processor core, and the characters in the string are Boolean values. When the character corresponding to a processor core is 0, it indicates that the task is not bound to that processor core, meaning that the processor core cannot be used to process the task, thus isolating the processor core. When the character corresponding to a processor core is 1, it indicates that the task is bound to that processor core, meaning that the processor core can be used to process the task.

[0043] Therefore, by ensuring that the character corresponding to the target processor core in the target global processor affinity mask is 0, multiple tasks can be bound to processor cores other than the target processor core, and multiple tasks can be executed using processor cores other than the target processor core.

[0044] According to embodiments of this application, by updating the current kernel isolation information stored in the kernel space using a processor configuration client module, target kernel isolation information can be obtained, thereby enabling interaction between the user-mode processor configuration client module and the kernel-mode processor configuration server module. By using the kernel-mode processor configuration server module to update the current processor affinity mask of a task, processor core isolation and allocation can be configured online without restarting the system, improving configuration efficiency.

[0045] Figure 3 A schematic diagram of a client module and a server module according to an embodiment of this application is shown.

[0046] like Figure 3 As shown, the client module running in user space provides processor configuration services to the user. The user can input their requirements through the client module's front-end page, and the client module can then generate a structured processor configuration request based on the user's requirements and update the current kernel isolation information stored in the kernel space to obtain the target kernel isolation information. In some embodiments, the client module can update the current kernel isolation information stored in the kernel space through system calls.

[0047] The server module running in kernel mode can obtain the target kernel isolation information stored in the kernel space, and generate a target global processor affinity mask based on the target kernel isolation information to further isolate the processor core.

[0048] The tasks in this embodiment include user business tasks, which represent tasks submitted by the user that require processing by a processor core. Since user configuration requirements for the processor are influenced by various factors such as user needs, changes in the priority of user business tasks, and processor core performance, these configuration requirements can change. Therefore, the processor configuration method is typically not completed in one go. After completing the previous processor configuration, as configuration requirements change, processor cores that were not isolated in the previous configuration need to be isolated.

[0049] Therefore, the target global processor affinity mask is used to update the current processor affinity mask for each of multiple tasks, including: verifying the current processor affinity mask of the user business task based on the current global processor affinity mask, and obtaining the verification result; if the verification result indicates that the current global processor affinity mask is the same as the current processor affinity mask of the user business task, the current processor affinity mask of the user business task is updated to the target global processor affinity mask.

[0050] Each user service task has its own corresponding current processor affinity mask. The current global processor affinity mask is obtained after the last processor configuration and is used to represent the global processor affinity of user service tasks in the current task space that have not been personalized. The aforementioned personalized binding means that after the last processor configuration, the current processor affinity mask of the user service task that needs special settings can be modified to bind it to the target processor core in the last processor configuration, so that the target processor core is used exclusively to process the user service task.

[0051] By using the current global processor affinity mask, the current processor affinity masks of multiple user service tasks are verified. The verification results can be used to indicate whether the current processor affinity mask of each user service task is consistent with the current global processor affinity mask.

[0052] If the current processor affinity mask of a user task is inconsistent with the current global processor affinity mask, it means that the current processor affinity mask of the user task has been changed through the personalized binding process. That is, the user task needs to be executed and processed by a processor core specifically for handling user tasks. In other words, the user task would not have been executed by the target processor core to be isolated in this case. Therefore, there is no need to update the current processor affinity mask of such user tasks.

[0053] If the current processor affinity mask of a user's business task is consistent with the current global processor affinity mask, it means that the current processor affinity mask of the user's business task has been changed through a personalized binding process. In other words, the user's business task will be executed by multiple processor cores that were not previously isolated.

[0054] Therefore, the current processor affinity mask for such user business tasks can be updated to the target global processor affinity mask. This ensures that when the binding relationship between the user business task and the processor core is determined according to the target global processor affinity mask after the update, the binding relationship between the user business task and the target processor core is unbound, meaning that the target processor core is no longer used to execute the user business task.

[0055] The above operations prevent the target processor core from being used to process any user business tasks, thus achieving isolation of the target processor core.

[0056] According to embodiments of this application, the current processor affinity mask for each user service task is verified based on the current global processor affinity mask. After determining whether the current processor affinity mask for each user service task has been changed through a personalized binding process, differentiated processing is performed on each current global processor affinity mask based on the verification results obtained from the above verification process. For current processor affinity masks that have been changed through the personalized binding process, their current processor affinity masks are not changed to ensure that the previous processor configuration results remain effective. For current processor affinity masks that have not been changed through the personalized binding process, they are updated to the target global processor affinity mask to achieve isolation of the target processor core. This ensures that the isolation of the target processor core is effective while retaining historical processor configuration results, preventing the latest processor configuration from overwriting previous processor configurations, and ensuring the correctness of the processor configuration.

[0057] After isolating the target processor core, a personalized binding process can be performed on user business tasks that need to be bound to the target processor core, changing their current processor affinity mask.

[0058] Before the change, its current processor affinity mask is consistent with the target global processor affinity mask. When changing, the target processor core to be bound can be used to convert its current processor affinity mask into one-hot encoding. One-hot encoding is a binary vector format encoding method. The position in the vector corresponding to the category is the indicator bit, which takes the value of "1", and the other positions take the value of "0".

[0059] After converting the current processor affinity mask into one-hot encoding, the resulting encoding has the same length as the current processor affinity mask. The target processor core corresponding to the indicator bit in this encoding is bound to the user service task, that is, the user service task is dedicated to processing the target processor core corresponding to the indicator bit.

[0060] For example, if a current computer system has five processor cores, and a user's processor configuration request indicates a need to isolate the second and third processor cores, the resulting target global processor affinity mask will be "10011". The updated processor affinity masks for multiple user tasks will also be "10011". This means that multiple user tasks can be processed using the first, fourth, and fifth processor cores, thus achieving isolation between the second and third processor cores.

[0061] For a first user service task that needs to be bound to a second processor core, the current processor affinity mask can be converted according to the position of the target processor core among multiple processor cores to obtain one-hot encoding "01000". This means that the first user service task can be processed by the second processor core. Since the first user service task only uses the second processor core for processing, while other user service tasks cannot use the second processor core, the isolation and dedication of the target processor core are achieved, improving the processing efficiency of the first user service task bound to it.

[0062] Similarly, for a second user service task that needs to be bound to the third processor core, the one-hot encoding "00100" can be updated to allow the third processor core to be dedicated to processing the second user service task, thereby improving the processing efficiency of the second user service task.

[0063] In addition to user business tasks, the task space also contains background management tasks and interrupt handling tasks caused by hardware interrupts. Therefore, the tasks also include background management tasks and interrupt handling tasks caused by hardware interrupts.

[0064] Since background management tasks and interrupt handling tasks have lower priority than user business tasks, there is no need to specify a particular processor core for them. Just ensure that the isolated processor core is not used to process the above tasks, and use processor resources other than the isolated processor core to process the above tasks.

[0065] Specifically, the processor configuration method further includes updating the current processor affinity mask of each background management task and interrupt handling task to the target global processor affinity mask, so as to bind the background management task and interrupt handling task to other processor cores besides the target processor core.

[0066] Updating the current processor affinity mask of each background management task and interrupt handling task to the target global processor affinity mask ensures that when determining the binding relationship between each background management task and interrupt handling task and the processor core based on the target global processor affinity mask, the conclusion is reached that the tasks are unbound from the isolated processor core, that is, the background management tasks and interrupt handling tasks are bound to other processor cores besides the target processor core.

[0067] According to the embodiments of this application, the background management task and interrupt handling task are debound from the target processor core, realizing unified scheduling and control of the above tasks, preventing the above tasks from bypassing the isolation mechanism and occupying the target processor core, thereby improving the isolation level of the target processor core, ensuring that the target processor core can handle the user business tasks bound to it more independently, and improving processing efficiency.

[0068] According to an embodiment of this application, a client module running in user space is used to update the current kernel isolation information stored in the kernel space based on the target processor core to be isolated indicated by the processor configuration request, in order to obtain the target kernel isolation information. This includes: triggering a system call using the client module to read the current kernel isolation information from the kernel space; and, based on the current kernel isolation information and the target processor core, if it is determined that the target processor core to be isolated has changed compared to the currently isolated processor core, updating the current kernel isolation information stored in the kernel space to the target kernel isolation information by triggering a system call.

[0069] The system call is triggered by the client module to read the current kernel isolation information. The current kernel isolation information can be stored in the form of an array map. The array map means traversing each element of the array, processing the elements in the array through a preset function or rule, and finally generating a new array containing all the new values ​​after processing.

[0070] By parsing the above kernel isolation information, we can obtain the isolation status of each processor core in the processor resources of the processor configuration system. Based on the isolation status of the target processor core determined from the kernel isolation information, we can determine whether the target processor core was in an isolated state before this processor configuration was performed.

[0071] The processor configuration request indicates that the target processor core needs to have its isolation status updated to isolated. Therefore, if the target processor core's isolation status, as determined from the core isolation information, indicates that the target processor core is already in an isolated state, it can be determined that the target processor core to be isolated has not changed compared to the currently isolated processor core, and thus, there is no need to update the current core isolation information.

[0072] If the isolation status of the target processor core determined from the kernel isolation information indicates that the target processor core is not in an isolated state, it can be determined that the target processor core to be isolated has changed compared to the currently isolated processor core. In this case, a system call can be triggered to update the current kernel isolation information stored in the kernel space to the target kernel isolation information. Specifically, the isolation status in the target isolation information corresponding to the target processor core indicates that the target processor core is in an isolated state, and the isolation status in the target isolation information corresponding to other processor cores besides the target processor core is the same as the isolation status in the current kernel isolation information.

[0073] According to embodiments of this application, based on the current kernel isolation information, it is possible to determine whether the current target processor core is already in an isolated state, and update the current kernel isolation information only if it is not in an isolated state. This avoids resource waste caused by invalid updates to the current kernel isolation information when the current kernel isolation information indicates that the target processor core is already in an isolated state, thereby improving resource utilization.

[0074] According to an embodiment of this application, the processor configuration method further includes: determining the isolation state to be configured for each of a plurality of processor cores based on the target processor core; determining the current isolation state for each of the plurality of processor cores based on the current core isolation information; comparing the current isolation state and the isolation state to be configured for each processor core; and determining that the target processor core to be isolated has changed compared to the currently isolated processor core if the comparison result indicates that there are processor cores with different current isolation states and isolation states to be configured.

[0075] Based on the target processor core, the configurable isolation state of each of the multiple processor cores can be determined. In one example, the configurable isolation state of each of the multiple processor cores can also be determined based on the processor cores isolated during the historical configuration of the processor and the target processor core.

[0076] Specifically, when a processor core is either the target processor core or a processor core isolated during the historical configuration process, the processor core's isolation state to be configured is an isolated state; when a processor core is neither the target processor core nor a processor core isolated during the historical configuration process, the processor core's isolation state to be configured is a non-isolated state.

[0077] The current isolation state and the isolation state to be configured of each processor core are compared to determine whether the current isolation state and the isolation state to be configured of each processor core are consistent. If the comparison results indicate that there are processor cores with different current isolation states and isolation states to be configured, it can be determined that the target processor core to be isolated has changed compared to the currently isolated processor core.

[0078] After determining the current isolation state of each of the multiple processor cores, their respective current isolation states can be converted into Boolean values, such as 0 for isolation state and 1 for non-isolation state. This converts the current isolation states of the multiple processor cores into a binary string. This binary string is then compared with the array mapping corresponding to the current core isolation information, that is, bit by bit, to determine whether each bit of the two strings is the same. If there are different characters, it can be determined that the current isolation state of the processor core corresponding to that character is different from the isolation state to be configured.

[0079] According to embodiments of this application, by comparing the current and configured isolation states of each processor core, changes in the target core are accurately identified, providing clear triggering conditions for subsequent update operations. This avoids resource waste caused by blindly executing update processes, ensures that core isolation information is adjusted only when necessary, and improves the efficiency of the configuration process.

[0080] According to an embodiment of this application, the kernel space also stores a current global processor affinity mask and isolation state change information. The isolation state change information is used to characterize the change of the target processor core to be isolated compared to the currently isolated processor core. Using a server module running in kernel mode, a target global processor affinity mask to be configured is generated based on the target core isolation information. This includes: using the server module to monitor the isolation state change information to determine the change of the target processor core to be isolated compared to the currently isolated processor core; and updating the current global processor affinity mask to the target global processor affinity mask based on the target core isolation information when the isolation state change information indicates a change in the target processor core to be isolated compared to the currently isolated processor core.

[0081] The target processor core to be isolated and the currently isolated processor cores can be treated as two sets. The difference between the two sets can be used to obtain the isolation status change information. For example, by subtracting the currently isolated processor cores from the set corresponding to the target processor cores, the difference between the two sets can be obtained. Based on this, the newly added and removed processor cores in the target processor cores can be determined. Furthermore, it can be determined which processor cores need to be isolated during the current processor configuration, and which processor cores in the currently isolated processor cores need to be deisolated. The processor cores that need to be isolated and those that need to be deisolated are considered as changes.

[0082] Based on the above changes, the isolation status change information can be determined. If the change indicates that the target processor core to be isolated and the currently isolated processor core are completely identical, the isolation status change information is 0, indicating no change. If the change indicates that there is a difference between the target processor core to be isolated and the currently isolated processor core, the isolation status change information is 1, indicating a change has occurred. This isolation status change information is calculated in the client module and then saved to the kernel space.

[0083] The server module reads the isolation status change information from the kernel module, which can determine whether there is a difference between the target processor core to be isolated and the currently isolated processor core. If it is determined that there are processor cores that need to be isolated and / or processor cores that need to be deisolated, it can be determined that the isolation status change information indicates that the target processor core to be isolated has changed compared to the currently isolated processor core. Based on the target core isolation information, the current global processor affinity mask is updated to the target global processor affinity mask.

[0084] According to the embodiments of this application, in kernel mode, the isolation status of a processor core can be quickly determined by the isolation status change information, without having to traverse and compare multiple processor cores in the processor resources sequentially in kernel mode, thus improving the efficiency of processor configuration.

[0085] The server module can periodically execute the above-mentioned process of determining the isolation state to be configured and the process of updating the current global processor affinity mask, so that after the client module updates the current core isolation information, the server module can respond to the update in a timely manner and make the corresponding processor configuration.

[0086] Figure 4 A flowchart illustrating how a client module updates data in the kernel space according to an embodiment of this application is shown.

[0087] like Figure 4 As shown, the process includes operations S401 to S405.

[0088] In operation S401, determine whether the first preset cycle has been reached. If the first preset cycle has been reached, execute operation S402; otherwise, continue executing operation S401.

[0089] In operation S402, the target processor core to be isolated is determined based on the processor configuration request.

[0090] When operating S403, read the current kernel isolation information stored in the kernel space.

[0091] In operation S404, it is determined whether the core isolation status determined based on the target processor core to be isolated has changed compared to the currently isolated processor. If it has changed, operation S405 is executed; otherwise, operation S401 is executed.

[0092] When operating S405, based on the target kernel isolation information, the current kernel isolation information stored in the kernel space is updated, and the isolation status change information is also updated.

[0093] Figure 5 A flowchart illustrating the configuration of a server module based on data in the kernel space according to an embodiment of this application is shown.

[0094] like Figure 5 As shown, the process includes operations S501 to S505.

[0095] In operation S501, determine whether the second preset cycle has been reached. If the second preset cycle has been reached, execute operation S502; otherwise, continue executing operation S501.

[0096] When operating S502, read the isolation state change information stored in the kernel space.

[0097] In the embodiments of this application, the server module can periodically read the isolation status change information in the kernel space at a second preset period, so as to detect changes in the target kernel isolation information in a timely manner and then perform processor configuration in a timely manner.

[0098] In operation S503, determine whether the isolation status change information is 1. If the isolation status change information is 1, execute operation S504; otherwise, execute operation S501.

[0099] When operating S504, the target kernel isolation information stored in the kernel space is read.

[0100] When operating S505, the current global processor affinity mask is updated based on the target core isolation information to obtain the target global processor affinity mask.

[0101] In a computer's resource system, a set of currently scheduled processor cores is typically established, which includes multiple processor cores in the resource system. During task scheduling, for processor cores with excessive load, the tasks currently executing on them can be offloaded to other processor cores in the set of currently scheduled processor cores to alleviate the load on that processor core.

[0102] However, if the target processor core that needs to be isolated is assigned to the current set of scheduled processor cores, and there are other processor cores with excessive load, after the task is offloaded to the current set of scheduled processor cores, it may be assigned to the target processor core for execution. This will cause the isolation of the target processor core to be compromised, and the user business tasks bound to the target processor core will be affected by the offloaded tasks, thus affecting the execution efficiency of the user business tasks.

[0103] Therefore, after the target processor core is determined, it can be removed from the current set of scheduled processor cores to prevent tasks assigned to the current set of scheduled processor cores from being assigned to the target processor core for execution, thus affecting the processor configuration and processor core isolation.

[0104] Specifically, the processor configuration method further includes: using a server module to obtain the current set of scheduled processor cores, wherein the processor cores in the set of scheduled processor cores are used to execute tasks allocated by the scheduler based on a load balancing strategy; deleting the target processor core from the current set of scheduled processor cores to obtain a first set of target scheduled processor cores, so that the scheduler can perform task scheduling based on the first set of target scheduled processor cores.

[0105] In some embodiments, the isolated target processor core can be removed from the global scheduling domain tree to ensure that the scheduler's load balancing logic no longer considers it as an available resource; for non-consistent memory access architectures, the scheduling domain topology of the node where the target processor core is located is updated synchronously to avoid cross-domain load balancing interfering with the target processor core.

[0106] The server-side module retrieves the current set of scheduling processor cores and removes the target processor core from it, resulting in an updated first set of target scheduling processor cores. This allows the scheduler to schedule tasks based on this first set, ensuring that the scheduler's load balancing logic no longer considers the target processor core as an available resource and prevents tasks from being scheduled to it. This improves the isolation of target processor cores, thereby ensuring the execution efficiency of user business tasks bound to the target processor core.

[0107] After isolating the target processor core through processor configuration, the target processor core can only be used to process the user business tasks bound to it, and will not be used to execute other user business tasks, background management tasks or interrupt handling tasks. In this case, if the execution frequency of some user business tasks is too low, the target processor core bound to it will be idle for a long time, reducing resource utilization.

[0108] According to an embodiment of this application, the processor configuration method further includes: screening multiple target processor cores based on the utilization rate of multiple target processor cores within a predetermined time period to determine at least one first target processor core; adding the first target processor core to the first target scheduling processor core set to obtain a second target scheduling processor core set, so that the scheduler performs task scheduling based on the second target scheduling processor core set.

[0109] The duration of the scheduled time period can be customized according to business needs, or it can be set periodically. Generally, the duration of the scheduled time period is shorter than the period of the scheduled time period. For example, if the duration of the scheduled time period is 3 minutes and the period of the scheduled time period is set to 5 minutes, then the scheduled time period will start counting every 5 minutes and will end after 3 minutes.

[0110] The utilization rate of a target processor core can be determined by the percentage of computing or storage resources occupied by it when executing user business tasks, relative to the total computing or storage resources of the target processor cores.

[0111] The first target processor core can represent a first preset number of target processor cores whose utilization rate meets preset conditions within a predetermined time period. After determining the first target processor cores, the first target processor cores are added to the first target scheduling processor core set to obtain the second target scheduling processor core set.

[0112] According to embodiments of this application, by adding the first target processor core to the first target scheduling processor core set, the load balancing logic of the scheduler can treat the first target processor core as an available resource and use the first target processor core for load balancing. This improves the resource utilization of the first target processor core.

[0113] According to an embodiment of this application, multiple target processor cores are screened based on their utilization rates within a predetermined time period to determine at least one first target processor core, including: screening multiple target processor cores based on the priority of their respective bound tasks to determine at least one second target processor core; and determining the second target processor core with a utilization rate less than a preset utilization rate threshold as the first target processor core.

[0114] Based on the priority of multiple target processor cores and their respective bound tasks, a second preset number of target processor cores with the lowest priority can be selected as the second target processor cores, and the utilization rate of each second target processor core can be determined.

[0115] In one example, the first target processor core can be determined from the second target processor core based on a preset utilization threshold.

[0116] In another example, a first preset number of second target processor cores with the lowest average utilization or the lowest instantaneous utilization during a predetermined time period can be identified as the first target processor cores.

[0117] According to embodiments of this application, based on the priorities of the tasks bound to each of the multiple target processor cores, an initial screening is performed to obtain a second target processor core for executing lower-priority tasks. Then, based on a preset utilization threshold and utilization rate, a second screening is performed on the second target processor core to obtain a first target processor core. Through the initial screening, it is possible to control that the tasks executed by the first target processor core obtained in the second screening have relatively low priorities, thereby ensuring that the target processor core bound to high-priority tasks will not be selected as the first target processor core, but will be dedicated to executing high-priority tasks, further guaranteeing the execution efficiency of high-priority tasks.

[0118] Based on the above processor configuration method, this application also provides a processor configuration apparatus. The following will be combined with... Figure 6 The device is described in detail.

[0119] Figure 6 A structural block diagram of a processor configuration apparatus according to an embodiment of this application is shown.

[0120] like Figure 6 As shown, the processor configuration device 600 in this embodiment includes an information update module 610, a mask generation module 620, and a mask update module 630.

[0121] The information update module 610, in response to a processor configuration request, utilizes a client module running in user mode to update the current kernel isolation information stored in the kernel space based on the target processor core to be isolated indicated in the processor configuration request, thereby obtaining target kernel isolation information. The current kernel isolation information includes the current isolation status of each of the multiple processor cores. In one embodiment, the information update module 610 can be used to perform the operation S210 described above, which will not be repeated here.

[0122] The mask generation module 620 utilizes a server-side module running in kernel mode to generate a target global processor affinity mask to be configured based on target core isolation information. The target global processor affinity mask is used to characterize the binding relationship between the task and the processor core. In one embodiment, the mask generation module 620 can be used to perform the operation S220 described above, which will not be repeated here.

[0123] The mask update module 630 is used to update the current processor affinity mask for each of multiple tasks using the target global processor affinity mask, so as to bind the multiple tasks to processor cores other than the target processor core and execute the multiple tasks using the processor cores other than the target processor core. In one embodiment, the mask update module 630 can be used to perform the operation S230 described above, which will not be repeated here.

[0124] According to an embodiment of this application, the mask update module 630 includes a mask verification submodule and a mask update submodule.

[0125] The mask verification submodule is used to verify the current processor affinity mask of the user's business task based on the current global processor affinity mask, and obtain the verification result.

[0126] The mask update submodule is used to update the current processor affinity mask of the user business task to the target global processor affinity mask when the verification result indicates that the current global processor affinity mask is the same as the current processor affinity mask of the user business task.

[0127] According to an embodiment of this application, the processor configuration device 600 further includes a task binding module.

[0128] The task binding module is used to update the current processor affinity mask of the background management task and the interrupt handling task to the target global processor affinity mask, so as to bind the background management task and the interrupt handling task to other processor cores besides the target processor core.

[0129] According to an embodiment of this application, the information update module 610 includes an information reading submodule and an information update submodule.

[0130] The information reading submodule is used to trigger system calls from the client module to read the current kernel isolation information from the kernel space.

[0131] The information update submodule is used to update the current kernel isolation information stored in the kernel space to the target kernel isolation information when it is determined that the target processor core to be isolated has changed compared to the currently isolated processor core, by triggering a system call.

[0132] According to an embodiment of this application, the processor configuration device 600 further includes a first state determination module, a second state determination module, and a state comparison module.

[0133] The first state determination module is used to determine the isolation state to be configured for each of the multiple processor cores based on the target processor core.

[0134] The second state determination module is used to determine the current isolation state of each of the multiple processor cores based on the current core isolation information.

[0135] The status comparison module is used to compare the current isolation status and the isolation status to be configured for each processor core. If the comparison result indicates that there are processor cores with different current isolation status and isolation status to be configured, it is determined that the target processor core to be isolated has changed compared to the currently isolated processor core.

[0136] According to an embodiment of this application, the mask generation module 620 includes an information monitoring submodule and a mask generation submodule.

[0137] The information monitoring submodule is used to monitor the changes in isolation status using the server module, in order to determine the changes in the target processor core to be isolated compared to the currently isolated processor core.

[0138] The mask generation submodule is used to update the current global processor affinity mask to the target global processor affinity mask based on the target core isolation information when the isolation state change information characterizes a change in the target processor core to be isolated compared to the currently isolated processor core.

[0139] According to an embodiment of this application, the processor configuration device 600 further includes a set acquisition module and a first set update module.

[0140] The set acquisition module is used to obtain the current set of scheduling processor cores using the server module. The processor cores in the set of scheduling processor cores are used to execute tasks assigned by the scheduler based on the load balancing strategy.

[0141] The first set update module is used to delete the target processor core from the current set of scheduler processor cores to obtain the first target set of scheduler processor cores, so that the scheduler can perform task scheduling based on the first target set of scheduler processor cores.

[0142] According to an embodiment of this application, the processor configuration device 600 further includes a processor filtering module and a second set update module.

[0143] The processor filtering module is used to filter multiple target processor cores based on their utilization rate within a predetermined time period, and to determine at least one first target processor core.

[0144] The second set update module is used to add the first target processor core to the first target scheduler core set to obtain the second target scheduler core set, so that the scheduler can perform task scheduling based on the second target scheduler core set.

[0145] According to an embodiment of this application, the processor filtering module includes a first filtering submodule and a second filtering submodule.

[0146] The first filtering submodule is used to filter multiple target processor cores based on the priority of their respective bound tasks, and determine at least one second target processor core.

[0147] The second filtering submodule is used to determine the second target processor core whose utilization rate is less than a preset utilization rate threshold as the first target processor core.

[0148] According to embodiments of this application, any plurality of modules among the information update module 610, mask generation module 620, and mask update module 630 can be merged into one module, or any one of these modules can be split into multiple modules. Alternatively, at least part of the functionality of one or more of these modules can be combined with at least part of the functionality of other modules and implemented in one module. According to embodiments of this application, at least one of the information update module 610, mask generation module 620, and mask update module 630 can be at least partially implemented as a hardware circuit, such as a field-programmable gate array (FPGA), a programmable logic array (PLA), a system-on-a-chip, a system-on-a-substrate, a system-on-package, an application-specific integrated circuit (ASIC), or implemented by any other reasonable means of integrating or packaging the circuit, or implemented in software, hardware, or firmware, or by any appropriate combination of any of these three implementation methods. Alternatively, at least one of the information update module 610, mask generation module 620, and mask update module 630 can be at least partially implemented as a computer program module, which can perform corresponding functions when the computer program module is run.

[0149] Figure 7 A block diagram of an electronic device suitable for implementing a processor configuration method according to an embodiment of this application is shown.

[0150] like Figure 7 As shown, an electronic device 700 according to an embodiment of this application includes a processor 701, which can perform various appropriate actions and processes according to a program stored in a read-only memory (ROM) 702 or a program loaded from a storage portion 708 into a random access memory (RAM) 703. The processor 701 may include, for example, a general-purpose microprocessor (e.g., a CPU), an instruction set processor and / or an associated chipset and / or a special-purpose microprocessor (e.g., an application-specific integrated circuit (ASIC)), etc. The processor 701 may also include onboard memory for caching purposes. The processor 701 may include a single processing unit or multiple processing units for performing different actions of the method flow according to an embodiment of this application.

[0151] RAM 703 stores various programs and data required for the operation of electronic device 700. Processor 701, ROM 702, and RAM 703 are interconnected via bus 704. Processor 701 executes various operations of the method flow according to embodiments of this application by executing programs in ROM 702 and / or RAM 703. It should be noted that the programs may also be stored in one or more memories other than ROM 702 and RAM 703. Processor 701 may also execute various operations of the method flow according to embodiments of this application by executing programs stored in said one or more memories.

[0152] According to embodiments of this application, the electronic device 700 may further include an input / output (I / O) interface 705, which is also connected to a bus 704. The electronic device 700 may also include one or more of the following components connected to the input / output (I / O) interface 705: an input section 706 including a keyboard, mouse, etc.; an output section 707 including a cathode ray tube (CRT), liquid crystal display (LCD), etc., and a speaker, etc.; a storage section 708 including a hard disk, etc.; and a communication section 709 including a network interface card such as a LAN card, modem, etc. The communication section 709 performs communication processing via a network such as the Internet. A drive 710 is also connected to the input / output (I / O) interface 705 as needed. A removable medium 711, such as a disk, optical disk, magneto-optical disk, semiconductor memory, etc., is installed on the drive 710 as needed so that computer programs read from it can be installed into the storage section 708 as needed.

[0153] This application also provides a computer-readable storage medium, which may be included in the device / apparatus / system described in the above embodiments; or it may exist independently and not assembled into the device / apparatus / system. The computer-readable storage medium carries one or more programs, which, when executed, implement the method according to the embodiments of this application.

[0154] According to embodiments of this application, the computer-readable storage medium can be a non-volatile computer-readable storage medium, such as including but not limited to: portable computer disks, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), portable compact disk read-only memory (CD-ROM), optical storage devices, magnetic storage devices, or any suitable combination thereof. In this application, the computer-readable storage medium can be any tangible medium containing or storing a program that can be used by or in conjunction with an instruction execution system, apparatus, or device. For example, according to embodiments of this application, the computer-readable storage medium may include ROM 702 and / or RAM 703 and / or one or more memories other than ROM 702 and RAM 703 described above.

[0155] Embodiments of this application also include a computer program product comprising a computer program containing program code for performing the methods shown in the flowchart. When the computer program product is run on a computer system, the program code is used to cause the computer system to implement the methods provided in the embodiments of this application.

[0156] When the computer program is executed by the processor 701, it performs the functions defined in the system / apparatus of this application embodiment. According to the embodiments of this application, the systems, apparatuses, modules, units, etc., described above can be implemented by computer program modules.

[0157] In one embodiment, the computer program may rely on a tangible storage medium such as an optical storage device or a magnetic storage device. In another embodiment, the computer program may also be transmitted and distributed in the form of signals over a network medium, and may be downloaded and installed via the communication section 709, and / or installed from a removable medium 711. The program code contained in the computer program can be transmitted using any suitable network medium, including but not limited to: wireless, wired, etc., or any suitable combination thereof.

[0158] In such an embodiment, the computer program can be downloaded and installed from a network via the communication section 709, and / or installed from the removable medium 711. When the computer program is executed by the processor 701, it performs the functions defined in the system of this application embodiment. According to the embodiments of this application, the systems, devices, apparatuses, modules, units, etc., described above can be implemented by computer program modules.

[0159] According to embodiments of this application, program code for executing the computer programs provided in the embodiments of this application can be written in any combination of one or more programming languages. Specifically, these computational programs can be implemented using high-level procedural and / or object-oriented programming languages, and / or assembly / machine languages. Programming languages ​​include, but are not limited to, languages ​​such as Java, C++, Python, "C", or similar programming languages. The program code can be executed entirely on the user's computing device, partially on the user's device, partially on a remote computing device, or entirely on a remote computing device or server. In cases involving remote computing devices, the remote computing device can be connected to the user's computing device via any type of network, including a local area network (LAN) or a wide area network (WAN), or it can be connected to an external computing device (e.g., via the Internet using an Internet service provider).

[0160] The flowcharts and block diagrams in the accompanying drawings illustrate the architecture, functionality, and operation of possible implementations of systems, methods, and computer program products according to various embodiments of this application. In this regard, each block in a flowchart or block diagram may represent a module, segment, or portion of code containing one or more executable instructions for implementing a specified logical function. It should also be noted that in some alternative implementations, the functions indicated in the blocks may occur in a different order than those indicated in the drawings. For example, two consecutively indicated blocks may actually be executed substantially in parallel, and they may sometimes be executed in reverse order, depending on the functions involved. It should also be noted that each block in a block diagram or flowchart, and combinations of blocks in a block diagram or flowchart, may be implemented using a dedicated hardware-based system that performs the specified function or operation, or using a combination of dedicated hardware and computer instructions.

[0161] Those skilled in the art will understand that the features described in the various embodiments of this application can be combined and / or combined in various ways, even if such combinations or combinations are not explicitly described in this application. In particular, the features described in the various embodiments of this application can be combined and / or combined in various ways without departing from the spirit and teachings of this application. All such combinations and / or combinations fall within the scope of this application.

[0162] The embodiments of this application have been described above. However, these embodiments are merely illustrative and not intended to limit the scope of this application. Although various embodiments have been described above, this does not mean that the measures in the various embodiments cannot be used advantageously in combination. Without departing from the scope of this application, those skilled in the art can make various substitutions and modifications, all of which should fall within the scope of this application.

Claims

1. A processor configuration method, characterized in that, The method includes: In response to a processor configuration request, a client module running in user space updates the current kernel isolation information stored in the kernel space based on the target processor core to be isolated indicated by the processor configuration request, thereby obtaining target kernel isolation information, wherein the current kernel isolation information includes the current isolation status of each of the multiple processor cores. Using a server module running in kernel mode, a target global processor affinity mask is generated based on the target core isolation information. The target global processor affinity mask is used to characterize the binding relationship between the task and the processor core. Using the target global processor affinity mask, the current processor affinity mask for each of the multiple tasks is updated to bind the multiple tasks to processor cores other than the target processor core, and the multiple tasks are executed using the processor cores other than the target processor core.

2. The method according to claim 1, characterized in that, The task includes user business tasks; updating the current processor affinity mask for each of the multiple tasks using the target global processor affinity mask includes: Based on the current global processor affinity mask, the current processor affinity mask of the user service task is verified to obtain the verification result; If the verification result indicates that the current global processor affinity mask is the same as the current processor affinity mask of the user service task, then the current processor affinity mask of the user service task is updated to the target global processor affinity mask.

3. The method according to claim 2, characterized in that, The task also includes background management tasks and interrupt handling tasks caused by hardware interrupts; the method also includes: The current processor affinity mask of each of the background management task and the interrupt handling task is updated to the target global processor affinity mask to bind the background management task and the interrupt handling task to processor cores other than the target processor core.

4. The method according to claim 1, characterized in that, The step of using a client module running in user space to update the current kernel isolation information stored in the kernel space based on the target processor core to be isolated indicated by the processor configuration request, to obtain the target kernel isolation information, includes: The client module triggers a system call to read the current kernel isolation information from the kernel space; Based on the current kernel isolation information and the target processor core, if it is determined that the target processor core to be isolated has changed compared to the currently isolated processor core, a system call is triggered to update the current kernel isolation information stored in the kernel space to the target kernel isolation information.

5. The method according to claim 4, characterized in that, The method further includes: Based on the target processor core, determine the configurable isolation state of each of the multiple processor cores; Based on the current core isolation information, the current isolation status of each of the multiple processor cores is determined; The current isolation state and the isolation state to be configured of each processor core are compared. If the comparison results indicate that there are processor cores with different current isolation states and isolation states to be configured, it is determined that the target processor core to be isolated has changed compared to the currently isolated processor core.

6. The method according to claim 1, characterized in that, The kernel space also stores the current global processor affinity mask and isolation state change information. The isolation state change information is used to characterize the changes in the target processor core to be isolated compared to the currently isolated processor core. The step of generating a target global processor affinity mask to be configured based on the target kernel isolation information using a server module running in kernel mode includes: The server module is used to monitor the changes in the isolation status to determine the changes in the target processor core to be isolated compared to the currently isolated processor core. When the isolation state change information indicates that the target processor core to be isolated has changed compared to the currently isolated processor core, the current global processor affinity mask is updated to the target global processor affinity mask based on the target core isolation information.

7. The method according to claim 1, characterized in that, The method further includes: Using the server module, the current set of scheduling processor cores is obtained. The processor cores in the set of scheduling processor cores are used to execute tasks assigned by the scheduler based on the load balancing strategy. The target processor core is removed from the current set of scheduling processor cores to obtain a first set of target scheduling processor cores, so that the scheduler can perform task scheduling based on the first set of target scheduling processor cores.

8. The method according to claim 7, characterized in that, The method further includes: Based on the utilization rate of the multiple target processor cores within a predetermined time period, the multiple target processor cores are screened to determine at least one first target processor core; The first target processor core is added to the first target scheduler core set to obtain a second target scheduler core set, so that the scheduler performs task scheduling based on the second target scheduler core set.

9. The method according to claim 8, characterized in that, The step of filtering multiple target processor cores based on their utilization rates within a predetermined time period to determine at least one first target processor core includes: Based on the priority of the bound tasks of each of the multiple target processor cores, the multiple target processor cores are filtered to determine at least one second target processor core; The second target processor core with a utilization rate less than a preset utilization rate threshold is identified as the first target processor core.

10. An electronic device, comprising: One or more processors; Memory, used to store one or more computer programs. The characteristic feature is that the one or more processors execute the one or more computer programs to implement the steps of the method according to any one of claims 1 to 9.

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