Heterogeneous computing system and method for evaluating three-dimensional fourier transform performance thereof

Abstract

The application discloses a heterogeneous computing system and a method for evaluating three-dimensional Fourier transform performance of the heterogeneous computing system, and relates to the technical field of supercomputers, wherein the heterogeneous computing system comprises a processor and a programmable logic device comprising a computing unit, an operation unit, a data transposition unit, a processing unit and a control unit; the method comprises generating an initial transformation matrix and an initial coefficient matrix to perform Fourier transform heterogeneous computing, and obtaining final checksum data; based on total time consumption of the Fourier transform heterogeneous computing, total time consumption of three-dimensional Fourier transform of the heterogeneous computing system is determined to generate an evaluation result of three-dimensional Fourier transform performance of the heterogeneous computing system. The method solves the problem of lack of evaluation of computing performance of a supercomputer composed of a CPU and an FPGA in the related art, and achieves the technical effect of accurately evaluating the computing performance of the computing system of the supercomputer composed of the CPU and the FPGA based on the heterogeneous computing system.

Description

Technical Field

[0001] This application relates to the field of supercomputer technology, and in particular to a heterogeneous computing system and a method for evaluating its three-dimensional Fourier transform performance. Background Technology

[0002] NPB (NAS Parallel Benchmark) is a high-performance benchmark written in Fortran (FormulaTranslation, a programming language for scientific computing and engineering numerical simulation). It runs on a CPU (Central Processing Unit) and is used to evaluate the computational capabilities of supercomputers composed of CPUs in the field of fluid dynamics. The Fourier Transform benchmark is one of the five commonly used benchmarks in NPB, used to calculate the three-dimensional Fourier Transform and evaluate common three-dimensional Discrete Fast Fourier Transform performance as well as all-to-all communication performance.

[0003] In related technologies, with the large-scale use of heterogeneous computing, supercomputers have evolved into heterogeneous computing systems consisting of CPUs and GPUs (Graphics Processing Units) or CPUs and FPGAs (Field Programmable Gate Arrays). For supercomputers composed of CPUs and GPUs, the NPB benchmark has been developed to test supercomputers composed of GPUs.

[0004] However, the NPB benchmark in related technologies is only applicable to testing supercomputers composed of CPUs and GPUs, but not to supercomputers composed of CPUs and FPGAs. There is still a lack of corresponding NPB versions for evaluating the performance of supercomputers composed of CPUs and FPGAs, which urgently needs to be addressed. Summary of the Invention

[0005] This application provides a heterogeneous computing system and its three-dimensional Fourier transform performance evaluation method to at least solve the problems in the related art, such as the NPB test benchmark being only applicable to testing supercomputers composed of CPUs and GPUs, but not applicable to supercomputers composed of CPUs and FPGAs, and the lack of a corresponding NPB version for evaluating the performance of supercomputers composed of CPUs and FPGAs.

[0006] This application provides a heterogeneous computing system, including a processing device and a programmable logic device. The programmable logic device includes a computing unit, an arithmetic unit, a data transpose unit, a processing unit, and a control unit. The processing device is used to generate an initial transformation matrix based on pseudo-random numbers and an initial coefficient matrix based on a target equation. The computing unit is used to perform a forward Fourier transform from X-dimensional to Y-dimensional to Z-dimensional on the initial transformation matrix to obtain a forward transformation matrix, and then perform an inverse Fourier transform from Z-dimensional to Y-dimensional to X-dimensional to obtain an inverse transformation matrix. The arithmetic unit is used to calculate a coefficient modulation matrix based on the forward transformation matrix and the initial coefficient matrix, such that the computing unit modulates the coefficients according to the coefficient modulation matrix. The matrix is ​​subjected to an inverse Fourier transform from Z-dimensional to Y-dimensional to X-dimensional to obtain the inverse transform matrix; the data transpose unit is used to transpose the target dimension from the original dimension during matrix transformation, wherein the original dimension and the target dimension are any one of the Z-dimensional, Y-dimensional, and X-dimensional dimensions; the processing unit is used to calculate the checksum of the inverse transform matrix; the control unit is used to receive the start instruction and generate the stop instruction from the processing device, and control the calculation unit, the operation unit, the data transpose unit, and the processing unit to respond to the start instruction and the stop instruction to end the calculation task, so that the processing device obtains the total time of the three-dimensional Fourier transform of the heterogeneous computing system.

[0007] This application also provides a method for evaluating the three-dimensional Fourier transform performance of a heterogeneous computing system. Using the aforementioned heterogeneous computing system, the method includes the following steps: generating an initial transformation matrix based on pseudo-random numbers and generating an initial coefficient matrix based on a target equation; performing heterogeneous Fourier transform calculations using the initial transformation matrix and the initial coefficient matrix to obtain final checksum data, thereby obtaining the total time consumed by the heterogeneous Fourier transform calculation; determining the total time consumed by the three-dimensional Fourier transform of the heterogeneous computing system based on the total time consumed by the three-dimensional Fourier transform, and generating a three-dimensional Fourier transform performance evaluation result for the heterogeneous computing system based on the total time consumed by the three-dimensional Fourier transform.

[0008] This application also provides an evaluation device for the three-dimensional Fourier transform performance of a heterogeneous computing system, employing the aforementioned heterogeneous computing system, comprising: a generation module for generating an initial transformation matrix based on pseudo-random numbers and generating an initial coefficient matrix based on a target equation; a calculation module for performing heterogeneous Fourier transform calculations using the initial transformation matrix and the initial coefficient matrix to obtain final checksum data, thereby obtaining the total time consumed by the heterogeneous Fourier transform calculation; and an evaluation module for determining the total time consumed by the three-dimensional Fourier transform of the heterogeneous computing system based on the total time consumed by the heterogeneous Fourier transform calculation, thereby generating a three-dimensional Fourier transform performance evaluation result of the heterogeneous computing system based on the total time consumed by the three-dimensional Fourier transform.

[0009] This application also provides an electronic device, including: a memory for storing a computer program; and a processor for executing the computer program to implement the steps of evaluating the three-dimensional Fourier transform performance of any of the above-described heterogeneous computing systems.

[0010] This application also provides a non-volatile computer-readable storage medium storing a computer program, wherein when the computer program is executed by a processor, it implements the steps of the method for evaluating the three-dimensional Fourier transform performance of any of the above-described heterogeneous computing systems.

[0011] This application also provides a computer program product, including a computer program that, when executed by a processor, implements the steps of evaluating the three-dimensional Fourier transform performance of any of the above-described heterogeneous computing systems.

[0012] This application enables the calculation of the total time consumed by a supercomputer system composed of CPUs and FPGAs to complete a three-dimensional Fourier transform process based on a heterogeneous computing system containing processing devices and programmable logic devices. This allows for the evaluation of the system's three-dimensional Fourier transform performance and all-to-all communication performance. It addresses the technical problem that the NPB benchmark in related technologies is only applicable to supercomputers composed of CPUs and GPUs, but not to supercomputers composed of CPUs and FPGAs. Furthermore, it solves the technical problem of the lack of a corresponding NPB version for evaluating the performance of supercomputers composed of CPUs and FPGAs. This application achieves a complete link based on heterogeneous computing systems and multi-dimensional Fourier transforms, data transposition, multi-round iterations, and checksum verification. It fully examines the parallel efficiency of heterogeneous computing systems in three-dimensional Fourier transform calculations and the scheduling capability of data transposition. Moreover, through iterative execution and all-to-all data interaction throughout the entire process, it accurately evaluates the computing power sustainability and communication stability of heterogeneous computing systems in large-scale, high-repetition computing scenarios. This provides a comprehensive and practically applicable evaluation method for the three-dimensional Fourier transform performance and all-to-all communication capabilities of supercomputer systems composed of CPUs and FPGAs. Attached Figure Description

[0013] To more clearly illustrate the embodiments of this application, the accompanying drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0014] Figure 1 This is a schematic diagram of the structure of a heterogeneous computing system according to an embodiment of this application;

[0015] Figure 2This is a schematic diagram of an NPB Fourier transform heterogeneous computing architecture according to an embodiment of this application;

[0016] Figure 3 This is a schematic diagram of a multi-core parallel computing and multi-channel data transmission architecture according to an embodiment of this application;

[0017] Figure 4 This is a schematic diagram of a transformation matrix local memory time-sharing multiplexing structure according to an embodiment of this application;

[0018] Figure 5 This is a schematic diagram of the local memory read / write state transition of a transformation matrix according to an embodiment of this application;

[0019] Figure 6 A flowchart of a method for evaluating the three-dimensional Fourier transform performance of a heterogeneous computing system, provided according to an embodiment of this application;

[0020] Figure 7 This is a flowchart of heterogeneous NPB Fourier transform calculation according to an embodiment of this application;

[0021] Figure 8 This is a schematic diagram of the structure of an evaluation device for the three-dimensional Fourier transform performance of a heterogeneous computing system according to an embodiment of this application.

[0022] Figure label:

[0023] Among them, 10-heterogeneous computing system; 100-processing device, 200-programmable logic device, 201-computing unit, 202-operation unit, 203-data transpose unit, 204-processing unit, 205-control unit; 20-evaluation device for the three-dimensional Fourier transform performance of heterogeneous computing system; 300-generation module, 400-computing module, 500-evaluation module; 1-host, 2-device, 3-direct memory access engine, 4-global memory, 5-data loading unit, 6-transform matrix local memory, 7-coefficient matrix local memory, 8-data transpose unit, 9-exponential coefficient product unit, 10-one-dimensional Fourier transform unit, 11-checksum calculation unit, 12-computation process control unit, 13-counter. Detailed Implementation

[0024] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the protection scope of this application.

[0025] It should be noted that, in the description of this application, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. The terms "first," "second," etc., in this application are used to distinguish similar objects and are not used to describe a specific order or sequence.

[0026] To enable those skilled in the art to better understand the present application, the present application will be further described in detail below with reference to the accompanying drawings and specific embodiments.

[0027] The embodiments of this application provide a heterogeneous computing system, and the heterogeneous computing system is described in detail in conjunction with its structure.

[0028] Specifically, Figure 1 This is a schematic diagram of the structure of a heterogeneous computing system 10 provided according to an embodiment of this application.

[0029] like Figure 1 As shown, the heterogeneous computing system 10 includes a processing device 100, a programmable logic device 200, a computing unit 201, an arithmetic unit 202, a data transpose unit 203, a processing unit 204, and a control unit 205. The processing device 100 generates an initial transformation matrix based on pseudo-random numbers and an initial coefficient matrix based on a target equation. The computing unit 201 performs a forward Fourier transform from X-dimensional to Y-dimensional to Z-dimensional on the initial transformation matrix to obtain a forward transformation matrix, and performs an inverse Fourier transform from Z-dimensional to Y-dimensional to X-dimensional to obtain an inverse transformation matrix. The arithmetic unit 202 calculates a coefficient modulation matrix based on the forward transformation matrix and the initial coefficient matrix, such that the computing unit... The inverse Fourier transform from Z-dimensional to Y-dimensional to X-dimensional is performed on the coefficient modulation matrix to obtain the inverse transform matrix; the data transpose unit 203 is used to transpose the target dimension from the original dimension during the matrix transformation, and the original dimension and the target dimension are any one of Z-dimensional, Y-dimensional, and X-dimensional; the processing unit 204 is used to calculate the checksum of the inverse transform matrix; the control unit 205 is used to receive the start instruction and generate the stop instruction from the processing device 100, and control the calculation unit 201, the arithmetic unit 202, the data transpose unit 203, and the processing unit 204 to end the calculation task in response to the start instruction and the stop instruction, so that the processing device 100 obtains the total time of the three-dimensional Fourier transform of the heterogeneous computing system 10.

[0030] As one possible implementation, this application embodiment designs a heterogeneous computing system 10, which includes a processing device 100 and a programmable logic device 200. Here, the processing device 100 can be understood as the CPU in a supercomputer composed of a CPU and an FPGA, and the programmable logic device 200 can be understood as the FPGA in a supercomputer composed of a CPU and an FPGA.

[0031] Therefore, the heterogeneous computing system 10 in this embodiment can represent the computing system in a supercomputer composed of a CPU and an FPGA. Furthermore, by calculating the time consumed by the heterogeneous computing system 10 to complete a unified three-dimensional Fourier transform calculation process and evaluating the three-dimensional Fourier transform performance and all-to-all communication performance of the heterogeneous computing system 10, performance testing and evaluation of the computing system of a supercomputer composed of a CPU and an FPGA in terms of three-dimensional Fourier transform and all-to-all communication can be achieved.

[0032] Specifically, the heterogeneous computing system 10 in this application embodiment includes, but is not limited to, a processing device 100, a programmable logic device 200, a computing unit 201, an arithmetic unit 202, a data transposition unit 203, a processing unit 204, and a control unit 205.

[0033] Furthermore, Figure 2 This is a schematic diagram of an NPB Fourier transform heterogeneous computing architecture according to an embodiment of this application. Figure 2 As shown, Figure 2 The “host 1 (CPU)” on the left can be understood as the processing device 100 in this application embodiment, and the device 2 (FPGA) on the right can be understood as the programmable logic device 200 in this application embodiment.

[0034] Among them, the processing device 100 (and Figure 2 The host 1 identifier has the same function as the CPU and the programmable logic device 200 (and...). Figure 2 Device 2 in the diagram serves the same purpose, i.e., FPGAs can be connected via a serial high-speed interconnect bus.

[0035] Furthermore, the programmable logic device 200 in the embodiments of this application includes, but is not limited to, a computing unit 201, an arithmetic unit 202, a data transposition unit 203, a processing unit 204, and a control unit 205.

[0036] The programmable logic device 200 can be used to generate an initial transformation matrix based on pseudo-random numbers and an initial coefficient matrix based on a target equation. For example... Figure 2Host 1 can use a pseudo-random number generator to generate certain pseudo-random numbers, thereby generating an initial transformation matrix. An initial coefficient matrix is ​​then generated using an objective equation. Based on the initial transformation matrix and the initial coefficient matrix, the three-dimensional Fourier transform process of the heterogeneous computing system 10 is executed to evaluate its performance. Here, the objective equation can be understood as a mathematical equation determined by combining the matrix size of the initial transformation matrix and the equation used to generate the initial coefficient matrix.

[0037] Calculation unit 201 (and Figure 2 The one-dimensional Fourier transform unit 10 (with the same function as the identifier) ​​is used to perform a forward Fourier transform from X-dimensional to Y-dimensional to Z-dimensional on the initial transform matrix to obtain the forward transform matrix, and then performs an inverse Fourier transform from Z-dimensional to Y-dimensional to X-dimensional to obtain the inverse transform matrix. For example... Figure 2 As shown in the figure, the one-dimensional Fourier transform unit 10 (computation unit 201) can be used to calculate the one-dimensional forward Fourier transform (such as the forward Fourier transform of X, Y or Z dimensions). After multiple calculations, the forward Fourier transform from X dimensions to Y dimensions to Z dimensions can be realized, and the forward transform matrix is ​​obtained. The one-dimensional Fourier transform unit 10 can also calculate the one-dimensional inverse Fourier transform (such as the inverse Fourier transform of X, Y or Z dimensions). After multiple calculations, the inverse Fourier transform from Z dimensions to Y dimensions to X dimensions can be realized, and the inverse transform matrix is ​​obtained.

[0038] The forward Fourier transforms of X, Y, and Z dimensions together constitute the three-dimensional forward Fourier transform, and the inverse Fourier transforms of X, Y, and Z dimensions together constitute the three-dimensional inverse Fourier transform; the three-dimensional forward Fourier transform and the three-dimensional inverse Fourier transform together constitute the overall three-dimensional Fourier transform.

[0039] Additionally, in order to fully evaluate the computing power of the FPGA, the embodiments of this application may, but are not limited to, use multiple FFT (Fast Fourier Transform) cores to perform one-dimensional Fourier transform in parallel, and configure the same number of product cores to perform exponential product calculation.

[0040] Figure 3 This is a schematic diagram of a multi-core parallel computing and multi-channel data transmission architecture according to an embodiment of this application. Figure 3As shown, to maximize data access efficiency, this embodiment configures a local memory for each FFT core and product core, and data access is performed only in the local memory during the computation phase. Before the original data of the initial transformation matrix and initial coefficient matrix are downloaded from the host 1 memory to the FPGA's global memory 4, this embodiment can divide the data into multiple data blocks and store them in multiple storage areas of the global memory 4. The data is then downloaded to various memory groups of the local memory using the same number of data loading modules as the storage areas, with each memory group containing multiple local memory blocks.

[0041] Operation unit 202 (and Figure 2 The exponential coefficient product unit 9 (which has the same function as the one in the previous example) is used to calculate the coefficient modulation matrix based on the forward transformation matrix and the initial coefficient matrix. This allows the calculation unit 201 to perform an inverse Fourier transform from Z-dimensional to Y-dimensional to X-dimensional based on the coefficient modulation matrix, thus obtaining the inverse transform matrix. For example... Figure 2 The exponential coefficient product unit 9 in the model can be used to perform the multiplication calculation between the forward transformation matrix obtained after the three-dimensional Fourier forward transform and the initial coefficient matrix.

[0042] Data transpose unit 203 (and Figure 2 The data transpose unit 8 (with the same function as the identifier) ​​is used to transpose the target dimension from the original dimension during matrix transformation. The original dimension and the target dimension can be any one of Z-dimensional, Y-dimensional, or X-dimensional. In the embodiment of this application, during the three-dimensional Fourier transform, it is necessary to perform Fourier transforms in X-dimensional, Y-dimensional, and Z-dimensional dimensions respectively. The data transpose unit 203 is used to complete the data transpose between dimensions. The original dimension may be X-dimensional, Y-dimensional, or Z-dimensional. The target dimension can be understood here as the dimension from which the current Fourier transform is expected to be transformed, which is also a dimension of X-dimensional, Y-dimensional, or Z-dimensional.

[0043] Processing unit 204 (and Figure 2 The checksum calculation unit 11 (which has the same function as the checksum unit 11 in the original text) is used to calculate the checksum of the inverse transformation matrix. For example... Figure 2 The checksum calculation unit 11 is used to perform matrix checksum calculation on the final inverse transformation matrix.

[0044] Control unit 205 (and Figure 2 The calculation process control unit 12 (with the same function as the identifier) ​​is used to receive start instructions and generate stop instructions from the processing device 100, and to control the calculation unit 201, the arithmetic unit 202, the data transpose unit 203, and the processing unit 204 to respond to the start instructions and stop instructions, thereby ending the three-dimensional Fourier transform calculation task, so that the processing device 100 obtains the total time consumed by the three-dimensional Fourier transform of the heterogeneous computing system 10. For example Figure 2The calculation process control unit 12 is mainly used for controlling the entire calculation process, including receiving a start command (start instruction) from the host 1 to start the entire calculation process, controlling the number of iterations during the calculation process, generating a stop instruction after the calculation is completed, generating an interrupt signal, ending the calculation task, and notifying the host 1 that the calculation task is completed.

[0045] This application embodiment can realize the three-dimensional Fourier transform of the heterogeneous computing system 10 through the processing device 100 and the programmable logic device 200 including but not limited to the computing unit 201, the arithmetic unit 202, the data transpose unit 203, the processing unit 204, the control unit 205, etc., thereby judging the three-dimensional Fourier transform performance of the heterogeneous computing system 10 based on the time consumed by the three-dimensional Fourier transform process of the system, thereby realizing the evaluation of the performance of the computing system of the supercomputer composed of CPU and FPGA in three-dimensional Fourier transform and all-to-all communication.

[0046] Optionally, in one embodiment of this application, the heterogeneous computing system further includes: at least one first storage unit for storing an initial transformation matrix, and multiple intermediate matrices in the process of obtaining a forward transformation matrix by performing a forward Fourier transform from X-dimensional to Y-dimensional to Z-dimensional and an inverse Fourier transform from Z-dimensional to Y-dimensional to X-dimensional on the coefficient modulation matrix; and at least one second storage unit for storing an initial coefficient matrix.

[0047] In actual implementation, in order to improve the data access speed during the calculation process, this application also sets a certain storage unit in the programmable logic device 200 of the heterogeneous computing system.

[0048] In the embodiments of this application, the programmable logic device 200 includes, but is not limited to, at least one first memory cell and at least one second memory cell. That is, in practical applications, the programmable logic device 200 may have multiple first memory cells and multiple second memory cells.

[0049] The first storage unit is used to store the initial transformation matrix, and multiple intermediate matrices in the process of obtaining the forward transformation matrix by performing a forward Fourier transform from X-dimensional to Y-dimensional to Z-dimensional and an inverse Fourier transform from Z-dimensional to Y-dimensional to X-dimensional to obtain the inverse transformation matrix of the coefficient modulation matrix. The second storage unit is used to store the initial coefficient matrix.

[0050] Additionally, the programmable logic device 200 in this embodiment also includes global memory 4. Global memory 4 can be understood as a total memory that can store and back up data in the programmable logic device 200, including but not limited to data received from the processing device 100 and data generated by the programmable logic device 200 itself.

[0051] When the processing device 100 and the programmable logic device 200 are connected via a serial high-speed interconnect bus, the embodiments of this application can realize data interaction between the processing device 100 and the global memory 4 of the programmable logic device 200 through the direct memory access engine 3 in the programmable logic device 200. The global memory 4 of the programmable logic device 200 can interact with the data in the first storage unit and the second storage unit through the data loading unit 5 in the programmable logic device 200.

[0052] Therefore, in this embodiment of the application, data can be stored by setting certain storage units in the programmable logic device 200. When data is needed for processes such as one-dimensional Fourier transform, exponential coefficient product, checksum calculation, etc., it can be directly obtained from or stored in the first / second storage unit, instead of obtaining data from or storing it in other computer devices through data interaction. This greatly reduces the time of data interaction and thus improves the data access speed.

[0053] For example, still as Figure 2 As shown, when the host 1 (processor 100) and the FPGA (programmable logic device 200) are connected via a serial high-speed interconnect bus, the initial transformation matrix and initial coefficient matrix generated by the host 1 can be sent to the global memory 4 of the FPGA through the direct memory access engine 3.

[0054] Then, the FPGA can, but is not limited to, implement data interaction between global memory 4 and FPGA local memory through data loading unit 5. For example, data loading unit 5 can send the initial transformation matrix and initial coefficient matrix in global memory 4 to the transformation matrix local memory 6 and coefficient matrix local memory 7 of the FPGA, where the transformation matrix local memory 6 and coefficient matrix local memory 7 both belong to the FPGA's local memory.

[0055] In this embodiment, the FPGA's transformation matrix local memory 6 can be understood as the first storage unit of the programmable logic device 200, and the coefficient matrix local memory 7 can be understood as the second storage unit of the programmable logic device 200.

[0056] In the FPGA, local memory 6 for the transformation matrix and local memory 7 for the coefficient matrix are configured, and there are multiple local memory 6 for the transformation matrix and local memory 7 for the coefficient matrix. Local memory 6 for the transformation matrix can be used to store various transformation matrices during the calculation process (the same matrix data stored in the first storage unit), including but not limited to the initial transformation matrix, the matrix (intermediate matrix) in the process of X-dimensional, Y-dimensional, and Z-dimensional Fourier forward transformation of the initial transformation matrix, the matrix (intermediate matrix) in the process of X-dimensional, Y-dimensional, and Z-dimensional Fourier inverse transformation, the inverse transformation matrix, and the coefficient modulation matrix, etc. Local memory 7 for the coefficient matrix can be used, but is not limited to, to store the initial coefficient matrix (the same matrix data stored in the second storage unit).

[0057] Then, during calculations such as one-dimensional Fourier transform, exponential coefficient product, and checksum calculation, data can be read, written, or accessed from local memory such as the transformation matrix local memory 6 and the coefficient matrix local memory 7.

[0058] In summary, the FPGA can use the direct memory access engine 3 to download the initial transformation matrix and initial coefficient matrix from the host 1 to the FPGA's global memory 4. Then, the data loading unit 5 loads the initial transformation matrix and initial coefficient matrix from the FPGA's global memory 4 and sends the data of the initial transformation matrix and initial coefficient matrix to the FPGA's transformation matrix local memory 6 and coefficient matrix local memory 7, respectively, for use in subsequent three-dimensional Fourier transform and other processing procedures.

[0059] In this embodiment of the application, the transformation matrix and the initial coefficient matrix can be stored respectively by setting a first storage unit and a second storage unit in the programmable logic device 200. This avoids the programmable logic device 200 repeatedly obtaining data from the processing device 100 or storing data back during the calculation process, which can greatly reduce the data interaction time and improve the data access speed.

[0060] Optionally, in one embodiment of this application, the heterogeneous computing system 10 further includes: a read-write conversion state machine, used to control the computing unit 201, the data transpose unit 203 and the processing unit 204 to perform read-write operations corresponding to the preset read-write conversion permissions according to the preset read-write conversion permissions in the programmable logic device 200, so as to read or write at least one of the initial transformation matrix, the forward transformation matrix, the coefficient modulation matrix, the inverse transformation matrix and a plurality of intermediate matrices from the first storage unit.

[0061] In some embodiments, the first and second storage units of this application can be implemented based on a simple dual-port random access memory (DRAM). A simple dual-port DRAM typically has two data access ports: port A for writing data and port B for reading data. Since multiple units in the programmable logic device 200 need to read or write data (various transformation matrices), but there is only one read port and one write port, it is necessary to time-multiplex the A and B ports of the memory.

[0062] In order to realize time-division multiplexing of data by each unit and accurately control the read and write time of data in the first storage unit by units such as computing unit 201, data transposition unit 203, and processing unit 204, this embodiment of the application also sets up a read-write conversion state machine in the programmable logic device 200 of the heterogeneous computing system 10.

[0063] The read / write state switching machine is mainly used to control the computing unit 201, the data transpose unit 203 and the processing unit 204 to perform read / write operations corresponding to the preset read / write switching permissions according to the preset read / write switching permissions in the programmable logic device 200, so as to read or write at least one of the initial transformation matrix, the forward transformation matrix, the coefficient modulation matrix, the inverse transformation matrix and multiple intermediate matrices from the first storage unit.

[0064] Here, the preset read and write permissions can be understood as the rights restrictions that are pre-set in the programmable logic device 200 according to the data read and write order that each unit should follow during the three-dimensional Fourier transform process. For example, a certain unit reads first, and a certain unit writes later.

[0065] Based on this, the read / write state switching machine can control the read / write operations of the computing unit 201, data transpose unit 203, processing unit 204, etc., according to the preset read / write permissions. That is, it can control the computing unit 201, data transpose unit 203, processing unit 204, etc., to read or write at least one of various transformation matrices such as the initial transformation matrix, forward transformation matrix, coefficient modulation matrix, inverse transformation matrix, and multiple intermediate matrices from the first storage unit.

[0066] For example, for the transformation matrix in local memory 6 (first storage unit), from Figure 2 As can be seen, two units (data loading unit 5 and data transpose unit 8) need to write data, and three units (data loading unit 5, one-dimensional Fourier transform unit 10, and checksum calculation unit 11) need to read data. Therefore, the A and B ports of the memory need to be time-division multiplexed. Figure 4 As shown, Figure 4 This is a schematic diagram of a time-sharing multiplexing structure for the local memory of the transformation matrix according to an embodiment of this application.

[0067] In order to achieve Figure 4The time-division multiplexing of each transformation matrix in the local memory 6 of the transformation matrix in each unit accurately controls the read and write time of each unit. The embodiment of this application designs a certain read and write transition state machine. Figure 5 This is a schematic diagram of the local memory read / write state transition of a transformation matrix according to an embodiment of this application, as shown below. Figure 4 and Figure 5 As shown:

[0068] In the initial stage, data loading unit 5 obtains write permission to the local memory 6 of the transformation matrix and writes the transformation matrix into the local memory 6 of the transformation matrix.

[0069] After the data is written (marked by 1), the one-dimensional Fourier transform unit 10 obtains read permission and the data transpose unit 8 obtains write permission, and performs three-dimensional Fourier forward transform and exponential product calculation.

[0070] After the exponential product calculation is completed (marked by flag 2), the data loading unit 5 obtains read permission, reads the product result from the local memory 6 of the transformation matrix and writes it to the global memory 4 for backup;

[0071] After the data is read (marked by 3), the one-dimensional Fourier transform unit 10 regains read permission, and the data transpose unit 8 regains write permission, and performs a three-dimensional inverse Fourier transform.

[0072] After the three-dimensional inverse Fourier transform is completed (marked by 4), the checksum calculation unit 11 obtains read permission and reads the data from the local memory 6 of the transform matrix to calculate the checksum;

[0073] After the checksum calculation is completed (marked by flag 5), the data loading unit 5 regains write permission and performs the iterative calculation a specified number of times according to the above process.

[0074] The embodiments of this application can design a read / write transition state machine to control the time of read / write operations of different units, realize time-sharing multiplexing of data, thereby meeting the read / write needs of multiple units with limited hardware resources (only two ports), avoiding the increase in hardware cost, power consumption and circuit complexity caused by adding ports. At the same time, by precisely controlling the timing, it ensures that the read / write operations of each unit are carried out in an orderly manner, and realizes efficient data interaction and sharing in resource-constrained scenarios.

[0075] Optionally, in one embodiment of this application, the control unit 205 includes:

[0076] Counter 13 is used to perform a counting action according to the start instruction and stop instruction, so as to send the counting result to the processing device 100.

[0077] Based on the relevant descriptions in other embodiments, it can be understood that this application can evaluate the three-dimensional Fourier transform performance and all-to-all communication performance of the heterogeneous computing system 10 by calculating the time consumed by the heterogeneous computing system 10 to complete the unified three-dimensional Fourier transform calculation process.

[0078] In order to accurately obtain the time consumed by the heterogeneous computing system 10 to complete the unified three-dimensional Fourier transform calculation process, this embodiment of the application also sets up a counter 13 in the control unit 205, which is used to execute the corresponding start counting action and stop counting action according to the start instruction received by the control unit 205 and the stop instruction generated, so as to send the counting result to the processing device 100, thereby obtaining the time consumed by the heterogeneous computing system 10 to complete the unified three-dimensional Fourier transform calculation process.

[0079] Specifically, in this embodiment of the application, a counter 13 can be configured in the control unit 205. When the control unit 205 receives the start instruction (start command) from the host 1, the counter 13 is cleared to zero and then starts counting (incrementing by one in each clock cycle).

[0080] Once the entire three-dimensional Fourier transform calculation task (including the iterative calculation process in the conventional NPB Fourier transform test benchmark) is completed, the control unit 205 generates a stop instruction, the counter 13 stops counting, and an interrupt signal is generated, thus stopping the calculation task. Then, the host 1 retrieves the count value from the counter 13 and performs corresponding processing, thereby obtaining the time consumed to complete the entire three-dimensional Fourier transform calculation process.

[0081] In this embodiment, hardware-level counting can be achieved by using a counter 13 configured in the control unit 205, thereby achieving high-precision recording of the number of clock cycles for the three-dimensional Fourier transform iterative calculation. This is used to calculate the total time consumed in the entire three-dimensional Fourier transform calculation process, avoiding the additional overhead and delay errors of software timing. Furthermore, the interrupt signal ensures that the timing endpoint accurately corresponds to the calculation completion time, providing a reliable time reference for system performance evaluation and process optimization. The counter 13 is simple in design, responds quickly, and can adapt to the real-time requirements of different hardware calculation processes.

[0082] The embodiments of this application also provide a method for evaluating the three-dimensional Fourier transform performance of a heterogeneous computing system. The method is described in detail below, in conjunction with the execution flow of the method for evaluating the three-dimensional Fourier transform performance of a heterogeneous computing system.

[0083] Specifically, Figure 6 This is a flowchart of a method for evaluating the three-dimensional Fourier transform performance of a heterogeneous computing system according to an embodiment of this application.

[0084] like Figure 6As shown, the method for evaluating the three-dimensional Fourier transform performance of the heterogeneous computing system uses the heterogeneous computing system 10, and the method includes the following steps:

[0085] In step S601, an initial transformation matrix is ​​generated based on pseudo-random numbers, and an initial coefficient matrix is ​​generated based on the target equation.

[0086] As can be understood, pseudo-random numbers here refer to a sequence of numbers generated by a certain algorithm that has statistical properties similar to random numbers (such as uniformity and irregularity) but is reproducible. In other words, pseudo-random numbers are sequences of numbers generated by algorithms that have randomness, satisfy statistical randomness, and can be generated repeatedly.

[0087] The initial transformation matrix here can be understood as the initial input matrix used for iterative calculations in the three-dimensional Fourier transform, and is the fundamental data structure for Fourier transform operations. The initial coefficient matrix here refers to the set of coefficients that, together with the transformation matrix in the three-dimensional Fourier transform process, participate in the frequency domain to spatial domain conversion in the Fourier transform.

[0088] In some embodiments, to ensure the objectivity of the three-dimensional Fourier transform process and calculation results, this application can generate an initial transformation matrix using pseudo-random numbers and generate an initial coefficient matrix according to the target equation. This avoids bias caused by human intervention, and the reproducibility of pseudo-random numbers also facilitates verification of the consistency of the three-dimensional Fourier transform calculation process. The target equation is essentially the same as the target equation in other embodiments; it can be understood as a mathematical equation determined by combining the matrix size of the initial transformation matrix to generate the initial coefficient matrix.

[0089] This application embodiment can generate an initial transformation matrix based on pseudo-random numbers and an initial coefficient matrix based on certain mathematical equations to construct test data that conforms to statistical characteristics, avoiding the tediousness of manual input. It also simplifies the preprocessing process of three-dimensional Fourier transform in supercomputing. Furthermore, by leveraging the repeatability of pseudo-random numbers, it ensures the randomness and repeatability of the data. In cases where multiple experiments are required, it can guarantee that the initial conditions of multiple experiments are consistent, providing a reliable foundation for algorithm debugging and result comparison, and facilitating algorithm verification and result reproduction.

[0090] Optionally, in one embodiment of this application, generating an initial transformation matrix based on pseudo-random numbers includes: identifying a preset pseudo-random number generator based on a preset pseudo-random number generation strategy; and generating pseudo-random numbers using the preset pseudo-random number generator to generate an initial transformation matrix based on the pseudo-random numbers.

[0091] Those skilled in the art will understand that FPGAs (Programmable Logic Devices) are not suitable for generating pseudo-random numbers. In supercomputer performance testing, relying on FPGAs to generate pseudo-random numbers may lead to bottlenecks in the initial data preparation stage due to low generation efficiency or insufficient randomness, interfering with the accurate evaluation of the core computational performance of the three-dimensional Fourier transform. Furthermore, in practical applications, the application scenarios of the three-dimensional Fourier transform in supercomputers are diverse. For example, high-precision scientific computing requires high randomness, while real-time simulation requires high speed. Different scenarios have different requirements for the characteristics of pseudo-random numbers.

[0092] Therefore, the embodiments of this application can identify a preset pseudo-random number generator through a preset pseudo-random number generation strategy, and then use the preset pseudo-random number generator to generate pseudo-random numbers, ensuring that the generated initial matrix is ​​adapted to the specific scenario and avoiding a decrease in calculation accuracy or loss of efficiency due to inconsistent random number characteristics.

[0093] In this context, the pseudo-random number generation strategy refers to a pre-defined standard or rule for selecting a pseudo-random number generation algorithm. This could be based on considerations such as security, speed, or statistical characteristics. Correspondingly, the pre-defined pseudo-random number generator is the hardware or software module that implements the pre-defined pseudo-random number generation algorithm, such as the Mersenne Twister algorithm or linear congruence generator commonly used in supercomputers.

[0094] It should be noted that the specific pseudo-random number generation strategy and its corresponding preset pseudo-random number generator can be set or adjusted by those skilled in the art according to actual application needs. The embodiments in this application are only illustrative and do not impose specific limitations.

[0095] For example, when testing the performance of a supercomputer in three-dimensional Fourier transform calculations for simulations such as quantum chemistry, the pseudo-random number generation strategy may prioritize the statistical properties of random numbers. Therefore, the corresponding preset pseudo-random number generator (pseudo-random number generation algorithm) can be set to a cryptographically secure pseudo-random number generator. If the performance of a supercomputer is tested in three-dimensional Fourier transform calculations for real-time fluid dynamics simulations, the pseudo-random number generation strategy may prioritize speed. Therefore, the corresponding preset pseudo-random number generator (pseudo-random number generation algorithm) can be set to a linear congruential generator, etc.

[0096] In practical applications, by identifying the pseudo-random number generation strategy and calling the corresponding pre-set pseudo-random number generator, an initial matrix that meets both accuracy requirements and computational efficiency can be generated. It should be noted that in this embodiment, the pseudo-random number generator is located in host 1; however, it is also possible to implement the pseudo-random number generator specified by the NPB Fourier transform benchmark in an FPGA to generate pseudo-random numbers identical to those in the source code.

[0097] The embodiments of this application can ensure that the initial matrix generation process itself does not become a distraction for performance testing by using a certain pseudo-random number generation strategy and a certain pseudo-random number generator selection mechanism. At the same time, the initial matrix generation process can be adapted to the diverse test scenarios of three-dimensional Fourier transform in supercomputing. The test results can truly reflect the technical effect of the performance of the core calculation link of three-dimensional Fourier transform in different scenarios, such as the calculation time in high-precision scenarios and the throughput in real-time scenarios.

[0098] Optionally, in one embodiment of this application, before generating the initial coefficient matrix according to the target equation, the method further includes: obtaining the matrix size of the initial transformation matrix; and determining the target equation for generating the initial coefficient matrix based on the matrix size of the initial transformation matrix.

[0099] As will be understood by those skilled in the art, in practical applications of three-dimensional Fourier transform, the matrix size of the transform matrix should be consistent with the matrix size of the coefficient matrix. Therefore, embodiments of this application can obtain the matrix size of the initial transform matrix, determine the desired matrix size of the generated initial coefficient matrix and the target equation based on the matrix size of the initial transform matrix, thereby ensuring that the matrix size of the transform matrix is ​​consistent with the matrix size of the coefficient matrix. Here, the target equation also refers to the mathematical equation determined by combining the matrix size of the initial transform matrix and used to generate the initial coefficient matrix.

[0100] For example, this application can generate an initial transformation matrix U of n1×n2×n3 based on a pseudo-random number generator in host 1, and generate an initial coefficient matrix W of n1×n2×n3 based on the following objective equation:

[0101]

[0102] in, Represents the coefficient matrix; Let be the exponential term, where It is a natural constant. , is the attenuation coefficient; Pi is the mathematical constant for converting between the frequency domain and the spatial domain in Fourier transform. These are the index variables in three dimensions of the three-dimensional space. n1, n2, and n3 represent the dimensions of the initial transformation matrix U and the initial coefficient matrix W in the three dimensions, namely the length, width, and height of the matrix.

[0103] The embodiments of this application can ensure the consistency and correctness of the initial transformation matrix and the initial coefficient matrix by constraining the matrix size and mathematical equality of the initial transformation matrix. This avoids calculation deviations caused by data association errors in the three-dimensional Fourier transform from the root cause. Especially in high-precision scenarios such as supercomputers, it can effectively guarantee the reliability of the Fourier transform results and the rationality of their physical meaning.

[0104] Step S602: Perform heterogeneous Fourier transform calculation using the initial transformation matrix and initial coefficient matrix to obtain the final checksum data, thereby obtaining the total time consumed by the heterogeneous Fourier transform calculation.

[0105] It is understandable that heterogeneous Fourier transform computing here refers to performing a three-dimensional Fourier transform calculation task on a heterogeneous computing system 10 (a supercomputer computing system composed of CPUs and FPGAs). In this calculation process, the advantages of parallel computing of different units can be utilized to distribute different stages of the transformation to multiple units in the programmable logic device 200 (such as an FPGA) for implementation.

[0106] The final checksum data here refers to the unique identifying data obtained by checking and calculating the results of the three-dimensional Fourier transform, such as the sum of the values ​​of all result elements, which can be used to verify the correctness and consistency of the calculation results. After obtaining the final checksum data, the embodiments of this application can calculate the total time consumed by the heterogeneous Fourier transform calculation.

[0107] The embodiments of this application can fully utilize the computing power of supercomputers through Fourier heterogeneous computing, realistically test the performance of the three-dimensional Fourier transform of the computing system of a supercomputer composed of CPU and FPGA, and use checksum data to provide quantitative basis for the correctness of the results, effectively ensuring the reliability of the performance evaluation results.

[0108] Optionally, in one embodiment of this application, the Fourier transform heterogeneous calculation is performed using the initial transformation matrix and the initial coefficient matrix to obtain the final checksum data. This includes: performing a three-dimensional forward Fourier transform on the initial transformation matrix to obtain a forward transformation matrix, and performing an exponential product calculation on the forward transformation matrix and the initial coefficient matrix to obtain a coefficient modulation matrix; performing a three-dimensional inverse Fourier transform on the coefficient modulation matrix to obtain an inverse transformation matrix, and performing a data checksum calculation on the data of the inverse transformation matrix to obtain initial checksum data, and determining whether the current cumulative iteration count is greater than or equal to a preset iteration count; if the current iteration count is less than the preset iteration count, then the coefficient modulation matrix is ​​used as the forward transformation matrix, and the step of performing an exponential product calculation on the forward transformation matrix and the initial coefficient matrix is ​​repeated until the current cumulative iteration count is greater than or equal to the preset iteration count, thus obtaining the final checksum data.

[0109] In actual implementation, the process of obtaining the final checksum data by performing heterogeneous Fourier transform calculation using the initial transformation matrix and the initial coefficient matrix includes, but is not limited to, the three-dimensional forward Fourier transform of the initial transformation matrix, the multiplication of the result of the three-dimensional forward Fourier transform of the initial transformation matrix with the initial coefficient matrix, and the three-dimensional inverse Fourier transform of the result of the multiplication of the result of the three-dimensional forward Fourier transform of the initial transformation matrix with the initial coefficient matrix.

[0110] Specifically, Figure 7 This is a flowchart illustrating the heterogeneous computation process of the NPB Fourier transform according to one embodiment of this application. Figure 7 As shown, the process of obtaining the final checksum data by performing heterogeneous Fourier transform calculations on the initial transformation matrix and the initial coefficient matrix can be represented, but is not limited to, as follows:

[0111] (1) Host 1 sends raw data: Host 1 uses a pseudo-random number generator to generate an initial transformation matrix U and an initial coefficient matrix W, and sends the initial transformation matrix U and the initial coefficient matrix W to the global memory 4 of the FPGA through the direct memory access engine 3. The data loading unit 5 then sends the data of the initial transformation matrix U and the initial coefficient matrix W to the local memory 6 of the transformation matrix and the local memory 7 of the coefficient matrix of the FPGA, respectively.

[0112] (2) Three-dimensional Fourier forward transform: The one-dimensional Fourier transform unit 10 in the FPGA performs a three-dimensional Fourier forward transform on the initial transform matrix U to obtain the forward transform matrix V;

[0113] (3) Calculation of exponential product: Perform exponential product calculation on the positive transformation matrix V and the initial coefficient matrix W to obtain the coefficient modulation matrix X;

[0114] (4) Calculation result feedback: Since the starting data used for subsequent iterative calculations is the output result of the previous round of exponential product unit, it is necessary to back up the exponential product result (coefficient modulation matrix X) to the global memory 4 of the FPGA. Specifically, the data loading unit 5 reads the exponential product result (coefficient modulation matrix X) from the local memory 6 of the transformation matrix and stores it in the global memory 4 of the FPGA.

[0115] (5) Three-dimensional inverse Fourier transform: The coefficient modulation matrix X is subjected to a three-dimensional inverse Fourier transform to obtain the inverse transform matrix Y;

[0116] (6) Data checksum calculation: The data of the inverse transformation matrix Y is checked and calculated. That is, the checksum calculation unit 11 retrieves the specified data from the local memory 6 of the transformation matrix, accumulates and sums them to obtain the checksum result of this round of operation as the initial checksum data Z, and stores the result in the memory of the checksum calculation unit 11 itself; wherein, the checksum calculation expression in the embodiment of this application may be, but is not limited to, the following:

[0117]

[0118] in, The checksum is the result obtained by accumulating specific elements in the inverse transformation matrix Y. These are the three-dimensional matrix elements of the inverse transformation matrix involved in the calculation. These are the indices of the matrix in the three dimensions, respectively, through... Determine the specific location, among which, For mold taking operation, This is a loop variable, typically taking values ​​from 0 to 1023, used to iterate through and determine the position of each matrix element involved in the accumulation;

[0119] (7) Iterative calculation judgment: Determine whether the current cumulative number of iterations is greater than or equal to the preset number of iterations. Here, the preset number of iterations can be understood as the number of times the complete calculation process of "exponential product calculation - calculation result feedback - three-dimensional Fourier inverse transformation - data verification and calculation" needs to be repeated during the test.

[0120] (8) If the current iteration number is greater than or equal to the preset iteration number, the final checksum data is obtained. Here, the final checksum data refers to the set of checksum data generated in each iteration. That is, the number of checksum data is equal to the number of iterations, and the set of these checksum data is the final checksum data.

[0121] (9) If the current iteration number is less than the preset iteration number, the coefficient modulation matrix X stored in the global memory 4 is sent to the local memory 6 of the transformation matrix, and the coefficient modulation matrix X is used as the positive transformation matrix V. The step of performing the exponential product calculation of the positive transformation matrix and the initial coefficient matrix is ​​re-executed, that is, jump to step (3) until the current cumulative iteration number is greater than or equal to the preset iteration number, and the final checksum data is obtained.

[0122] In this process, step (1) is still completed by the CPU, while steps (2) to (9) are completed by the FPGA.

[0123] The embodiments of this application can fully utilize the CPU and FPGA in the heterogeneous computing system 10 (a computing system of a supercomputer composed of CPU and FPGA) through processes such as the three-dimensional forward Fourier transform of the initial transformation matrix, the multiplication of the three-dimensional forward Fourier transform result of the initial transformation matrix with the initial coefficient matrix, and the three-dimensional inverse Fourier transform of the multiplication result. This can fully test the heterogeneous collaboration efficiency of the CPU and FPGA, and accurately test the computing power limit and performance ratio of the heterogeneous computing system 10 in large-scale three-dimensional data transformation scenarios.

[0124] Moreover, the three-dimensional Fourier transform in this embodiment involves a large amount of data interaction between the computing units of the FPGA, effectively simulating the high-frequency, high-throughput scenario of FPGA all-to-all communication in actual scientific computing, thereby evaluating the all-to-all communication performance of the FPGA in the heterogeneous computing system 10.

[0125] Optionally, in one embodiment of this application, before determining whether the current cumulative iteration count is greater than or equal to the preset iteration count, the method further includes: obtaining the Fourier transform reference parameters for heterogeneous Fourier transform calculation; and determining the preset iteration count based on the Fourier transform reference parameters.

[0126] Based on the descriptions of other embodiments, it is understood that this application involves a process for determining the magnitude of both the current cumulative iteration count and the preset iteration count during the Fourier heterogeneous computation. This is mainly because the NPB Fourier transform benchmark is divided into different test classes, each corresponding to different NPB Fourier transform benchmark parameters. The data size (matrix size) of the NPB Fourier transform benchmark parameters may differ, and the applicable iteration counts may also differ.

[0127] Therefore, in some embodiments, this application can obtain the Fourier transform reference parameters of the current Fourier transform heterogeneous calculation, and determine the appropriate preset number of iterations based on the Fourier transform reference parameters (i.e., the parameters of the Fourier transform test reference, which have multiple types).

[0128] For example, Table 1 is a table of NPB Fourier transform reference parameters for different data scales according to an embodiment of this application, which can be represented as follows:

[0129] Table 1

[0130]

[0131] As shown in Table 1, the number of floating-point operations for each type of benchmark (corresponding to different Fourier transform benchmark parameters) is fixed (the number of floating-point operations is fixed under the premise of a certain matrix size, and the number of floating-point operations is different for different matrix sizes). For example, each one-dimensional Fourier transform requires multiple floating-point multiplication and floating-point addition operations, and each exponent coefficient product calculation only requires two floating-point multiplication calculations (one for the real part and one for the imaginary part). However, the number of iterations for each type of benchmark is not fixed and will vary with different benchmarks (Fourier transform benchmark parameters).

[0132] Given a fixed matrix size and number of iterations, the total number of floating-point operations required to complete the 3D Fourier forward transform, the calculation of the product of exponential coefficients for a specified number of iterations, and the 3D Fourier inverse transform is fixed. Based on this, the shorter the time different computing systems consume to complete the same test class of computational processes, the better the system's performance in performing the 3D Fourier transform and all-to-all communication.

[0133] This application embodiment can accurately adapt to the testing requirements of a supercomputer computing system composed of CPUs and FPGAs under different data scales by matching a certain number of iterations according to the matrix size of different test classes and determining the relationship between the current cumulative iterations and the number of iterations during calculation. For example, small matrix sizes can be quickly verified for basic performance with fewer iterations, while large matrix sizes can be fully exposed for computational and communication bottlenecks under long-term high loads with more iterations. This achieves the elimination of evaluation biases for tests of different scales through a unified iteration standard. Based on the comprehensive verification of the heterogeneous computing system 10's three-dimensional Fourier transform performance and the stability of FPGA all-to-all communication, the performance evaluation results have higher reliability.

[0134] Optionally, in one embodiment of this application, performing a three-dimensional Fourier forward transform on the initial transform matrix to obtain the forward transform matrix includes: performing an X-dimensional Fourier forward transform on the initial transform matrix to obtain an X-dimensional Fourier forward transform matrix, and converting the data dimension of the X-dimensional Fourier forward transform matrix to obtain a dimension-transformed X-dimensional Fourier forward transform matrix; performing a Y-dimensional Fourier forward transform on the dimension-transformed X-dimensional Fourier forward transform matrix to obtain a Y-dimensional Fourier forward transform matrix, and converting the data dimension of the Y-dimensional Fourier forward transform matrix to obtain a dimension-transformed Y-dimensional Fourier forward transform matrix; and performing a Z-dimensional Fourier forward transform on the dimension-transformed Y-dimensional Fourier forward transform matrix to obtain a Z-dimensional Fourier forward transform matrix, so as to determine the forward transform matrix based on the Z-dimensional Fourier forward transform matrix.

[0135] In actual implementation, when this application performs a three-dimensional forward Fourier transform on the initial transform matrix to obtain the forward transform matrix, it does so based on certain transformation rules and a single dimension.

[0136] Specifically, in this embodiment, the initial transformation matrix can be read from the local memory 6 of the transformation matrix using the computing unit 201 (such as the one-dimensional Fourier transform unit 10) to perform an X-dimensional Fourier forward transform, thereby obtaining an X-dimensional Fourier forward transform matrix. (It should be noted that the Fourier forward / inverse transform matrix of a certain dimension in this embodiment is only a name given to the Fourier transform result of a certain dimension, and they are all essentially transformation matrices.) The transformation result (X-dimensional Fourier forward transform matrix) is passed directly to the data transpose unit 8 without any processing by the exponential product unit. The data transpose unit 8 performs data transpose on the X-dimensional Fourier forward transform matrix, that is, after converting the data dimension of the X-dimensional Fourier forward transform matrix, the dimension-converted X-dimensional Fourier forward transform matrix is ​​obtained. The data transpose result, i.e., the dimension-converted X-dimensional Fourier forward transform matrix, is written into the local memory 6 of the transformation matrix.

[0137] Here, data transposition, which is the transformation of the data dimension of the X-dimensional Fourier transform matrix in the embodiments of this application, can be understood as exchanging the dimensions of the matrix after Fourier transform in a certain dimension (such as the X-dimensional Fourier transform matrix here) (e.g., row and column transformation, swapping the row index and column index of the matrix, etc.), to complete the rearrangement of the matrix data layout.

[0138] Next, the computation unit 201 (such as the one-dimensional Fourier transform unit 10) reads the dimension-transformed X-dimensional Fourier positive transform matrix from the local memory 6 of the transform matrix and performs a Y-dimensional Fourier positive transform to obtain a Y-dimensional Fourier positive transform matrix. The Y-dimensional Fourier positive transform matrix is ​​passed through the exponential product unit without any processing and is directly passed to the data transpose unit 8. The data transpose unit 8 also performs data transpose on the Y-dimensional Fourier positive transform matrix, that is, after transforming the data dimension of the Y-dimensional Fourier positive transform matrix, it obtains the dimension-transformed Y-dimensional Fourier positive transform matrix and writes the dimension-transformed Y-dimensional Fourier positive transform matrix into the local memory 6 of the transform matrix.

[0139] The calculation unit 201 (such as the one-dimensional Fourier transform unit 10) reads the Y-dimensional Fourier positive transform matrix after dimension transformation from the local memory 6 of the transform matrix and performs a Z-dimensional Fourier positive transform to obtain a Z-dimensional Fourier positive transform matrix. Thus, the three-dimensional Fourier positive transform of X, Y, and Z dimensions is completed. The final Z-dimensional Fourier positive transform matrix is ​​the positive transform matrix in the embodiment of this application.

[0140] Then, the Z-dimensional Fourier transform matrix can be input into the exponential product unit 9. At the same time, the exponential product unit 9 also retrieves the data of the initial coefficient matrix from the local memory of the coefficient matrix 7, and multiplies the corresponding elements of the two matrices to obtain the coefficient modulation matrix after multiplication. Then, after passing through the data transpose unit 8, the coefficient modulation matrix is ​​stored into the local memory of the transform matrix 6.

[0141] Similarly, since the starting data used for subsequent iterative calculations is the coefficient modulation matrix output by the previous exponential product unit 9, the data loading unit 5 needs to read the current product result (coefficient modulation matrix) from the local memory 6 of the transformation matrix and back it to the FPGA's global memory 4 for backup. Then, a three-dimensional inverse Fourier transform is directly performed on the coefficient modulation matrix without transposing the coefficient modulation matrix in between.

[0142] This application embodiment can perform Fourier transforms in the FPGA sequentially by distinguishing the order from X-dimensional to Y-dimensional to Z-dimensional, ensuring that the FPGA fully utilizes its parallel computing capabilities and accurately tests its computing efficiency in high-frequency repetitive calculations. At the same time, the data flow between single-dimensional transformations requires full-to-full communication between the FPGA's internal storage and computing units, which can truly reflect the bandwidth and latency bottlenecks of data interaction within the FPGA, providing data support for evaluating the core computing capabilities and internal communication performance of the FPGA in the heterogeneous computing system 10.

[0143] Optionally, in one embodiment of this application, performing a three-dimensional inverse Fourier transform on the coefficient modulation matrix to obtain the inverse transform matrix includes: performing a Z-dimensional inverse Fourier transform on the coefficient modulation matrix to obtain a Z-dimensional inverse Fourier transform matrix, and converting the data dimension of the Z-dimensional inverse Fourier transform matrix to obtain a dimension-converted Z-dimensional inverse Fourier transform matrix; performing a Y-dimensional inverse Fourier transform on the dimension-converted Z-dimensional inverse Fourier transform matrix to obtain a Y-dimensional inverse Fourier transform matrix, and converting the data dimension of the Y-dimensional inverse Fourier transform matrix to obtain a dimension-converted Y-dimensional inverse Fourier transform matrix; and performing an X-dimensional inverse Fourier transform on the dimension-converted Y-dimensional inverse Fourier transform matrix to obtain an X-dimensional inverse Fourier transform matrix, so as to determine the inverse transform matrix based on the X-dimensional inverse Fourier transform matrix.

[0144] In other embodiments, when performing a three-dimensional inverse Fourier transform on the coefficient modulation matrix to obtain the inverse transform matrix, this application also performs the transformation based on certain transformation rules and a single dimension, but it corresponds to the three-dimensional forward Fourier transform process of the initial transform matrix.

[0145] Specifically, in this embodiment, the computation unit 201 (such as the one-dimensional Fourier transform unit 10; it should be noted that the Fourier transform mode of the one-dimensional Fourier transform unit 10 is changed from forward transform to inverse transform) can still read the coefficient modulation matrix from the local memory 6 of the transform matrix and perform a Z-dimensional inverse Fourier transform to obtain a Z-dimensional inverse Fourier transform matrix. The Z-dimensional inverse Fourier transform matrix is ​​passed through the exponential product unit without any processing and is directly passed to the data transpose unit 8. The data transpose unit 8 performs data transpose on the Z-dimensional inverse Fourier transform matrix, that is, after converting the data dimension of the Z-dimensional inverse Fourier transform matrix, the dimension-converted Z-dimensional inverse Fourier transform matrix is ​​obtained. The data transpose result, i.e., the dimension-converted Z-dimensional inverse Fourier transform matrix, is written into the local memory 6 of the transform matrix.

[0146] Next, the computation unit 201 (such as the one-dimensional Fourier transform unit 10) reads the dimension-transformed Z-dimensional inverse Fourier transform matrix from the local memory 6 of the transform matrix and performs a Y-dimensional inverse Fourier transform to obtain a Y-dimensional inverse Fourier transform matrix. The Y-dimensional inverse Fourier transform matrix is ​​passed through the exponential product unit without any processing and is directly passed to the data transpose unit 8. The data transpose unit 8 performs data transpose on the Y-dimensional inverse Fourier transform matrix, that is, after transforming the data dimension of the Y-dimensional inverse Fourier transform matrix, it obtains the dimension-transformed Y-dimensional inverse Fourier transform matrix and writes the dimension-transformed Y-dimensional inverse Fourier transform matrix into the local memory 6 of the transform matrix.

[0147] The calculation unit 201 (such as the one-dimensional Fourier transform unit 10) reads the Y-dimensional inverse Fourier transform matrix after dimension transformation from the local memory 6 of the transform matrix and performs an X-dimensional inverse Fourier transform to obtain an X-dimensional inverse Fourier transform matrix. The X-dimensional inverse Fourier transform matrix is ​​the inverse transform matrix. Thus, the three-dimensional inverse Fourier transform of the three dimensions X, Y, and Z is completed. The X-dimensional inverse Fourier transform matrix is ​​then stored in the local memory 6 of the transform matrix after passing through the data transpose unit 8.

[0148] Finally, the checksum calculation unit 11 retrieves the specified data from the local memory 6 of the transformation matrix, performs cumulative summation to obtain the checksum result of this round of operation, and stores the result in its own memory. The checksum calculation method here is the same as that in step (5) of the previous embodiment, and will not be repeated here.

[0149] The next step is to determine whether the specified number of iterations has been completed. If not, the coefficient modulation matrix is ​​replaced with the forward transformation matrix without any processing and input into the exponential product unit 9. It is then multiplied with the initial coefficient matrix, and the result is input into the data transpose unit 8. During this stage, the data transpose unit 8 does not perform any operation and stores the result back into the local memory of the transformation matrix 6. The data is then read from the local memory of the transformation matrix 6 and the inverse Fourier transform, checksum calculation, and other processes are repeated until the specified number of iterations is reached.

[0150] This application embodiment can fully test the parallel efficiency of the heterogeneous computing system 10 in the three-dimensional Fourier transform and the scheduling capability of data transposition through a complete link of multi-dimensional Fourier transform, data transposition, multi-round iteration and checksum verification. It can also accurately evaluate the computing power sustainability and communication stability of the system in large-scale, high-repetition computing scenarios through the iterative execution of the whole process and all-to-all data interaction. This provides a comprehensive and practical evaluation basis for the three-dimensional Fourier transform performance and all-to-all communication capability of the computing system of the supercomputer composed of CPU+FPGA.

[0151] Optionally, in one embodiment of this application, after obtaining the final checksum data, the method further includes: obtaining the theoretical checksum value corresponding to the final checksum data; comparing the final checksum data with the theoretical checksum value corresponding to the final checksum data, so as to generate the accuracy of the final checksum data based on the comparison result between the final checksum data and the theoretical checksum value corresponding to the final checksum data.

[0152] In some embodiments, each iteration of the Fourier heterogeneous computation process generates a checksum using a new and different inverse transform matrix Y. For example, if the S-class iterative computation is performed 6 times, 6 checksums will be generated, and host 1 will also read back 6 data. Because the initial data for each type of benchmark is fixed, there are fixed theoretical checksum values. Reading back 6 checksum values ​​will correspond to 6 theoretical checksum values.

[0153] However, in the event of an error during the Fourier heterogeneous computation process, the final checksum data read back by host 1 (including the checksum data from each iteration) will differ from the theoretical value of the final checksum data. That is, when a computational error occurs, at least one (or one or more) of the six read-back checksum values ​​may differ from the theoretical checksum value corresponding to that read-back checksum value.

[0154] To avoid performance evaluation of 3D Fourier transform in the event of errors during the heterogeneous Fourier calculation process, this application embodiment can obtain the theoretical value of the final checksum after obtaining the final checksum data, i.e., all checksum data generated by multiple iterations of calculation. By comparing each checksum data in the final checksum data with its corresponding theoretical value, the accuracy (accurate / inaccurate) of the final checksum data is generated, i.e., it is determined whether each checksum data in the final checksum data is correct, thereby determining whether there are any errors in the heterogeneous Fourier calculation process.

[0155] This application embodiment can quickly screen out invalid test results caused by calculation errors before performing three-dimensional Fourier transform performance evaluation by comparing each checksum data in the final checksum data with the corresponding theoretical checksum value. This avoids using erroneous data to evaluate the performance of the heterogeneous computing system 10, ensuring that subsequent performance evaluations are based on valid and correct checksum data, and improving the accuracy and reliability of the performance evaluation results.

[0156] Step S603: Based on the total time consumed by heterogeneous computation using Fourier transform, determine the total time consumed by the three-dimensional Fourier transform of the heterogeneous computing system 10, so as to generate the performance evaluation result of the three-dimensional Fourier transform of the heterogeneous computing system 10 based on the total time consumed by the three-dimensional Fourier transform.

[0157] Based on the descriptions of other embodiments, it is understood that when the control unit 205 receives the start instruction from the host 1, the counter 13 is cleared and then starts counting (incrementing by one in each clock cycle). The Fourier heterogeneous calculation begins at the same time as the counting begins. When the Fourier heterogeneous calculation ends, that is, the entire three-dimensional Fourier transform calculation task (including the iterative calculation process in the conventional NPB Fourier transform test benchmark) is completed and the final checksum data is generated, the control unit 205 generates a stop instruction, the counter 13 stops counting, and an interrupt signal is generated to generate the stop instruction, and the calculation task stops.

[0158] In some embodiments, after verifying that the heterogeneous Fourier calculation process is error-free, this application can determine the total time of the three-dimensional Fourier transform of the heterogeneous computing system 10 based on the total time of the heterogeneous Fourier transform calculation, and thus evaluate the three-dimensional Fourier transform performance of the heterogeneous computing system 10 based on the total time consumed by the entire three-dimensional Fourier transform calculation process of the heterogeneous computing system 10.

[0159] In this embodiment of the application, the total time consumed by the heterogeneous computation of Fourier transform is used as the total time consumed by the three-dimensional Fourier transform of the heterogeneous computing system 10 to evaluate the three-dimensional Fourier transform performance of the heterogeneous computing system 10.

[0160] It should be noted that, in this embodiment, the entire Fourier heterogeneous computation process begins when the FPGA receives the start instruction from the CPU, triggering the data loading unit 5 to send the initial transformation matrix U and the initial coefficient matrix W to the FPGA's transformation matrix local memory 6 and coefficient matrix local memory 7, respectively, and simultaneously triggering the counter to start counting. Subsequently, the one-dimensional Fourier transform unit retrieves the initial transformation matrix from the transformation matrix local memory 6 and performs an X-dimensional Fourier forward transform. This continues until the iterative computation is completed, the checksum calculation unit generates the last checksum data to obtain the final checksum data, and triggers the control unit 205 in the FPGA to generate a stop instruction to stop the counter from counting.

[0161] In practical applications, the shorter the time different computing systems take to complete the same type of computation process, the better the performance of the computing system in performing 3D Fourier transform and FPGA full-to-full communication. Therefore, when generating the 3D Fourier transform performance evaluation result of the heterogeneous computing system 10 based on the total time consumption in this embodiment, the evaluation criterion is that the shorter the total time consumption of the heterogeneous Fourier transformation in this embodiment (i.e., the shorter the total time consumption of the 3D Fourier transform of the heterogeneous computing system 10), the higher the computational efficiency and the better the 3D Fourier transform performance.

[0162] This application embodiment can intuitively reflect the computational efficiency of the FPGA by comprehensively covering the entire process of the three-dimensional Fourier transform of the FPGA in the heterogeneous computing system 10 (including data loading, heterogeneous computation, and result verification), thereby evaluating the three-dimensional Fourier transform performance of the heterogeneous computing system 10. The operation is simple while ensuring the accuracy of the evaluation results. Moreover, the total time in this application embodiment includes the time spent on all-to-all data interaction between multiple units within the FPGA. Therefore, it can also evaluate the all-to-all communication performance of the FPGA in the heterogeneous computing system 10. Similarly, the shorter the total time, the higher the computational efficiency and the better the all-to-all performance, ensuring that the performance evaluation takes into account both computational and communication capabilities, and providing a more comprehensive basis for system optimization.

[0163] Optionally, in one embodiment of this application, the total time consumed by the Fourier transform-based heterogeneous computation includes: obtaining the operating clock cycle of the field-programmable gate array (FPGA) in the heterogeneous computing system; and generating the total time consumed by the Fourier transform-based heterogeneous computation by combining the count value of the Fourier transform heterogeneous computation process with the product of the operating clock cycle.

[0164] Those skilled in the art will understand that the counting rule of counter 13 strictly follows the operating clock rhythm of the FPGA. After each complete operating clock cycle (i.e., the time it takes for the FPGA hardware circuit to complete one basic signal oscillation, for example, when the FPGA clock frequency is 300MHz, one operating clock cycle is 1 nanosecond), the value stored in counter 13 will automatically increase by 1.

[0165] For example, if the FPGA clock frequency is 500MHz and one clock cycle is 2 nanoseconds, if counter 13 starts counting from 0, after 10 clock cycles, the count value will change from 0 to 10. At this time, the actual time is 10 × 2 nanoseconds = 20 nanoseconds.

[0166] In actual execution, the total time consumed by the entire computation process can be calculated by, but is not limited to, the counter 13 configured in the heterogeneous computing system 10. However, the counter 13 in the FPGA increments by one for each clock cycle. Therefore, this application needs to combine the clock cycle of the FPGA in the heterogeneous computing system to calculate the final total time consumed.

[0167] For example, after generating the initial transformation matrix and initial coefficient matrix, host 1 transmits them to the FPGA. Then, it sends a start instruction to the control unit within the FPGA. Upon receiving the start instruction, the control unit resets counter 13 to zero. Counter 13 begins counting after the FPGA receives the task start command, incrementing by one each clock cycle. When the entire iterative calculation is completed and the final checksum data is generated, counter 13 stops counting and generates an interrupt signal. The count value of counter 13 during this process is the count value of the heterogeneous Fourier transform calculation process in this embodiment of the application.

[0168] Then, host 1 can retrieve the count value from counter 13 and multiply the value by the FPGA's preset operating clock cycle (it should be noted that the FPGA's operating clock cycle is usually not dynamically changed in real time after the design is fixed, but can be flexibly adjusted according to the requirements during the design and development stage. Therefore, the FPGA's preset operating clock cycle here is the FPGA's operating clock cycle in actual application, and the two have the same actual value) to obtain the time consumed to complete the entire Fourier heterogeneous calculation process.

[0169] In this embodiment, the counter 13 in the heterogeneous computing system 10 can accurately record the total number of clock cycles from the start of the Fourier transform heterogeneous computing to the completion of the iteration. Combined with the known clock cycle duration, the count value can be directly converted into the actual computing time, thereby providing a high-precision time reference for the computing performance evaluation of the heterogeneous computing system 10.

[0170] Through the above description of the embodiments, those skilled in the art can clearly understand that the methods according to the above embodiments can be implemented by means of software plus necessary general-purpose hardware platforms. Of course, they can also be implemented by hardware, but in many cases the former is a better implementation method.

[0171] Embodiments of this application also provide an evaluation device for the three-dimensional Fourier transform performance of a heterogeneous computing system, employing a heterogeneous computing system 10, such as... Figure 8 As shown, the evaluation device for the three-dimensional Fourier transform performance of the heterogeneous computing system includes: a generation module 300, a calculation module 400, and an evaluation module 500.

[0172] The generation module 300 is used to generate an initial transformation matrix based on pseudo-random numbers and an initial coefficient matrix based on the target equation; the calculation module 400 is used to perform heterogeneous Fourier transform calculations using the initial transformation matrix and the initial coefficient matrix to obtain the final checksum data, thereby obtaining the total time consumed by the heterogeneous Fourier transform calculation; the evaluation module 500 is used to determine the total time consumed by the three-dimensional Fourier transform of the heterogeneous computing system based on the total time consumed by the heterogeneous Fourier transform calculation, thereby generating a three-dimensional Fourier transform performance evaluation result of the heterogeneous computing system based on the total time consumed by the three-dimensional Fourier transform.

[0173] Optionally, in one embodiment of this application, the generation module 300 includes: an identification unit, used to identify a preset pseudo-random number generator based on a preset pseudo-random number generation strategy; and a generation unit, used to generate pseudo-random numbers using the preset pseudo-random number generator, so as to generate an initial transformation matrix based on the pseudo-random numbers.

[0174] Optionally, in one embodiment of this application, it further includes: a first acquisition module, configured to acquire the matrix size of the initial transformation matrix before generating the initial coefficient matrix according to the target equation; and a first determination module, configured to determine the target equation for generating the initial coefficient matrix according to the matrix size of the initial transformation matrix.

[0175] Optionally, in one embodiment of this application, the calculation module 400 includes: a forward transform unit, configured to perform a three-dimensional forward Fourier transform on the initial transform matrix to obtain a forward transform matrix, and perform an exponential product calculation on the forward transform matrix and the initial coefficient matrix to obtain a coefficient modulation matrix; an inverse transform unit, configured to perform a three-dimensional inverse Fourier transform on the coefficient modulation matrix to obtain an inverse transform matrix, perform a data checksum calculation on the data of the inverse transform matrix to obtain initial checksum data, and determine whether the current cumulative iteration count is greater than or equal to a preset iteration count; and an iteration unit, configured to, if the current iteration count is less than the preset iteration count, use the coefficient modulation matrix as the forward transform matrix, and re-execute the step of performing an exponential product calculation on the forward transform matrix and the initial coefficient matrix until the current cumulative iteration count is greater than or equal to the preset iteration count, to obtain the final checksum data.

[0176] Optionally, in one embodiment of this application, it further includes: a second acquisition module, used to acquire Fourier transform reference parameters for heterogeneous Fourier transform calculation before determining whether the current cumulative iteration number is greater than or equal to a preset iteration number; and a second determination module, used to determine the preset iteration number based on the Fourier transform reference parameters.

[0177] Optionally, in one embodiment of this application, the forward transform unit includes: a first transform subunit, configured to perform an X-dimensional Fourier forward transform on the initial transform matrix to obtain an X-dimensional Fourier forward transform matrix, and convert the data dimension of the X-dimensional Fourier forward transform matrix to obtain a dimension-transformed X-dimensional Fourier forward transform matrix; a second transform subunit, configured to perform a Y-dimensional Fourier forward transform on the dimension-transformed X-dimensional Fourier forward transform matrix to obtain a Y-dimensional Fourier forward transform matrix, and convert the data dimension of the Y-dimensional Fourier forward transform matrix to obtain a dimension-transformed Y-dimensional Fourier forward transform matrix; and a third transform subunit, configured to perform a Z-dimensional Fourier forward transform on the dimension-transformed Y-dimensional Fourier forward transform matrix to obtain a Z-dimensional Fourier forward transform matrix, so as to determine the forward transform matrix based on the Z-dimensional Fourier forward transform matrix.

[0178] Optionally, in one embodiment of this application, the inverse transform unit performs a three-dimensional inverse Fourier transform on the coefficient modulation matrix to obtain an inverse transform matrix, comprising: a fourth transform subunit, used to perform a Z-dimensional inverse Fourier transform on the coefficient modulation matrix to obtain a Z-dimensional inverse Fourier transform matrix, and convert the data dimension of the Z-dimensional inverse Fourier transform matrix to obtain a dimension-transformed Z-dimensional inverse Fourier transform matrix; a fifth transform subunit, used to perform a Y-dimensional inverse Fourier transform on the dimension-transformed Z-dimensional inverse Fourier transform matrix to obtain a Y-dimensional inverse Fourier transform matrix, and convert the data dimension of the Y-dimensional inverse Fourier transform matrix to obtain a dimension-transformed Y-dimensional inverse Fourier transform matrix; and a sixth transform subunit, used to perform an X-dimensional inverse Fourier transform on the dimension-transformed Y-dimensional inverse Fourier transform matrix to obtain an X-dimensional inverse Fourier transform matrix, so as to determine the inverse transform matrix based on the X-dimensional inverse Fourier transform matrix.

[0179] Optionally, in one embodiment of this application, it further includes: a data acquisition module, used to acquire the theoretical checksum value corresponding to the final checksum data after obtaining the final checksum data; and a comparison module, used to compare the final checksum data and the theoretical checksum value corresponding to the final checksum data to generate the accuracy of the final checksum data based on the comparison result between the final checksum data and the theoretical checksum value corresponding to the final checksum data.

[0180] Optionally, in one embodiment of this application, the evaluation module 500 includes: a third acquisition module, used to acquire the operating clock cycle of the field-programmable gate array (FPGA) in the heterogeneous computing system; and a processing module, used to combine the count value of the Fourier transform heterogeneous computing process with the product of the operating clock cycle to generate the total time consumed by the Fourier transform heterogeneous computing.

[0181] For a description of the features in the embodiment of the device for evaluating the three-dimensional Fourier transform performance of a heterogeneous computing system, please refer to the relevant description of the embodiment of the method for evaluating the three-dimensional Fourier transform performance of a heterogeneous computing system, which will not be repeated here.

[0182] Embodiments of this application also provide an electronic device, including a memory and a processor, wherein the memory stores a computer program, and the processor is configured to run the computer program to perform the steps in the embodiments of the method for evaluating the three-dimensional Fourier transform performance of any of the heterogeneous computing systems described above.

[0183] Embodiments of this application also provide a non-volatile computer-readable storage medium storing a computer program, wherein the computer program is configured to execute the steps in the embodiments of the method for evaluating the three-dimensional Fourier transform performance of any of the heterogeneous computing systems described above when it is run.

[0184] In one exemplary embodiment, the aforementioned computer-readable storage medium may include, but is not limited to, various media capable of storing computer programs, such as a USB flash drive, read-only memory (ROM), random access memory (RAM), portable hard disk, magnetic disk, or optical disk.

[0185] The embodiments of this application also provide a computer program product, which includes a computer program that, when executed by a processor, implements the steps in the embodiments of the method for evaluating the three-dimensional Fourier transform performance of any of the heterogeneous computing systems described above.

[0186] Embodiments of this application also provide another computer program product, including a non-volatile computer-readable storage medium storing a computer program, which, when executed by a processor, implements the steps in the embodiments of the method for evaluating the three-dimensional Fourier transform performance of any of the heterogeneous computing systems described above.

[0187] Those skilled in the art will further recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of both. To clearly illustrate the interchangeability of hardware and software, the components and steps of the various examples have been generally described in terms of functionality in the foregoing description. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0188] The above provides a detailed description of a heterogeneous computing system and its three-dimensional Fourier transform performance evaluation method provided in this application. Specific examples have been used to illustrate the principles and implementation methods of this application. The descriptions of the embodiments above are merely for the purpose of helping to understand the method and core ideas of this application. It should be noted that those skilled in the art can make various improvements and modifications to this application without departing from its principles, and these improvements and modifications also fall within the protection scope of the claims of this application.

Claims

1. A heterogeneous computing system, characterized in that, It includes processing devices and programmable logic devices. The programmable logic devices include computing units, arithmetic units, data transposition units, processing units, and control units. The processing device is used to generate an initial transformation matrix based on pseudo-random numbers and an initial coefficient matrix based on the target equation; The computing unit is used to perform a forward Fourier transform from X-dimensional to Y-dimensional to Z-dimensional on the initial transformation matrix to obtain a forward transformation matrix, and to perform an inverse Fourier transform from Z-dimensional to Y-dimensional to X-dimensional to obtain an inverse transformation matrix. The computation unit is used to calculate the coefficient modulation matrix based on the forward transformation matrix and the initial coefficient matrix, so that the computation unit performs an inverse Fourier transform from Z-dimensional to Y-dimensional to X-dimensional based on the coefficient modulation matrix to obtain the inverse transformation matrix; The data transpose unit is used to transpose the target dimension from the original dimension during matrix transformation, wherein the original dimension and the target dimension are any one of the Z-dimensional, Y-dimensional, and X-dimensional dimensions. The processing unit is used to calculate the checksum of the inverse transformation matrix; The control unit is used to receive the start instruction and generate the stop instruction from the processing device, and control the computing unit, the arithmetic unit, the data transpose unit, and the processing unit to respond to the start instruction and the stop instruction to end the computing task, so that the processing device obtains the total time of the three-dimensional Fourier transform of the heterogeneous computing system.

2. The heterogeneous computing system according to claim 1, characterized in that, The heterogeneous computing system also includes: At least one first storage unit is used to store the initial transformation matrix, and multiple intermediate matrices in the process of obtaining the forward transformation matrix by performing a forward Fourier transform of the initial transformation matrix from X-dimensional to Y-dimensional to Z-dimensional and an inverse Fourier transform of the coefficient modulation matrix from Z-dimensional to Y-dimensional to X-dimensional to obtain the inverse transformation matrix. At least one second storage unit is used to store the initial coefficient matrix.

3. The heterogeneous computing system according to claim 2, characterized in that, The heterogeneous computing system also includes: A read / write transition state machine is used to control the computing unit, the data transpose unit, and the processing unit to perform read / write operations corresponding to the preset read / write transition permissions according to the programmable logic device, so as to read or write at least one of the initial transformation matrix, the forward transformation matrix, the coefficient modulation matrix, the inverse transformation matrix, and the plurality of intermediate matrices from the first storage unit.

4. The heterogeneous computing system according to claim 1, characterized in that, The control unit includes: A counter is used to perform a counting action according to the start instruction and the stop instruction, so as to send the counting result to the processing device.

5. A method for evaluating the three-dimensional Fourier transform performance of a heterogeneous computing system, characterized in that, Using the heterogeneous computing system as described in any one of claims 1-4, wherein the method includes the following steps: The initial transformation matrix is ​​generated based on pseudo-random numbers, and the initial coefficient matrix is ​​generated based on the objective equation. Using the initial transformation matrix and the initial coefficient matrix, a heterogeneous Fourier transform calculation is performed to obtain the final checksum data, thereby obtaining the total time consumed by the heterogeneous Fourier transform calculation; Based on the total time consumed by the heterogeneous computation of the Fourier transform, the total time consumed by the three-dimensional Fourier transform of the heterogeneous computing system is determined, so as to generate the three-dimensional Fourier transform performance evaluation result of the heterogeneous computing system according to the total time consumed by the three-dimensional Fourier transform.

6. The method according to claim 5, characterized in that, The step of generating the initial transformation matrix based on pseudo-random numbers includes: Based on a preset pseudo-random number generation strategy, identify the preset pseudo-random number generator; The pseudo-random number is generated using the preset pseudo-random number generator, and the initial transformation matrix is ​​generated based on the pseudo-random number.

7. The method according to claim 5, characterized in that, The step of performing heterogeneous Fourier transform calculations using the initial transformation matrix and the initial coefficient matrix to obtain the final checksum data includes: A three-dimensional forward Fourier transform is performed on the initial transform matrix to obtain a forward transform matrix, and the forward transform matrix and the initial coefficient matrix are multiplied exponentially to obtain a coefficient modulation matrix; The coefficient modulation matrix is ​​subjected to a three-dimensional inverse Fourier transform to obtain an inverse transform matrix. The data of the inverse transform matrix is ​​then subjected to data verification and calculation to obtain initial verification data. Finally, it is determined whether the current cumulative iteration count is greater than or equal to the preset iteration count. If the current cumulative iteration count is less than the preset iteration count, the coefficient modulation matrix is ​​used as the positive transformation matrix, and the step of performing the exponential product calculation of the positive transformation matrix and the initial coefficient matrix is ​​repeated until the current cumulative iteration count is greater than or equal to the preset iteration count, and the final checksum data is obtained.

8. The method according to claim 7, characterized in that, Before determining whether the current cumulative iteration count is greater than or equal to the preset iteration count, the method further includes: Obtain the Fourier transform reference parameters of the heterogeneous Fourier transform calculation; The preset number of iterations is determined based on the Fourier transform reference parameters.

9. The method according to claim 7, characterized in that, The step of performing a three-dimensional forward Fourier transform on the initial transform matrix to obtain the forward transform matrix includes: Perform an X-dimensional positive Fourier transform on the initial transformation matrix to obtain an X-dimensional positive Fourier transform matrix, and then transform the data dimension of the X-dimensional positive Fourier transform matrix to obtain a dimension-transformed X-dimensional positive Fourier transform matrix. Perform a Y-dimensional positive Fourier transform on the X-dimensional positive Fourier transform matrix after dimension transformation to obtain a Y-dimensional positive Fourier transform matrix, and then transform the data dimension of the Y-dimensional positive Fourier transform matrix to obtain a dimension-transformed Y-dimensional positive Fourier transform matrix. A Z-dimensional Fourier forward transform is performed on the Y-dimensional Fourier forward transform matrix after the dimension transformation to obtain a Z-dimensional Fourier forward transform matrix, and the forward transform matrix is ​​determined based on the Z-dimensional Fourier forward transform matrix.

10. The method according to claim 7, characterized in that, The step of performing a three-dimensional inverse Fourier transform on the coefficient modulation matrix to obtain the inverse transform matrix includes: Perform a Z-dimensional inverse Fourier transform on the coefficient modulation matrix to obtain a Z-dimensional inverse Fourier transform matrix, and then transform the data dimension of the Z-dimensional inverse Fourier transform matrix to obtain a dimension-transformed Z-dimensional inverse Fourier transform matrix. Perform a Y-dimensional inverse Fourier transform on the Z-dimensional inverse Fourier transform matrix after dimension transformation to obtain a Y-dimensional inverse Fourier transform matrix, and then transform the data dimension of the Y-dimensional inverse Fourier transform matrix to obtain a dimension-transformed Y-dimensional inverse Fourier transform matrix. An X-dimensional inverse Fourier transform is performed on the Y-dimensional inverse Fourier transform matrix after the dimension transformation to obtain an X-dimensional inverse Fourier transform matrix, which is then used to determine the inverse transform matrix.

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