Semiconductor device inspection method

Abstract

Provided is a semiconductor device inspection method capable of preventing degradation of characteristics of a semiconductor device caused by BPD. An embodiment includes the following steps. A semiconductor substrate containing silicon carbide is prepared. Image data of a transmission polarization image of the semiconductor substrate is generated by a transmission polarization image acquisition device. Image processing is carried out on the image data through the transmission polarization image processing device, and defect coordinates are judged and stored. After an epitaxial layer is formed on the semiconductor substrate and a plurality of semiconductor elements are formed, electrical inspection is sequentially performed on the plurality of semiconductor elements by an electrical characteristic evaluation device. In the inspection performed by the electrical characteristic evaluation device, the semiconductor element corresponding to the defect coordinate is not inspected, but is subjected to a process for indicating the defect.

Description

[0001] Related applications

[0002] This application claims priority to Japanese Patent Application No. 2024-089162 (filed on May 31, 2024). This application incorporates the entire contents of the basic application by reference to that basic application. Technical Field

[0003] The implementation method relates to a method for inspecting semiconductor devices. Background Technology

[0004] Numerous basal plane dislocations (BPDs) exist in silicon carbide (SiC) substrates. Some of these BPDs propagate to the epitaxial layer after its growth and expand into stacking defects through electron and hole injection.

[0005] If a BPD (Block Detector Particle) extends into a stacking defect, it becomes a cause of performance degradation in semiconductor devices. Therefore, it is desirable to remove the BPD to prevent performance degradation caused by it. Summary of the Invention

[0006] The purpose of this implementation is to provide a method for inspecting semiconductor devices that can prevent degradation of semiconductor device characteristics caused by BPD.

[0007] The method for inspecting a semiconductor device according to the embodiments includes the following steps.

[0008] A semiconductor substrate containing silicon carbide is prepared. A transmission polarization image of the semiconductor substrate is captured using a transmission polarization image acquisition device and converted into first image data in a predetermined format. A transmission polarization image processing device sets coordinates representing the positions of multiple semiconductor elements formed in the semiconductor substrate on the substrate within the first image data. The transmission polarization image processing device performs image processing on the first image data, and if the brightness of any one of the multiple coordinates is higher than a first brightness, or if the brightness of any one of the multiple coordinates is lower than a second brightness, the coordinate is determined as a first defect coordinate and stored. An epitaxial layer is formed on the semiconductor substrate, and multiple semiconductor elements are formed in the semiconductor substrate on which the epitaxial layer is formed. After the multiple semiconductor elements are formed, an electrical characteristic evaluation device performs an electrical inspection on one of the remaining semiconductor elements corresponding to the coordinates other than the first defect coordinate, based on pre-set electrical inspection conditions. For the semiconductor element corresponding to the first defect coordinate, the electrical inspection based on the electrical characteristic evaluation device is not performed. Instead, a process for identifying it as defective is performed. If the electrical inspection determines that it is defective, the remaining semiconductor element is also processed to identify it as defective. If the electrical inspection determines that it is within specifications, the remaining semiconductor element is transferred to the next process. Attached Figure Description

[0009] Figure 1 This is a schematic block diagram illustrating an inspection system for a semiconductor device.

[0010] Figure 2 This is a flowchart illustrating an inspection method for a semiconductor device according to an illustrative embodiment.

[0011] Figure 3 (a) is an example of image data of a SiC substrate before the formation of an epitaxial layer, captured by a transmission polarization inspection device. Figure 3 (b) is Figure 3 X-ray topography image of part A of (a). Figure 3 (c) is Figure 3 X-ray topography image of part B in (a).

[0012] Figure 4 This is a schematic cross-sectional view showing the expansion of the BPD after the epitaxial layer is grown in a SiC substrate.

[0013] Figure 5 This is a flowchart illustrating a method for inspecting a semiconductor device according to a variation of an illustrative embodiment. Detailed Implementation

[0014] Hereinafter, various embodiments of the present invention will be described with reference to the accompanying drawings.

[0015] The accompanying drawings are schematic or conceptual, and the relationship between the thickness and width of the parts, the ratio of the sizes between the parts, etc., are not limited to the same situation as in reality. Even when representing the same parts, the dimensions and ratios between them may sometimes be shown differently according to the accompanying drawings.

[0016] In this specification and the figures, elements that are the same as those already described are labeled with the same reference numerals, and detailed descriptions are appropriately omitted.

[0017] The embodiments described below can be implemented by inverting the p-type and n-type of each semiconductor region.

[0018] Figure 1 This is a schematic block diagram illustrating an inspection system for a semiconductor device.

[0019] like Figure 1 As shown, the inspection system 100 includes a transmission polarization inspection device 10, an electrical characteristic evaluation device 40, a control device 50, and a storage device 60. The inspection system 100 is as follows... Figure 1 As shown in the specific example, it may also include a defect inspection device 30.

[0020] In the inspection system 100, the transmission polarization inspection device 10, the defect inspection device 30, and the electrical characteristic evaluation device 40 are each communicatively connected to the control device 50, for example, via a control network. The transmission polarization inspection device 10, the defect inspection device 30, and the electrical characteristic evaluation device 40 communicate with the control device 50, exchanging various control signals and data.

[0021] The transmission polarization inspection device 10 includes a transmission polarization image acquisition device 12 and a transmission polarization image processing device 14.

[0022] The transmission polarization image acquisition apparatus 12 captures a transmission polarization-based image, i.e., a transmission polarization image, of a silicon carbide (SiC) substrate (hereinafter referred to as a bulk wafer) before the formation of an epitaxial layer. The transmission polarization image acquisition apparatus 12 includes, for example, a light source and an imaging unit (not shown). The light source is, for example, a light-emitting diode that emits ultraviolet light. The light source is disposed on one side of the bulk wafer, separated by a polarizing plate. The imaging unit is disposed on the other side of the bulk wafer. Light from the light source illuminates the bulk wafer via the polarizing plate, and the imaging unit captures a transmission polarization image of the bulk wafer illuminated by the light from the light source.

[0023] The transmission polarization image acquisition device 12 transforms the captured transmission polarization image into image data (first image data) in a specified form, for example, based on the instruction of the control device 50, and outputs the image data to the transmission polarization image processing device 14.

[0024] The transmission polarization image processing apparatus 14 performs image processing on the image data of the transmission polarization image acquired by the transmission polarization image acquisition apparatus 12. On the image data, it determines the defect region (first defect region) of the bulk wafer and extracts the coordinates (first defect coordinates) contained within the defect region. In the image processing, the image data is, for example, transformed into brightness data at each coordinate of the image data.

[0025] Each bulk wafer is pre-assigned a wafer number to distinguish it from other bulk wafers. For example, the wafer number of a bulk wafer is set and managed by the control device 50 and the storage device 60. Image data acquired in the transmission polarization inspection device 10 is associated with the wafer number.

[0026] In the inspection system 100, coordinates are set for each bulk wafer, for example. The set coordinates for the bulk wafer include multiple coordinates that determine the positions of the various semiconductor elements formed on the bulk wafer. The coordinates set for each bulk wafer are stored in the storage device 60, for example, associated with a wafer number. In the transmission polarization image processing device 14, coordinates are set in the image data in a manner corresponding to the coordinates in the bulk wafer. That is, multiple coordinates in the image data correspond to multiple coordinates of the bulk wafer, i.e., the positions of the formed semiconductor elements. Furthermore, the coordinates of the bulk wafer and the image data can be absolute coordinates set for each semiconductor element, or relative coordinates from a reference position.

[0027] The transmission polarization image processing device 14 determines the defect region (first defect region) based on the brightness of the image data of the block wafer after image processing.

[0028] The transmission polarization image processing apparatus 14 determines the defect region, for example, as follows: The transmission polarization image processing apparatus 14 compares the brightness data of each coordinate of the image data with a preset brightness threshold (first brightness). The transmission polarization image processing apparatus 14 extracts coordinates whose brightness data is higher than the brightness threshold. The transmission polarization image processing apparatus 14 further extracts the coordinates adjacent to the extracted coordinates. The transmission polarization image processing apparatus 14 calculates the area of ​​the region including the extracted adjacent coordinates, and if the area of ​​the region is greater than a preset region threshold (first region specified value), the region is determined as a defect region.

[0029] The region threshold can be preset or set for each wafer number and is associated with the wafer number.

[0030] The brightness threshold can be associated with the wafer number of the bulk wafer and set for each wafer number. The brightness threshold can also be set for each image data point of the bulk wafer. When a brightness threshold is set for each bulk wafer, statistical methods can be used to process and calculate the brightness data of the bulk wafer. For example, brightness data for each coordinate can be obtained from the image data of the bulk wafer, and the average brightness value Lav and standard deviation σ can be calculated. Lav + nσ can then be used as the brightness threshold. n is any natural number, and an appropriate value can be set, for example, through experiments.

[0031] In addition, as a statistical method, the median value LM and quartile Q4 of the brightness can be calculated, and LM+nQ4 can be used as the brightness threshold. n is any natural number, and an appropriate value can be set for example, for experimental purposes. Besides these, the brightness threshold can also be set based on the deviation value of the brightness data using appropriate statistical methods.

[0032] When determining the defect region, the defect region can be a region that includes multiple adjacent coordinates with brightness data lower than a preset brightness threshold (second brightness). In this case, the transmission polarization image processing apparatus 14 calculates the area of ​​the region based on the distance between the coordinates when there are adjacent coordinates with brightness lower than the brightness threshold.

[0033] The transmission polarization image processing device 14 outputs multiple coordinates of the region identified as a defect area to the control device 50 in association with the wafer number. The control device 50 stores the wafer number and the multiple coordinates of the defect area associated with the wafer number in the storage device 60.

[0034] The defect inspection apparatus 30 inspects the presence or absence of defects in a SiC substrate (hereinafter referred to as an epitaxial wafer) on which an epitaxial layer is formed in a bulk wafer. The defect inspection apparatus 30 is, for example, a photoluminescence image inspection apparatus, which inspects the presence or absence of defects on the surface and inside the epitaxial wafer. Surface defects of the epitaxial wafer include, for example, surface scratches, triangular defects, and line defects, while internal defects include BPD (bulk point defects) and stacking defects.

[0035] The defect inspection device 30 acquires, for example, image data (second image data) as data related to the defects acquired by the defect inspection device 30. The defect inspection device 30 determines the defect region (second defect region) based on the photoluminescence intensity of each coordinate of the image data. The defect region is composed of multiple adjacent coordinates with intensity data higher than a preset photoluminescence intensity threshold.

[0036] For example, if the area of ​​a region including adjacent coordinates is greater than a preset threshold, the defect inspection device 30 designates that region as a defect region. The defect inspection device 30 determines the defect region for each wafer number and extracts multiple coordinates (second defect coordinates) contained within the defect region. The defect inspection device 30 associates the extracted multiple coordinates with the wafer number and outputs them to the control device 50. The control device 50 appends the multiple coordinates contained in the defect region to the multiple coordinates associated with the corresponding wafer number, updating the data in the storage device 60.

[0037] The coordinates extracted by the defect inspection device 30 are stored separately from the coordinates extracted by the transmission polarization inspection device 10. However, this is not a limitation; they may also be stored without distinction. In this embodiment, they are stored in association with the wafer number without distinction, and the following explanation follows.

[0038] The electrical characteristic evaluation apparatus 40 performs electrical inspections on the SiC substrate (hereinafter referred to as the wafer with semiconductor elements formed in the epitaxial wafer). For each semiconductor element formed in the wafer with semiconductor elements, the electrical characteristic evaluation apparatus 40 performs electrical inspections such as current and voltage characteristics by means of probing, and performs a process to identify good and defective semiconductor elements.

[0039] For example, data for electrical inspection for each wafer number is stored in storage device 60. Storage device 60 stores, for example, coordinates for determining the location of semiconductor elements for each wafer number. Furthermore, storage device 60 stores, for each wafer number, multiple coordinates of the defect region identified by transmission polarization inspection device 10 and defect inspection device 30.

[0040] The control device 50 outputs data for electrical inspection to the electrical characteristic evaluation device 40 for each wafer number. The electrical characteristic evaluation device 40 sets the data for electrical inspection. Furthermore, the data for electrical inspection can be set for each batch number, or for each product number encompassing multiple batches, with the batch number set for each batch including multiple wafer numbers. For simplicity, the following explanation will assume that the data for electrical inspection is set for each wafer number.

[0041] The control device 50 outputs the coordinates of the semiconductor device's location and the multiple coordinates of the defect region within the bulk wafer to the electrical characteristic evaluation device 40. The electrical characteristic evaluation device 40 sets these coordinates.

[0042] The electrical characteristic evaluation device 40 performs inspections on wafers containing components based on data used for electrical inspection and data from multiple coordinates of defect areas. The electrical inspection data includes electrical characteristic items, measurement conditions for each electrical characteristic, and specification values ​​for each electrical characteristic. Examples of electrical characteristics include leakage current, gate threshold voltage, and forward voltage drop of semiconductor components.

[0043] For example, the electrical characteristic evaluation device 40 inputs coordinates to determine the position of semiconductor elements, and performs electrical checks on the semiconductor elements corresponding to those coordinates sequentially. Furthermore, the data used to determine the position of the semiconductor elements is not limited to sequential input; it can also be preset in the electrical characteristic evaluation device 40.

[0044] If the electrical characteristic evaluation device 40 determines that an inspected semiconductor element is outside the specifications of the electrical inspection data, it will identify it as defective. The process for identifying defective products includes, for example, applying ink or other markings to the surface of the semiconductor element.

[0045] When the electrical characteristic evaluation device 40 inputs one of the multiple coordinates contained in the defect area, it does not perform electrical inspection on the semiconductor element corresponding to that coordinate, but instead attaches a mark to the surface of the semiconductor element as a process to identify defective products.

[0046] In subsequent assembly processes, marked semiconductor components are identified as defective components through image analysis and other means, and are excluded from the assembly.

[0047] Alternatively, if the electrical characteristic evaluation device 40 inputs one of the multiple coordinates contained in the defect area, it can also perform an electrical inspection on the semiconductor element corresponding to that coordinate, and if it is determined to be a good product, it will not affix a mark to the surface of the semiconductor element. This is because even semiconductor elements formed in defect areas may sometimes have good electrical characteristics.

[0048] Figure 2 This is a flowchart illustrating an inspection method for a semiconductor device according to an illustrative embodiment.

[0049] use Figure 2 The flowchart illustrates the series of actions described above.

[0050] like Figure 2 As shown, in step S1, a bulk wafer is prepared. The prepared bulk wafer corresponds to a wafer number and is identified from other bulk wafers.

[0051] In step S2, the transmission polarization image acquisition device 12 acquires image data of the transmission polarization image of the block wafer, associates the acquired image data with the wafer number, and outputs it to the transmission polarization image processing device 14.

[0052] In step S3, the transmission polarization image processing device 14 performs image processing on the input image data to determine the defect region (first defect region) and extracts multiple coordinates (first defect coordinates) contained in the defect region. The transmission polarization image processing device 14 associates the extracted multiple coordinates with the wafer number and outputs them to the control device 50. The control device 50 stores the wafer number and the multiple coordinates associated with the wafer number in the storage device 60.

[0053] In step S4, the bulk wafer after the transmission polarization inspection is completed is fed into the epitaxial layer formation process. To form an epitaxial layer in the bulk wafer, a chemical vapor deposition (CVD) apparatus is used, for example.

[0054] In step S5, the defect inspection device 30 acquires data, such as image data, related to defects on the surface and inside the epitaxial wafer.

[0055] In step S6, the defect inspection device 30 performs image processing on the surface and internal image data respectively to determine the defect region (second defect region). The defect inspection device 30 extracts multiple coordinates (second defect coordinates) contained in the defect region, associates them with the wafer number, and outputs them to the control device 50. The control device 50 updates the data in the storage device 60 by adding multiple coordinates contained in the defect region in a manner associated with the corresponding wafer number.

[0056] In step S7, the epitaxial wafer, after inspection by the defect inspection device 30, is fed into the semiconductor device formation process. In the semiconductor device formation process, semiconductor layers, insulating films, conductive layers, electrodes, etc., are formed according to the structure of the semiconductor device.

[0057] In step S8, the control device 50 retrieves data associated with the wafer number for electrical inspection, coordinates of the semiconductor device's location, and multiple coordinates of the defect area from the storage device 60. The control device 50 outputs the retrieved data for electrical inspection, coordinates of the semiconductor device's location, and multiple coordinates of the defect area to the electrical characteristic evaluation device 40. The electrical characteristic evaluation device 40 sets the data and coordinates output from the control device 50.

[0058] In step S9, the electrical characteristic evaluation device 40 sequentially inputs the coordinates of the determined semiconductor element and performs an electrical inspection of the semiconductor element formed in the wafer on which the element is formed, based on the data (electrical inspection conditions) for electrical inspection output from the control device 50. Through the electrical inspection, for example, the electrical characteristic evaluation device 40 measures the current and voltage characteristics of the semiconductor element formed in the wafer based on preset electrical inspection conditions.

[0059] The electrical characteristic evaluation device 40 performs defective identification processing on semiconductor components that are determined to be defective, i.e., assigning marks, etc.

[0060] When the electrical characteristic evaluation device 40 inputs one coordinate from among multiple coordinates contained in the defect area, it identifies the semiconductor component corresponding to that coordinate as a defective product. Alternatively, the electrical characteristic evaluation device 40 may also perform an electrical inspection on the semiconductor component corresponding to that coordinate when only one coordinate from among multiple coordinates contained in the defect area is input. Furthermore, the semiconductor component corresponding to that coordinate can be identified as a defective product only if the electrical inspection result is unqualified.

[0061] In step S10, the wafer with components formed after inspection by the electrical characteristic evaluation device 40 is fed into the packaging assembly process. In the packaging assembly process, semiconductor components, except for those that have undergone defect identification processing, are packaged to form a semiconductor device.

[0062] The function and effect of the inspection method for the semiconductor device involved in the implementation method are explained.

[0063] Figure 3 (a) is an example of image data of a SiC substrate before the formation of an epitaxial layer, captured by the transmission polarization image acquisition device 12. Figure 3 (b) is Figure 3 X-ray topography image of part A of (a). Figure 3 (c) is Figure 3 X-ray topography image of part B in (a).

[0064] like Figure 3 As shown in (a), in the image data P1 acquired by the transmission polarization image acquisition device 12, brightness differences are generated depending on the region.

[0065] exist Figure 3 (b) and Figure 3 In (c), BPD is shown as a black curve.

[0066] like Figure 3 (b) and Figure 3As shown in (c), in the image data P1 acquired by the transmission polarization image acquisition device 12, BPDs are denser in the brighter regions compared to the lower-brightness regions. That is, the transmission polarization image acquisition device 12 acquires image data P1, performs image processing on image data P1 to detect regions with higher brightness than other regions, thereby enabling the detection of regions with denser BPDs.

[0067] Figure 4 This is a schematic cross-sectional view showing the expansion of the BPD after the epitaxial layer is grown in a SiC substrate.

[0068] exist Figure 4 In the diagram, the layer of the blocky SiC substrate is represented as an n-type substrate 1, and an n-type buffer layer 2 is disposed on the n-type substrate 1. An n-type drift layer 3 is disposed on the n-type buffer layer 2. A p-type layer 4 is disposed on the n-type drift layer 3.

[0069] The n-type buffer layer 2 and the n-type drift layer 3 are epitaxial layers formed by epitaxial growth such as CVD. The concentration of n-type impurities in the n-type drift layer 3 is lower than that in the n-type substrate 1 and the n-type buffer layer 2. The p-type layer 4 is, for example, a layer containing p-type impurities formed by ion implantation or the like.

[0070] A higher voltage than that applied to the p-type layer 4 than to the n-type substrate 1 is used to inject holes, which act as minority carriers, into the n-type drift layer 3 from the p-type layer 4. Electrons are supplied from the n-type substrate 1 side, and current flows between the pn junctions. Through this current, BPDs sometimes expand into stacking defects.

[0071] like Figure 4 As shown, multiple BPDs d1 to d5 are formed in the n-type substrate 1. They are generated during the manufacturing of the SiC substrate and are difficult to remove in the early stages.

[0072] An n-type buffer layer 2 is formed on the n-type substrate 1, thereby transforming a portion of the BPD into a threading edge dislocation (TED). TEDs do not propagate into stacking defects and are formed in the stacking direction; therefore, they can be considered harmless dislocations that have almost no impact on the performance of the semiconductor device. Furthermore, the n-type buffer layer 2, being disposed on the n-type substrate 1, also functions as a recombination layer where holes injected from the p-type layer 4 recombine with electrons before reaching the n-type substrate 1.

[0073] exist Figure 4In the example, BPDs d1, d3, and d4, which are initially formed in the n-type substrate 1 from BPD d1 to d5, are transformed into TEDs d1a, d3a, and d4a, respectively, during the epitaxial growth process to form the n-type buffer layer 2. On the other hand, BPDs d2 and d5 are not transformed into TEDs and remain in each layer, allowing them to grow to the upper layers. In addition, although rare, it is possible for dislocations that occur during epitaxial growth, such as TED d6, to transform into BPD d6b during epitaxial growth.

[0074] When a semiconductor device is configured as a MOSFET (Metal Oxide Semiconductor Field Effect Transistor), the MOSFET is a unipolar device where either electrons or holes contribute to conductivity; therefore, under normal operation, BPD (Blocking Difference) does not propagate into a stacking defect. In the case of a vertically oriented MOSFET, Figure 4 The p-type layer serves as the p-type base layer, forming a pn junction together with the n-type drift layer. This pn junction functions as a diode connected in reverse parallel to the MOSFET. Under the condition that this diode operates, holes are injected from the p-type base layer into the n-type drift layer, thus the BPD expands into a stacking defect.

[0075] Stacking defects, such as single Shockley defects, extend in a triangular shape along the C-plane of the SiC crystal. Stacking defects are defects that span multiple semiconductor layers, hindering the movement of majority carriers across these layers. Therefore, as shown in image data P1, if the total area of ​​stacking defects increases, the on-resistance of the MOSFET and the forward voltage drop of the diode increase, resulting in a significant deterioration in performance.

[0076] In other words, the degradation of characteristics in BPD-based semiconductor devices is not noticeable unless the semiconductor device itself operates, making it difficult to detect and remove as defects in the early stages. Furthermore, while it is technically possible to detect the degradation of characteristics through the operation of the semiconductor device and remove the detected defects, this requires screening all devices under power-on conditions, which is difficult to implement.

[0077] In the manufacturing process of SiC substrates, efforts are made to suppress the occurrence of BPD (Browsing Pits), but it is difficult to stably suppress their occurrence. In addition, as methods for detecting the presence of BPD, the known methods are etching pit method and X-ray morphology method. The former is a destructive test, and the latter has a long measurement time, making it difficult to inspect all quantities, and the equipment is large-scale, which would be more difficult to introduce into mass production equipment.

[0078] Such as combination Figure 4As explained, BPDs are transformed into harmless dislocations during the formation of the epitaxial layer. BPDs that remain after being transformed into harmless dislocations may propagate into stacking defects during the use of the semiconductor device after its formation. However, even when BPDs propagate into stacking defects, the performance degradation of the semiconductor device is minimal, given that the area is sufficiently small compared to the area of ​​current flow in the semiconductor device.

[0079] In a SiC substrate before the epitaxial layer is formed, regions with a high density of BPD (Biodes Peripheral Device) compared to other regions tend to have a high density of residual BPD after the epitaxial layer formation process. Therefore, in these high-density regions, the probability of BPDs expanding into stacking defects is also high. Furthermore, if the area of ​​the high-density BPD region is large, the probability of the semiconductor device's performance degrading due to residual BPDs expanding into stacking defects is also high. Therefore, in the semiconductor device inspection method according to the embodiment, regions with high-density BPDs having an area larger than a predetermined value are inspected as defect regions in the SiC substrate before the epitaxial layer is formed. Semiconductor elements contained in the detected defect regions are pre-determined as defective, thereby enabling the removal of semiconductor devices whose performance may be degraded after the BPDs are powered on following semiconductor device formation.

[0080] Such as combination Figure 3 As explained, in the transmission polarization inspection apparatus 10, dense BPDs within the SiC substrate before epitaxial layer formation can be captured as changes in brightness in the transmission polarization image. Therefore, in the semiconductor device inspection method according to the embodiment, by performing image processing on the image data of the transmission polarization image of the SiC substrate, areas of dense BPDs are identified as defect areas.

[0081] The electrical characteristic evaluation device 40 serves as a coordinate system, indicating the positions of multiple semiconductor elements formed on a SiC substrate assigned a wafer number. In the semiconductor device inspection method according to the embodiment, the coordinates of semiconductor elements included in the defect area determined by image data obtained using the transmission polarization inspection device 10 are correlated with the wafer number, thereby identifying semiconductor elements with a high probability of expanding into stacking defects and experiencing characteristic degradation after being powered on.

[0082] In the semiconductor device inspection method according to the implementation method, by identifying semiconductor elements with high BPD occurrence density and pre-judging them as defective products, the yield of the final semiconductor device after packaging can be improved.

[0083] In the semiconductor device inspection method according to the embodiments, photoluminescence can be combined with transmission polarization inspection to perform defect inspection utilizing photoluminescence. By combining transmission polarization inspection and photoluminescence inspection, the detection accuracy of BPD (Bipolar Dislocation) can be improved. Furthermore, in SiC substrates, in addition to BPD-based stacking defects, dislocations such as through-hole screw dislocations, which degrade the performance of semiconductor devices, sometimes occur. In the semiconductor device inspection method according to the embodiments, defect inspection utilizing photoluminescence can be performed after the epitaxial layer is formed.

[0084] In photoluminescence inspection methods, similar to transmission polarization inspection, image data is processed to determine defect areas, and the coordinates of semiconductor elements contained within these defect areas are extracted and stored. During wafer inspection, semiconductor elements corresponding to these coordinates are excluded from the good product selection, thereby improving the yield of finished semiconductor components.

[0085] (Modified Example)

[0086] Figure 5 This is a flowchart illustrating a method for inspecting a semiconductor device according to a variation of an illustrative embodiment.

[0087] In this variation, by energizing the pn junction, the residual BPD after epitaxial layer formation expands into stacking defects. The effects of these expanded stacking defects on the characteristics of the semiconductor device are then removed through energizing screening. Therefore, after assembly into a package, semiconductor devices whose characteristics may be degraded can be removed beforehand through energizing screening, thereby improving the reliability of the manufactured semiconductor device.

[0088] exist Figure 5 In the flowchart, with Figure 2 The difference in the examples shown is that the replacement Figure 2 In the cases of S3 and S9, steps S3a and S9a are applied respectively. Additionally, in... Figure 5 In the flowchart, with Figure 2 The difference in the examples shown is that, Figure 2 In the case of step S9, proceed to step S21, and then proceed to step S10. The differences will be explained in detail below, while the similarities will be omitted as appropriate.

[0089] like Figure 5 As shown, in step S3a, the transmission polarization image processing device 14 performs image processing on the image data of the transmission polarization image of the bulk wafer acquired by the transmission polarization image acquisition device 12 in step S2 to determine the defect region. In determining the defect region, for example, it is preferable to set the brightness threshold as Lav+(n-1)σ, which is higher than... Figure 2In the example, a large range of brightness variations is set as the judgment criterion. Transmission polarization image processing device 14 and... Figure 2 Similarly, in cases where the area containing adjacent coordinates with brightness higher than the threshold is larger than a pre-defined area threshold, the area containing these coordinates is determined to be a defective area.

[0090] Furthermore, when associating multiple coordinates contained in the defect region with wafer numbers, the transmission polarization image processing apparatus 14 distinguishes them from the coordinates used to determine the location of the semiconductor elements stored in the storage device 60, and associates the multiple coordinates contained in the defect region with wafer numbers. For example, after adding a flag indicating that power-on screening is being performed, the transmission polarization image processing apparatus 14 associates the wafer number with the multiple coordinates contained in the defect region.

[0091] Furthermore, in step S6, the transmission polarization image processing device 14 establishes an association between multiple coordinates contained in the defect region and the wafer number without additional markings.

[0092] In step S9a, the electrical characteristic evaluation device 40 performs electrical inspection on the semiconductor components formed in the wafer on which the components are formed, based on the data for electrical inspection output from the control device 50. The electrical characteristic evaluation device 40 performs defective identification processing, such as assigning a mark, to semiconductor components determined to be defective.

[0093] When the electrical characteristic evaluation device 40 inputs one of the multiple coordinates of the defect area determined by the image data of the transmission polarization image, it does not perform the inspection of the semiconductor element corresponding to that coordinate, nor does it perform the defective product identification process, and skips the process.

[0094] When the electrical characteristic evaluation device 40 inputs one of the multiple coordinates of the defect area determined by the photoluminescence image, it performs defective product identification processing on the semiconductor element corresponding to that coordinate.

[0095] In step S21, the electrical characteristic evaluation device 40 performs power-on screening on multiple semiconductor elements corresponding to multiple coordinates within the defect area determined by the image data of the transmission polarization image. In the power-on screening, current is continuously flowed through the pn junction of the semiconductor element under specified conditions, and an electrical inspection is performed after a specified time. The electrical characteristic evaluation device 40 then performs defective identification processing on semiconductor elements determined to be defective.

[0096] In this variation, the multiple semiconductor elements corresponding to the multiple coordinates of the defect region determined by the image data of the transmission polarization image can be removed by performing an electrical screening process before packaging. Therefore, the waste of packaging defective products can be eliminated.

[0097] This variation can be combined with Figure 2 The semiconductor device inspection methods described in the embodiments are combined and applied. That is, for example, in steps S3 and S3a, the threshold for the brightness of the defect area determined by the transmission polarization image processing device 14 can be set to two stages. The semiconductor element corresponding to the coordinates contained in the low-brightness defect area is subjected to power-on screening, while the semiconductor element corresponding to the coordinates contained in the high-brightness area is not subjected to power-on screening, but is instead subjected to defective product identification processing.

[0098] Figure 1 The structure of the inspection system 100 shown is an example, and the system is not limited to this structure if the inspection method for semiconductor devices involved in the embodiments and their modifications can be applied. For example, the storage device 60 can be connected to a control network, and each device can exchange data with the storage medium, etc., offline. In addition, an image processing device can be an element constituting part of the transmission polarization inspection device, and the defect inspection device can have other image processing units as part of the defect inspection device.

[0099] The above examples illustrate several embodiments of the present invention, but these embodiments are merely illustrative and not intended to limit the scope of the invention. These new embodiments can be implemented in various other ways, and various omissions, substitutions, and modifications can be made without departing from the spirit of the invention. These embodiments and their variations are included within the scope and spirit of the invention, and are encompassed by the invention as described in the claims and its equivalents. Furthermore, the foregoing embodiments can be combined with each other for implementation.

[0100] The implementation methods include the following approaches.

[0101] (Postscript 1)

[0102] A method for inspecting a semiconductor device, wherein,

[0103] Prepare a semiconductor substrate containing silicon carbide.

[0104] The semiconductor substrate is captured by a transmission polarization image acquisition device and converted into a first image data in a specified format.

[0105] The transmission polarization image processing device sets coordinates in the first image data to represent the positions of multiple semiconductor elements formed in the semiconductor substrate on the substrate.

[0106] The transmission polarization image processing device performs image processing on the first image data. If the brightness of any one of the plurality of coordinates is higher than the first brightness, or if the brightness of any one of the plurality of coordinates is lower than the second brightness, the specified coordinate is determined as the first defect coordinate and stored.

[0107] An epitaxial layer is formed on the semiconductor substrate.

[0108] Multiple semiconductor elements are formed in the semiconductor substrate on which the epitaxial layer is formed.

[0109] After the plurality of semiconductor elements are formed, an electrical characteristic evaluation device, based on pre-set electrical inspection conditions, sequentially performs electrical inspections on one of the remaining semiconductor elements that corresponds to the coordinates other than the first defect coordinate.

[0110] For the semiconductor element corresponding to the coordinates of the first defect, the electrical inspection based on the electrical characteristic evaluation device is not performed; instead, processing to identify it as defective is performed.

[0111] If an electrical inspection determines that a semiconductor element is defective, the remaining semiconductor element is processed to identify it as defective. If an electrical inspection determines that the semiconductor element is within specifications, the remaining semiconductor element is transferred to the next process.

[0112] (Postscript 2)

[0113] As described in Appendix 1, the inspection method for semiconductor devices, wherein,

[0114] After the epitaxial layer is formed on the semiconductor substrate and before the plurality of semiconductor elements are formed, a defect inspection device is used to capture a photoluminescence image of the epitaxial substrate and convert it into a second image data in a prescribed format.

[0115] The defect inspection device is used to set the multiple coordinates in the second image data.

[0116] Image processing is performed on the second image data. Based on the photoluminescence intensity at the plurality of coordinates, image processing is performed on the second image data. If the area of ​​the region on the substrate where the photoluminescence intensity at adjacent coordinates in the plurality of coordinates is higher than a third predetermined value is greater than a fourth predetermined value, the region is determined as a second defect region. The plurality of coordinates contained in the second defect region in the plurality of coordinates are stored as second defect coordinates.

[0117] After the plurality of semiconductor elements are formed, in the electrical inspection based on the electrical characteristic evaluation device, the semiconductor elements corresponding to the plurality of second defect coordinates are not subjected to electrical inspection, but are instead processed for identification as defective.

[0118] (Note 3)

[0119] The inspection method for semiconductor devices as described in Appendix 1 or 2, wherein,

[0120] The first brightness and the second brightness are calculated by processing the brightness of the multiple coordinates using statistical methods.

[0121] (Postscript 4)

[0122] A method for inspecting a semiconductor device, wherein,

[0123] Prepare a semiconductor substrate containing silicon carbide.

[0124] The semiconductor substrate is captured by a transmission polarization image acquisition device and converted into a first image data in a specified format.

[0125] The transmission polarization image processing device sets multiple coordinates in the first image data to represent the positions of multiple semiconductor elements formed in the semiconductor substrate.

[0126] The transmission polarization image processing device performs image processing on the first image data. If the area of ​​the region on the substrate whose brightness at adjacent coordinates is higher than a first predetermined value is greater than a second predetermined value, or if the area of ​​the region on the substrate whose brightness at adjacent coordinates is lower than the first predetermined value is greater than the second predetermined value, the region on the substrate is determined to be a first defect region containing multiple first defect coordinates, and the multiple first defect coordinates are stored.

[0127] An epitaxial layer is formed on the semiconductor substrate.

[0128] The photoluminescence image of the epitaxial substrate is captured by a defect inspection device and converted into a second image data in a prescribed format.

[0129] The defect inspection device is used to set the multiple coordinates in the second image data.

[0130] Image processing is performed on the second image data. Based on the photoluminescence intensity at the plurality of coordinates, image processing is also performed on the first image data. If the area of ​​the region on the substrate where the photoluminescence intensity at adjacent coordinates in the plurality of coordinates is higher than a third predetermined value is greater than a fourth predetermined value, the region is determined as a second defect region. The plurality of coordinates contained in the second defect region in the plurality of coordinates are stored as second defect coordinates.

[0131] Multiple semiconductor elements are formed in the semiconductor substrate on which the epitaxial layer is formed.

[0132] For the semiconductor elements other than those corresponding to the first defect coordinate or the second defect coordinate, electrical inspections are performed sequentially using an electrical characteristic evaluation device based on pre-set electrical inspection conditions.

[0133] For the semiconductor element among the plurality of semiconductor elements that corresponds to the second defect coordinate, the electrical inspection is not performed; instead, it is determined to be defective.

[0134] Regarding the semiconductor element corresponding to the first defect coordinate among the plurality of semiconductor elements, after performing a screening process based on the continuous flow current of the pn junction of the semiconductor element corresponding to the first defect coordinate, an electrical inspection based on the electrical characteristic evaluation device is performed to determine whether it is within specifications or defective.

[0135] If the defect is determined to be defective, a process is performed to identify that the semiconductor element corresponding to the coordinates of the first defect is defective.

[0136] If the defect is determined to be within the specified range, the semiconductor element corresponding to the first defect coordinate is transferred to the next process.

[0137] Explanation of reference numerals in the attached figures

[0138] 10…Transmission polarization inspection device,

[0139] 20…Image processing device,

[0140] 30…Defect inspection device,

[0141] 40… Electrical characteristic evaluation device,

[0142] 50… control device,

[0143] 60… storage device,

[0144] 100… Check the system.

Claims

1. A method for inspecting a semiconductor device, wherein, Prepare a semiconductor substrate containing silicon carbide. The semiconductor substrate is captured by a transmission polarization image acquisition device and converted into a first image data in a specified format. The transmission polarization image processing device sets coordinates in the first image data to represent the positions of multiple semiconductor elements formed in the semiconductor substrate on the substrate. The transmission polarization image processing device processes the first image data. If the brightness at any one of the plurality of coordinates is higher than the first brightness, or if the brightness at any one of the plurality of coordinates is lower than the second brightness, the specified coordinate is determined as the first defect coordinate and stored. An epitaxial layer is formed on the semiconductor substrate. Multiple semiconductor elements are formed in the semiconductor substrate on which the epitaxial layer is formed. After the plurality of semiconductor elements are formed, an electrical characteristic evaluation device, based on pre-set electrical inspection conditions, sequentially performs electrical inspections on one of the remaining semiconductor elements that corresponds to the coordinates other than the first defect coordinate. For the semiconductor element corresponding to the coordinates of the first defect, the electrical inspection based on the electrical characteristic evaluation device is not performed; instead, processing to identify it as defective is performed. If an electrical inspection determines that a semiconductor element is defective, the remaining semiconductor element is processed to identify it as defective. If an electrical inspection determines that the semiconductor element is within specifications, the remaining semiconductor element is transferred to the next process.

2. The method for inspecting a semiconductor device as claimed in claim 1, wherein, After the epitaxial layer is formed on the semiconductor substrate and before the plurality of semiconductor elements are formed, a defect inspection device is used to capture a photoluminescence image of the epitaxial substrate and convert it into a second image data in a prescribed format. The defect inspection device is used to set the multiple coordinates in the second image data. Image processing is performed on the second image data. Based on the photoluminescence intensity at the plurality of coordinates, image processing is performed on the second image data. If the area of ​​the region on the substrate where the photoluminescence intensity at adjacent coordinates in the plurality of coordinates is higher than a third predetermined value is greater than a fourth predetermined value, the region is determined as a second defect region. The plurality of coordinates contained in the second defect region in the plurality of coordinates are stored as second defect coordinates. After the plurality of semiconductor elements are formed, in the electrical inspection based on the electrical characteristic evaluation device, the semiconductor elements corresponding to the plurality of second defect coordinates are not subjected to electrical inspection, but are instead processed for identification as defective.

3. The method for inspecting a semiconductor device as described in claim 1 or 2, wherein, The first brightness and the second brightness are calculated by processing the brightness of the multiple coordinates using statistical methods.

4. A method for inspecting a semiconductor device, wherein, Prepare a semiconductor substrate containing silicon carbide. The semiconductor substrate is captured by a transmission polarization image acquisition device and converted into a first image data in a specified format. By using a transmission polarization image processing device, multiple coordinates representing the positions of multiple semiconductor elements formed in the semiconductor substrate are set in the first image data. The transmission polarization image processing device performs image processing on the first image data. If the area of ​​the region on the substrate whose brightness at adjacent coordinates is higher than a first predetermined value is greater than a second predetermined value, or if the area of ​​the region on the substrate whose brightness at adjacent coordinates is lower than the first predetermined value is greater than the second predetermined value, the region on the substrate is determined to be a first defect region containing multiple first defect coordinates, and the multiple first defect coordinates are stored. An epitaxial layer is formed on the semiconductor substrate. The photoluminescence image of the epitaxial substrate is captured by a defect inspection device and converted into a second image data in a prescribed format. The defect inspection device is used to set the multiple coordinates in the second image data. Image processing is performed on the second image data. Based on the photoluminescence intensity at the plurality of coordinates, image processing is also performed on the first image data. If the area of ​​the region on the substrate where the photoluminescence intensity at adjacent coordinates in the plurality of coordinates is higher than a third predetermined value is greater than a fourth predetermined value, the region is determined as a second defect region. The plurality of coordinates contained in the second defect region in the plurality of coordinates are stored as second defect coordinates. Multiple semiconductor elements are formed in the semiconductor substrate on which the epitaxial layer is formed. For the semiconductor elements other than those corresponding to the first defect coordinate or the second defect coordinate, electrical inspections are performed sequentially using an electrical characteristic evaluation device based on pre-set electrical inspection conditions. For the semiconductor element corresponding to the second defect coordinate among the plurality of semiconductor elements, the electrical inspection is not performed; instead, it is determined to be defective. Regarding the semiconductor element corresponding to the first defect coordinate among the plurality of semiconductor elements, after performing a screening process based on the continuous flow current of the pn junction of the semiconductor element corresponding to the first defect coordinate, an electrical inspection based on the electrical characteristic evaluation device is performed to determine whether it is within specifications or defective. If the defect is determined to be defective, a process is performed to identify that the semiconductor element corresponding to the coordinates of the first defect is defective. If the defect is determined to be within the specified range, the semiconductor element corresponding to the first defect coordinate is transferred to the next process.

Images