Load state evaluation method and system for electric energy meter

Abstract

The invention relates to the technical field of electric energy meters, and discloses a load state evaluation method and system for an electric energy meter. The method comprises the following steps: acquiring a first current difference value between an MCU1 and an MCU2 in the electric energy meter, a second current difference value between the MCU2 and an MCU3 and an A-phase reference voltage value of the MCU1; executing three-phase correlation prediction to obtain a three-phase load prediction value in the next period; comparing the three-phase load predicted value of the next period with a load switching threshold value, and judging a load state grade identifier; when the power failure detection circuit outputs a target power failure signal, a three-phase processor collaborative switching instruction is generated; after a three-phase processor collaborative switching instruction is received, task execution schemes are created and stored in different priority areas of the EEPROM respectively, and three-phase collaborative differentiated data protection is completed. Compared with a traditional single-phase independent prediction method, the method has the advantages that the load state prediction precision is remarkably improved, and the whole-process three-phase processor cooperative control from data acquisition to power failure protection is realized.

Description

Technical Field

[0001] This invention relates to the field of electricity meter technology, and in particular to a method and system for assessing the load status of electricity meters. Background Technology

[0002] Traditional electricity meters generally adopt a single main controller architecture or a simple multi-processor parallel processing method. When performing three-phase load status assessment, they mainly rely on serial bus to sequentially read the electrical parameter data of each phase. This method has the problem of accumulated communication delay. Especially in high-frequency sampling and real-time load prediction scenarios, the inherent delay of serial communication seriously affects the real-time performance and accuracy of load status judgment.

[0003] Existing load condition prediction technologies mainly employ single-phase independent prediction or simple three-phase independent prediction methods, lacking in-depth exploration and utilization of the inherent correlations between three-phase electrical parameters. These methods suffer from insufficient prediction accuracy when dealing with unbalanced three-phase loads and cannot effectively cope with the increasingly complex load change patterns in modern power systems. Furthermore, traditional power outage detection and data protection mechanisms generally employ fixed threshold judgments and single protection strategies, failing to adapt to the impact of power supply voltage fluctuations on load condition judgments, and unable to provide differentiated protection based on data importance and timeliness. This leads to data loss or incomplete protection issues during power outage switching. Summary of the Invention

[0004] This invention provides a load status assessment method and system for electricity meters. Compared with the traditional single-phase independent prediction method, this invention significantly improves the load status prediction accuracy and realizes the three-phase processor collaborative control of the entire process from data acquisition to power failure protection.

[0005] In a first aspect, the present invention provides a method for assessing the load status of an electricity meter, the method comprising: Obtain the first current difference between MCU1 and MCU2, the second current difference between MCU2 and MCU3, and the A-phase reference voltage value of MCU1 from the power meter; Based on the first current difference, the second current difference, and the A-phase reference voltage value, a three-phase correlation prediction is performed to obtain the predicted value of the three-phase load for the next cycle; The predicted three-phase load for the next cycle is compared with the load switching threshold to determine the load status level. When the power failure detection circuit outputs a target power failure signal, the corresponding power failure switching strategy is selected according to the load status level identifier and a three-phase processor collaborative switching instruction is generated. After receiving the three-phase processor collaborative switching instruction, MCU1, MCU2, and MCU3 create corresponding task execution schemes and store them in different priority areas of EEPROM to complete the differentiated data protection of the three-phase collaboration.

[0006] Optionally, in a first implementation of the first aspect of the present invention, obtaining the first current difference between MCU1 and MCU2, the second current difference between MCU2 and MCU3, and the A-phase reference voltage value of MCU1 in the energy meter includes: The MCU1 in the energy meter is set as the main controller, which is responsible for the coordinated control logic. MCU2 is set as the A-phase processor and MCU3 is set as the B-phase processor. The sampling frequency of MCU1 is configured as the main frequency. The sampling frequencies of MCU2 and MCU3 are ; A differential data buffer is established between MCU1, MCU2, and MCU3. The differential data buffer is 64 bytes in size and adopts a double buffering mechanism to form a differential current parallel sampling channel. The sampling timing of MCU1, MCU2, and MCU3 is precisely aligned through a clock synchronization circuit to ensure that the three-phase processors synchronously acquire the current data at the current moment. MCU1 reads the current data at the current moment from the differential current parallel sampling channel, calculates and obtains the first current difference between MCU1 and MCU2 and the second current difference between MCU2 and MCU3, and simultaneously acquires the A-phase reference voltage value of MCU1.

[0007] Optionally, in a second implementation of the first aspect of the present invention, the step of performing a three-phase correlation prediction based on the first current difference, the second current difference, and the A-phase reference voltage value to obtain the predicted three-phase load value for the next cycle includes: The absolute value of the first current difference is summed with the absolute value of the second current difference to obtain the target absolute value; When the absolute value of the target is less than a preset threshold, it is determined to be a three-phase balanced load mode and the weighting coefficients α, β, and γ are set to 0.3, 0.3, and 0.4. When the absolute value of the target is greater than or equal to the preset threshold, it is determined to be a three-phase unbalanced load mode and the weighting coefficients α, β, and γ are set to 0.6, 0.4, and 0.8. The first current difference is weighted using the weighting coefficient α to obtain the first weighted calculation result; the second current difference is weighted using the weighting coefficient β to obtain the second weighted calculation result; and the A-phase reference voltage value is weighted using the weighting coefficient γ to obtain the third weighted calculation result. MCU1 uses a 16-bit fixed-point arithmetic method to output the predicted value of the three-phase load for the next cycle based on the first weighted calculation result, the second weighted calculation result, and the third weighted calculation result.

[0008] Optionally, in a third implementation of the first aspect of the present invention, the MCU1 employs a 16-bit fixed-point arithmetic method to output the predicted three-phase load value for the next cycle based on the first weighted calculation result, the second weighted calculation result, and the third weighted calculation result, including: MCU1 converts the first weighted calculation result, the second weighted calculation result, and the third weighted calculation result into 16-bit fixed-point number format respectively to obtain the first 16-bit fixed-point weighted value, the second 16-bit fixed-point weighted value, and the third 16-bit fixed-point weighted value; MCU1 performs a term-by-term summation operation on the first 16-bit fixed-point weighted value, the second 16-bit fixed-point weighted value, and the third 16-bit fixed-point weighted value according to the fixed-point arithmetic rules. After each summation, the carry flag is checked to obtain the 16-bit fixed-point summation result. When the result of the 16-bit fixed-point summation operation exceeds the 16-bit value range, MCU1 performs saturation processing to limit the result of the 16-bit fixed-point summation operation to the maximum value. When the result of the 16-bit fixed-point summation operation is within the 16-bit value range, the original value is maintained, and the corrected 16-bit fixed-point operation result is obtained. MCU1 restores the corrected 16-bit fixed-point arithmetic result by dividing it into an 8-bit integer part and an 8-bit fractional part, and outputs it as the predicted value of the three-phase load for the next cycle.

[0009] Optionally, in a fourth implementation of the first aspect of the present invention, the step of comparing the predicted three-phase load value for the next cycle with the load switching threshold to determine the load status level identifier includes: MCU1 acquires the current voltage value of the power-down detection circuit through a 12-bit ADC, and calculates the voltage deviation value and voltage change rate between the current voltage value and the 47V regulated reference. The load switching threshold is dynamically calculated based on the voltage deviation value and the voltage change rate. The predicted three-phase load value for the next cycle is compared with the load switching threshold. When the predicted three-phase load value for the next cycle is less than the load switching threshold, the load status level is identified as light load. When the predicted three-phase load value for the next cycle is greater than or equal to the load switching threshold and less than twice the load switching threshold, the load status level is identified as medium load. When the predicted three-phase load value for the next cycle is greater than or equal to twice the load switching threshold, the load status level is identified as heavy load.

[0010] Optionally, in a fifth implementation of the first aspect of the present invention, when the power failure detection circuit outputs a target power failure signal, selecting a corresponding power failure switching strategy based on the load state level identifier and generating a three-phase processor coordinated switching instruction includes: MCU1 detects the target power failure signal output by the power failure detection circuit and reads the load status level identifier; When the target power failure signal is high and the load status level is heavy load, the generated power failure switching strategy is an immediate switching strategy. When the target power failure signal is high and the load status level is light load, the generated power failure switching strategy is a delayed switching strategy. When the target power failure signal is low, the generated power failure switching strategy is a normal mode maintenance strategy. According to the power-down switching strategy, MCU1 generates corresponding switching control codes, and MCU1 encapsulates the switching control codes into three-phase processor coordinated switching instructions.

[0011] Optionally, in the sixth implementation of the first aspect of the present invention, after receiving the three-phase processor collaborative switching instruction, MCU1, MCU2, and MCU3 create corresponding task execution schemes and store them respectively in different priority areas of the EEPROM to complete the differentiated data protection for three-phase collaboration, including: The three-phase processor collaborative switching command is simultaneously sent to MCU2 and MCU3 through a preset communication channel; After receiving the three-phase processor collaborative switching instruction, MCU2 and MCU3 complete the mode switching operation and generate an acknowledgment signal to feed back to MCU1. After receiving the dual acknowledgment signals, MCU1 confirms that the collaborative switching instruction has been executed. MCU1 monitors the CPU utilization, memory utilization, and task queue length of MCU1, MCU2, and MCU3 respectively, and calculates the processor load rate corresponding to MCU1, MCU2, and MCU3. The average load rate is calculated based on the processor load rate. When the load rate of any processor among MCU1, MCU2, and MCU3 exceeds 120% of the average load rate, it is determined that a task transfer operation needs to be performed. When the load rates of all processors are within 120% of the average load rate, the current task allocation is maintained. MCU1 selects the transfer task type for the processor that needs to perform the task transfer operation according to the priority order of data acquisition task, data processing task, communication task, and storage task, and transfers the selected task to the target processor with the lowest load rate, thus obtaining the load balancing task redistribution result. Based on the load balancing task redistribution results, MCU1 generates a task execution plan that includes the specific task division of each processor. According to the task execution plan, the electricity value data, load status data, and electrical parameter data are stored in different priority areas of the EEPROM to complete the differentiated data protection of three-phase coordination.

[0012] Optionally, in the seventh implementation of the first aspect of the present invention, the MCU1 monitors the CPU utilization, memory utilization, and task queue length of MCU1, MCU2, and MCU3 respectively, and calculates the processor load rate corresponding to MCU1, MCU2, and MCU3, including: MCU1 reads the CPU running clock count and idle clock count by accessing the system counter registers of each processor, calculates the percentage of CPU running clock count to total clock count, and obtains the CPU utilization of MCU1, MCU2, and MCU3. MCU1 reads the memory allocation table of each processor to obtain the allocated memory size and total memory size, calculates the percentage of allocated memory to total memory, and obtains the memory utilization rate of MCU1, MCU2, and MCU3. At the same time, it reads the ready queue of the task scheduler to obtain the number of tasks currently waiting to be executed, and obtains the task queue length of MCU1, MCU2, and MCU3. The CPU utilization and memory utilization are kept at their original values. The task queue length is divided by the maximum queue capacity of 32 and multiplied by 100 to convert it into a percentage format, thus obtaining three standardized monitoring values ​​for MCU1, MCU2, and MCU3. MCU1 performs a weighted summation of the three standardized monitoring values ​​to calculate the processor load rates corresponding to MCU1, MCU2, and MCU3 respectively.

[0013] Optionally, in the eighth implementation of the first aspect of the present invention, the step of storing the electricity consumption data, load status data, and electrical parameter data into different priority areas of the EEPROM according to the task execution scheme to complete the differentiated data protection of three-phase coordination includes: Based on the processor task allocation in the task execution scheme, MCU1 allocates 80% of the storage bandwidth to the electricity value data, 15% of the storage bandwidth to the load status data, and 5% of the storage bandwidth to the electricity parameter data, thus establishing a three-level priority storage bandwidth allocation scheme. Based on the three-level priority storage bandwidth allocation scheme, the EEPROM is divided into three dedicated storage areas to obtain different priority areas of the EEPROM. A circular storage block is established in each of the different priority areas, and data is stored using a polling method while controlling the number of erases for each storage block, thus forming a circular buffer storage mechanism; MCU1, MCU2, and MCU3, according to the timing arrangement of the task execution scheme, write the collected electricity value data, load status data, and electrical parameter data into the corresponding priority area through the circular buffer storage mechanism to complete the differentiated data protection of three-phase coordination.

[0014] Secondly, the present invention provides a load condition assessment system for electricity meters, the load condition assessment system for electricity meters comprising: The acquisition module is used to acquire the first current difference between MCU1 and MCU2, the second current difference between MCU2 and MCU3, and the A-phase reference voltage value of MCU1 in the energy meter. The prediction module is used to perform a three-way correlation prediction based on the first current difference, the second current difference, and the A-phase reference voltage value to obtain the predicted value of the three-phase load for the next cycle. The comparison module is used to compare the predicted three-phase load value for the next cycle with the load switching threshold to determine the load status level identifier; The generation module is used to select the corresponding power-down switching strategy and generate a three-phase processor collaborative switching instruction based on the load status level identifier when the power-down detection circuit outputs a target power-down signal. The storage module is used to receive the three-phase processor collaborative switching instruction, and then MCU1, MCU2, and MCU3 create corresponding task execution schemes and store them in different priority areas of EEPROM to complete the differentiated data protection of the three-phase collaboration.

[0015] The technical solution provided by this invention establishes a differential current parallel sampling channel between MCU1, MCU2, and MCU3, and employs a 64-byte double-buffering mechanism to eliminate the communication delay of the traditional serial bus, compressing the data acquisition process from three serial cycles to one sampling cycle. A three-phase correlation prediction model is used to fully utilize the correlation between the current difference between MCUs and the A-phase reference voltage, significantly improving the load state prediction accuracy compared to the traditional single-phase independent prediction method. A dynamic threshold adjustment mechanism based on a 47V regulated reference overcomes the limitation of fixed thresholds in adapting to voltage fluctuations, achieving highly reliable coordinated switching through dual judgment of a 40V power-down signal and load state indicator. A load balancing algorithm based on CPU utilization, memory utilization, and task queue length optimizes processor resource allocation, establishing a three-level priority storage mechanism: 80% for electricity consumption data, 15% for load state data, and 5% for electrical parameter data. Combined with circular buffer technology, this effectively extends the memory's lifespan, realizing full-process three-phase processor coordinated control from data acquisition to power-down protection. Attached Figure Description

[0016] To more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0017] Figure 1 This is a schematic diagram of one embodiment of the load status assessment method for electricity meters in this invention. Figure 2 This is a schematic diagram of one embodiment of the load status assessment system for electricity meters in this invention. Detailed Implementation

[0018] This invention provides a method and system for load status assessment of electricity meters. The terms "first," "second," "third," "fourth," etc. (if present) in the specification, claims, and accompanying drawings are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments described herein can be implemented in a sequence other than that illustrated or described herein. Furthermore, the terms "comprising" or "having" and any variations thereof are intended to cover a non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0019] For ease of understanding, the specific process of the embodiments of the present invention is described below. Please refer to [link / reference]. Figure 1 One embodiment of the load status assessment method for electricity meters in this invention includes: Step S101: Obtain the first current difference between MCU1 and MCU2, the second current difference between MCU2 and MCU3, and the A-phase reference voltage value of MCU1 from the power meter. It is understood that the executing entity of this invention can be a load status assessment system for electricity meters, or it can be a terminal or a server; no specific limitation is made here. This embodiment of the invention will be described using a server as an example.

[0020] Specifically, the hardware architecture of the electricity meter establishes a collaborative division of labor among the three-phase processors. MCU1 is designated as the master controller, responsible for the overall system's coordination and control logic, data acquisition scheduling, and predictive calculation execution. MCU2 is configured as a dedicated processor for acquiring A-phase electrical parameters, and MCU3 is configured specifically for processing B-phase electrical parameters. This constructs a collaborative architecture of three-phase processors consisting of master and slave control units. Under this architecture, the core operation of the sampling system is dominated by MCU1, whose sampling frequency is set as the master frequency. This ensures sufficient data refresh rate for real-time control and predictive judgment, while MCU2 and MCU3 are designed to... The sampling frequency is optimized to reduce resource consumption while ensuring the timeliness and stability of the sampling task. A data buffer for differential sampling is established between MCU1, MCU2, and MCU3. This differential data buffer has a capacity of 64 bytes and adopts a double-buffering mechanism design to ensure that one buffer is always used for data writing and the other for data reading during high-speed sampling, effectively avoiding data overwriting conflicts and improving the stability of parallel processing. To improve the coordination and consistency of three-phase data, a dedicated clock synchronization circuit is embedded to align the clock sources of the three processors, so that their sampling timing can be synchronized within a microsecond error range. After the structural deployment and synchronization mechanism configuration are completed, MCU1 simultaneously reads the A-phase and B-phase current data collected by MCU2 and MCU3 respectively through the differential current parallel sampling channel. Combined with its own collected C-phase current value or the reference current value of the control node, the first current difference between MCU1 and MCU2 and the second current difference between MCU2 and MCU3 are calculated. These two differences can reflect the relative fluctuation trend of the three-phase current at the current moment; at the same time, MCU1 synchronously collects the reference voltage value of phase A.

[0021] Step S102: Perform three-phase correlation prediction based on the first current difference, the second current difference, and the A-phase reference voltage value to obtain the predicted value of the three-phase load for the next cycle; Specifically, the absolute values ​​of the first and second current differences read from MCU1 are taken, and these two absolute values ​​are summed to obtain a target absolute value for determining the current load state mode. This target absolute value is compared with a threshold parameter set by empirical calibration or an online learning mechanism. If the target absolute value is lower than the threshold, it indicates that the three-phase current fluctuation is small, and the current is determined to be in a three-phase balanced load mode. At this time, the three weighting coefficients are automatically set to α=0.3, β=0.3, and γ=0.4 to reduce the influence of the current difference in the prediction model and enhance the weight of the reference voltage. If the target absolute value is greater than or equal to the threshold, it indicates that there is a significant imbalance in the three-phase load, and the system determines it to be a three-phase unbalanced load mode. The weighting coefficients are adjusted to α=0.6, β=0.4, and γ=0.8 to enhance the dominant role of the current difference term in the prediction expression, making the prediction model more sensitive to electrical fluctuations under unbalanced loads. After selecting the weights, MCU1 performs weighted processing on the three input data based on the weight coefficients in the current mode. The first current difference is multiplied by the weight α to obtain the first weighted calculation result. Then, the second current difference is multiplied by the weight β to obtain the second weighted calculation result. Finally, the A-phase reference voltage value is multiplied by the weight γ to form the third weighted calculation result. After completing these three weighting operations, MCU1 uses its internal embedded arithmetic unit to sum the first, second, and third weighted results in 16-bit fixed-point format, and outputs the load prediction value for the next sampling period derived by the prediction model in the current sampling period.

[0022] Step S103: Compare the predicted three-phase load value for the next cycle with the load switching threshold to determine the load status level. Specifically, MCU1 acquires the current voltage value of the power failure detection circuit via a 12-bit ADC, with a sampling frequency set to 1000 times per second. Within each sampling cycle, MCU1 acquires the voltage value of the power failure detection node via an analog-to-digital converter, calculates the difference between this current voltage value and the system-set regulated reference voltage to obtain the voltage deviation, and compares the current voltage with the voltage value acquired in the previous sampling cycle to calculate the voltage change trend, establishing a data basis for voltage fluctuation trends. Based on the voltage deviation and voltage change trend, combined with the voltage correction factor and change response coefficient set in the system, the load switching threshold corresponding to the current cycle is dynamically calculated. This dynamic adjustment mechanism can reflect the impact of the current grid state on the threshold determination in real time, ensuring that the prediction judgment has high adaptability and anti-interference capability to grid disturbances, and can effectively suppress misjudgments caused by short-term voltage fluctuations. The predicted three-phase load value for the next cycle is compared with the load switching threshold, and the load state level is classified accordingly. If the predicted value is less than the dynamic threshold, it indicates that the system load is low during the prediction period and is in a light load state. The load state level is then set to light load. If the predicted value is greater than or equal to the dynamic threshold but less than twice it, the current load is considered to be in a medium load state with a certain intensity within the normal range. The corresponding level is set to medium load. If the predicted value is greater than or equal to twice the dynamic threshold, the system is determined to be in a current surge or high power consumption operation state, which is a heavy load state. The corresponding level is set to heavy load.

[0023] Step S104: When the power failure detection circuit outputs the target power failure signal, select the corresponding power failure switching strategy according to the load status level identifier and generate a three-phase processor collaborative switching instruction. Specifically, MCU1 reads the real-time level status of the power failure detection circuit inside the energy meter, continuously monitoring the logic level changes at the circuit's output to determine if a power failure state has been entered. When MCU1 detects the arrival of the target power failure signal (i.e., the power failure detection circuit outputs a high-level signal), it reads the load status level identifier determined by the prediction model within the current cycle. This is used as a decision input variable to determine whether to enter the emergency switching process and what switching strategy to adopt. If the target power failure signal is high and the read load status level identifier is in a heavy load state, it indicates that the current system load is in a high-power operation phase and the supply voltage is about to become unstable. This indicates that the power fluctuation poses a substantial threat to data integrity and operational security. Therefore, a corresponding power failure switching strategy, the "immediate switching strategy," is generated. This strategy requires MCU1 to coordinate with MCU2 and MCU3 to enter data synchronization and storage mode as quickly as possible, prioritizing the emergency storage of critical data. If the target power failure signal is high but the load status level is in a light load state, it indicates that the current load is less sensitive to the risk of power failure, and the power supply... Although there is an abnormal voltage warning, the overall risk is controllable. Therefore, the generated power-down switching strategy is a "delayed switching strategy," with a buffer time window set, such as 50 milliseconds, to reconfirm whether the voltage continues to drop or is accompanied by an increase in load level. This avoids unnecessary system switching due to instantaneous voltage disturbances, thereby improving overall operational stability and fault tolerance. If the target power-down signal is low, it indicates that the power supply system is operating normally and no state switching is required. In this case, the generated power-down switching strategy is a "maintain normal mode strategy," where the system continues to maintain the existing acquisition, processing, and storage process without triggering any switching behavior. After determining the power-down switching strategy, MCU1 generates standardized switching control codes based on the control behaviors corresponding to different strategies. The control code corresponding to the "immediate switching strategy" is used to trigger MCU2 and MCU3 to enter emergency synchronous write mode. The "delayed switching strategy" control code includes a delay logic judgment flag, while the "maintain normal mode strategy" control code maintains the current task priority and cache scheduling strategy unchanged. MCU1 generates a switching control code, packages and encapsulates the control code according to the communication protocol between the three-phase processors, and forms a three-phase processor collaborative switching instruction with a unified structure and clear fields. It then sends the instruction to MCU2 and MCU3 through a high-speed differential communication channel to ensure that millisecond-level synchronous response can be achieved in a multi-processor environment.

[0024] Step S105: After receiving the three-phase processor collaborative switching instruction, MCU1, MCU2, and MCU3 create corresponding task execution schemes and store them in different priority areas of EEPROM to complete the differentiated data protection of the three-phase collaboration.

[0025] Specifically, based on a preset high-speed communication channel, MCU1 synchronously broadcasts its generated three-phase processor collaborative switching instruction to MCU2 and MCU3. This communication channel is a differential data link or SPI synchronous bus, ensuring that the three-phase processors can receive the same control instruction under the same system clock reference and trigger consistent processing state switching. After successfully receiving the collaborative switching instruction, MCU2 and MCU3 immediately complete the state switching from their current operating mode to data protection mode, and after completing the switch, each generates an acknowledgment feedback signal, which is sent back to MCU1 through the communication channel. After receiving dual acknowledgment signals from MCU2 and MCU3, MCU1 marks that the collaborative switching operation has been synchronously executed by the three-phase processors, thus entering the task state scheduling and storage configuration stage. MCU1 sequentially monitors the processor resource status of itself, as well as MCU2 and MCU3, and calculates the load rate of the three processors in the current operating state by monitoring key indicators such as CPU utilization, memory utilization, and current task queue length. Based on these three processor load rate data, MCU1 calculates the current average system load rate and compares the load rate of each processor with the average. When any processor's load rate exceeds 120% of the average, it automatically determines that there is a risk of unbalanced processor resources and requires cross-processor task transfer to ensure balanced computational load across processors in emergency mode. If the load rate of all processors does not exceed 120% of the average, the original task allocation structure remains unchanged, maintaining the stability of the task scheduling strategy. MCU1 judges the processors requiring task transfer according to the priority order of data acquisition, data processing, communication, and storage tasks. It prioritizes and transfers more important tasks from processors with excessive load rates to the processor with the lowest load rate in the current system, generating an updated task allocation table as the result of the load balancing task redistribution. Based on this redistribution result, MCU1 constructs a complete task execution scheme that includes the specific responsibilities of the three processors and the task priority scheduling order, clearly defining the division of labor and processing authority of each processor in data acquisition, processing, communication, and writing. Guided by the task execution plan, a differentiated data writing process is initiated, sequentially writing electricity consumption data, load status data, and electrical parameter data to different areas of the EEPROM according to preset priorities. Electricity consumption data, due to its high accuracy requirements and significant impact from loss, is allocated to the highest priority area, with its write address set to the first segment of the space. Load status data, used for dynamic system operation assessment and fault evolution analysis, is written as medium-priority data to the next lower priority area. Electrical parameter data, while having strong real-time requirements, is less essential for storage than the previous two and is configured as the lowest priority, written to the last segment of the space.

[0026] In one specific embodiment, the process of performing step S101 may specifically include the following steps: Configure MCU1 in the energy meter as the main controller, which is responsible for the coordinated control logic. Configure MCU2 as the A-phase processor and MCU3 as the B-phase processor, and configure the sampling frequency of MCU1 as the main frequency. The sampling frequencies of MCU2 and MCU3 are ; A differential data buffer is established between MCU1, MCU2, and MCU3. The size of the differential data buffer is 64 bytes and a double buffering mechanism is adopted to form a differential current parallel sampling channel. The sampling timing of MCU1, MCU2, and MCU3 is precisely aligned through a clock synchronization circuit to ensure that the three-phase processors synchronously acquire the current data at the current moment. MCU1 reads the current data at the current moment from the differential current parallel sampling channel, calculates and obtains the first current difference between MCU1 and MCU2 and the second current difference between MCU2 and MCU3, and simultaneously acquires the A-phase reference voltage value of MCU1.

[0027] Specifically, the processor functions are divided. MCU1 inside the energy meter is set as the global master controller, responsible for the collaborative control logic between the three-phase processors, core data processing, load status judgment, switching strategy execution, and data storage scheduling. It serves as the data processing and control center of the entire system. MCU2 is set as a dedicated phase processor for A-phase current acquisition and preprocessing, and MCU3 is configured as a phase processor responsible for B-phase current data acquisition and cache management. This establishes a master-slave distributed three-phase processor structure. In this structure, MCU1 executes all critical calculations and coordination tasks at a main frequency f0, while MCU2 and MCU3 run their respective sampling logic and preprocessing programs at half the main frequency, f0 / 2. A differential data buffer mechanism is established between MCU1, MCU2, and MCU3. This mechanism constructs a differential data buffer with a standard configuration of 64 bytes and employs a double-buffering mechanism for memory differentiation. This means that at any given time, one buffer is always in a write state, while the other is in a read-read or read-already state, to prevent data from being accessed by the read thread during the write process, which could cause sampling errors or data synchronization problems. The differential data buffer serves as a cache channel for transmitting current data from MCU2 and MCU3 to MCU1. Through timing management of the data channel, it supports the implementation of a parallel sampling mechanism, enabling the three-phase processors to establish a differential current parallel sampling path via this channel. The system implements a master-slave clock phase-locked loop (PLL) mechanism for the three-phase processors using a clock synchronization circuit. MCU1 sends a reference clock pulse, and the sampling modules within MCU2 and MCU3 capture and lock the clock signal through a PLL circuit, fine-tuning their respective sampling start times and trigger cycles to ensure concurrent sampling of the current signal at the theoretical time point in each sampling cycle. This clock synchronization process involves adjusting timing parameters such as clock edge, duty cycle, and sampling window. Simultaneously, it performs structured synchronization of the sampling interrupt handlers in MCU2 and MCU3, enabling synchronous parallel execution of data acquisition between the three phases and effectively avoiding data misalignment or current distortion caused by microsecond-level sampling time differences. MCU1 acts as the main controller, directly reading the current value data blocks collected by MCU2 and MCU3 in the current cycle through the differential current parallel sampling channel. It then parses the data using the field identifier in the data structure to extract the real-time values ​​of phase A and phase B current. Finally, it calculates and processes the phase C or reference phase current data obtained by MCU1 through local sampling with the above sampled values, thereby obtaining the first current difference between MCU1 and MCU2 and the second current difference between MCU2 and MCU3.Simultaneously, during this cycle, MCU1 synchronously acquires the reference voltage value of phase A. This voltage value is obtained from the phase A voltage detection node at the front end of the energy meter through the high-precision analog-to-digital conversion module inside MCU1. After acquisition, it undergoes digital filtering, amplitude adjustment and normalization processing to ensure that it has stability and availability as a reference benchmark for the prediction model.

[0028] In one specific embodiment, the process of performing step S102 may specifically include the following steps: The target absolute value is obtained by summing the absolute values ​​of the first current difference and the second current difference. When the absolute value of the target is less than the preset threshold, it is determined to be a three-phase balanced load mode and the weighting coefficients α, β, and γ are set to 0.3, 0.3, and 0.4. When the absolute value of the target is greater than or equal to the preset threshold, it is determined to be a three-phase unbalanced load mode and the weighting coefficients α, β, and γ are set to 0.6, 0.4, and 0.8. The first current difference is weighted using the weighting coefficient α to obtain the first weighted calculation result. The second current difference is weighted using the weighting coefficient β to obtain the second weighted calculation result. The A-phase reference voltage value is weighted using the weighting coefficient γ to obtain the third weighted calculation result. MCU1 uses a 16-bit fixed-point arithmetic method to output the predicted value of the three-phase load for the next cycle based on the first weighted calculation result, the second weighted calculation result, and the third weighted calculation result.

[0029] Specifically, the first current difference between MCU1 and MCU2 and the second current difference between MCU2 and MCU3 within the current cycle are extracted. The absolute values ​​of these two differences are then calculated to obtain their corresponding current offsets. The target absolute value is calculated by summing these two absolute values. This target absolute value is compared to a current difference threshold. If the target absolute value is less than the threshold, it indicates that the difference between the three-phase currents is within the allowable tolerance range, and the load exhibits a symmetrical distribution, meaning the system is operating in a three-phase balanced load mode. In this mode, MCU1 adopts a prediction model structure suitable for balanced operating conditions and sets three weighting coefficients accordingly. The first and second weighting coefficients, α and β, are set to 0.3, reflecting the secondary influence of the first and second current differences on the prediction results. The third weighting coefficient, γ, is set to 0.4, indicating that under good current symmetry, the system relies more on voltage reference information to reflect the true state of the load, improving prediction stability. When the absolute value of the target is greater than or equal to the preset threshold, it indicates that there is a significant inconsistency between the three-phase currents, caused by uneven load, wiring deviation, or local system anomaly. Based on this, the system determines the current operating state as a three-phase unbalanced load mode. At this time, the prediction model is switched to an asymmetric adaptive structure, and the weight coefficients are reset. The first weight coefficient α is adjusted to 0.6, the second weight coefficient β is adjusted to 0.4, and the third weight coefficient γ is adjusted to 0.8, thereby enhancing the dominant role of the current difference term in load prediction and improving the model's response sensitivity to unbalanced current fluctuations and its ability to perceive short-term trends. After configuring the weighting strategy, MCU1 executes three weighting operations. First, the first weighting coefficient α is used to multiply the first current difference, generating the first weighted calculation result. This value quantifies the impact of the current difference between phase A and phase B on the system's cycle-wise load state changes. Next, the second weighting coefficient β is used to perform the same multiplication and weighting process on the second current difference, yielding the second weighted calculation result. This value reflects the interference effect of the load offset between phase B and phase C on the overall operating trend. Finally, the third weighting coefficient γ is used to weight the A-phase reference voltage value, resulting in the third weighted calculation result. This result models the system's voltage supply stability and power input characteristics. To ensure numerical stability and processor resource optimization in the above weighting process, MCU1 uses 16-bit fixed-point numbers for the entire weighting calculation. This numerical format offers greater efficiency compared to floating-point structures, enabling high-frequency data stream multiplication and addition operations to be completed in fewer clock cycles on the embedded MCU platform, while reducing storage space usage and power consumption. After the three weighted results are generated, MCU1 adds them together in a linear summation manner to form a comprehensive prediction value, which is the prediction output for the load state of the next cycle in the current cycle.

[0030] In one specific embodiment, the process of executing step MCU1 using 16-bit fixed-point arithmetic to output the predicted value of the three-phase load for the next cycle based on the first weighted calculation result, the second weighted calculation result, and the third weighted calculation result can specifically include the following steps: MCU1 converts the first weighted calculation result, the second weighted calculation result, and the third weighted calculation result into 16-bit fixed-point number format respectively, to obtain the first 16-bit fixed-point weighted value, the second 16-bit fixed-point weighted value, and the third 16-bit fixed-point weighted value; MCU1 performs a term-by-term summation operation on the first 16-bit fixed-point weighted value, the second 16-bit fixed-point weighted value, and the third 16-bit fixed-point weighted value according to the fixed-point arithmetic rules. After each summation, the carry flag is checked to obtain the 16-bit fixed-point summation result. When the result of the 16-bit fixed-point summation exceeds the range of 16-bit values, MCU1 performs saturation processing to limit the result of the 16-bit fixed-point summation to the maximum value. When the result of the 16-bit fixed-point summation is within the range of 16-bit values, the original value is maintained, resulting in a corrected 16-bit fixed-point summation result. MCU1 restores the corrected 16-bit fixed-point arithmetic result by dividing it into an 8-bit integer part and an 8-bit fractional part, and outputs it as the predicted value of the three-phase load for the next cycle.

[0031] Specifically, MCU1 performs format conversion processing on the weighted results of the first current difference, the second current difference, and the A-phase reference voltage, converting them into a 16-bit fixed-point numerical form. The original floating-point or extended-bit integer values ​​are scaled according to a preset scaling factor, allocating 8 bits for the integer part and 8 bits for the fractional part within the total 16-bit data width to form a fixed-point representation with a fixed fractional part distribution. During this conversion, MCU1 ensures that each value is rounded during conversion according to its internal register definitions, while retaining the sign bit and carry flag, resulting in the first, second, and third 16-bit fixed-point weighted values. MCU1 then sequentially accumulates these three 16-bit fixed-point weighted values ​​according to fixed-point arithmetic rules. This process follows embedded arithmetic specifications of low-order alignment, carry detection, and sign extension, ensuring that overflow checks are performed on the accumulation result after each accumulation operation. The MCU1 employs a configurable arithmetic logic unit to automatically detect the carry flag and sign bit after each addition operation, determining whether there is a risk of out-of-range data writing, thus ensuring system security and data consistency. During the term-by-term summation, the system starts by accumulating the first and second fixed-point weighted values, obtaining an intermediate result, and then sums it with the third fixed-point weighted value to calculate the final 16-bit fixed-point summation result. The MCU1 performs a validity check on the numerical range of the 16-bit fixed-point summation result, comparing whether the current result is within the valid representation range of a 16-bit fixed-point number. This range is defined as the minimum negative value to the maximum positive value of a signed fixed-point number. If the summation result exceeds this range, the MCU1 triggers a saturation processing mechanism. This mechanism forcibly limits the result to the maximum representable boundary value, preventing numerical distortion, control deviation, or calculation errors caused by numerical overflow or underflow, ensuring that the predicted value always remains within the interpretable operating range of the power system. If the result is within the valid range, the system maintains the original value and directly proceeds to the next stage of format restoration. MCU1 restores the corrected 16-bit fixed-point summation result using a structure where the high 8 bits represent the integer part and the low 8 bits represent the fractional part. This restoration process is achieved through bit segmentation and inverse scaling by a scaling factor. Specifically, the system converts the fractional part back to a decimal floating-point representation based on a fixed scaling factor and combines it with the integer part to form a physically meaningful load prediction value. In this structure, the integer part reflects the overall amplitude level of the predicted load, while the fractional part provides a more detailed description of power fluctuations. MCU1 writes this value, after fixed-point weighted summation, saturation processing, and numerical restoration, as the prediction output for the current cycle into the corresponding register or buffer queue. This value is the comprehensive prediction result for the three-phase load in the next cycle.Meanwhile, the system records flags and caches results for each cycle of weighted calculation process, which are used to generate load trend analysis curves and historical status traceability analysis.

[0032] In one specific embodiment, the process of performing step S103 may specifically include the following steps: MCU1 acquires the current voltage value of the power-down detection circuit through a 12-bit ADC, and calculates the voltage deviation and voltage change rate between the current voltage value and the 47V regulated reference. The load switching threshold is dynamically calculated based on the voltage deviation value and the voltage change rate. The predicted three-phase load for the next cycle is compared with the load switching threshold. If the predicted three-phase load for the next cycle is less than the load switching threshold, the load status level is identified as light load. If the predicted three-phase load for the next cycle is greater than or equal to the load switching threshold but less than twice the load switching threshold, the load status level is identified as medium load. If the predicted three-phase load for the next cycle is greater than or equal to twice the load switching threshold, the load status level is identified as heavy load.

[0033] Specifically, the 12-bit analog-to-digital converter (ADC) internally configured in MCU1 performs high-precision sampling of the analog voltage signal connected to the power-down detection circuit. This voltage signal originates from the output node of the hardware voltage regulator set at the system power input. This node uses 47 volts as the system's steady-state power supply reference and continuously decreases during power-down, reflecting the entire process of the system power supply transitioning from stability to undervoltage. Every 1 millisecond cycle, MCU1 reads the current voltage value through the ADC module and stores it in the voltage sampling buffer. Simultaneously, it retains voltage history data from at least two consecutive sampling points in the time dimension. MCU1 retrieves the latest voltage sample value from the buffer and calculates the difference between it and the voltage sample value from the previous moment to obtain the trend of the current voltage change relative to the previous sampling period. This trend is expressed as the voltage change rate, reflecting the fluctuation rate of the current power supply state. At the same time, MCU1 calculates the voltage deviation value by the difference between the current sample value and the system reference voltage of 47 volts. This deviation value is used to measure whether the current voltage deviates from the steady-state reference, i.e., to determine whether the system is in a critical power supply state or is at risk of power-down. Based on the two voltage characteristic parameters mentioned above, MCU1 calculates the load switching threshold for the current cycle through a dynamic adjustment mechanism. This threshold, above the system's preset baseline threshold, is corrected in real time based on the combined effect of voltage deviation and voltage change trends, and a new dynamic reference value is generated through internal function mapping. This dynamic threshold serves as the critical interface for the system to determine the load level status. By introducing voltage fluctuation factors, it improves the overall adaptability of the judgment, enabling the system to make more accurate identifications based on the actual operating conditions on site, thereby avoiding misjudgments or response delays caused by instantaneous voltage drops or fluctuations. The system then enters the load level determination process. MCU1 obtains the three-phase load prediction value for the next cycle from the weighted prediction stage of the previous cycle. This prediction value already includes the results of weighted calculation of three-phase current differences and voltage references, and has the ability to reflect future power consumption trends. The system compares the predicted value with the dynamic load switching threshold calculated for the current cycle. If the predicted value is less than the dynamic threshold, it indicates that the load for the current and next cycle is at a low level, and the system classifies it as a light load state, meaning that the current power supply pressure is low, the load behavior is stable, and the system is in normal operation. If the predicted value is greater than or equal to the dynamic threshold, but less than twice that value, it indicates that the system load has a moderate upward trend, and the state is classified as a medium load state. When the predicted value is equal to or exceeds twice the dynamic threshold, it indicates that the load has increased sharply, the power consumption has increased significantly, and the duration is relatively long, and the system classifies it as a heavy load state. This state is accompanied by strong startup surges, grid imbalance, or abnormal operation of terminal equipment. In each judgment cycle, MCU1 performs debouncing and confirmation operations on the judgment results, that is, performs short-term consistency verification on the level judgment results of multiple consecutive cycles to ensure that the system will not switch frequently due to short-term noise or transient current changes.

[0034] In one specific embodiment, the process of executing step S104 may specifically include the following steps: MCU1 detects the target power failure signal output by the power failure detection circuit and reads the load status level identifier; When the target power failure signal is high and the load status level is heavy load, the generated power failure switching strategy is an immediate switching strategy. When the target power failure signal is high and the load status level is light load, the generated power failure switching strategy is a delayed switching strategy. When the target power failure signal is low, the generated power failure switching strategy is a normal mode maintenance strategy. According to the power-down switching strategy, MCU1 generates corresponding switching control codes, and MCU1 encapsulates the switching control codes into three-phase processor coordinated switching instructions.

[0035] Specifically, MCU1, as the main control core of the system, continuously monitors the output signal of the power failure detection circuit on the power meter's power supply side and reads the load status level identifier that has been determined in real time, thereby realizing adaptive scheduling of the control logic. The power failure detection circuit is built with an analog comparator or voltage divider structure. By comparing the supply voltage with a set threshold, when the supply voltage is lower than the threshold, its output will be converted to a high-level signal, indicating that the power supply is in a power failure risk state; when the power supply returns to normal, its output is a low-level signal, indicating that the system is operating stably. During the entire power state transition process, MCU1 polls or interrupts the signal at fixed intervals to obtain whether a power failure trigger signal exists. MCU1 will call the load status level identifier generated by the load prediction and dynamic threshold determination module in the current cycle in parallel. This identifier expresses the current power consumption state of the system in the form of encoded bits or integers, which is one of three levels: light load, medium load, or heavy load. When MCU1 detects a high-level target power-down signal, indicating that the system power supply is nearing the power-down threshold and the load status level indicator shows a heavy load status, it signifies that the system is operating at high power consumption and power stability has significantly decreased, posing a high risk of data loss and control interruption. Therefore, MCU1 immediately sets the power-down switching strategy to an "immediate switching strategy." This strategy requires the system to switch to emergency data protection mode within the shortest delay time, prioritizing EEPROM storage, task transfer, interrupt latching, and load isolation. If the target power-down signal is also high, but the load status level indicator is in a light load state, it means that although the power supply voltage is close to the power-down threshold, the current load's energy consumption pressure on the system is extremely low, and the probability of the system maintaining power supply stability in a short time is still relatively high. Therefore, it is not necessary to immediately trigger all emergency modes; instead, a "delayed switching strategy" is adopted. Under this strategy, MCU1 continues to observe the voltage change trend and load status updates within a set delay window, delaying the switching operation to ensure that the risk does not escalate. This avoids unnecessary mode switching caused by instantaneous voltage disturbances, thereby improving the system's fault tolerance and operating efficiency. If MCU1 detects a low-level target power-down signal, indicating stable and normal power supply, no protection state is required. Regardless of the current load level, no protection action will be triggered. Therefore, the power-down switching strategy is set to "Maintain Normal Mode Strategy." In this state, the system continues to execute according to the original task scheduling, data refresh, and storage rhythm, maintaining the standard operating procedure without task transfer, mode switching, or data reallocation. MCU1 generates a corresponding switching control code for each strategy. This control code encapsulates control flags, operation permissions, execution priority, and delay parameters in a binary structure.For the "immediate switching strategy," the control code will include the highest priority identifier, execution confirmation flag, cache refresh instruction, and interrupt trigger parameters. For the "delayed switching strategy," the control code will include a delay time parameter, status polling flag, and conditional expression. For the "maintain normal mode strategy," the control code will only retain the current task status flag and include a running indicator bit to maintain the current configuration. All control codes are structurally encapsulated by MCU1 after generation, converting them into standard three-phase processor collaborative switching instructions. This collaborative instruction includes the control code body, along with auxiliary fields such as the source controller number, target processor address range, timestamp information, synchronization trigger flag, and data protection flag, ultimately forming a data frame structure conforming to the three-phase processor communication protocol.

[0036] In one specific embodiment, after receiving the three-phase processor coordinated switching instruction, MCU1, MCU2, and MCU3 create corresponding task execution schemes and store them in different priority areas of the EEPROM, respectively. The process of completing the differentiated data protection for three-phase coordination can specifically include the following steps: The three-phase processor coordinated switching instruction is simultaneously sent to MCU2 and MCU3 through a preset communication channel; After receiving the three-phase processor collaborative switching instruction, MCU2 and MCU3 complete the mode switching operation and generate an acknowledgment signal to feed back to MCU1. After receiving the dual acknowledgment signals, MCU1 confirms that the collaborative switching instruction has been executed. MCU1 monitors the CPU utilization, memory utilization, and task queue length of MCU1, MCU2, and MCU3 respectively, and calculates the processor load rate corresponding to MCU1, MCU2, and MCU3. The average load rate is calculated based on the processor load rate. When the load rate of any processor among MCU1, MCU2, and MCU3 exceeds 120% of the average load rate, it is determined that a task transfer operation needs to be performed. When the load rates of all processors are within 120% of the average load rate, the current task allocation is maintained. MCU1 selects the transfer task type for the processor that needs to perform the task transfer operation according to the priority order of data acquisition task, data processing task, communication task, and storage task, and transfers the selected task to the target processor with the lowest load rate, thus obtaining the load balancing task redistribution result. Based on the load balancing task redistribution results, MCU1 generates a task execution plan that includes the specific task division of each processor. According to the task execution plan, the electricity consumption data, load status data, and electrical parameter data are stored in different priority areas of the EEPROM to complete the differentiated data protection of three-phase coordination.

[0037] Specifically, the generated switching control code is encapsulated into a three-phase processor collaborative switching instruction and simultaneously broadcast to MCU2 and MCU3 through a pre-set communication channel within the system. This communication channel is a high-speed differential bus, SPI parallel port, or DMA-based on-chip shared data link, implementing a one-to-many data distribution mechanism through a multi-master bus structure or broadcast synchronization logic. This communication process employs synchronous frame header identification and frame tail verification to ensure the instruction is structurally complete, content-correct, and received without errors during transmission. Upon receiving the collaborative switching instruction, MCU2 and MCU3 parse the instruction content, identify the current operating mode to be switched, and quickly complete the state switch from normal operation mode to emergency protection mode based on the functional role of their respective processors and the current task status. This process includes pausing non-critical tasks, refreshing the local buffer, adjusting data channel priority, and activating the local EEPROM write channel. After the mode switch is completed, an acknowledgment response signal is generated, containing an acknowledgment flag and timestamp information, and returned to MCU1 through a bidirectional communication channel. After receiving the dual acknowledgment signals from MCU2 and MCU3, MCU1 completes the closed-loop confirmation of the execution status of this round of collaborative switching instructions and enters the load assessment and task reallocation phase. During this phase, MCU1 uses the resource monitoring module to read key operational metrics of itself and the three processors (MCU2 and MCU3) in real time, primarily including CPU utilization, memory utilization, and task queue length. Based on these parameters, MCU1 quantitatively assesses the current load of each processor and calculates its overall processor load rate. MCU1 averages these three load rates to obtain the overall system load level and compares each processor's current load rate with the average load rate. If any processor's load rate exceeds 120% of the average, it is considered overloaded, triggering a task transfer mechanism. Conversely, if all processor load rates are within 120% of the average, the system determines that the current task scheduling structure is stable and reliable, requiring no reallocation and maintaining the original task distribution. When task transfer is deemed necessary, MCU1 prioritizes the task queues of the overloaded processors, allocating priority based on task timeliness and importance: data acquisition tasks, data processing tasks, communication tasks, and storage tasks. Based on this, the system selects the task with the greatest current load impact from the task queue according to the processor resource usage intensity of each task, marks it as a task to be transferred, and finds the target processor with the lowest current system load as the receiver. The system then transfers the task's logic and the mapping information of its dependent data paths to the target processor. After the task transfer is completed, the system generates a new task allocation table and uses this table to form the load balancing task redistribution result.Based on the task redistribution results, MCU1 generates a task execution plan covering the three-phase processors. This plan clarifies the task type, processing priority, and data writing order that each processor needs to execute in the current operating mode, and simultaneously sets the cache refresh strategy and EEPROM write blocks. This plan is synchronously distributed to MCU2 and MCU3 and stored locally through a predefined scheduling protocol to ensure consistent data writing operation logic for the three-phase processors during power failure protection. Under the guidance of this execution plan, MCU1, MCU2, and MCU3 perform differentiated storage control according to data priority. Electricity consumption data, being the most critical in the metering and billing system, is prioritized for writing to the first segment of the EEPROM, allocating the largest bandwidth. Load status data, as an important reference for system operation judgment and subsequent strategy generation, is given medium priority and stored in the second segment. Electrical parameter data, mainly used for analysis and anomaly assessment, has the lowest priority and is written to the last segment. Throughout the data writing process, the system adopts a time-division multiplexing and polling writing mechanism, combined with EEPROM page rotation technology, to avoid data duplication and excessive number of erase / write cycles, extending memory life and improving data writing success rate. The three-phase processor completes the writing and synchronization protection of differentiated data according to a unified task execution scheme, and safely stores the critical data before the actual power failure risk occurs.

[0038] In one specific embodiment, the process of executing step MCU1 to monitor the CPU utilization, memory utilization, and task queue length of MCU1, MCU2, and MCU3 respectively, and calculating the processor load rate corresponding to MCU1, MCU2, and MCU3 can specifically include the following steps: MCU1 reads the CPU running clock count and idle clock count by accessing the system counter registers of each processor, calculates the percentage of CPU running clock count to total clock count, and obtains the CPU utilization of MCU1, MCU2, and MCU3. MCU1 reads the memory allocation table of each processor to obtain the allocated memory size and total memory size, calculates the percentage of allocated memory to total memory, and obtains the memory utilization rate of MCU1, MCU2, and MCU3. At the same time, it reads the ready queue of the task scheduler to obtain the number of tasks currently waiting to be executed, and obtains the task queue length of MCU1, MCU2, and MCU3. Keep the CPU utilization and memory utilization at their original values, divide the task queue length by the maximum queue capacity of 32 and multiply by 100 to convert it into a percentage format, and obtain the three standardized monitoring values ​​of MCU1, MCU2 and MCU3. MCU1 performs a weighted summation of the three standardized monitoring values ​​to calculate the processor load rates corresponding to MCU1, MCU2, and MCU3 respectively.

[0039] Specifically, MCU1 accesses the counter resources in the performance monitoring module or hardware status register embedded in each processor system to read the running clock count, representing the actual CPU activity state, and the idle clock count, representing the idle state. The running clock count records the total system clock cycles consumed by the processor during task execution, while the idle clock count indicates the accumulated clock count during idle or low-power waiting states. By calculating the ratio between the running clock count and the total clock count (the sum of the running clock count and the idle clock count), the CPU utilization rate of MCU1, MCU2, and MCU3 at the current time is obtained. This utilization rate reflects the actual intensity of each processor's use of its own computing resources. MCU1 accesses the local memory resource management modules of MCU2 and MCU3 through the master-slave control link, reads the total currently allocated memory space from their memory allocation tables, and obtains the total available memory capacity under the system initialization configuration. By dividing the currently allocated memory space by the total available memory capacity, the current memory utilization rate of each processor is obtained. This ratio directly reflects the degree of dependence on static resources and resource allocation pressure during operation, helping to identify memory critical states, stack overflow risks, and memory fragmentation trends. Simultaneously, to complete the evaluation of the processor's current load status, MCU1 synchronously accesses the task scheduler modules connected to each processor and reads the number of tasks currently waiting to be scheduled from their task ready queues. The ready queue records the number of all task nodes that have not yet been allocated processing time slices but are ready to run, directly reflecting changes in system scheduling pressure and response latency. Since the ready queue has a physical upper limit, to standardize the measurement method, MCU1 divides the acquired number of tasks by the maximum queue capacity of 32 and multiplies it by 100%, converting it into a standardized percentage format. After the above three key performance indicators are obtained in a standardized form and formatted into a uniform percentage unit, MCU1 performs a weighted summation operation on the CPU utilization, memory utilization, and standardized task queue length of the three processors MCU1, MCU2, and MCU3. To ensure that the weighting of different metrics in the comprehensive calculation accurately reflects the actual system load characteristics, MCU1 assigns a weight value to each metric based on the pre-defined weighting configuration during system design. For example, CPU utilization is given a high weight to reflect its dominant role in system operating pressure, memory utilization is given a medium weight to reflect its impact on data processing capabilities, and task queue length is given an appropriate weight to account for the contribution of scheduling backlog to system response latency. During the weighted summation process, MCU1 multiplies the metric value by its corresponding weight, calculates the three parts sequentially, and then sums them up. The final result is the comprehensive processor load rate for the three processors MCU1, MCU2, and MCU3, which fluctuates between 0 and 100 and is updated in real time according to the system operating status.

[0040] In one specific embodiment, the execution steps, which store the electricity consumption data, load status data, and electrical parameter data into different priority areas of the EEPROM according to the task execution plan, and complete the process of three-phase coordinated differentiated data protection, can specifically include the following steps: Based on the processor task allocation in the task execution plan, MCU1 allocates 80% of its storage bandwidth to power consumption data, 15% to load status data, and 5% to power parameter data, establishing a three-level priority storage bandwidth allocation scheme. Based on a three-level priority storage bandwidth allocation scheme, the EEPROM is divided into three dedicated storage areas, resulting in different priority areas of the EEPROM. A circular storage block is established in each different priority area, and data is stored using a polling method while controlling the number of erases for each storage block, forming a circular buffer storage mechanism; According to the timing arrangement of the task execution plan, MCU1, MCU2, and MCU3 write the collected electricity value data, load status data, and electrical parameter data into the corresponding priority area through the circular buffer storage mechanism to complete the differentiated data protection of three-phase coordination.

[0041] Specifically, based on the functional task division of MCU1, MCU2, and MCU3 in the task execution plan, MCU1 clarifies the source path, data generation frequency, and relative importance of three types of data—electricity consumption data, load status data, and electrical parameter data—within the current task cycle. Through preset priority configuration, MCU1 allocates 80% of its storage bandwidth resources for writing electricity consumption data. This type of data is absolutely crucial in billing, settlement, and auditing; the loss of any set of electricity consumption data will cause metering errors or deviations in electricity bill calculations, thus giving it the highest storage priority. 15% of the storage bandwidth is allocated to load status data, which serves as a key reference variable for system behavior prediction, power outage response determination, and scheduling optimization strategies. Electrical parameter data, such as current, voltage, and power factor, have a high update frequency but low instantaneous value, occupying only 5% of the storage bandwidth for recording typical characteristic points or abnormal transients. After configuring the bandwidth ratio, MCU1 divides the system's built-in EEPROM logical space into three non-overlapping dedicated storage areas according to the three-level priority storage bandwidth allocation scheme. The first address range is designated as a dedicated storage area for electricity value data, occupying 80% of the entire EEPROM capacity; the middle range is designated as a load status data storage area, allocating 15% of the physical storage space; and the last range is set as an electrical parameter data buffer, occupying the remaining 5% of the capacity space. To improve the efficiency of EEPROM write operations and the controllability of data management, each priority area is further subdivided into several circular storage blocks. The size of each circular block is configured according to the typical byte structure of the data type and the write frequency. For example, the electricity value block is set to 64 bytes, while the load status and electrical parameter blocks are set to 32-byte or 16-byte structures. In terms of the write mechanism, a polling strategy is adopted to write to each memory block sequentially. When the last memory block is full, it automatically returns to the first block for overwriting. Combined with the page erase mechanism, the target block is erased before the polling write. MCU1 is responsible for maintaining the erase counter for each block, ensuring that the total number of erases per block is controlled below the write endurance limit allowed by the EEPROM, for example, a maximum of 100,000 erases per block. This forms a circular buffer storage mechanism with write-erase balancing and erase lifespan protection capabilities. Based on this storage structure, MCU1, through the scheduling control module, broadcasts data write trigger signals to MCU2 and MCU3 according to the timing arrangement of the task execution plan, indicating the type of data write task and the target area to be completed by each processor within the current time window. MCU2 and MCU3, according to their assigned task roles, collect information such as the electricity value, transient load status, or local electrical parameters of phases A and B, and write various types of data into the current circular block of the corresponding priority area according to the storage control instructions.During this process, MCU1 continues to play a coordinating role, monitoring the write status of the three-phase processors. It determines whether the data write is successful through interrupt signals or write confirmation flags, and performs data integrity checks on all write operations, such as using CRC checks or fixed header and footer structures to confirm write validity, avoiding data structure corruption caused by write interruptions, system resets, or voltage drops. In the differentiated data protection mechanism jointly executed by the three-phase processors, the write cycle for each type of data is set with different update frequencies according to its priority. For example, electricity consumption data needs to be recorded as completely as possible before a power outage, so the write cycle is set to 250 milliseconds; load status data is written once every 500 milliseconds according to the state switching rhythm; electrical parameter data is only written when there are fluctuations or flag changes, using threshold change-driven or event-triggered mechanisms to execute write commands.

[0042] The above describes the load state assessment method for electricity meters in embodiments of the present invention. The following describes the load state assessment system for electricity meters in embodiments of the present invention. Please refer to [link to relevant documentation]. Figure 2 One embodiment of the load status assessment system for electricity meters in this invention includes: The acquisition module 201 is used to acquire the first current difference between MCU1 and MCU2, the second current difference between MCU2 and MCU3, and the A-phase reference voltage value of MCU1 in the energy meter. Prediction module 202 is used to perform three-phase correlation prediction based on the first current difference, the second current difference and the A-phase reference voltage value to obtain the predicted value of the three-phase load for the next cycle; Comparison module 203 is used to compare the predicted three-phase load value for the next cycle with the load switching threshold to determine the load status level identifier; The generation module 204 is used to select the corresponding power-down switching strategy and generate a three-phase processor collaborative switching instruction when the power-down detection circuit outputs a target power-down signal; The storage module 205 is used to receive the three-phase processor coordinated switching instruction, and then MCU1, MCU2 and MCU3 create corresponding task execution schemes and store them in different priority areas of EEPROM to complete the differentiated data protection of the three-phase coordination.

[0043] Through the collaborative efforts of the aforementioned components, and by establishing a differential current parallel sampling channel among MCU1, MCU2, and MCU3, employing a 64-byte double-buffering mechanism and clock synchronization circuit, the data acquisition process, which originally required three serial reading cycles, is compressed into one sampling cycle, effectively eliminating the impact of traditional serial bus communication delays on load status prediction. A three-phase correlation prediction model is adopted, calculating the correlation between the current differences between MCU1 and MCU2, the current differences between MCU2 and MCU3, and the A-phase reference voltage value. Compared to traditional single-phase independent prediction methods, this model more accurately captures the inherent correlation between three-phase electrical parameters, significantly improving the accuracy of load status prediction. Based on a 47V regulated voltage reference, a dynamic threshold adjustment mechanism dynamically calculates the load switching threshold by real-time monitoring of voltage deviation and rate of change, overcoming the shortcomings of traditional fixed threshold judgment methods that cannot adapt to power supply voltage fluctuations, and improving the reliability of load status determination. A dual-judgment mechanism using a 40V target power-down signal and load status level indicator, combined with the CMD_SWITCH collaborative switching instruction and a 200μs acknowledgment feedback mechanism, achieves highly reliable collaborative switching of the three-phase processors, ensuring timely response to power-down events under various load conditions. A load balancing algorithm based on CPU utilization, memory utilization, and task queue length is employed. When the processor load exceeds 120% of the average, task transfer is automatically executed, redistributing tasks according to the priority order of data acquisition, data processing, communication, and storage, fully leveraging the advantages of multi-processor collaborative work. A three-level priority storage mechanism is established: 80% for electricity value data, 15% for load status data, and 5% for electrical parameter data. Combined with circular buffer technology and a polling storage method using eight 256-byte storage blocks, this ensures priority protection of important data while effectively controlling the number of EEPROM erases, extending memory lifespan. Through the comprehensive collaborative work of the three-phase processors, the entire process from data acquisition, load prediction, status determination to power-down protection is collaboratively controlled.

[0044] Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the specific working processes of the systems and units described above can be referred to the corresponding processes in the foregoing method embodiments, and will not be repeated here.

[0045] If the integrated unit is implemented as a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, in essence, or the part that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a load status assessment device for an electricity meter (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of the present invention. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0046] The above-described embodiments are only used to illustrate the technical solutions of the present invention, and are not intended to limit it. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A load state assessment method for an electric energy meter, characterized by, The method comprises the following steps: obtaining a first current difference value between MCU1 and MCU2, a second current difference value between MCU2 and MCU3, and an A-phase reference voltage value of MCU1 in an electric energy meter; performing three-correlation prediction based on the first current difference value, the second current difference value, and the A-phase reference voltage value to obtain a three-phase load prediction value in a next period; comparing the three-phase load prediction value in the next period with a load switching threshold to determine a load state level identifier; when a target power-down signal is output by a power-down detection circuit, selecting a corresponding power-down switching strategy according to the load state level identifier and generating a three-phase processor cooperative switching instruction; after receiving the three-phase processor cooperative switching instruction, MCU1, MCU2, and MCU3 create a corresponding task execution scheme and store it in different priority areas of an EEPROM to complete the differential data protection of three-phase cooperation.

2. The load state evaluation method for an electric energy meter according to claim 1, wherein The method of obtaining the first current difference value between MCU1 and MCU2, the second current difference value between MCU2 and MCU3, and the A-phase reference voltage value of MCU1 in the electric energy meter comprises the following steps: The MCU1 in the electric energy meter is set as a main controller, the main controller is responsible for cooperative control logic, the MCU2 is set as an A-phase processor and the MCU3 is set as a B-phase processor, and the MCU1 is configured as a main frequency , the sampling frequency of the MCU2 and the MCU3 is . establishing a differential data buffer area among MCU1, MCU2, and MCU3, wherein the size of the differential data buffer area is 64 bytes and a double buffering mechanism is adopted to form a differential current parallel sampling channel; aligning the sampling time sequence of MCU1, MCU2, and MCU3 accurately through a clock synchronization circuit to ensure that the three-phase processors synchronously collect current data at the current time; MCU1 reads current data at the current time from the differential current parallel sampling channel, calculates the first current difference value between MCU1 and MCU2 and the second current difference value between MCU2 and MCU3, and collects the A-phase reference voltage value of MCU1.

3. The load status evaluation method for an electric energy meter according to claim 1, characterized by, The method of performing three-correlation prediction based on the first current difference value, the second current difference value, and the A-phase reference voltage value to obtain a three-phase load prediction value in a next period comprises the following steps: summing the absolute values of the first current difference value and the second current difference value to obtain a target absolute value; when the target absolute value is less than a preset threshold, determining that it is a three-phase balanced load mode and setting weight coefficients α, β, and γ as 0.3, 0.3, and 0.4 respectively, and when the target absolute value is greater than or equal to the preset threshold, determining that it is a three-phase unbalanced load mode and setting weight coefficients α, β, and γ as 0.6, 0.4, and 0.8 respectively; performing first item weighted calculation on the first current difference value using the weight coefficient α to obtain a first item weighted calculation result, performing second item weighted calculation on the second current difference value using the weight coefficient β to obtain a second item weighted calculation result, and performing third item weighted calculation on the A-phase reference voltage value using the weight coefficient γ to obtain a third item weighted calculation result; MCU1 adopts a 16-bit fixed-point operation mode and outputs a three-phase load prediction value in a next period according to the first item weighted calculation result, the second item weighted calculation result, and the third item weighted calculation result.

4. The load state evaluation method for an electric energy meter according to claim 3, wherein The method of MCU1 adopting a 16-bit fixed-point operation mode and outputting a three-phase load prediction value in a next period according to the first item weighted calculation result, the second item weighted calculation result, and the third item weighted calculation result comprises the following steps: MCU1 converts the first, second and third weighted calculation results into 16-bit fixed-point number formats respectively to obtain a first, second and third 16-bit fixed-point weighted values; MCU1 performs item-by-item accumulation summation operation on the first, second and third 16-bit fixed-point weighted values according to the fixed-point operation rules, checks the carry flag after each accumulation to obtain a 16-bit fixed-point summation operation result; When the 16-bit fixed-point summation operation result exceeds the 16-bit value range, MCU1 performs saturation processing to limit the 16-bit fixed-point summation operation result to the maximum value, and when the 16-bit fixed-point summation operation result is within the 16-bit value range, the original value is maintained to obtain a modified 16-bit fixed-point operation result; MCU1 restores the modified 16-bit fixed-point operation result according to the 8-bit integer part and the 8-bit decimal part, and converts and outputs it as the next cycle three-phase load prediction value.

5. The load status evaluation method for an electric energy meter according to claim 1, characterized by, The comparison of the next cycle three-phase load prediction value with the load switching threshold value to determine the load state level identifier includes: MCU1 acquires the current voltage value of the power-down detection circuit through a 12-bit ADC, calculates the voltage deviation value of the current voltage value from the 47V stable voltage reference and the voltage change rate; The load switching threshold value is dynamically calculated based on the voltage deviation value and the voltage change rate; The next cycle three-phase load prediction value is compared with the load switching threshold value, and when the next cycle three-phase load prediction value is less than the load switching threshold value, the load state level identifier is determined to be a light load state level, when the next cycle three-phase load prediction value is greater than or equal to the load switching threshold value and less than twice the load switching threshold value, the load state level identifier is determined to be a medium load state level, and when the next cycle three-phase load prediction value is greater than or equal to twice the load switching threshold value, the load state level identifier is determined to be a heavy load state level.

6. The load state evaluation method for an electric energy meter according to claim 5, wherein When the power-down detection circuit outputs a target power-down signal, the corresponding power-down switching strategy is selected according to the load state level identifier, and a three-phase processor cooperative switching instruction is generated, including: MCU1 detects the target power-down signal output by the power-down detection circuit and reads the load state level identifier; When the target power-down signal is high and the load state level identifier is a heavy load state level, the power-down switching strategy generated is an immediate switching strategy, when the target power-down signal is high and the load state level identifier is a light load state level, the power-down switching strategy generated is a delayed switching strategy, and when the target power-down signal is low, the power-down switching strategy generated is a normal mode strategy; According to the power-down switching strategy, MCU1 generates a corresponding switching control code, and MCU1 encapsulates the switching control code as a three-phase processor cooperative switching instruction.

7. The load state evaluation method for an electric energy meter according to claim 6, wherein The receiving the three-phase processor cooperative switching instruction, MCU1, MCU2, MCU3 creates a corresponding task execution scheme and stores it in the different priority areas of EEPROM, completing the three-phase cooperative differentiated data protection, including: The three-phase processor cooperative switching instruction is sent to MCU2 and MCU3 through a preset communication channel; After receiving the three-phase processor cooperative switching instruction, MCU2 and MCU3 complete the mode switching operation and generate a confirmation signal feedback to MCU1, and MCU1 receives the dual-channel confirmation signal and confirms that the cooperative switching instruction execution is completed; MCU1 monitors the CPU utilization, memory usage and task queue length of MCU1, MCU2 and MCU3, and calculates the processor load rate of MCU1, MCU2 and MCU3; According to the average load rate calculated from the processor load rate, when any processor load rate of MCU1, MCU2 and MCU3 exceeds 120% of the average load rate, it is determined that task transfer operation needs to be performed, and when all processor load rates are within 120% of the average load rate, the current task allocation is maintained; MCU1 selects the transfer task type according to the priority order of data acquisition task, data processing task, communication task and storage task for the processor that needs to perform task transfer operation, and transfers the selected task to the target processor with the lowest load rate to obtain the load balancing task reallocation result; Based on the load balancing task reallocation result, MCU1 generates a task execution scheme containing the specific task allocation of each processor; According to the task execution scheme, the watt-hour value data, load state data and electrical parameter data are stored in different priority areas of EEPROM, completing the three-phase cooperative differentiated data protection.

8. The load state evaluation method for an electric energy meter according to claim 7, wherein The MCU1 monitors the CPU utilization, memory usage and task queue length of MCU1, MCU2 and MCU3, and calculates the processor load rate of MCU1, MCU2 and MCU3, including: MCU1 reads the CPU runtime clock number and idle clock number by accessing the system counter register of each processor, calculates the percentage of CPU runtime clock number to total clock number, and obtains the CPU utilization of MCU1, MCU2 and MCU3; MCU1 reads the memory allocation table of each processor to obtain the allocated memory size and total memory size, calculates the percentage of allocated memory to total memory, and obtains the memory usage of MCU1, MCU2 and MCU3, and reads the ready queue of the task scheduler to obtain the number of tasks currently waiting for execution, and obtains the task queue length of MCU1, MCU2 and MCU3; The CPU utilization, memory usage and task queue length are kept as the original values, the task queue length is divided by the maximum queue capacity 32 and multiplied by 100 to convert to percentage format, and the three standardized monitoring values of MCU1, MCU2 and MCU3 are obtained; MCU1 performs weighted summation on the three standardized monitoring values to calculate the processor load rate of MCU1, MCU2 and MCU3, respectively.

9. The load state evaluation method for an electric energy meter according to claim 8, wherein The electricity value data, the load state data and the electric parameter data are stored in different priority areas of the EEPROM according to the task execution scheme, and three-phase coordinated differentiated data protection is completed, including: According to the processor task division in the task execution scheme, MCU1 allocates 80% of the storage bandwidth to the electricity value data, 15% of the storage bandwidth to the load state data, and 5% of the storage bandwidth to the electric parameter data, and establishes a three-level priority storage bandwidth allocation scheme; Based on the three-level priority storage bandwidth allocation scheme, the EEPROM is divided into three special storage areas, and different priority areas of the EEPROM are obtained; A circulating storage block is established in each of the different priority areas, and a polling method is used for data storage and control of the number of erasures of each storage block, forming a circulating buffer storage mechanism; MCU1, MCU2 and MCU3 write the electricity value data, the load state data and the electric parameter data collected by them into the corresponding priority areas through the circulating buffer storage mechanism according to the time sequence arrangement of the task execution scheme, and complete three-phase coordinated differentiated data protection.

10. A load status assessment system for an electric energy meter, characterized by A load state evaluation method for an electric energy meter is implemented, including: An acquisition module is configured to acquire a first current difference between MCU1 and MCU2, a second current difference between MCU2 and MCU3, and an A-phase reference voltage value of MCU1 in the electric energy meter; A prediction module is configured to perform three-associated prediction based on the first current difference, the second current difference and the A-phase reference voltage value to obtain a three-phase load prediction value in a next cycle; A comparison module is configured to compare the three-phase load prediction value in the next cycle with a load switching threshold to determine a load state level identifier; A generation module is configured to select a corresponding power-down switching strategy according to the load state level identifier and generate a three-phase processor coordinated switching instruction when a target power-down signal is output by a power-down detection circuit; A storage module is configured to create a corresponding task execution scheme for MCU1, MCU2 and MCU3 and store the task execution scheme in different priority areas of an EEPROM after receiving the three-phase processor coordinated switching instruction, and complete three-phase coordinated differentiated data protection.

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