Array substrate, electronic paper display and driving method

Abstract

The invention discloses an array substrate, an electronic paper display and a driving method, a first surface of the array substrate is provided with a first touch wire, a scanning line, a data line, a thin film transistor, a pixel electrode and a first common electrode, and the first common electrode is located on one side, close to the array substrate, of the pixel electrode and electrically connected with the first touch wire; the second surface of the array substrate is provided with a second touch wire, the extension directions of the first touch wire and the second touch wire are perpendicular to each other, and the first touch wire and the first common electrode form a touch capacitor with the second touch wire. A first touch control wire and a second touch control wire are arranged on the two opposite sides of an array substrate respectively, the first touch control wire is electrically connected with a first common electrode, and the first touch control wire and the first common electrode form a touch control capacitor with the second touch control wire, so that the first common electrode can be reused as a touch control electrode; the mask technology of a mutual capacitance touch control mode is reduced, and the manufacturing cost and the thickness of the array substrate are reduced.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of display, in particular to an array substrate, an electronic paper display and a driving method. BACKGROUND

[0002] The display panel has the advantages of lightness, thinness, durability, low power consumption and compliance with energy saving and environmental protection, but needs to be used with a backlight source, resulting in a thick module and high cost. The electronic paper display (reflective display) becomes a display that meets the needs of the public. The electronic paper display can display images using external light sources, unlike liquid crystal displays that require a backlight source. Therefore, in an outdoor environment with strong sunlight, the information on the electronic paper can still be clearly seen without the problem of viewing angle. In addition, the electronic paper display has the advantages of power saving, high reflectivity and contrast ratio, and is now widely used in electronic readers (such as electronic books and electronic newspapers) or other electronic components (such as price tags).

[0003] The existing electronic paper display usually adopts E-Ink microcapsule technology (microcapsule electronic ink technology), SiPix microcup technology (microcup type electrophoretic display technology), Bridgestone electronic liquid powder technology, cholesteric liquid crystal display (CLCD) technology, micro-electro-mechanical system (MEMS) technology or electrowetting technology. However, the existing electronic paper display technology is not very mature compared to liquid crystal display technology, has low mass production efficiency and relatively high manufacturing cost. Moreover, since the existing electronic paper display forms a vertical electric field between the pixel electrode and the common electrode to realize picture control, the existing electronic paper display cannot usually realize the In-cell self-capacitive touch mode, i.e. the self-capacitive touch electrode cannot be arranged on the array substrate. If the self-capacitive touch electrode is arranged on the array substrate, it will interfere with the pixel electrode and the common electrode, either the touch function cannot be realized or the display quality is poor. Moreover, the self-capacitive touch mode is only suitable for small-size electronic paper displays. For large-size electronic paper displays, the self-capacitive touch mode requires more and longer signal lines, more and larger impedance pads, resulting in poor touch effect. Therefore, the existing large-size electronic paper display usually adopts the On-cell mutual-capacitive touch mode. This On-cell mutual-capacitive touch mode requires the addition of 4 mask processes, which is high in cost and thick in box thickness, and is not conducive to the development of lightness and thinness. SUMMARY

[0004] In order to overcome the shortcomings and deficiencies existing in the prior art, the present application aims to provide an array substrate, an electronic paper display and a driving method, so as to solve the problems of high cost and thick box thickness of the On-cell mutual-capacitive touch mode of the large-size electronic paper display in the prior art.

[0005] The object of the present application is achieved by the following technical solutions: The present application provides an array substrate, which has a first surface and a second surface arranged oppositely. The first surface of the array substrate is provided with a plurality of first touch wires, a plurality of scan lines, a plurality of data lines, a plurality of thin film transistors, a plurality of pixel electrodes and a plurality of first common electrodes. The plurality of scan lines and the plurality of data lines are insulated and crossed with each other to define a plurality of pixel units. Each of the pixel units is provided with the thin film transistor, the pixel electrode and the first common electrode. The pixel electrode is electrically connected with the scan line and the data line adjacent to the thin film transistor through the thin film transistor. The first common electrode is located on the side of the pixel electrode close to the array substrate and is electrically connected with the first touch wire. The second surface of the array substrate is provided with a plurality of second touch wires. The first touch wires and the second touch wires are perpendicular to each other in the extending direction. The first touch wires and the first common electrodes form touch capacitors with the second touch wires. One of the first touch wires and the second touch wires is a touch driving electrode, and the other is a touch sensing electrode.

[0006] Further, the first touch wires and the scan lines are located in the same layer and are made by the same mask process. The extending directions of the first touch wires and the scan lines are parallel to each other.

[0007] Further, the first common electrode is arranged on the side of the first touch wire close to the array substrate and directly contacts the surface of the first touch wire. The first touch wires, the scan lines and the first common electrodes are made by the same half-mask process, or the first common electrode is made by a separate mask process.

[0008] Further, the first common electrode is arranged on the side of the first touch wire close to the pixel electrode and is spaced apart from the first touch wire by a first insulating layer. The first common electrode is conductively connected with the first touch wire through a contact hole. The first common electrode and the data lines are made by the same half-mask process, or the first common electrode is made by a separate mask process.

[0009] Further, the first touch wire and the data line are located in the same layer and are manufactured by using the same mask process, and the extension directions of the first touch wire and the data line are parallel to each other.

[0010] Further, the first common electrode is arranged on the side of the first touch wire close to the array substrate and directly contacts the surface of the first touch wire. The first touch wire, the data line and the first common electrode are manufactured by using the same half mask process, or the first common electrode is manufactured by using a separate mask process.

[0011] Further, the first common electrode is arranged on the side of the first touch wire close to the array substrate and is spaced from the first touch wire by a first insulating layer, and the first common electrode and the first touch wire are conductively connected through a contact hole. The first common electrode and the scan line are manufactured by using the same half mask process, or the first common electrode is manufactured by using a separate mask process.

[0012] Further, the first common electrode and the active layer are located in the same layer and are manufactured by using the same mask process.

[0013] The application further provides an electronic paper display, which comprises the array substrate as described above, an opposite substrate arranged opposite to the array substrate, and ink capsules located between the array substrate and the opposite substrate, all the ink capsules are provided with black particles and white particles of opposite polarity, the array substrate is located on the side of the electronic paper display close to the external environment, the first surface of the array substrate faces the ink capsules, and the opposite substrate is provided with a second common electrode matched with the pixel electrode.

[0014] The application further provides a driving method of an electronic paper display, which is used for driving the electronic paper display as described above, and the driving method comprises the following steps. In a display period, the first touch wire applies a common voltage signal to the first common electrode to form a storage capacitor with the pixel electrode. In a touch period, the first touch wire applies a touch signal to the first common electrode to form a touch capacitor with the second touch wire.

[0015] The present application has the advantages that: by arranging the first touch wire and the second touch wire on opposite sides of the array substrate respectively, and electrically connecting the first touch wire with the first common electrode, the first touch wire and the first common electrode both form a touch capacitor with the second touch wire, so that the first common electrode forms a storage capacitor between the pixel electrode in the display period, and can be reused as a touch electrode in the touch period, thereby reducing the mask process of mutual-capacitance touch, and reducing the manufacturing cost and the thickness of the array substrate. BRIEF DESCRIPTION OF DRAWINGS

[0016] Figure 1 is a structural schematic diagram of an electronic paper display in an initial state according to an embodiment of the present application.

[0017] Figure 2 is a structural schematic diagram of pixel arrangement according to an embodiment of the present application.

[0018] Figure 3 is a planar structural schematic diagram of a pixel region according to an embodiment of the present application.

[0019] Figure 4 is a sectional structural schematic diagram of a pixel region according to an embodiment of the present application.

[0020] Figure 5 is a planar structural schematic diagram of a touch electrode according to an embodiment of the present application.

[0021] Figure 6 is a structural schematic diagram of an electronic paper display in a black state according to an embodiment of the present application.

[0022] Figure 7 is a structural schematic diagram of an electronic paper display in a white state according to an embodiment of the present application.

[0023] Figure 8 is a structural schematic diagram of an electronic paper display in a picture display state according to an embodiment of the present application.

[0024] Figure 9 is a sectional structural schematic diagram of a pixel region according to an embodiment of the present application.

[0025] Figure 10 is a planar structural schematic diagram of a pixel region according to an embodiment of the present application.

[0026] Figure 11 is a sectional structural schematic diagram of a pixel region according to an embodiment of the present application.

[0027] Figure 12 is a planar structural schematic diagram of a pixel region according to an embodiment of the present application.

[0028] Figure 13This is the second schematic diagram of the cross-sectional structure of a pixel region in Embodiment 3 of the present invention.

[0029] Figure 14 This is a schematic diagram of the cross-sectional structure of a pixel region in Embodiment 4 of the present invention.

[0030] Figure 15 This is a schematic diagram of the planar structure of a pixel region in Embodiment 4 of the present invention.

[0031] Figure 16 This is a schematic diagram of the cross-sectional structure of a pixel region in Embodiment 5 of the present invention.

[0032] Figure 17 This is a schematic diagram of the planar structure of a pixel region in Embodiment 5 of the present invention.

[0033] Figure 18 This is a schematic diagram of the cross-sectional structure of a pixel region in Embodiment Six of the present invention.

[0034] Figure 19 This is a schematic diagram of the planar structure of a pixel region in Embodiment Six of the present invention. Detailed Implementation

[0035] To further illustrate the technical means and effects adopted by the present invention to achieve the intended purpose, the following detailed description, in conjunction with the accompanying drawings and preferred embodiments, provides a detailed explanation of the specific implementation methods, structures, features, and effects of the array substrate, electronic paper display, and driving method proposed according to the present invention: [Example 1] Figure 1 This is a schematic diagram of the electronic paper display in its initial state according to Embodiment 1 of the present invention. Figure 2 This is a schematic diagram of the pixel arrangement in Embodiment 1 of the present invention. Figure 3 This is a schematic diagram of the planar structure of a pixel region in Embodiment 1 of the present invention. Figure 4 This is a schematic diagram of the cross-sectional structure of a pixel region in Embodiment 1 of the present invention. Figure 5 This is a schematic diagram of the planar structure of the touch electrode in Embodiment 1 of the present invention.

[0036] like Figures 1 to 5 As shown, an array substrate 10 is provided in Embodiment 1 of the present invention. The array substrate 10 has a first surface and a second surface that are disposed opposite to each other. For example, the first surface is the lower surface of the array substrate 10 and the second surface is the upper surface of the array substrate 10 (the side facing the external environment).

[0037] The first surface of the array substrate 10 is provided with a plurality of first touch wires X1, a plurality of scan lines 111, a plurality of data lines 131, a plurality of thin film transistors 1, a plurality of pixel electrodes 141 and a plurality of first common electrodes 151. The plurality of scan lines 111 and the plurality of data lines 131 are insulated and crossed with each other to define a plurality of pixel units P. Each pixel unit P is provided with a thin film transistor 1, a pixel electrode 141 and a first common electrode 151. The pixel electrode 141 is electrically connected to the scan line 111 and the data line 131 adjacent to the thin film transistor 1 through the thin film transistor 1. The first common electrode 151 is located on the side of the pixel electrode 141 close to the array substrate 10 and is electrically connected to the first touch wire X1. The thin film transistor 1 includes a gate 112, an active layer 121, a source 132 and a drain 133. The gate 112 is located in the same layer as the scan line 111 and is electrically connected to the scan line 111. The gate 112 is insulated from the active layer 121 by a first insulating layer 101 (gate insulating layer). The source 132 is located in the same layer as the data line 131 and is electrically connected to the data line 131. The drain 133 is electrically connected to the pixel electrode 141 through a contact hole (a second insulating layer 102 is opened in the drain 133 area and forms the contact hole). The scan line 111 and the gate 112 are both made of a first metal layer 11 Figure 3 ), the data line 131, the source 132 and the drain 133 are all made of a second metal layer 13 Figure 3 ), and the pixel electrode 141 is made of a first transparent conductive layer 14 Figure 3 ). The gate 112 can shield the active layer 121 from environmental radiation to reduce the leakage current.

[0038] The second surface of the array substrate 10 is provided with a plurality of second touch wires X2. The first touch wire X1 and the second touch wire X2 extend in directions perpendicular to each other. The first touch wire X1 and the first common electrode 151 both form a touch capacitor with the second touch wire X2. One of the first touch wire X1 and the second touch wire X2 is a touch driving electrode (TX), and the other is a touch sensing electrode (RX). For example, the first touch wire X1 is the touch driving electrode, and the second touch wire X2 is the touch sensing electrode. Of course, the first touch wire X1 can also be the touch sensing electrode, and the second touch wire X2 can be the touch driving electrode. The second touch wire X2 can also be covered with a third insulating layer 103 to protect the second touch wire X2. The pixel electrode 141 and the first common electrode 151 form a storage capacitor when displaying a picture. The first touch wire X1 applies a touch signal to the first common electrode 151 to form a touch capacitor with the second touch wire X2 when touching. By electrically connecting the first common electrode 151 to the first touch wire X1, the first common electrode 151 can be reused as a touch electrode, increasing the capacitance of the touch capacitor and improving the touch effect.

[0039] In the embodiment, the first common electrode 151 is in a block structure and corresponds to the pixel unit P one by one, that is, one pixel unit P is provided with one first common electrode 151. Of course, in other embodiments, the first common electrode 151 can also be in a strip structure and arranged in parallel with the first touch trace X1.

[0040] In the embodiment, the first touch trace X1 and the scan line 111 are located in the same layer and are manufactured by using the same mask process, and the extension directions of the first touch trace X1 and the scan line 111 are parallel to each other. Specifically, the first surface of the array substrate 10 is provided with a patterned first metal layer 11, and the first metal layer 11 includes the first touch trace X1, the scan line 111 and the gate 112. By etching the first touch trace X1 and the scan line 111 from the first metal layer 11, the number of mask processes can be reduced, the manufacturing cost can be reduced, and the thickness of the array substrate 10 can be reduced.

[0041] Further, the first common electrode 151 is arranged on the side of the first touch trace X1 close to the array substrate 10 and directly contacts the surface of the first touch trace X1. The first touch trace X1, the scan line 111, the gate 112 and the first common electrode 151 are manufactured by using the same half-tone mask process. For example, the second transparent conductive layer 15 and the first metal layer 11 are sequentially covered on the first surface of the array substrate 10, and the second transparent conductive layer 15 and the first metal layer 11 are etched at the same time by using the half-tone mask process, so that the first metal layer 11 forms the patterned scan line 111, the gate 112 and the first touch trace X1, the second transparent conductive layer 15 forms the first common electrode 151, and the first touch trace X1 is directly covered on the surface of the first common electrode 151. The half-tone mask process is to use a half-tone mask as a shield to expose and develop a photoresist layer, and the half-tone mask has a light transmission area, a half-light transmission area and a light shielding area, so that the photoresist layer forms a complete reserved area, a partial reserved area and a complete removed area. The specific steps of the half-tone mask process can refer to the prior art. Of course, in other embodiments, the first common electrode 151 is manufactured by using a mask process alone, and the scan line 111, the gate 112 and the first touch trace X1 are manufactured by using another mask process alone. For example, the second transparent conductive layer 15 is covered on the first surface of the array substrate 10, and the second transparent conductive layer 15 is etched to form the first common electrode 151; then the first metal layer 11 is covered on the first surface of the array substrate 10, and the first metal layer 11 is etched to form the scan line 111, the gate 112 and the first touch trace X1, and the first touch trace X1 is directly covered on the surface of the first common electrode 151.

[0042] The application also provides an electronic paper display, which comprises the array substrate 10 as described above, an opposite substrate 20 arranged opposite to the array substrate 10, and ink capsules 30 between the array substrate 10 and the opposite substrate 20, all of the ink capsules 30 are provided with black particles 31 and white particles 32 of opposite polarity. The array substrate 10 is arranged on the side of the electronic paper display close to the external environment (i.e. the side of the electronic paper display touched by the user's fingers when the user uses the electronic paper display), and the opposite substrate 20 is arranged on the side of the electronic paper display away from the external environment. The first surface of the array substrate 10 faces the ink capsules 30, and the second surface of the array substrate 10 faces the external environment. By providing the ink capsules 30 with electric fields in different directions, the black particles 31 and the white particles 32 can move towards the corresponding directions. For example, the black particles 31 are negatively charged, and the white particles 32 are positively charged, so that the white particles 32 move towards the direction of the electric field, and the black particles 31 move towards the opposite direction of the electric field. If an electric field in the upward direction is provided, the white particles 32 move in the upward direction, and the black particles 31 move in the downward direction; if an electric field in the downward direction is provided, the white particles 32 move in the downward direction, and the black particles 31 move in the upward direction. Of course, the black particles 31 can also be positively charged, and the white particles 32 can be negatively charged, so that the black particles 31 move towards the direction of the electric field, and the white particles 32 move towards the opposite direction of the electric field.

[0043] Further, the opposite substrate 20 is provided with a second common electrode 21 matched with the pixel electrode 141, the second common electrode 21 can be a surface electrode covering the surface of the opposite substrate 20, and the second common electrode 21 is used to form a vertical electric field with the pixel electrode 141. By controlling the voltage polarity on the pixel electrode 141, the direction of the electric field between the pixel electrode 141 and the second common electrode 21 is controlled, so as to control the ink capsules 30 to switch between the black state (light absorption state) and the white state (light reflection state). For example, if a 0V common voltage is applied to the second common electrode 21, and a positive voltage is applied to the pixel electrode 141, the direction of the electric field between the pixel electrode 141 and the second common electrode 21 is towards the second common electrode 21; if a negative voltage is applied to the pixel electrode 141, the direction of the electric field between the pixel electrode 141 and the second common electrode 21 is towards the pixel electrode 141. Alternatively, the second common electrode 21 can be a reflective electrode with a light reflection effect, for example, the second common electrode 21 can be made of a metal with high reflectivity such as aluminum or silver, so as to increase the light reflection rate of the electronic paper display.

[0044] The array substrate 10 and the opposite substrate 20 can be made of glass, acrylic, polycarbonate and other materials. The material of the first common electrode 151, the pixel electrode 141 and the second touch wire X can be transparent metal such as indium tin oxide (ITO) or indium zinc oxide (IZO). The material of the scan line 111, the gate 112, the data line 131, the source 132, the drain 133 and the first touch wire X1 can be metal material such as copper (Cu), silver (Ag), chromium (Cr), molybdenum (Mo), aluminum (Al), titanium (Ti), manganese (Mn), nickel (Ni) and the like. Of course, the second touch wire X can also be made of metal material, but the second touch wire X needs to be arranged in a grid structure to avoid affecting the light transmittance.

[0045] Figure 6 is a structural schematic diagram of the electronic paper display in the black state in the embodiment one of the present application. As shown in the figure, Figure 6 in the black state, 0V common voltage is applied to the second common electrode 21, and corresponding positive and negative polarities of voltage are applied to all the pixel electrodes 141. For example, the black particles 31 are negatively charged, and the white particles 32 are positively charged, so that the white particles 32 move towards the direction of the electric field, and the black particles 31 move towards the opposite direction of the electric field. When the positive polarity of voltage is applied to all the pixel electrodes 141, the direction of the electric field between the pixel electrode 141 and the second common electrode 21 is from the pixel electrode 141 to the second common electrode 21, then the white particles 32 move towards the second common electrode 21, and the black particles 31 move towards the pixel electrode 141, so that all the ink capsules 30 are in the black state.

[0046] Figure 7 is a structural schematic diagram of the electronic paper display in the white state in the embodiment one of the present application. As shown in the figure, Figure 7 in the white state, 0V common voltage is applied to the second common electrode 21, and corresponding positive and negative polarities of voltage are applied to all the pixel electrodes 141. For example, the black particles 31 are negatively charged, and the white particles 32 are positively charged, so that the white particles 32 move towards the direction of the electric field, and the black particles 31 move towards the opposite direction of the electric field. When the negative polarity of voltage is applied to all the pixel electrodes 141, the direction of the electric field between the pixel electrode 141 and the second common electrode 21 is from the second common electrode 21 to the pixel electrode 141, then the white particles 32 move towards the pixel electrode 141, and the black particles 31 move towards the second common electrode 21, so that all the ink capsules 30 are in the white state.

[0047] Figure 8 is a structural schematic diagram of the electronic paper display in the picture display state in the embodiment one of the present application. As shown in the figure, Figure 8As shown, in the black and white picture display mode, 0V common voltage is applied to the second common electrode 21, and corresponding positive and negative polarity voltages are applied to the pixel electrode 141. For example, the black particles 31 are negatively charged, and the white particles 32 are positively charged, so that the white particles 32 move towards the direction of the electric field, and the black particles 31 move towards the opposite direction of the electric field. When a negative polarity voltage is applied to the pixel electrode 141, the direction of the electric field between the pixel electrode 141 and the second common electrode 21 is from the second common electrode 21 to the pixel electrode 141, then the white particles 32 move towards the pixel electrode 141, and the black particles 31 move towards the second common electrode 21, so that the corresponding ink capsule 30 is in a white state. When a positive polarity voltage is applied to the pixel electrode 141, the direction of the electric field between the pixel electrode 141 and the second common electrode 21 is from the pixel electrode 141 to the second common electrode 21, then the white particles 32 move towards the second common electrode 21, and the black particles 31 move towards the pixel electrode 141, so that the corresponding ink capsule 30 is in a black state. By combining black and white with each other through different pixel units P, the electronic paper display can display black and white pictures by using ambient light.

[0048] The application also provides a driving method of an electronic paper display, for driving the electronic paper display as described above, the driving method comprising: In the display time period, the first touch wire X1 applies a common voltage signal to the first common electrode 151 to form a storage capacitor with the pixel electrode 141.

[0049] In the touch time period, the first touch wire X1 applies a touch driving signal to the first common electrode 151 to form a touch capacitor with the second touch wire X2.

[0050] Wherein, in each frame of screen refresh, including the display time period and the touch time period, the display time period and the touch time period are alternately continued with each other, so as to ensure that the electronic paper display has good touch effect.

[0051] [Embodiment two] Figure 9 is a schematic diagram of the cross-sectional structure of one pixel region in the embodiment two of the application. Figure 10 is a schematic diagram of the planar structure of one pixel region in the embodiment two of the application. As Figure 9 and Figure 10 As shown in the embodiment two of the application, the array substrate, the electronic paper display and the driving method are basically the same as those in the embodiment one of the application, and the difference lies in that: Figures 1 to 8 ) in the embodiment one of the application, and the difference lies in that: In the embodiment, the first touch wire X1 and the data line 131 are located in the same layer and are manufactured by using the same mask process, and the extending directions of the first touch wire X1 and the data line 131 are parallel to each other. Specifically, the array substrate 10 is provided with the patterned second metal layer 13 on the surface of the first insulating layer 101, and the second metal layer 13 includes the first touch wire X1, the data line 131, the source electrode 132 and the drain electrode 133. By etching the first touch wire X1 and the data line 131 from the second metal layer 13, the number of mask processes can be reduced, the manufacturing cost can be reduced, and the thickness of the array substrate 10 can be reduced.

[0052] Further, the first common electrode 151 is arranged on the side of the first touch wire X1 close to the array substrate 10 and is spaced apart from each other by the first insulating layer 101, and the first common electrode 151 is conductively connected to the first touch wire X1 through the contact hole. Since the second transparent conductive layer 15 and the second metal layer 13 are spaced apart from each other by the first insulating layer 101, the contact hole needs to be etched on the first insulating layer 101 to enable the first touch wire X1 to be conductively connected to the first common electrode 151 through the contact hole. Since the first common electrode 151 and the first touch wire X1 are located in different layers, the first common electrode 151 needs to be manufactured by using a separate mask process, and the data line 131, the source electrode 132, the drain electrode 133 and the first touch wire X1 are manufactured by using another separate mask process. Of course, the scan line 111, the gate electrode 112 and the first common electrode 151 can be manufactured by using the same half-tone mask process. For example, the second transparent conductive layer 15 and the first metal layer 11 are sequentially covered on the first surface of the array substrate 10, the second transparent conductive layer 15 and the first metal layer 11 are etched at the same time by using the half-tone mask process, the first metal layer 11 is patterned to form the scan line 111 and the gate electrode 112, and the second transparent conductive layer 15 is patterned to form the first common electrode 151.

[0053] Those skilled in the art should understand that the remaining structures and working principles of the embodiment are the same as those of the first embodiment, and will not be described here.

[0054] [Embodiment three] Figure 11 is one of the cross-sectional structure schematic diagrams of one pixel region in the embodiment three of the application. Figure 12 is a planar structure schematic diagram of one pixel region in the embodiment three of the application. Figure 13 is the second cross-sectional structure schematic diagram of one pixel region in the embodiment three of the application. Figures 11 to 13 As shown in the drawings, the array substrate, the electronic paper display and the driving method provided by the embodiment three of the application are the same as those of the first embodiment ( Figures 1 to 8 ) and the second embodiment ( Figures 9 to 10The array substrate, electronic paper display, and driving method are basically the same in the original, with the following differences: In this embodiment, the first touch trace X1 and the data line 131 are located on the same layer and fabricated using the same masking process, and the extension directions of the first touch trace X1 and the data line 131 are parallel to each other. Specifically, the array substrate 10 has a patterned second metal layer 13 on the surface of the first insulating layer 101. The second metal layer 13 includes the first touch trace X1, the data line 131, the source electrode 132, and the drain electrode 133. By etching the first touch trace X1 and the data line 131 using the second metal layer 13, one masking process can be reduced, thereby reducing manufacturing costs and the thickness of the array substrate 10.

[0055] Furthermore, the first common electrode 151 is disposed on the side of the first touch trace X1 near the array substrate 10 and is in direct contact with the surface of the first touch trace X1. Wherein, as... Figure 11 As shown, the first touch trace X1, data line 131, source electrode 132, drain electrode 133, and first common electrode 151 are fabricated using the same half-mask process. For example, the array substrate 10 sequentially covers the surface of the first insulating layer 101 with a second transparent conductive layer 15 and a second metal layer 13. The second transparent conductive layer 15 and the second metal layer 13 are simultaneously etched using a half-mask process, so that the second metal layer 13 forms a patterned data line 131, source electrode 132, drain electrode 133, and first touch trace X1. The second transparent conductive layer 15 forms the first common electrode 151, and the first touch trace X1 directly covers the surface of the first common electrode 151. Of course, in another embodiment, such as... Figure 13 As shown, the first common electrode 151 is fabricated using a single masking process, while the data line 131, source 132, drain 133, and first touch trace X1 are fabricated using a separate masking process. For example, the array substrate 10 first covers the surface of the first insulating layer 101 with a second transparent conductive layer 15, etches the second transparent conductive layer 15 to form the first common electrode 151; then covers the surface of the first insulating layer 101 with a second metal layer 13, etches the second metal layer 13 to form the data line 131, source 132, drain 133, and first touch trace X1, with the first touch trace X1 directly covering the surface of the first common electrode 151. Compared to Embodiment 2, no contact holes are required in the first insulating layer 101, reducing one masking process.

[0056] Those skilled in the art should understand that the remaining structures and working principles of this embodiment are the same as those of Embodiment 1 and Embodiment 2, and will not be repeated here.

[0057] [Example 4] Figure 14 This is a schematic diagram of the cross-sectional structure of a pixel region in Embodiment 4 of the present invention. Figure 15 This is a schematic diagram of the planar structure of a pixel region in Embodiment 4 of the present invention. For example... Figure 14 and Figure 15 As shown, the array substrate, electronic paper display, and driving method provided in Embodiment 4 of the present invention are the same as those in Embodiment 1. Figures 1 to 8 The array substrate, electronic paper display, and driving method are basically the same in the original, with the following differences: In this embodiment, the first touch trace X1 and the scan line 111 are located on the same layer and fabricated using the same masking process, and the extension directions of the first touch trace X1 and the scan line 111 are parallel to each other. Specifically, the first surface of the array substrate 10 is provided with a patterned first metal layer 11, which includes the first touch trace X1, the scan line 111, and the gate 112. By etching the first touch trace X1 and the scan line 111 using the first metal layer 11, one masking process can be reduced, thereby reducing manufacturing costs and the thickness of the array substrate 10.

[0058] Furthermore, the first common electrode 151 is disposed on the side of the first touch trace X1 near the pixel electrode 141 and is spaced apart from each other by the first insulating layer 101. The first common electrode 151 is electrically connected to the first touch trace X1 through a contact hole. Since the second transparent conductive layer 15 and the first metal layer 11 are spaced apart by the first insulating layer 101, contact holes need to be etched on the first insulating layer 101 so that the first common electrode 151 is electrically connected to the first touch trace X1 through the contact holes. Since the first common electrode 151 and the first touch trace X1 are located on different layers, the first common electrode 151 needs to be fabricated using a separate mask process, while the first touch trace X1, scan line 111, and gate 112 are fabricated using a separate mask process. Of course, the data line 131, source 132, drain 133, and first common electrode 151 can be fabricated using the same half-mask process. For example, the array substrate 10 sequentially covers the second transparent conductive layer 15 and the second metal layer 13 on the surface of the first insulating layer 101. The second transparent conductive layer 15 and the second metal layer 13 are simultaneously etched using a half-mask process, so that the second metal layer 13 forms patterned data lines 131, source 132 and drain 133, and the second transparent conductive layer 15 forms the first common electrode 151.

[0059] Those skilled in the art should understand that the remaining structures and working principles of this embodiment are the same as those of Embodiment 1, and will not be repeated here.

[0060] [Example 5] Figure 16This is a schematic diagram of the cross-sectional structure of a pixel region in Embodiment 5 of the present invention. Figure 17 This is a schematic diagram of the planar structure of a pixel region in Embodiment 5 of the present invention. Figure 16 and Figure 17 As shown, the array substrate, electronic paper display, and driving method provided in Embodiment 5 of the present invention are similar to those in Embodiment 3. Figures 11 to 13 The array substrate, electronic paper display, and driving method are basically the same in the original, with the following differences: In this embodiment, the first touch trace X1 and the data line 131 are located on the same layer and fabricated using the same masking process, and the extension directions of the first touch trace X1 and the data line 131 are parallel to each other. Specifically, the array substrate 10 has a patterned second metal layer 13 on the surface of the first insulating layer 101. The second metal layer 13 includes the first touch trace X1, the data line 131, the source electrode 132, and the drain electrode 133. By etching the first touch trace X1 and the data line 131 using the second metal layer 13, one masking process can be reduced, thereby reducing manufacturing costs and the thickness of the array substrate 10.

[0061] Furthermore, the first common electrode 151 is disposed on the side of the first touch trace X1 near the array substrate 10 and is in direct contact with the surface of the first touch trace X1. The first common electrode 151 and the active layer 121 are located on the same layer and fabricated using the same mask process. The array substrate 10 covers the surface of the first insulating layer 101 with a metal oxide semiconductor layer. The metal oxide semiconductor layer is etched to form the patterned active layer 121 and the first common electrode 151, and then the first common electrode 151 is made conductive. The metal oxide semiconductor layer may be made of semiconductor materials such as indium zinc oxide (InZnO), indium gallium oxide (InGaO), indium tin oxide (InSnO), zinc tin oxide (ZnSnO), gallium tin oxide (GaSnO), gallium zinc oxide (GaZnO), indium gallium zinc oxide (IGZO), or indium gallium zinc tin oxide (IGZTO).

[0062] Optionally, the active layer 121 and the first common electrode 151 are fabricated by one mask process, and the data line 131, the source electrode 132, the drain electrode 133 and the first touch wire X1 are fabricated by another mask process. For example, the array substrate 10 is first covered with a metal-oxide-semiconductor layer on the surface of the first insulating layer 101, and the metal-oxide-semiconductor layer is etched to form the active layer 121 and the first common electrode 151; then the array substrate 10 is covered with a second metal layer 13 on the surface of the first insulating layer 101, and the second metal layer 13 is etched to form the data line 131, the source electrode 132, the drain electrode 133 and the first touch wire X1, and the first touch wire X directly covers the surface of the first common electrode 151. Of course, in another embodiment, the first touch wire X1, the data line 131, the source electrode 132, the drain electrode 133, the active layer 121 and the first common electrode 151 can also be fabricated by the same halftone mask process. For example, the array substrate 10 is sequentially covered with a metal-oxide-semiconductor layer and a second metal layer 13 on the surface of the first insulating layer 101, and the metal-oxide-semiconductor layer and the second metal layer 13 are etched by the halftone mask process at the same time, so that the second metal layer 13 is patterned to form the data line 131, the source electrode 132, the drain electrode 133 and the first touch wire X1, the metal-oxide-semiconductor layer forms the active layer 121 and the first common electrode 151, the first touch wire X directly covers the surface of the first common electrode 151, and then the first common electrode 151 is subjected to a conductor treatment. Compared with the third embodiment, the second transparent conductive layer 15 is not required, and one mask process is reduced.

[0063] Those skilled in the art should understand that the remaining structures and working principles of the embodiment are the same as those of the third embodiment, and will not be described here.

[0064] [Embodiment Six] Figure 18 is a schematic diagram of the cross-sectional structure of one pixel region in the embodiment six of the application. Figure 19 is a schematic diagram of the planar structure of one pixel region in the embodiment six of the application. As shown in Figure 18 and Figure 19 , the array substrate, the electronic paper display and the driving method provided by the embodiment six of the application are basically the same as those in the embodiment five ( Figure 17 and Figure 18 ), and the difference lies in that: In the embodiment, the first touch wire X1 and the scan line 111 are located in the same layer and are manufactured by using the same mask process, and the extending directions of the first touch wire X1 and the scan line 111 are parallel to each other. Specifically, the first surface of the array substrate 10 is provided with the patterned first metal layer 11, and the first metal layer 11 includes the first touch wire X1, the scan line 111, and the gate 112. By etching the first touch wire X1 and the scan line 111 from the first metal layer 11, the number of mask processes can be reduced, the manufacturing cost can be reduced, and the thickness of the array substrate 10 can be reduced.

[0065] Further, the first common electrode 151 is arranged on the side of the first touch wire X1 close to the pixel electrode 141 and is spaced apart from the first touch wire X1 by the first insulating layer 101. The first common electrode 151 is conductively connected to the first touch wire X1 through the contact hole. Since the metal oxide semiconductor layer and the first metal layer 11 are spaced apart from each other by the first insulating layer 101, the contact hole needs to be etched on the first insulating layer 101 so that the first common electrode 151 is conductively connected to the first touch wire X1 through the contact hole. Since the first common electrode 151 and the first touch wire X1 are located in different layers, the first common electrode 151 needs to be manufactured by using a separate mask process, and the first touch wire X1, the scan line 111, and the gate 112 are manufactured by using another separate mask process. Of course, the data line 131, the source 132, the drain 133, the active layer 121, and the first common electrode 151 can be manufactured by using the same half-tone mask process. For example, the array substrate 10 sequentially covers the metal oxide semiconductor layer and the second metal layer 13 on the surface of the first insulating layer 101, simultaneously etches the metal oxide semiconductor layer and the second metal layer 13 by using the half-tone mask process, forms the patterned data line 131, the source 132, and the drain 133 from the second metal layer 13, forms the active layer 121 and the first common electrode 151 from the metal oxide semiconductor layer, conductively connects the first common electrode 151 to the first touch wire X1 through the contact hole, and then performs a conductor treatment on the first common electrode 151.

[0066] Those skilled in the art should understand that the remaining structures and working principles of the embodiment are the same as those of Embodiment Five, and will not be described here.

[0067] In this document, the terms such as up, down, left, right, front, and back are defined according to the positions of the structures in the drawings and the positions of the structures relative to each other, only for the purpose of expressing the technical solutions clearly and conveniently. It should be understood that the use of the terms should not limit the scope of the application claimed. It should also be understood that the terms "first" and "second" used herein are only used for name differentiation and do not limit the number and order.

[0068] The above merely describes preferred embodiments of the present application, and is not intended to limit the present application in any form. Although the present application has been disclosed with the preferred embodiments as above, it is not intended to limit the present application, and any person skilled in the art can make some changes or modifications to the above disclosed technical contents without departing from the technical solution of the present application, and the equivalent embodiments with equivalent changes are also included. Any simple modification, equivalent change and modification made to the above embodiments according to the technical essence of the present application are still within the protection scope of the technical solution of the present application.

Claims

1. An array substrate, characterized by, The array substrate (10) has a first surface and a second surface arranged oppositely; The first surface of the array substrate (10) is provided with a plurality of first touch wires (X1), a plurality of scan lines (111), a plurality of data lines (131), a plurality of thin film transistors (1), a plurality of pixel electrodes (141) and a plurality of first common electrodes (151), the plurality of scan lines (111) and the plurality of data lines (131) are insulated and crossed with each other to define a plurality of pixel units (P), each of the pixel units (P) is provided with the thin film transistor (1), the pixel electrode (141) and the first common electrode (151), the pixel electrode (141) is electrically connected with the scan line (111) and the data line (131) adjacent to the thin film transistor (1) through the thin film transistor (1), and the first common electrode (151) is located on a side of the pixel electrode (141) close to the array substrate (10) and is electrically connected with the first touch wire (X1). The second surface of the array substrate (10) is provided with a plurality of second touch wires (X2), the first touch wire (X1) and the second touch wire (X2) extend in directions perpendicular to each other, the first touch wire (X1) and the first common electrode (151) form touch capacitors with the second touch wire (X2), and one of the first touch wire (X1) and the second touch wire (X2) is a touch driving electrode, and the other is a touch sensing electrode.

2. The array substrate of claim 1, wherein, The first touch wire (X1) and the scan line (111) are located in the same layer and are manufactured by using the same mask process.

3. The array substrate of claim 2, wherein, The first common electrode (151) is located on a side of the first touch wire (X1) close to the array substrate (10) and directly contacts a surface of the first touch wire (X1). The first touch wire (X1), the scan line (111) and the first common electrode (151) are manufactured by using the same half mask process, or the first common electrode (151) is manufactured by using a separate mask process.

4. The array substrate of claim 2, wherein, The first common electrode (151) is located on a side of the first touch wire (X1) close to the pixel electrode (141) and is spaced apart from each other by a first insulating layer (101), and the first common electrode (151) is conductively connected with the first touch wire (X1) through a contact hole. The first common electrode (151) and the data line (131) are manufactured by using the same half mask process, or the first common electrode (151) is manufactured by using a separate mask process.

5. The array substrate of claim 1, wherein, The first touch wire (X1) and the data line (131) are located in the same layer and are manufactured by using the same mask process, and the first touch wire (X1) and the data line (131) extend in directions parallel to each other.

6. The array substrate of claim 5, wherein, The first common electrode (151) is arranged on the side of the first touch wire (X1) close to the array substrate (10) and directly contacts the surface of the first touch wire (X1); The first touch wire (X1), the data line (131) and the first common electrode (151) are manufactured by the same half-mask process, or the first common electrode (151) is manufactured by a separate mask process.

7. The array substrate of claim 5, wherein, The first common electrode (151) is arranged on the side of the first touch wire (X1) close to the array substrate (10) and is spaced apart from each other by the first insulating layer (101), and the first common electrode (151) is conductively connected to the first touch wire (X1) through the contact hole. The first common electrode (151) and the scan line (111) are manufactured by the same half-mask process, or the first common electrode (151) is manufactured by a separate mask process.

8. The array substrate according to claim 2 or 5, wherein, The first common electrode (151) and the active layer (121) are located in the same layer and are manufactured by the same mask process.

9. An electronic paper display, characterized by The array substrate (10) as claimed in any one of claims 1-8, an opposite substrate (20) arranged opposite to the array substrate (10), and ink capsules (30) located between the array substrate (10) and the opposite substrate (20), all the ink capsules (30) are provided with black particles (31) and white particles (32) of opposite polarity, the array substrate (10) is located on the side of the electronic paper display close to the external environment, the first surface of the array substrate (10) faces the ink capsules (30), and the opposite substrate (20) is provided with a second common electrode (21) matched with the pixel electrode (141).

10. A driving method of an electronic paper display, characterized by, A driving method for driving the electronic paper display as claimed in claim 9, the driving method comprising: During a display period, the first touch wire (X1) applies a common voltage signal to the first common electrode (151) to form a storage capacitor with the pixel electrode (141); During a touch period, the first touch wire (X1) applies a touch signal to the first common electrode (151) to form a touch capacitor with the second touch wire (X2). During a display period, the first touch wire (X1) applies a common voltage signal to the first common electrode (151) to form a storage capacitor with the pixel electrode (141);

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