Passivation layer structure and its fabrication method

Abstract

This application provides a passivation layer structure and its fabrication method. The structure includes a hafnium oxide layer, a composite material layer composed of hafnium oxide and graphene quantum dots, a graphene quantum dot layer, and a fluorinated amorphous carbon layer stacked sequentially. The hafnium oxide layer, the composite material layer, the graphene quantum dot layer, and the fluorinated amorphous carbon layer together form the passivation layer structure. The four material layers work synergistically to achieve multiple functions such as interface defect passivation, charge regulation, and environmental protection. It has high dielectric properties, low interface defect rate, strong mechanical stability, and high environmental tolerance, thereby improving the electrical performance of semiconductor devices.

Description

Technical Field

[0001] This application relates to the field of semiconductor integrated circuit technology, and in particular to a passivation layer structure and its fabrication method. Background Technology

[0002] Surface passivation of semiconductor devices is a key technology for improving device performance and reliability. Traditional passivation layers include silicon oxide (SiO2) and silicon nitride (SiN). x Traditional silicon oxide (SiO2) suffers from problems such as high cross-sectional defect density, insufficient dielectric constant, and limited radiation resistance. In recent years, high dielectric constant material hafnium oxide (HfO2) has gradually become the preferred alternative to traditional silicon oxide due to its excellent thermal stability and dielectric properties. However, defects such as oxygen vacancies still exist at the interface between hafnium oxide and semiconductor substrates, leading to increased leakage current and decreased device stability.

[0003] Therefore, developing a passivation layer structure that combines high dielectric properties, low interface defects, and high environmental tolerance is of great significance for improving the performance of semiconductor devices. Summary of the Invention

[0004] This application provides a passivation layer structure and its fabrication method, which has high dielectric properties, low interface defects and high environmental tolerance, thereby improving the electrical performance of semiconductor devices.

[0005] To address the aforementioned technical problems, according to the first aspect of this application, a passivation layer structure is provided, comprising a hafnium oxide layer, a composite material layer composed of hafnium oxide and graphene quantum dots, a graphene quantum dot layer, and a fluorinated amorphous carbon layer stacked sequentially.

[0006] Optionally, the thickness of the hafnium oxide layer is 10 nm to 100 nm.

[0007] Optionally, the content of graphene quantum dots in the composite material layer is 10wt%~50wt%, and the thickness of the composite material layer is 50nm~200nm.

[0008] Optionally, the graphene quantum dot layer is a monolayer, and the thickness of the graphene quantum dot layer is 2nm~5nm.

[0009] Optionally, the thickness of the fluorinated amorphous carbon layer is 100 nm to 300 nm.

[0010] To address the aforementioned technical problems, according to a second aspect of this application, a method for fabricating a passivation layer structure is also provided, comprising the following steps:

[0011] A substrate is provided on which a hafnium oxide layer is formed;

[0012] A composite material layer consisting of hafnium oxide and graphene quantum dots is formed on the hafnium oxide layer;

[0013] A graphene quantum dot layer is formed on the composite material layer;

[0014] A fluorinated amorphous carbon layer is formed on the graphene quantum dot layer.

[0015] Optionally, the hafnium oxide layer is formed using atomic layer deposition; and / or, the fluorinated amorphous carbon layer is formed using plasma-enhanced chemical vapor deposition.

[0016] Optionally, the method for forming the composite material layer includes:

[0017] Hafnium oxide solution was mixed with graphene quantum dot solution;

[0018] The mixture is coated onto the surface of the hafnium oxide layer; and

[0019] Perform annealing.

[0020] Optionally, methods for forming graphene quantum dot solutions include: using a thermally driven advanced oxidation process, with graphite powder as raw material, to form a graphene quantum dot solution through ultrasonic exfoliation and hydrothermal reduction in an acidic medium.

[0021] Optionally, the graphene quantum dot layer can be formed using a layer-by-layer self-assembly technique or a dip-coating technique.

[0022] The passivation layer structure and its fabrication method provided in this application include a hafnium oxide layer, a composite material layer composed of hafnium oxide and graphene quantum dots, a graphene quantum dot layer, and a fluorinated amorphous carbon layer stacked sequentially. The hafnium oxide layer serves as a high-dielectric buffer layer, which can effectively suppress leakage current and improve the flatness of the substrate surface. The composite material layer is composed of hafnium oxide and graphene quantum dots. The graphene quantum dots are chemically bonded to hafnium oxide, which can effectively fill interface defects and enhance interlayer adhesion. The graphene quantum dot layer can regulate the interface charge distribution and improve the photoelectric response or storage performance of the device. The fluorinated amorphous carbon layer serves as an outer protective layer, which can effectively block water vapor and ion contamination and reduce dielectric loss. The hafnium oxide layer, the composite material layer, the graphene quantum dot layer, and the fluorinated amorphous carbon layer together serve as a passivation layer structure. The four material layers work synergistically to achieve multiple functions such as interface defect passivation, charge regulation, and environmental protection. They have high dielectric properties, low interface defects, strong mechanical stability, and high environmental tolerance, thereby improving the electrical performance of semiconductor devices. Attached Figure Description

[0023] Figure 1 This is a schematic diagram of the passivation layer structure provided in an embodiment of this application.

[0024] Figure 2This is a schematic flowchart of a method for fabricating a passivation layer structure according to an embodiment of this application.

[0025] Explanation of reference numerals in the attached figures:

[0026] 10-Substrate; 11-Hafnium oxide layer; 12-Composite material layer; 13-Graphene quantum dot layer; 14-Fluorinated amorphous carbon layer. Detailed Implementation

[0027] To make the objectives, advantages, and features of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and specific embodiments. It should be noted that the drawings are all in a very simplified form and are not drawn to scale, used only to facilitate and clarify the illustration of the embodiments of this application. Furthermore, the structures shown in the drawings are often part of the actual structures. In particular, different figures may emphasize different aspects and sometimes use different scales.

[0028] As used herein, the singular forms “a,” “an,” and “the” include plural objects unless otherwise expressly indicated. As used herein, the term “or” is generally used to include “and / or” unless otherwise expressly indicated. As used herein, the term “a number” is generally used to include “at least one” unless otherwise expressly indicated. As used herein, the term “at least two” is generally used to include “two or more” unless otherwise expressly indicated. Furthermore, the terms “first,” “second,” and “third” are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, a feature defined as “first,” “second,” or “third” may explicitly or implicitly include one or at least two of that feature, unless otherwise expressly indicated.

[0029] This application provides a passivation layer structure, comprising a hafnium oxide layer, a composite material layer composed of hafnium oxide and graphene quantum dots, a graphene quantum dot layer, and a fluorinated amorphous carbon layer stacked sequentially. The hafnium oxide layer serves as a high-dielectric buffer layer, effectively suppressing leakage current and improving substrate surface flatness. The composite material layer is composed of hafnium oxide and graphene quantum dots. The graphene quantum dots are chemically bonded to hafnium oxide, effectively filling interface defects and enhancing interlayer adhesion. The graphene quantum dot layer can regulate the interface charge distribution, improving the photoelectric response or storage performance of the device. The fluorinated amorphous carbon layer serves as an outer protective layer, effectively blocking moisture and ion contamination and reducing dielectric loss.

[0030] The hafnium oxide layer, the composite material layer, the graphene quantum dot layer, and the fluorinated amorphous carbon layer together serve as a passivation layer structure. The four material layers work synergistically to achieve multiple functions such as interface defect passivation, charge regulation, and environmental protection. They have high dielectric properties, low interface defects, strong mechanical stability, and high environmental tolerance, thereby improving the electrical performance of semiconductor devices.

[0031] Figure 1 This is a schematic diagram of the passivation layer structure provided in one embodiment of this application. For example... Figure 1 As shown, the passivation layer structure provided in this embodiment includes a hafnium oxide layer 11, a composite material layer 12 composed of hafnium oxide and graphene quantum dots, a graphene quantum dot layer 13, and a fluorinated amorphous carbon layer 14 stacked sequentially.

[0032] Figure 1 The image also shows a substrate 10, on which the passivation layer structure is located.

[0033] The substrate 10 can be made of silicon, germanium, silicon germanide, silicon carbide, gallium arsenide, gallium nitride, or indium gallium nitride, or it can be silicon-on-insulator or germanium-on-insulator; or it can be other materials, such as gallium arsenide or other III-V compounds. In this embodiment, the substrate 10 is gallium nitride (GaN) or silicon carbide (SiC), but it is not limited to these.

[0034] In one embodiment of this application, an epitaxial layer may be formed on the substrate 10, and a device layer, such as a transistor, capacitor, resistor, and similar components, may be formed on the epitaxial layer. Of course, some devices may also be formed within the epitaxial layer. A metal interconnect layer is formed on the device layer, and the metal interconnect layer is used to connect various devices to form a functional circuit. The passivation layer structure described in this embodiment is formed on the metal interconnect layer.

[0035] The thickness of the hafnium oxide layer 11 is 10 nm to 100 nm. For example, the thickness of the hafnium oxide layer 11 can be 10 nm, 30 nm, 50 nm, 70 nm, 90 nm, or 100 nm. The hafnium oxide layer 11 serves as a high-dielectric buffer layer, effectively suppressing leakage current and improving the flatness of the substrate 10 surface. A suitable thickness can be selected based on material properties and actual requirements.

[0036] The graphene quantum dot content in the composite material layer 12 is 10wt%~50wt%. For example, the graphene quantum dot content in the composite material layer 12 is 10wt%, 20wt%, 30wt%, 40wt%, or 50wt%. The thickness of the composite material layer 12 is 50nm~200nm. For example, the thickness of the composite material layer 12 is 50nm, 80nm, 100nm, 130nm, 150nm, 180nm, or 200nm. Appropriate content and thickness can be selected according to material properties and actual needs. The composite material layer 12 is composed of hafnium oxide and graphene quantum dots. The graphene quantum dots are chemically bonded to hafnium oxide, which can effectively fill interface defects and enhance interlayer adhesion.

[0037] The graphene quantum dot layer 13 is a monolayer with a thickness of 2 nm to 5 nm. For example, the thickness of the graphene quantum dot layer 13 is 1 nm, 3 nm, 4 nm, or 5 nm. Graphene quantum dots (GQDs), as a novel nanomaterial, possess high carrier mobility, tunable band gap, and excellent chemical stability. The graphene quantum dot layer 13 can regulate the interfacial charge distribution, thereby improving the photoelectric response or storage performance of the device.

[0038] The thickness of the fluorinated amorphous carbon layer 14 is 100nm~300nm. For example, the thickness of the fluorinated amorphous carbon layer 14 is 100nm, 150nm, 200nm, 250nm, or 300nm. As an outer protective layer, the fluorinated amorphous carbon layer 14 has a low dielectric constant, high chemical inertness, and good thermal stability, which can effectively block water vapor and ion contamination and reduce dielectric loss.

[0039] The hafnium oxide layer 11, the composite material layer 12 composed of hafnium oxide and graphene quantum dots, the graphene quantum dot layer 13, and the fluorinated amorphous carbon layer 14 together constitute a passivation layer structure. The four material layers work together to achieve multiple functions such as interface defect passivation, charge regulation, and environmental protection. It has high dielectric properties, low interface defects, strong mechanical stability, and high environmental tolerance, thereby improving the electrical performance of semiconductor devices composed of this passivation layer.

[0040] Accordingly, this application also provides a method for fabricating a passivation layer structure, used to fabricate the passivation layer structure as described above. Figure 2 This is a schematic flowchart illustrating a method for fabricating a passivation layer structure according to an embodiment of this application. Please refer to it. Figure 2 As shown, the method for fabricating the passivation layer structure provided in this application includes the following steps:

[0041] S1: Provide a substrate on which a hafnium oxide layer is formed;

[0042] S2: A composite material layer consisting of hafnium oxide and graphene quantum dots is formed on the hafnium oxide layer;

[0043] S3: Forming a graphene quantum dot layer on the composite material layer; and

[0044] S4: A fluorinated amorphous carbon layer is formed on the graphene quantum dot layer.

[0045] Next, we will combine Figure 1 and Figure 2 The method for fabricating a passivation layer structure according to an embodiment of this application will be described in detail.

[0046] In step S1, a substrate 10 is provided, and a hafnium oxide layer 11 is formed on the substrate 10.

[0047] The substrate 10 can be made of silicon, germanium, silicon germanide, silicon carbide, gallium arsenide, gallium nitride, or indium gallium nitride, or it can be silicon-on-insulator or germanium-on-insulator; or it can be other materials, such as gallium arsenide or other III-V compounds. In this embodiment, the substrate 10 is gallium nitride (GaN) or silicon carbide (SiC), but it is not limited to these.

[0048] In one embodiment of this application, an epitaxial layer is formed on the substrate 10, and a device layer is formed on the epitaxial layer. Various devices, such as transistors, capacitors, resistors, and similar components, can be formed on the surface of the epitaxial layer using any suitable method. Of course, some devices can also be formed within the epitaxial layer. A metal interconnect layer is formed on the device layer, which is used to connect various devices to form a functional circuit. The metal interconnect layer can be formed by alternating interlayer dielectric layers and metal layers. The passivation layer structure described in this embodiment is formed on the metal interconnect layer, but is not limited thereto.

[0049] In one embodiment of this application, the hafnium oxide layer 11 is formed using atomic layer deposition (ALD). Exemplarily, in the ALD process, hafnium tetrachloride (HfCl4) and deionized water (H2O) are used as precursors, the reaction temperature is 250°C to 350°C, the chamber pressure is 0.1 Torr to 1 Torr, and the deposition cycle is 50 to 100 times, forming the hafnium oxide layer 11 with a thickness of 10 nm to 100 nm on the substrate 10. The reaction temperature can be, for example, 250°C, 280°C, 300°C, 330°C, or 350°C; the chamber pressure can be, for example, 0.1 Torr, 0.3 Torr, 0.6 Torr, 0.8 Torr, or 1 Torr; and the deposition cycle can be, for example, 50, 60, 70, 80, 90, or 100 times. Appropriate process parameters can be selected according to actual process requirements.

[0050] The hafnium oxide layer 11 serves as a high-dielectric buffer layer, which can effectively suppress leakage current and improve the surface flatness of the substrate 10.

[0051] In step S2, a composite material layer 12 consisting of hafnium oxide and graphene quantum dots is formed on the hafnium oxide layer 11.

[0052] In one embodiment of this application, the method for forming the composite material layer 12 includes: first mixing a hafnium oxide solution with a graphene quantum dot solution; then coating the mixture onto the surface of the hafnium oxide layer 11; and then performing an annealing treatment.

[0053] Methods for forming graphene quantum dot solutions include: using a thermally driven advanced oxidation process (AOP) with graphite powder as raw material, forming a graphene quantum dot solution through ultrasonic exfoliation and hydrothermal reduction in an acidic medium, wherein the particle size of the graphene quantum dots in the solution is, for example, 3 nm to 5 nm.

[0054] Specifically, hafnium oxide sol and graphene quantum dot solution are first mixed. For example, the mass ratio of hafnium oxide sol to graphene quantum dot solution is 1:0.1 to 1:0.5. Then, the mixture is spin-coated or sprayed onto the surface of the hafnium oxide layer 11, followed by annealing at 150°C to 200°C for 1 to 2 hours to form a composite material layer 12 of hafnium oxide and graphene quantum dots with a thickness of 50 nm to 200 nm. For example, the mass ratio of hafnium oxide sol to graphene quantum dot solution is 1:0.1, 1:0.2, 1:0.3, 1:0.4, or 1:0.5, the annealing temperature is 150°C, 170°C, 180°C, or 200°C, and the annealing time is 1 hour, 1.5 hours, or 2 hours. The content of graphene quantum dots in the composite material layer 12 is 10 wt% to 50 wt%. Graphene quantum dots are bonded to hafnium oxide through chemical bonds (such as CO-Hf bonds), which can effectively fill interfacial defects and enhance interlayer adhesion.

[0055] In step S3, a graphene quantum dot layer 13 is formed on the composite material layer 12.

[0056] In one embodiment of this application, the graphene quantum dot layer 13 is formed using layer-by-layer self-assembly (LBL) or dip-coating techniques. Layer-by-layer self-assembly involves alternating immersion in solutions with opposite charges (e.g., graphene quantum dot dispersion and polyelectrolyte) to form the graphene quantum dot layer 13 via electrostatic adsorption or chemical bonding on the composite material layer 12. Dip-coating involves applying a graphene quantum dot dispersion (e.g., at a concentration of 1 mg / mL to 5 mg / mL) onto the composite material layer 12. The graphene quantum dot layer 13 is a monolayer with a thickness of 2 nm to 5 nm. The π-π stacking and surface functional groups (such as hydroxyl and carboxyl groups) of the graphene quantum dot layer 13 can regulate the interfacial charge distribution, improving the photoelectric response or storage performance of the device.

[0057] In step S4, a fluorinated amorphous carbon layer 14 is formed on the graphene quantum dot layer 13.

[0058] In one embodiment of this application, the fluorinated amorphous carbon layer 14 is formed using plasma-enhanced chemical vapor deposition (PECVD). Exemplarily, in the PECVD process, octafluorocyclobutane (C4F8) and argon (Ar) are used as reactant gases, the radio frequency power is 100W~300W, the reaction temperature is 200℃~300℃, and the chamber pressure is 50mTorr~100mTorr, forming the fluorinated amorphous carbon layer 14 with a thickness of 100nm~300nm on the graphene quantum dot layer 13. The radio frequency power is, for example, 100W, 150W, 200W, 250W, or 300W; the reaction temperature is, for example, 200℃, 250℃, or 300℃; and the chamber pressure is, for example, 50mTorr, 60mTorr, 70mTorr, 80mTorr, or 90mTorr. The fluorinated amorphous carbon layer 14 serves as an outer protective layer, effectively blocking moisture and ion contamination and reducing dielectric loss.

[0059] Four material layers are sequentially formed on the substrate 10: a hafnium oxide layer 11, a composite material layer 12, a graphene quantum dot layer 13, and a fluorinated amorphous carbon layer 14. These four material layers together form the passivation layer structure. The four material layers work together to achieve multiple functions such as interface defect passivation, charge regulation, and environmental protection. The structure has high dielectric properties, low interface defects, strong mechanical stability, and high environmental tolerance, thereby improving the electrical performance of the semiconductor device.

[0060] The following section uses a silicon-based metal-oxide-semiconductor field-effect transistor (MOSFET) as an example to specifically introduce the fabrication method of the passivation layer structure. Of course, the passivation layer structure can also be applied to other semiconductor devices, such as GaN, SiC, or IGZO (Indium Gallium Zinc Oxide) based conductor devices, and is not limited to these.

[0061] In step S1, the hafnium oxide layer 11 is formed on the substrate 10 using atomic layer deposition (ALD). In ALD, hafnium tetrachloride and deionized water are used as precursors, the reaction temperature is 280°C, the chamber pressure is 0.6 Torr, and the deposition cycle is 80 times. Each cycle includes a 0.1s hafnium tetrachloride pulse, a 10s argon (Ar) purge, a 0.2s deionized water pulse, and a 10s argon purge, forming a 50nm thick hafnium oxide layer 11 on the substrate 10.

[0062] In step S2, a composite material layer 12 consisting of hafnium oxide and graphene quantum dots is formed on the hafnium oxide layer 11.

[0063] First, a graphene quantum dot solution was prepared by adding 100 mg of graphite powder to 50 mL of a H2SO4 / HNO3 mixture (a mixture of sulfuric acid and nitric acid) (the mass ratio of sulfuric acid to nitric acid was 3:1). The mixture was then subjected to a hydrothermal reaction at 180 °C for 12 hours. After centrifugation and filtration, a graphene quantum dot dispersion with a concentration of 2 mg / mL was obtained (average particle size of 4 nm and surface carboxyl content of 3.2 mmol / g).

[0064] Then, a hafnium oxide solution (exemplarily, the hafnium oxide solution contains 5 wt% ethanol solution) and a graphene quantum dot solution are mixed at a mass ratio of 1:0.2, ultrasonically dispersed for 30 minutes, and then spin-coated onto the surface of the hafnium oxide layer 11 at 3000 rpm. Subsequently, it is annealed in a nitrogen atmosphere at 180°C for 90 minutes to form a composite material layer 12 of hafnium oxide and graphene quantum dots with a thickness of 80 nm.

[0065] In step S3, a graphene quantum dot layer 13 is formed on the composite material layer 12. The substrate 10 on which the composite material layer 12 is formed is immersed in a graphene quantum dot solution (concentration of 3 mg / mL) with pH=7. Utilizing the hydrogen bonding between the carboxyl groups on the surface of the graphene quantum dots and the hydroxyl groups on the surface of the composite material layer 12, the substrate is immersed for 15 minutes at room temperature to form a monomolecular functional layer with a thickness of approximately 3 nm, namely the graphene quantum dot layer 13.

[0066] In step S4, a fluorinated amorphous carbon layer 14 is formed on the graphene quantum dot layer 13 using plasma-enhanced chemical vapor deposition (PECVD). Octafluorocyclobutane and argon are used as reactants, with a flow rate of 50 sccm for octafluorocyclobutane, a flow rate of 100 sccm for argon, an RF power of 200 W, a deposition temperature of 250°C, a pressure of 80 mTorr, and a deposition time of 10 minutes, forming a fluorinated amorphous carbon layer 14 with a thickness of 120 nm.

[0067] In summary, the passivation layer structure and its fabrication method provided in this application include a hafnium oxide layer, a composite material layer of hafnium oxide and graphene quantum dots, a graphene quantum dot layer, and a fluorinated amorphous carbon layer stacked sequentially. The hafnium oxide layer serves as a high-dielectric buffer layer, effectively suppressing leakage current and improving substrate surface flatness. The composite material layer is composed of hafnium oxide and graphene quantum dots. The graphene quantum dots are chemically bonded to hafnium oxide, effectively filling interface defects and enhancing interlayer adhesion. The graphene quantum dot layer can regulate the distribution of interfacial charge, improving the photoelectric response or storage performance of the device. The fluorinated amorphous carbon layer serves as an outer protective layer, effectively blocking moisture and ion contamination and reducing dielectric loss. The four material layers work synergistically to achieve multiple functions such as interface defect passivation, charge regulation, and environmental protection. It has high dielectric properties, low interface defects, strong mechanical stability, and high environmental tolerance, thus improving the electrical performance of semiconductor devices.

[0068] The above description is merely a description of preferred embodiments of this application and is not intended to limit the scope of this application in any way. Any changes or modifications made by those skilled in the art based on the above disclosure shall fall within the protection scope of the claims.

Claims

1. A passivation layer structure, characterized in that The layer of hafnium oxide, the composite layer of hafnium oxide and graphene quantum dots, the layer of graphene quantum dots and the layer of fluorinated amorphous carbon are sequentially stacked.

2. The passivation layer structure according to claim 1, characterized in that The thickness of the layer of hafnium oxide is 10-100 nm.

3. The passivation layer structure of claim 1, wherein The thickness of the composite layer is 50-200 nm.

4. The passivation layer structure of claim 1, wherein The layer of graphene quantum dots is a monolayer, and the thickness of the layer of graphene quantum dots is 2-5 nm.

5. The passivation layer structure of claim 1, wherein, The thickness of the layer of fluorinated amorphous carbon is 100-300 nm.

6. A method of fabricating a passivation layer structure, characterized by, The method comprises the following steps: providing a substrate, and forming a layer of hafnium oxide on the substrate; forming a composite layer of hafnium oxide and graphene quantum dots on the layer of hafnium oxide; forming a layer of graphene quantum dots on the composite layer; forming a layer of fluorinated amorphous carbon on the layer of graphene quantum dots.

7. The method of claim 6, wherein the passivation layer structure is formed by a process selected from the group consisting of: The layer of hafnium oxide is formed by an atomic layer deposition process, and / or the layer of fluorinated amorphous carbon is formed by a plasma-enhanced chemical vapor deposition process. ​ 8. The method for fabricating the passivation layer structure according to claim 6, characterized in that, The method for forming the composite layer comprises: mixing a solution of hafnium oxide with a solution of graphene quantum dots; coating the mixed solution on the surface of the layer of hafnium oxide; and performing annealing treatment.

9. The method of claim 8, wherein the passivation layer structure is formed by a process selected from the group consisting of: The method for forming the solution of graphene quantum dots comprises: using a heat-driven advanced oxidation process to form a solution of graphene quantum dots by ultrasonic exfoliation and hydrothermal reduction of graphite powder in an acidic medium. ​ 10. The method of claim 6, wherein the passivation layer structure is formed by a process selected from the group consisting of: The layer of graphene quantum dots is formed by a layer-by-layer self-assembly technique or a dip-coating technique. ​

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