A current limiting protection circuit controlled by soft start

Abstract

The application discloses a current-limiting protection circuit controlled by soft starting, and relates to the technical field of current control, comprising a first P-channel MOS tube, a second P-channel MOS tube, a third N-type triode, a first resistor, a second resistor, a third resistor and a first capacitor, wherein the source of the first P-channel MOS tube, the source of the second P-channel MOS tube and one end of the first capacitor are connected with a power input ADD_IN; the drain of the first P-channel MOS tube is connected with one end of the first resistor, and the gate of the first P-channel MOS tube is input with a soft starting signal Control; the gate of the second P-channel MOS tube is connected with the other end of the first resistor, one end of the second resistor and the other end of the first capacitor, and the drain of the second P-channel MOS tube is connected with a load output Out_RL; and the application solves the problem of mutual influence of RC parameters in the regulation process.

Description

Technical Field

[0001] This invention relates to the field of current control technology, and in particular to a current limiting protection circuit subject to soft-start control. Background Technology

[0002] The core function of soft start is to suppress inrush current during startup by slowly introducing power. Traditional controlled current limiting protection circuits mostly use RC topologies, and their soft start mechanism relies on the charging and discharging time characteristics of RC. However, the RC parameters have performance defects due to mutual interference during the regulation process.

[0003] This defect is Figure 1 Taking the circuit shown as an example, it controls the conduction and turn-off of MOSFET Q1 through the charging and discharging process of the first capacitor C1, thereby realizing the soft-start function. When the control signal Control is low, the base of transistor Q2 is effectively grounded, and the gate and source of MOSFET Q1 are close to the same potential, so MOSFET Q1 is turned off. When the Control signal is high, the first capacitor C1 discharges through the second resistor R2 and transistor Q2, and its gate side potential slowly drops from 5V to 0V. The potential difference between the gate and source of MOSFET Q1 gradually increases, and the device slowly turns on to the fully turned-on state. At this time, the Vgs voltage difference stabilizes at -5V, completing the soft-start process. However, when the Control signal turns off transistor Q2 again, the first capacitor C1 needs to be charged from the +5V_IN power supply to the cutoff threshold voltage of MOSFET Q1 through the first resistor R1 and the second resistor R2 to achieve complete circuit shutdown. The capacitance of the first capacitor C1 and the resistance values ​​of the first resistor R1 and the second resistor R2 directly affect the turn-off response speed and soft-start time of the MOSFET. In addition, during the period when the Control signal controls transistor Q2 to be on, the +5V_IN power supply forms a loop with transistor Q2 through the first resistor R1, causing the first resistor R1 to continuously generate additional power consumption. The larger the resistance value of the first resistor R1, the greater the power consumption of the first capacitor C1. The longer it takes for C1 to reach the cutoff threshold voltage of MOSFET Q1, the more power consumption will be generated when the resistance of the first resistor R1 is too small. Taking the resistance of the first resistor R1 as 10K in the attached figure as an example, and combining the current calculation formula I=V / R (where I is current, V is voltage, and R is resistance) and the power calculation formula P=UI (where P is power, U is voltage, and I is current) for calculation: when transistor Q2 is turned on, the current will generate an additional current of about 0.5 mA through the first resistor R1, increasing the additional power consumption by 2.5 mW. That is, the smaller the resistance of the first resistor R1, the larger the additional current generated, and the corresponding additional power consumption will also increase.

[0004] For example Figure 2The circuit also uses the change of the gate-source voltage Vgs of the MOS tube Q1 to regulate the conduction depth and realize the soft start function. When the enable signal EN_VDDx is at a low level, the power supply VDD charges the first capacitor C1 through the first resistor R1, the base of the triode Q2 is grounded through the third resistor R3, the gate-source voltage Vgs of the MOS tube Q1 approaches the VDD voltage, the device is cut off, and the output end VDD_Outx stops power supply; when the EN_VDDx signal is at a high level, the first capacitor C1 is discharged through the fourth resistor R4, the gate voltage of the MOS tube Q1 is controlled to decrease, and the device is gradually turned on to be fully opened to complete the soft start. In the circuit, the gate voltage of the MOS tube Q1 is determined by the resistance values of the first resistor R1 and the fourth resistor R4. When the capacitance value of the first capacitor C1 is fixed, the resistance value of the fourth resistor R4 directly determines the soft start time. If the resistance value of the fourth resistor R4 meets the requirement of the soft start time, the resistance value of the first resistor R1 is too large, the charging time of the first capacitor C1 is prolonged when the EN_VDDx signal is at a low level, and the circuit needs to wait for the voltage of the first capacitor C1 to rise to the threshold value of the MOS tube Q1 before being completely turned off. If the resistance value of the first resistor R1 is too small, the circuit current will be further increased to about 0.86 mA, and any adjustment of the parameters of the first capacitor C1, the first resistor R1 and the fourth resistor R4 will affect the shutdown response speed and the stability of the soft start time.

[0005] The existing defects are that the charging and discharging regulation is limited by the time constant inherent exponential curve characteristics of the RC parameters, and therefore the regulation must be performed within the dynamic range defined by the curve.

[0006] In summary, how to solve the mutual influence between the soft start time and the shutdown response regulation, and increase the dynamic range boundary defined by the inherent exponential curve characteristics of the RC is a key problem to be solved by those skilled in the art. SUMMARY

[0007] Therefore, the application provides a soft start controlled current limiting protection circuit, which can avoid the mutual influence between the soft start time and the shutdown response speed during parameter regulation. Based on this, a soft start regulation scheme for increasing the original regulation range is also provided.

[0008] In a first aspect, the application provides a soft-start controlled current limiting protection circuit, comprising a first P-channel MOS tube Q1, a second P-channel MOS tube Q2, a third NPN transistor Q3, a first resistor R1, a second resistor R2, a third resistor R3, a first capacitor C1, the source of the first P-channel MOS tube Q1, the source of the second P-channel MOS tube Q2, one end of the first capacitor C1, and a power input ADD_IN are connected; the drain of the first P-channel MOS tube Q1 and one end of the first resistor are connected, and the gate of the first P-channel MOS tube Q1 inputs a soft start signal Control; the gate of the second P-channel MOS tube Q2, the other end of the first resistor R1, one end of the second resistor R2, and the other end of the first capacitor C1 are connected, and the drain of the second P-channel MOS tube Q2 outputs a load output Out_RL; the collector of the third NPN transistor Q3 and the other end of the second resistor R2 are connected, and the base of the third NPN transistor Q3 and one end of the third resistor are connected; the other end of the third resistor R3 and the soft start signal Control or a feedback signal Feedback are connected; the emitter of the third NPN transistor Q3 and a ground terminal GND are connected.

[0009] In a second aspect, the application provides a soft start control scheme for increasing the original regulation range based on the architecture of the above-mentioned soft start controlled current limiting protection circuit, further comprising a first inverter U1, a second operational amplifier U2, a third operational amplifier U3, a fourth flip-flop U4, a fifth AND gate U5, a sixth resistor R6, a seventh resistor R7, an eighth resistor R8, a first diode D1, and a second capacitor C2, the input end of the first inverter U1 and the 1D pin and the 1Q inverted pin of the fourth flip-flop U4 are connected, and the output end of the first inverter U1 is connected with a feedback signal Feedback; the non-inverting terminal of the second operational amplifier U2, the inverting terminal of the third operational amplifier U3, one end of the second capacitor C2, one end of the sixth resistor R6, and one end of the seventh resistor R7 are connected, the inverting terminal of the second operational amplifier U2 is connected with a first reference signal VREF1, and the output end of the second operational amplifier U2 is connected with the cathode of the first diode D1, the 1CLK pin of the fourth flip-flop U4, and one end of the eighth resistor R8; the non-inverting terminal of the third operational amplifier U3 is connected with a second reference signal VREF2, and the output end of the third operational amplifier U3 is connected with the second input end of the fifth AND gate U5; the first input end of the fifth AND gate U5 is connected with a soft start signal Control, and the output end of the fifth AND gate U5 is connected with the anode of the first diode D1; the PRE terminal of the fourth flip-flop U4 is connected with a power supply VDD; the CLR terminal of the fourth flip-flop U4, the other end of the eighth resistor R8, the other end of the second capacitor C2, and a ground terminal GND are connected.

[0010] Optionally, a fifth resistor R5 is further included, one end of the fifth resistor R5 is connected with the other end of the first capacitor C1, and the other end of the fifth resistor R5 is connected with the gate of the second P-type MOS tube Q2.

[0011] Optionally, the fourth resistor R4 has one end connected with the third resistor R3 and the feedback signal Feedback, and the other end connected with the ground terminal GND.

[0012] Optionally, the first resistor R1 and the second resistor R2 are adjustable resistors.

[0013] Optionally, the ninth resistor R9 has one end connected with the soft start signal Control, and the other end connected with the third operational amplifier U3.

[0014] The application has the source of the first P-channel MOS tube Q1, the source of the second P-channel MOS tube Q2, one end of the first capacitor C1 and the power input ADD_IN; the drain of the first P-channel MOS tube Q1 is connected with one end of the first resistor, and the gate of the first P-channel MOS tube Q1 inputs the soft start signal Control; the gate of the second P-channel MOS tube Q2 is connected with the other end of the first resistor R1, one end of the second resistor R2 and the other end of the first capacitor C1, and the drain of the second P-channel MOS tube Q2 is connected with the output Out_RL; the collector of the third NPN transistor Q3 is connected with the other end of the second resistor R2, the base of the third NPN transistor Q3 is connected with one end of the third resistor, the other end of the third resistor R3 is connected with the soft start signal Control or the feedback signal Feedback, and the emitter of the third NPN transistor Q3 is connected with the ground terminal GND, which can effectively avoid the influence of the parameter control between the soft start time and the shutdown response. BRIEF DESCRIPTION OF DRAWINGS

[0015] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed in the prior art and the embodiments will be briefly introduced as follows. Obviously, the drawings in the following description are only some embodiments of the present application, and other drawings can be obtained by those skilled in the art without creative labor.

[0016] Figure 1 、 Figure 2 It is a structure diagram of the disclosed RC topology type current limiting protection circuit controlled by soft start.

[0017] Figure 3 It is a structure diagram of the current limiting protection circuit controlled by soft start in an embodiment of the present application.

[0018] Figure 4 、 Figure 5 It is a structure diagram of the current limiting protection circuit controlled by soft start in another embodiment of the present application.

[0019] Figure 6The structure diagram of the current limiting protection circuit controlled by soft start in the optional embodiment of the present application. DETAILED DESCRIPTION

[0020] In order to make the purpose, technical scheme and advantages of the embodiments of the present application clearer, the technical scheme of the embodiments of the present application will be described clearly and completely below in combination with the drawings in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, rather than all the embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative labor fall within the scope of protection of the present application.

[0021] The following disclosure provides many different embodiments, or examples, for implementing different structures of the present application. For the purpose of simplifying the present application, the components and settings of specific examples are described below. Of course, they are only examples, and the purpose is not to limit the present application. In addition, the present application can repeatedly refer to numbers and / or letters in different examples. Such repetition is for the purpose of simplification and clarity, and does not indicate the relationship between the various embodiments and / or settings discussed.

[0022] The existing controlled current limiting protection circuit mostly uses RC type topology, so that Figure 1 and Figure 2 The defects of the circuit design disclosed in the example are reflected in the mutual influence when the soft start time and the shutdown response parameters are adjusted. And the soft start and shutdown response need to be completed by RC charging and discharging, and the time of charging and discharging is limited by the time constant curve characteristics range under RC parameters.

[0023] In an embodiment, to solve the mutual response limitation of soft start time and shutdown response regulation and reduce additional power consumption, the application provides a soft start controlled current limiting protection circuit, which comprises a first P-channel MOS tube Q1, a second P-channel MOS tube Q2, a third N-type triode Q3, a first resistor R1, a second resistor R2, a third resistor R3, and a first capacitor C1. The source of the first P-channel MOS tube Q1, the source of the second P-channel MOS tube Q2, one end of the first capacitor C1, and a power input ADD_IN are connected. The drain of the first P-channel MOS tube Q1 and one end of the first resistor R1 are connected, and the gate of the first P-channel MOS tube Q1 inputs a soft start signal Control. The gate of the second P-channel MOS tube Q2 is connected with the other end of the first resistor R1, one end of the second resistor R2, and the other end of the first capacitor C1, and the drain of the second P-channel MOS tube Q2 is connected with a load output Out_RL. The collector of the third N-type triode Q3 is connected with the other end of the second resistor R2, and the base of the third N-type triode Q3 is connected with one end of the third resistor R3. The other end of the third resistor R3 is connected with the soft start signal Control or a feedback signal Feedback. The emitter of the third N-type triode Q3 is connected with a ground terminal GND.

[0024] In this embodiment, as Figure 3As shown, when the soft start signal Control is low, the gate of the first P-channel MOS transistor Q1 is equivalent to ground, the gate-to-source potential difference tends to the negative supply signal ADD_IN voltage, the first P-channel MOS transistor Q1 is turned on, and the supply signal ADD_IN charges the first capacitor C1 through the source and drain of the first P-channel MOS transistor Q1 and the first resistor R1; the base of the third NPN transistor Q3 is grounded through the loop formed by the third resistor R3 and the fourth resistor R4, the gate and source of the second P-channel MOS transistor Q2 tend to be equivalent, the second P-channel MOS transistor Q2 is cut off, and in the soft start stage, the soft start signal Control is high, the third NPN transistor Q3 is turned on, the first capacitor C1 discharges through the loop formed by the second resistor R2 and the third NPN transistor Q3, the voltage at the terminal of the first capacitor C1 gradually decreases, the potential difference between the gate and source of the second P-channel MOS transistor Q2 increases, and the second P-channel MOS transistor Q2 gradually opens until it is fully turned on to supply power to the load output Out_RL; at this time, the voltage difference between the gate and source of the first P-channel MOS transistor Q1 tends to be positive and lower than the turn-on threshold to be cut off, allowing the first capacitor C1 to discharge through the second resistor R2 and the third NPN transistor Q3 during the discharge period, and the supply signal ADD_IN no longer provides additional power to the subsequent circuit through the first resistor R1. Since the second resistor R2 is the only branch for discharging the first capacitor C1, when the capacitance of the first capacitor C1 is fixed, the resistance value of the second resistor R2 can directly determine the actual soft start time without affecting the shutdown response. When the soft start signal Control is low again, the base of the third NPN transistor Q3 re-forms a ground loop through the third resistor R3 and the fourth resistor R4, and the third NPN transistor Q3 is cut off. At this time, there is no additional series resistor to affect the charging process of the first capacitor C1 by the first resistor R1, and the resistance value of the first resistor R1 can directly determine the shutdown response time of the MOS transistor without affecting the soft start time.

[0025] In an embodiment, the application also proposes a soft start control scheme based on the foregoing circuit architecture, which increases the adjustable range of the exponential curve characteristics under inherent parameters. Specifically, a current limiting protection circuit controlled by a soft start, the circuit further comprises a first inverter U1, a second operational amplifier U2, a third operational amplifier U3, a fourth flip-flop U4, a fifth AND gate U5, a sixth resistor R6, a seventh resistor R7, an eighth resistor R8, a first diode D1, and a second capacitor C2. The input end of the first inverter U1 and the 1D pin and the 1Q inverted pin of the fourth flip-flop U4 are connected, and the output end of the first inverter U1 is connected with the feedback signal Feedback. The same phase end of the second operational amplifier U2, the inverted end of the third operational amplifier U3, one end of the second capacitor C2, one end of the sixth resistor R6, and one end of the seventh resistor R7 are connected, and the inverted end of the second operational amplifier U2 is connected with the first reference signal VREF1. The output end of the second operational amplifier U2 is connected with the cathode of the first diode D1, the 1CLK pin of the fourth flip-flop U4, and one end of the eighth resistor R8. The same phase end of the third operational amplifier U3 is connected with the second reference signal VREF2, and the output end of the third operational amplifier U3 is connected with the second input end of the fifth AND gate U5. The first input end of the fifth AND gate U5 is connected with the soft start signal Control, and the output end of the fifth AND gate U5 is connected with the anode of the first diode D1. The PRE end of the fourth flip-flop U4 is connected with the power supply VDD. The CLR end of the fourth flip-flop U4, the other end of the eighth resistor R8, the other end of the second capacitor C2, and the ground end GND are connected.

[0026] In this embodiment, as Figure 4 and Figure 5As shown, in the on or off state of the third N-type transistor Q3, the greater or smaller the voltage potential difference between the first reference signal VREF1 and the second reference signal VREF2, the greater or smaller the control range on the basis of the original will increase or decrease, and the difference is that the soft start signal Control does not indirectly control the conduction of the third N-type transistor Q3, but introduces the feedback signal Feedback to participate in the control. The first capacitor C1 charging stage is still controlled by the soft start signal Control to control the first P-channel MOS Q1 to quickly turn off the second P-channel MOS Q2. In the soft start stage, the soft start signal Control is high, so that the gate-to-source voltage difference of the first P-channel MOS Q1 tends to be positive but still lower than the negative threshold voltage of its conduction, and the first P-channel MOS Q1 is in the off state, at this time the conduction of the third N-type transistor Q3 is determined by the feedback signal Feedback. At the same time, the soft start signal Control signal is input to one input terminal of the fifth AND gate U5, and the non-inverting terminal of the third operational amplifier U3 is connected to the second reference signal VREF2. When the voltage of the second reference signal VREF2 is set higher than the initial voltage of the second capacitor C2, the third operational amplifier U3 outputs high to the other input terminal of the fifth AND gate U5, and the CLK pin of the fourth flip-flop U4 is triggered after the soft start signal Control becomes high. The 1Q pin (5th pin) of the fourth flip-flop U4 outputs a signal to charge the second capacitor C2 through the seventh resistor R7. As the voltage of the second capacitor C2 gradually rises, once it exceeds the second reference signal VREF2, the output of the third operational amplifier U3 turns to low. Since the first reference signal VREF1 connected to the inverting terminal of the second operational amplifier U2 is set higher than VREF2, when the voltage of the second capacitor C2 further rises to exceed the first reference signal VREF1, the second operational amplifier U2 outputs high.In the process of switching the output level of the second operational amplifier U2 and the first inverter U1, when the output of the second operational amplifier U2 is low, the complementary output end 1Q of the fourth flip-flop U4 outputs a low level to the input end of the first inverter U1, and the first inverter U1 outputs a high level after inversion, which drives the third N-type transistor Q3 to be turned on through the third resistor R3, and the first capacitor C1 is discharged through the second resistor R2, so that the second P-channel MOS tube Q2 is gradually turned on to supply power to the load Out_RL. When the output of the second operational amplifier U2 is high, the 1Q pin of the fourth flip-flop U4 outputs a low level, and the second capacitor C2 is discharged through the sixth resistor R6, and the 1Q pin outputs a high level to the first inverter U1, so that the third N-type transistor Q3 is turned off by forming a loop to ground through the third resistor R3 and the fourth resistor R4. During the duration of the soft start signal Control, the first P-channel MOS tube Q1 remains off, and the fifth AND gate U5 waits for the voltage of the second capacitor C2 to be discharged to below the second reference signal VREF2, and then the third operational amplifier U3 outputs a high level to the fifth AND gate U5 again, so that a new cycle is started, and the second P-channel MOS tube Q2 is completely turned on. The soft start signal Control is removed, and the closing time of the loop formed by the third resistor R3 and the fourth resistor R4 to ground corresponds to the voltage difference between the first reference signal VREF1 and the second reference signal VREF2 during the cycle. When the third N-type transistor Q3 is in the on state, reducing the voltage difference between the first reference signal VREF1 and the second reference signal VREF2 by reducing the voltage of the first reference signal VREF1 increases the actual soft start time under the fixed RC parameters. When the third N-type transistor Q3 is in the off state, reducing the voltage difference between the first reference signal VREF1 and the second reference signal VREF2 by increasing the voltage of the second reference signal VREF2 reduces the actual soft start time under the fixed RC parameters. Conversely, when the third N-type transistor Q3 is in the on state, increasing the voltage difference between the first reference signal VREF1 and the second reference signal VREF2 by increasing the voltage of the first reference signal VREF1 reduces the actual soft start time under the fixed RC parameters. When the third N-type transistor Q3 is in the off state, increasing the voltage difference between the first reference signal VREF1 and the second reference signal VREF2 by decreasing the voltage of the second reference signal VREF2 increases the actual soft start time under the fixed RC parameters.

[0027] In one embodiment, as shown in Figure 1 Figure 1 When the input signal controls the power switch Control to drive the transistor Q2 to be turned on, the gate voltage of the MOS tube Q1 approaches the power input +5V_IN in the initial stage of discharging the first capacitor C1, and then a voltage drop occurs. At this time, the soft start process does not respond immediately, and the actual start delay needs to be waited until the gate-source voltage of the MOS tube Q1 drops below the turn-on threshold value, and then the switch tube enters the soft start stage.

[0028] ​To solve the above problems, the application provides a current limiting protection circuit controlled by soft start based on the two above-mentioned embodiments, which further comprises a fifth resistor R5, one end of the fifth resistor R5 is connected with the other end of the first capacitor C1, and the other end of the fifth resistor R5 is connected with the gate of the second P-type MOS tube Q2.

[0029] In this embodiment, as shown in the figure, the first capacitor C1 is connected with the first resistor R1 and the second resistor R2 in series with the fifth resistor R5. Figure 6 When the third N-type triode Q3 is turned on during the high level of the soft start signal Control, the voltage at the end of the first capacitor C1 will form a voltage division through the fifth resistor R5 and the second resistor R2 to supply power to the gate of the second P-channel MOS tube Q2, so that the actual gate control voltage of the second P-channel MOS tube Q2 is lower than the voltage of the first capacitor C1, and during the low level of the soft start signal Control, the potential between the gate and the source of the second P-channel MOS tube Q2 is close to the same potential, and the second P-channel MOS tube Q2 will not misdirect the fault.

[0030] In an embodiment, a fourth resistor R4 is further included, which is used for feedback signal Feedback or soft start signal Control external control or not to enable the pull-down resistor to avoid the pin hanging, and the ninth resistor R9 is connected with the fifth AND gate U5 for switching the input state of the soft start signal Control to false, and the corresponding pull-down resistor of the fifth AND gate U5.

[0031] In an embodiment, referring to Figure 3 、 Figure 4 、 Figure 5 、 Figure 6 , the first resistor R1 and the second resistor R2 can be set as adjustable resistors, which are used for adjusting the off response and soft start time of the corresponding second P-channel MOS tube Q2 in cooperation with the first capacitor C1. Figure 4 In the above-mentioned embodiment, the voltage increase or decrease of the first reference signal VREF1 and the second reference signal VREF2 can be controlled by the voltage regulating circuit or set to different voltages by the voltage dividing circuit and then switched by the gating circuit, and the voltage dividing circuit and the gating circuit are not shown in the figure.

[0032] It is to be understood that the terminology used herein is for the purpose of describing particular example embodiments only and is not intended to be limiting. As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. The terms "comprises", "comprising", "includes", "including" and "has" are inclusive and therefore specify the presence of stated features, steps, operations, elements, and / or components, but do not preclude the presence or addition of one or more other features, steps, operations, elements, components, and / or groups thereof. The method steps, processes, and operations described herein are not to be construed as necessarily requiring their performance in the particular order

[0033] The above description is merely that of the specific embodiments of the application and as such is not to be taken in a limiting sense. Various modifications and alterations of the described embodiments will become apparent to those skilled in the art from the foregoing description, it is intended that all such modifications and alterations be considered as falling within the scope of the application. Accordingly, though the application has been described in some detail for the purposes of clarity and example, it is readily apparent to those of ordinary skill in the art that numerous other modifications and alterations can be made without departing from the spirit and scope of the application.

Claims

1. A current-limiting protection circuit controlled by soft start, characterized in that, It includes a first P-channel MOSFET, a second P-channel MOSFET, a third N-type transistor, a first resistor, a second resistor, a third resistor, and a first capacitor. The source of the first P-channel MOSFET, the source of the second P-channel MOSFET, one end of the first capacitor, and the power input ADD_IN are connected. The drain of the first P-channel MOSFET is connected to one end of the first resistor, and the gate of the first P-channel MOSFET receives the soft-start signal Control. The gate of the second P-channel MOSFET is connected to the other end of the first resistor, one end of the second resistor, and the other end of the first capacitor. The drain of the second P-channel MOSFET outputs Out_RL. The collector of the third N-type transistor is connected to the other end of the second resistor; the base of the third N-type transistor is connected to one end of the third resistor; the other end of the third resistor is connected to the soft-start signal Control; and the emitter of the third N-type transistor is connected to the ground terminal GND.

2. The current-limiting protection circuit controlled by soft start according to claim 1, characterized in that, It also includes a first inverter, a second operational amplifier, a third operational amplifier, a fourth flip-flop, a fifth AND gate, a sixth resistor, a seventh resistor, an eighth resistor, a first diode, and a second capacitor. The input terminal of the first inverter is connected to the 1D pin and the 1Q inverted pin of the fourth flip-flop. The output terminal of the first inverter is connected to the feedback signal. The other end of the third resistor is changed to be connected to the feedback signal. The non-inverting input of the second operational amplifier is connected to the inverting input of the third operational amplifier, one end of the second capacitor, one end of the sixth resistor, and one end of the seventh resistor. The inverting input of the second operational amplifier is connected to the first reference signal VREF1. The output of the second operational amplifier is connected to the cathode of the first diode, the 1CLK pin of the fourth flip-flop, and one end of the eighth resistor. The non-inverting input of the third operational amplifier is connected to the second reference signal VREF2. The output of the third operational amplifier is connected to the second input of the fifth AND gate. The first input of the fifth AND gate is connected to the soft-start signal Control. The output of the fifth AND gate is connected to the anode of the first diode. The PRE pin of the fourth flip-flop is connected to the power supply VDD. The CLR pin of the fourth flip-flop, the other end of the eighth resistor, the other end of the second capacitor, and the ground GND are connected.

3. The current-limiting protection circuit controlled by soft start according to claim 1 or 2, characterized in that, It also includes a fifth resistor, one end of which is connected to the other end of the first capacitor, and the other end of the fifth resistor is connected to the gate of the second P-type MOS transistor.

4. The current-limiting protection circuit controlled by soft start according to claim 1, characterized in that, It also includes a fourth resistor, one end of which is connected to the other end of the third resistor and the feedback signal, and the other end of the fourth resistor is connected to the ground terminal GND.

5. The current-limiting protection circuit controlled by soft start according to claim 1, characterized in that, The first resistor and the second resistor are adjustable resistors.

6. The current-limiting protection circuit controlled by soft start according to claim 2, characterized in that, It also includes a ninth resistor, one end of which is connected to the soft-start signal Control, and the other end of which is connected to the output of the third operational amplifier.

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