Processing method and device for fractional bit rate compression of satellite-borne SAR (Synthetic Aperture Radar) original data

Abstract

The invention discloses a processing method and device for fractional bit rate compression of spaceborne SAR original data, and belongs to the technical field of synthetic aperture radars. According to the method, non-integer bit rate compression is achieved through two-stage coding, and the method comprises the steps that firstly, original data are partitioned, the amplitude mean value is calculated, and first-stage single sample coding is carried out; and then combining a plurality of first-level coding results as an address, searching a second-level coding table pre-stored in an ROM (Read Only Memory) of the FPGA, and obtaining final coding output. According to the method, on the premise that the high quantization signal-to-noise ratio is kept, fractional bit rate compression close to the theoretical limit can be achieved, the data transmission amount is effectively reduced, and the method is suitable for SAR systems of various platforms such as spaceborne platforms and airborne platforms.

Description

Technical Field

[0001] This invention belongs to the field of synthetic aperture radar technology, specifically relating to a method and apparatus for processing fractional bit rate compression of raw spaceborne SAR data. Background Technology

[0002] In spaceborne synthetic aperture radar (SAR) systems, radar echo signals, after being sampled and quantized on-board, need to be downlinked to ground stations for imaging processing. Due to the wide mapping bandwidth and large system dynamic range of spaceborne SAR, the raw echo data volume is enormous and the data rate is extremely high, posing a severe challenge to the space-to-ground data transmission link. To reduce the data volume and alleviate transmission pressure, the raw data must be compressed without significantly degrading system performance.

[0003] Raw SAR data approximately follows a normal distribution with a mean of zero, and its variance exhibits slowly varying characteristics in the range and azimuth directions. Based on this statistical characteristic, the Block Adaptive Quantization (BAQ) algorithm is widely adopted. This algorithm divides the data into blocks, calculates the mean amplitude of each block, and uses this as a basis for optimal quantization and encoding of the data within each block, achieving efficient compression. Currently, spaceborne SAR systems commonly employ FPGA-based BAQ compression implementations, typically using integer bit rate compression, such as 3 or 4 bits per sampling point.

[0004] However, as the swath width of SAR systems continues to increase, the amount of raw data continues to grow. Even with 3-bit compression, the data rate may still exceed the bandwidth limit of satellite-to-ground transmission. If the system can only choose between integer bit rates, it has to further reduce the compression rate to lower levels such as 2-bit or 1-bit, resulting in a significant decrease in the quantization signal-to-noise ratio and affecting the final imaging quality.

[0005] Theoretical analysis shows that the compression ratio of BAQ compression is directly related to the number of reconstructed levels, Q, with a theoretical maximum compression ratio of log₂Q. Integer bit rate compression corresponds to Q values ​​that are powers of 2 (e.g., 4 and 8 correspond to 2 bits and 3 bits respectively). Other Q values ​​exist between these integer powers (e.g., 5, 6, 7), with corresponding compression ratios (e.g., 2.32, 2.58, 2.81) falling within the range of integer bit rates. If these fractional bit rate compressions can be implemented, a more flexible balance can be achieved between transmission bandwidth and system performance, avoiding performance loss caused by being forced to choose excessively low integer bit rates. Summary of the Invention

[0006] To address the aforementioned technical problems, this invention provides a method and apparatus for processing fractional bit rate compression of raw spaceborne SAR data. It is mainly applied to spaceborne synthetic aperture radar systems, compressing and encoding raw SAR data to reduce the amount of data in the SAR system and lower the data rate of raw data downlink from the spaceborne SAR system.

[0007] To achieve the above object, the technical solution adopted by the present invention is as follows:

[0008] A processing method for fractional bit rate compression of spaceborne SAR raw data, the method comprising:

[0009] Step 1, dividing the input raw data into blocks by frame;

[0010] Step 2, accumulating the amplitudes of each block of data and calculating the amplitude mean value of the block of data;

[0011] Step 3, encoding the raw data by using the amplitude mean value of the block of data, and forming the encoding result of the first-level single sample point by combining the sign bit of the raw data and the encoding value;

[0012] Step 4, combining the encoding results of consecutive N first-level single sample points to form a joint encoding address;

[0013] Step 5, inputting the joint encoding address into a ROM pre-stored with an encoding mapping table, performing a second-level multi-sample joint encoding look-up table operation, and outputting a final encoding result with a length of L bits, where L and N satisfy: 2 L >Q N , and L < N × K, where K represents the number of bits of the encoding result of the first-level single sample point, and Q is a preset quantization reconstruction level number.

[0014] On the other hand, the present invention provides a processing device for fractional bit rate compression of spaceborne SAR raw data, comprising:

[0015] A block module, configured to divide the input raw data into blocks by frame;

[0016] An average value calculation module, configured to accumulate the amplitudes of each block of data and calculate the amplitude mean value of the block of data;

[0017] A first encoding module, configured to encode the raw data by using the amplitude mean value of the block of data, and form the encoding result of the first-level single sample point by combining the sign bit of the raw data and the encoding value;

[0018] A joint encoding module, configured to combine the encoding results of consecutive N first-level single sample points to form a joint encoding address;

[0019] An output module, configured to input the joint encoding address into a ROM pre-stored with an encoding mapping table, perform a second-level multi-sample joint encoding look-up table operation, and output a final encoding result with a length of L bits, where L and N satisfy: 2 L >Q Nand \(L < N\times K\), where \(K\) represents the number of bits of the coding result of the first-level single-sample points, and \(Q\) is the preset quantization reconstruction level number.

[0020] In a third aspect, the present invention provides an electronic device, including: one or more processors; a memory for storing one or more programs; wherein, when the one or more programs are executed by the one or more processors, the one or more processors are caused to implement the foregoing method for processing fractional bit rate compression of spaceborne SAR raw data.

[0021] In a fourth aspect, the present invention provides a computer-readable storage medium, on which executable instructions are stored, and when the instructions are executed by a processor, the processor can implement the foregoing method for processing fractional bit rate compression of spaceborne SAR raw data.

[0022] The beneficial effects of the present invention are as follows:

[0023] Efficient compression coding of non-integer powers of 2 reconstruction levels is achieved. Through a two-stage coding mechanism (single-sample coding and multi-sample joint coding), the redundancy of codewords is effectively reduced, making the actual compression ratio closer to the theoretical limit value and improving the compression efficiency.

[0024] More compression ratio options between integer bit rates are provided (such as 2.32 bit / sample point, 2.58 bit / sample point, etc.). When the space-ground transmission bandwidth is limited, it can avoid the steep drop in system performance caused by forced selection of too low integer bit rates, and achieve a more flexible trade-off between data rate and imaging quality.

[0025] The hardware implementation is simple and reliable. The second-stage coding uses a look-up table method, pre-stores the coding mapping relationship in the ROM of the FPGA, and directly addresses using the combination of the first-stage coding results. The processing flow is efficient and it is easy to integrate and parallel process on the existing spaceborne FPGA platform.

[0026] The encoding and decoding processes have good reversibility. The addresses and data in the ROM correspond one by one, ensuring that the first-stage coding result of the original data can be accurately restored during ground decoding, and then the signal can be reconstructed losslessly, ensuring the reliability of the data.

[0027] This solution is not only applicable to spaceborne SAR systems, but can also be widely applied to SAR systems on various platforms such as airborne and vehicle-mounted platforms, and has good versatility and application value for promotion. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] Figure 1 It is a schematic diagram of the method for processing fractional bit rate compression of spaceborne SAR raw data according to the present invention;

[0029] Figure 2This is a flowchart of the fractional bit rate compression method for raw spaceborne SAR data according to the present invention.

[0030] Figure 3 A flowchart is generated for the second-level encoding results;

[0031] Figure 4 This is a schematic diagram of the processing device for fractional bit rate compression of raw spaceborne SAR data according to the present invention. Detailed Implementation

[0032] The present invention will be further described below with reference to the accompanying drawings and embodiments.

[0033] like Figure 1 As shown, this invention proposes a fractional bit rate compression method for raw spaceborne SAR data, which solves the problem that traditional BAQ algorithms can only achieve integer bit rates, such as 1 bit / sample point, 2 bits / sample point, 3 bits / sample point, 4 bits / sample point, etc. When the system bit rate is within the selectable integer bit rate range, if the data rate is too large to meet the data transmission bandwidth, a lower integer bit rate must be selected. However, compression at a smaller integer bit rate affects system performance.

[0034] Integer bit rate data compression requires only one level of encoding, while fractional bit rate data compression requires two levels of encoding to achieve a compression ratio close to the theoretical value. The first level performs single-sample point encoding, and the second level performs multi-sample point joint encoding. If only the first level of single-sample encoding is performed, the compressed bit rate is still an integer. For non-integer powers of 2 reconstructed level encoding, the codeword redundancy is large, and the data volume is not reduced. Therefore, multi-sample encoding is required. Although the average compression ratio cannot reach the theoretical limit, the codeword redundancy is less than that of single-sample binary encoding, and the data volume is less than that of single-sample encoding.

[0035] like Figure 2 As shown, based on the above theory, the method of the present invention specifically includes:

[0036] Step 1: Divide the input raw data into blocks by frame; the FPGA receives the raw data in real time and buffers it in a FIFO. The size of the blocks is controlled by the radar system command and can be dynamically adjusted.

[0037] Step 2: Accumulate the amplitude of each data block and calculate the average amplitude of the data blocks; the original radar data is obtained by sampling and quantizing the radar analog echo signal through an analog-to-digital converter chip. Assuming the quantized digital signal has F bits and the original data amplitude is (F-1) bits, the sum of the amplitudes of each data block is directly truncated to the highest (F-1) bits as the average amplitude of that data block.

[0038] Step 3: Use the amplitude mean of the block data to encode the original data, and form the encoding result of the first-level single sample point by combining the sign bit of the original data and the encoding value. Since there is a one-to-one correspondence between the amplitude mean of the SAR original data and the standard deviation of the echo signal, the standard deviation of the data can be stored in the ROM inside the FPGA in advance, avoiding the complex steps of directly calculating the standard deviation and saving hardware resources. The amplitude mean is (F - 1) bits, and the standard deviation corresponding to each amplitude mean is prestored in the ROM of the FPGA. The depth of the ROM is 2 (F-1) . Use the amplitude mean of the block data as the address to look up the ROM table to obtain the standard deviation of the block data. Divide the amplitude of each original data within the block by the standard deviation of the block data, and then compare it with the Lloyd-Max quantizer threshold level to obtain the encoding value. Combine the sign bit of the original data and the encoding value to form the encoding result of the first-level single sample point.

[0039] Step 4: Combine N consecutive first-level encoding results to form a combined encoding address;

[0040] Concatenate N consecutive first-level encoding results in sequence to form a combined address with a length of N×K bits, where K = ROUNDUP(log2Q), and K is the number of bits of the first-level encoding result. To ensure data continuity, set a shift register or FIFO buffer in the FPGA to cache the first-level encoding results in sequence. Trigger an address combination operation every time N samples are accumulated. During the combination process, perform a validity check on each first-level encoding result (such as whether it is within the range of valid codewords). If an invalid codeword is found, mark the address as abnormal and perform special processing during subsequent table lookups (such as outputting a predefined error flag). To improve processing efficiency, multiple data streams can be processed in parallel, with each stream independently performing address combination and implementing concurrent table lookups through a multi-port ROM or a distributed ROM.

[0041] Step 5: Input the combined encoding address into the ROM pre-stored with the encoding mapping table to perform a second-level multi-sample combined encoding table lookup operation, and output the final encoding result with a length of L bits, where L and N satisfy: 2 L >Q N , and L < N×ROUNDUP(log2Q), Q is the preset number of quantization reconstruction levels, and ROUNDUP represents the ceiling operation.

[0042] For the second-level encoding, taking a reconstruction level of Q=6 as an example, there are 256 possibilities for an 8-bit binary number, which is greater than all combinations of the first-level encoding results for N=3 sample points. The first-level encoding results of the three original data points are combined to form a 9-bit address. A ROM is allocated in the FPGA, with the address representing the combination of the first-level encoding results of the three sampled data points. Each address in the ROM stores one 8-bit data. Thus, using the first-level encoding result as the address to look up the ROM table yields the result after the second-level encoding. During decoding, since each data point in the ROM corresponds one-to-one with its address, and the data in the ROM is ultimately output, the address corresponding to that data can be deduced from the data in the ROM, thus obtaining the first-level encoding result of the original data. Finally, decoding is used to obtain the final original data.

[0043] like Figure 3 As shown, in the second-level multi-sample joint encoding, the selection methods for the number of multi-samples N and the final number of bits L of the encoding result are as follows:

[0044] 1) The number of quantization levels is Q. The original data is compressed using BAQ. After the first-level single-sample encoding, there are at most Q encoding results. The number of bits for each encoding result is K=ROUNDUP(log2Q).

[0045] 2) The total number of combinations of the first-level encoding results of N original data is Q. N The number of bits L in the second-level encoding result should satisfy 2. L >Q N Generally, we take L = ROUNDUP(log2Q) N At the same time, L < (N × K) should be satisfied.

[0046] 3) The ROM storing the second-level encoding result has an address of (N×K) bits, with each address space storing L bits of data. The required storage space is (2... (N×K) ×L) bits.

[0047] 4) The actual data compression rate is L / N, which is close to the theoretical compression rate log2Q.

[0048] 5) Since FPGAs process multiple data streams in parallel, N is generally chosen as an integer power of 2 to simplify the second-level encoding process.

[0049] In fractional bit rate (FBR) data compression processing devices, the FPGA stores the pre-generated second-level encoding results in its internal ROM. Since the data bit width inside the ROM is smaller than the address bit width, the data inside the ROM can be accumulated according to the address increment when generating the second-level encoding table. When a redundant codeword from the first-level encoding appears at a certain address, the data corresponding to that address is set to its maximum value, i.e., 2. L -1. When there are no redundant codewords in the address, the data continues to accumulate.

[0050] Example:

[0051] Taking a reconstructed level count of Q=6 as an example, after the first-level single-sample encoding, there are at most Q=6 encoding results (110, 101, 100, 000, 001, and 010), although each encoding result is 3 bits. However, the difference from 3-bit integer compression (reconstructed level count Q=8) is that there are no codewords 011 and 111. If only one level of encoding is performed, the encoding result is 3 bits, with 2 redundant codewords. Similarly, if the reconstructed level count is Q=5, there are at most 5 encoding results after the first-level single-sample encoding. If only one level of encoding is performed, the encoding result is still 3 bits, with 3 redundant codewords.

[0052] To eliminate redundant codewords, a second-level multi-sample joint encoding is required. For example, assuming a reconstruction level of Q=6, if 3 sample points are selected for the second-level encoding, the probability of the result after encoding with 3 sample points is 6. 3 =216. Because 2 8 The value is greater than 2^16, meaning that the final 8-bit encoding result can represent all combinations of 3 sample points. The actual compression ratio is 8 bits / 3 = 2.666 bits / sample point, which is close to the theoretical value of log26 = 2.5850. If 4 sample points are selected for the second-level encoding, the probability of the result after encoding 4 sample points is 6. 4 =1296. Because of 2 11 The value is greater than 1296, meaning that the final 11-bit encoding result can represent all combinations of 4 sample points. The actual compression ratio is 11 bits / 4 = 2.75 bits / sample point, which is approximately close to the theoretical value of log26 = 2.5850.

[0053] On the other hand, such as Figure 4As shown, the present invention provides a processing device for fractional bit rate compression of on-board SAR raw data. First, the FPGA caches the radar raw sampling data in the FIFO, and the FPGA blocks the raw data according to the received control instructions. The blocked data enters the accumulator for amplitude accumulation to obtain the amplitude mean value. Then, the data is subjected to the first-level coding compression. The multiple first-level coding results are combined into an address lookup ROM to obtain the second-level coding result. At the same time, the amplitude mean value is stored in the RAM, and finally, the amplitude mean value in the RAM and the coding result in the ROM are output together. Each module included in the device can implement each step of the foregoing method. Specifically, it includes:

[0054] A blocking module for blocking the input raw data by frame;

[0055] A mean value calculation module for accumulating the amplitudes of each blocked data and calculating the amplitude mean value of the blocked data;

[0056] A first coding module for coding the raw data using the amplitude mean value of the blocked data, and forming the coding result of the first-level single sample point by combining the sign bit of the raw data and the coding value;

[0057] A joint coding module for combining the coding results of continuous N first-level single sample points to form a joint coding address;

[0058] An output module for inputting the joint coding address into a ROM pre-stored with a coding mapping table, performing a second-level multi-sample joint coding lookup operation, and outputting a final coding result with a length of L bits, where L and N satisfy: 2 L >Q N , and L < N×K, where K represents the number of bits of the coding result of the first-level single sample point.

[0059] The present invention also provides an electronic device, including: one or more processors; a memory for storing one or more programs; wherein, when the one or more programs are executed by the one or more processors, the one or more processors implement the foregoing processing method for fractional bit rate compression of on-board SAR raw data.

[0060] The present invention also provides a computer-readable storage medium, on which executable instructions are stored, and when the instructions are executed by a processor, the processor can implement the foregoing processing method for fractional bit rate compression of on-board SAR raw data.

[0061] The specific embodiments described above further illustrate the purpose, technical solution, and beneficial effects of the present invention. It should be understood that the above descriptions are merely specific embodiments of the present invention and are not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. A method for processing fractional bit rate compression of raw spaceborne SAR data, characterized in that, The method includes: Step 1: Divide the input raw data into blocks by frame; Step 2: Accumulate the amplitude of each data block and calculate the average amplitude of the data blocks; Step 3: Encode the original data using the mean amplitude of the segmented data, and combine the sign bit of the original data with the encoded value to form the encoding result of the first-level single sample point; Step 4: Combine the encoding results of N consecutive first-level single sample points to form a joint encoded address; Step 5, input the joint coding address into a ROM pre-stored with a coding mapping table, perform a second-level multi-sample joint coding look-up operation, and output a final coding result with a length of L bits, where L and N satisfy: 2 L > Q N , and L < N × K, where K represents the number of bits of the coding result of the first-level single-sample points, and Q is the preset quantization reconstruction level number.

2. The method for fractional bit rate compression of raw spaceborne SAR data according to claim 1, characterized in that, Step 1 includes: after the raw data is input, it is cached in the FIFO in the FPGA, the block size is dynamically adjusted according to the radar system instructions, and the block processing is performed by frame.

3. The method for processing fractional bit rate compression of raw spaceborne SAR data according to claim 1, characterized in that, Step 2 includes: accumulating the amplitude of the block data, and directly extracting the high (F-1) bits of the sum as the average amplitude of the block, where F is the quantization bit depth of the original data.

4. The method for processing fractional bit rate compression of raw spaceborne SAR data according to claim 1, characterized in that, Step 3 includes: using the mean amplitude as the address to search the ROM that stores the standard deviation, and obtaining the standard deviation of the block data; dividing the amplitude of each data in the block by the standard deviation and comparing it with the Lloyd-Max quantizer threshold to obtain the encoded value, and then combining it with the original data sign bit to form the encoding result of the first-level single sample point.

5. The method for fractional bit rate compression of raw spaceborne SAR data according to claim 1, characterized in that, Step 4 includes: sequentially concatenating the encoding results of N consecutive first-level single-sample points to form a joint encoding address of length N×K bits, where K=ROUNDUP(log2Q), Q is the preset number of quantization reconstruction levels, and ROUNDUP represents the rounding up operation; during the concatenation process, the encoding results of the first-level single-sample points are sequentially cached and synchronized through a shift register or FIFO buffer, and a joint encoding address is generated every N accumulated samples.

6. The method for processing fractional bit rate compression of raw spaceborne SAR data according to claim 1, characterized in that, In step 5, the encoding mapping table stored in the ROM is generated in the following way: all possible combinations of encoding results of N first-level single sample points are sequentially mapped to a continuous integer range, and unused redundant codeword combinations are eliminated. Each valid combination uniquely corresponds to an L-bit encoded output.

7. The method for processing fractional bit rate compression of raw spaceborne SAR data according to claim 6, characterized in that, When generating the encoding mapping table, if the combination corresponding to a certain address is an invalid or redundant codeword, the output data corresponding to that address is set to all 1s or a specific identifier value.

8. A processing device for fractional bit rate compression of raw spaceborne SAR data, characterized in that, include: The chunking module is used to divide the input raw data into chunks by frames; The mean calculation module is used to accumulate the amplitude of each data block and calculate the mean amplitude of the data block. The first encoding module is used to encode the original data using the mean amplitude of the block data, and to combine the sign bit of the original data with the encoded value to form the encoding result of the first-level single sample point; The joint encoding module is used to combine the encoding results of N consecutive first-level single sample points to form a joint encoded address; An output module, configured to input the joint encoded address into a ROM pre-stored with a coding mapping table, perform a second-level multi-sample joint coding look-up operation, and output a final coding result with a length of L bits, where L and N satisfy: 2 L > Q N , and L < N × K, where K represents the number of bits of the coding result of the first-level single-sample points, and Q is a preset quantization reconstruction level number.

9. An electronic device, characterized in that, include: One or more processors; Memory, used to store one or more programs; When one or more programs are executed by the one or more processors, the one or more processors implement the fractional bit rate compression processing method for raw spaceborne SAR data as described in any one of claims 1-7.

10. A computer-readable storage medium, characterized in that, It stores executable instructions that, when executed by a processor, enable the processor to implement the fractional bit rate compression processing method for raw spaceborne SAR data as described in any one of claims 1-7.

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