Light-emitting substrate and display device

By optimizing the arrangement of signal lines, reducing the number and width of signal lines, the problems of high resistance and wide bezel in the light-emitting substrate were solved, achieving the effects of narrow bezel and reduced cost.

CN121115352APending Publication Date: 2025-12-12HEFEI BOE RUISHENG TECH CO LTD +1
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Patent Information

Application Number
CN202511630850.4
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2023-06-29
Publication Date
2025-12-12

AI Technical Summary

Technical Problem

Existing light-emitting substrates have a large number of signal lines, resulting in high resistance, large border width, and high manufacturing costs.

Method used

By optimizing the arrangement of signal lines, the number and width of signal lines can be reduced, the width of signal lines can be increased, the resistance can be reduced, and the manufacturing process can be simplified.

Benefits of technology

The narrow bezel design reduces the manufacturing cost of the light-emitting substrate and display device, while improving the wiring space and resistance performance of the signal lines.

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Abstract

The embodiment of the invention provides a light-emitting substrate and a display device, relates to the technical field of display, and is used for reducing the number of signal lines of the light-emitting substrate and reducing the resistance of the signal lines. The light-emitting substrate comprises a substrate, a plurality of signal line groups, a plurality of columns of element groups and a plurality of columns of control chips. The plurality of signal line groups are arranged on the substrate and are arranged along a first direction. Each signal line group comprises a plurality of signal lines arranged along a first direction. The plurality of columns of element groups are arranged along the first direction, each column of element group comprises a plurality of element groups, each column of element group is electrically connected with part of the signal lines of one signal line group, and each element group comprises a plurality of light-emitting elements which are arranged at intervals along the first direction. The plurality of columns of control chips are arranged along a first direction, and each column of control chips comprises a plurality of control chips which are arranged at intervals along a second direction. One column of control chips is arranged on one side of one column of element group along the first direction and is electrically connected with one column of element group and a part of signal lines of one signal line group. The light-emitting substrate is used for emitting light.
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Description

[0001] This application is a divisional application of the patent application with the application number 202310798947.0 and the application date of June 29, 2023, and the invention name of "Light-emitting substrate and display device". TECHNICAL FIELD

[0002] The present disclosure relates to the technical field of display, and in particular, to a light-emitting substrate and a display device. BACKGROUND

[0003] With the development of light-emitting diode technology, backlight sources using mini light-emitting diodes (Mini-LED) and micro light-emitting diodes (Micro-LED) have been widely applied. The size of Mini-LED is about 100 μm~300 μm, and the size of Micro-LED is less than 100 μm. Mini-LED and Micro-LED have small size and high brightness, and when applied to a backlight module, they can finely adjust the backlight, thereby realizing the display of high dynamic range images (High-Dynamic Range; HDR), and thus have attracted more and more attention. SUMMARY

[0004] Embodiments of the present disclosure aim to provide a light-emitting substrate and a display device for reducing the number of signal lines in the light-emitting substrate, reducing the resistance of the signal lines, reducing the frame width of the light-emitting substrate, and reducing the manufacturing cost of the light-emitting substrate and the display device.

[0005] To achieve the above-mentioned purpose, embodiments of the present disclosure provide the following technical solutions: A light-emitting substrate is provided. The light-emitting substrate includes a substrate, a plurality of signal line groups, a plurality of element groups, and a plurality of control chips. The plurality of signal line groups are arranged on the substrate and along a first direction. Each signal line group includes a plurality of signal lines arranged along the first direction. The plurality of element groups are arranged along the first direction, and each element group includes a plurality of elements arranged along a second direction and electrically connected in sequence. Each element group is electrically connected to part of the signal lines of one signal line group. The plurality of control chips are arranged along the first direction, and each control chip includes a plurality of control chips arranged along the second direction. One control chip is arranged on one side of one element group along the first direction and is electrically connected to the one element group and part of the signal lines of one signal line group.

[0006] The light-emitting substrate provided by the embodiments of the present disclosure has a plurality of element groups arranged along a first direction, each element group includes a plurality of element groups arranged along a second direction, and each element group is electrically connected to part of the signal lines of one signal line group, that is, the plurality of element groups of each element group are connected to the corresponding signal line group, so that the number of signal line groups is equal to the number of columns of element groups. Compared with arranging a plurality of light-emitting element arrays of an element group, in the embodiments of the present disclosure, the plurality of light-emitting elements of each element group are arranged along the first direction, and in the case that the number and density of the arrangement of light-emitting elements remain unchanged, the space occupied by the element group along the first direction can be maximized, thereby reducing the number of columns of element groups and achieving the purpose of reducing the number of signal line groups. The reduction of the number of signal line groups is conducive to reducing the number of fan-out lines, thereby reducing the width of the peripheral area, especially the width of the bonding area, which is conducive to reducing the frame width of the light-emitting substrate, thereby enabling the display device to achieve a narrow frame. Moreover, due to the reduction of the number of signal line groups, in the case that the area of the substrate remains unchanged and the arrangement density of the light-emitting elements remains unchanged, the wiring space of the signal line group can be greatly improved, which is conducive to increasing the width of the plurality of signal lines included in the signal line group, thereby reducing the resistance of the plurality of signal lines included in the signal line group. Moreover, based on the increase of the width of the signal lines of the signal line group, the thickness of the signal lines included in the signal line group can be reduced without significantly increasing the resistance of the signal lines, thereby reducing the amount of etching liquid used in the preparation process of the signal line group, thereby achieving the purpose of reducing the preparation cost of the light-emitting substrate.

[0007] In some embodiments, the plurality of light-emitting elements of the element group includes a first light-emitting element and at least one second light-emitting element, and the first light-emitting element is located at one end of the element group along the first direction. The signal line group includes a ground trace and a first voltage signal line. The ground trace is located between the first light-emitting element and the at least one second light-emitting element, and the first voltage signal line is located on the side of the at least one second light-emitting element away from the first light-emitting element. The control chip is arranged on the side of the first light-emitting element along the second direction.

[0008] In some embodiments, the light-emitting substrate further includes a first bridge portion. The first bridge portion is configured to connect the first light-emitting element and the second light-emitting element closest to the first light-emitting element.

[0009] In some embodiments, the group of elements includes a plurality of the second light emitting elements. The group of signal lines further includes a first connection line. The first connection line is disposed between two adjacent second light emitting elements and configured to connect the two adjacent second light emitting elements. The light emitting substrate further includes a first connection pattern. The first connection pattern is electrically connected to the second light emitting element closest to the first light emitting element and electrically connected to the first bridge. A dimension of the first connection pattern along the second direction is greater than a dimension of the first connection line along the second direction.

[0010] In some embodiments, the first bridge has a resistivity less than a resistivity of the first connection line.

[0011] In some embodiments, the group of signal lines further includes a second connection pattern. The second connection pattern is electrically connected to the first light emitting element and electrically connected to the first bridge. A dimension of the second connection pattern along the second direction is greater than a dimension of the first connection line along the second direction. The second connection pattern is located on a side of the first light emitting element along the second direction or between the first light emitting element and the ground trace.

[0012] In some embodiments, the ground trace includes a first body portion and a plurality of first protruding portions. The first body portion extends along the second direction and is located between the first light emitting element and the at least one second light emitting element. The plurality of first protruding portions are located on a side of the first body portion close to the at least one second light emitting element and connected to the first body portion. The first protruding portions extend along the first direction and are located between two adjacent groups of elements along the second direction.

[0013] In some embodiments, at least one of the plurality of first voltage signal lines included in the group of signal lines is a first target signal line. The first target signal line includes a second body portion and a plurality of second protruding portions. The second body portion extends along the second direction and is located on a side of the at least one second light emitting element away from the first light emitting element. The plurality of second protruding portions are located on a side of the second body portion close to the ground trace and connected to the second body portion. The second protruding portions extend along the first direction and are located between two adjacent groups of elements along the second direction.

[0014] In some embodiments, the plurality of signal line groups includes at least one of the plurality of first voltage signal lines as a second target signal line. The second target signal line includes a plurality of second protrusions. The plurality of second protrusions are arranged in the second direction. Each second protrusion is connected to a corresponding element group, and the second protrusion is located on one side of the element group in the second direction. The light-emitting substrate further includes a plurality of second bridge portions configured to connect two second protrusions adjacent in the second direction.

[0015] In some embodiments, the plurality of signal line groups includes at least one of the plurality of first voltage signal lines as a second target signal line. The second target signal line includes a plurality of second protrusions. The plurality of second protrusions are arranged in the second direction. Each second protrusion is connected to a corresponding element group, and the second protrusion is located on one side of the element group in the second direction. The light-emitting substrate further includes a plurality of second bridge portions configured to connect two second protrusions adjacent in the second direction.

[0016] In some embodiments, a first protrusion and a second protrusion are arranged between two adjacent element groups in the second direction. The first protrusion and the second protrusion are arranged side by side in the first direction. In some embodiments, the first connection pattern of the light-emitting substrate is located between the second light-emitting element closest to the first light-emitting element and the ground trace.

[0017] In some embodiments, a first protrusion and a second protrusion are arranged between two adjacent element groups in the second direction. The first protrusion and the second protrusion are arranged side by side in the second direction.

[0018] In some embodiments, the first connection pattern of the light-emitting substrate is located on one side of the second light-emitting element closest to the first light-emitting element in the second direction.

[0019] In some embodiments, the first connection pattern of the light-emitting substrate is arranged side by side with the second protrusion in the first direction. The size of the first protrusion in the first direction is greater than the size of the second protrusion in the first direction.

[0020] In some embodiments, the size of the first main portion in the first direction is 1.9mm~2.1mm. The size of the second main portion in the first direction is 3.4mm~3.7mm.

[0021] In some embodiments, the signal line group further comprises an addressing signal line, a power signal line, and a feedback signal line. In the first direction, the addressing signal line, the power signal line, the ground trace, the feedback signal line, and the first voltage signal line are arranged in sequence. A portion of the addressing signal line and a portion of the power signal line are located between the first light emitting element and the at least one second light emitting element, and the feedback signal line is located on a side of the ground trace away from the control chip and extends along a boundary of the side of the ground trace away from the control chip.

[0022] In some embodiments, the light emitting substrate has a device region and a bonding region arranged side by side in the second direction, and the plurality of element groups and the plurality of light emitting elements are arranged in the device region. The light emitting substrate further comprises a first boundary, a second boundary, and a bonding pin. A ground trace closest to the first boundary in the signal line group is closer to the first boundary than a first voltage signal line closest to the first boundary, and a spacing between the first boundary and the signal line group is 2.0 mm to 2.3 mm. The first boundary and the second boundary are opposite in the first direction. A first voltage signal line closest to the second boundary in the signal line group is closer to the second boundary than a ground trace closest to the second boundary, and a spacing between the second boundary and the signal line group is 2.0 mm to 2.3 mm. In the second direction, a minimum spacing between the bonding pin and the signal line group is 1.3 mm to 1.6 mm.

[0023] In some embodiments, the signal line group comprises a ground trace and a first voltage signal line. The plurality of light emitting elements of the element group are arranged between the ground trace and the first voltage signal line.

[0024] In some embodiments, the light emitting substrate further comprises a second connection line. The second connection line is located between two adjacent light emitting elements of the element group and is configured to connect the two adjacent light emitting elements. A dimension of the second connection line in the second direction is greater than a dimension of the light emitting element in the second direction. In the second direction, a spacing between two adjacent second connection lines is less than the dimension of the second connection line in the second direction.

[0025] In some embodiments, the ground trace includes a third main portion and at least one third protruding portion. The third main portion extends along the second direction. The at least one third protruding portion is located on a side of the third main portion close to the first voltage signal line and connected with the third main portion. The third protruding portion extends along the first direction and is located between two adjacent element groups. The first voltage signal line includes a fourth main portion and at least one fourth protruding portion. The fourth main portion extends along the second direction. The at least one fourth protruding portion is located on a side of the fourth main portion close to the ground trace and connected with the fourth main portion; the fourth protruding portion extends along the first direction and is located between two adjacent element groups. The light-emitting substrate further includes a third bridge portion and a fourth bridge portion. One end of the third bridge portion is electrically connected with an end of the third protruding portion away from the third main portion, and the other end is electrically connected with the ground trace of an adjacent signal line group. One end of the fourth bridge portion is electrically connected with an end of the fourth protruding portion away from the fourth main portion, and the other end is electrically connected with the first voltage signal line of an adjacent signal line group.

[0026] In some embodiments, at least one element group is arranged between the third protruding portion and the fourth protruding portion adjacent along the second direction. Along the second direction, the size of the third protruding portion is smaller than the size of the second connecting line, and the size of the fourth protruding portion is smaller than the size of the second connecting line.

[0027] In some embodiments, the light-emitting substrate has a device region and a bonding region arranged side by side along the second direction, and a plurality of light-emitting elements of the plurality of element groups are arranged in the device region. The light-emitting substrate further includes a first voltage signal pin and a fifth bridge portion. The first voltage signal pin is arranged in the bonding region. The fifth bridge portion is configured to connect the first voltage signal line and the first voltage signal pin.

[0028] In some embodiments, the signal line group further includes an addressing signal line, a data signal line and a power signal line; along the first direction, the first voltage signal line, the power signal line, the data signal line, the addressing signal line and the ground trace are arranged in sequence.

[0029] In another aspect, a display device is also provided. The display device includes a display panel and the light-emitting substrate of any of the above embodiments. The light-emitting substrate is located on a non-display side of the display panel.

[0030] Embodiments of the present disclosure provide a display device. The display device has the same structure and beneficial technical effects as the light-emitting substrate of any of the above embodiments, and thus, the same structure and beneficial technical effects are not repeated here. BRIEF DESCRIPTION OF DRAWINGS

[0031] In order to more clearly illustrate the technical solutions in the present disclosure, the drawings needed to be used in the embodiments of the present disclosure will be briefly introduced. Obviously, the drawings in the following description only represent some of the embodiments of the present disclosure, and other drawings can be obtained by those skilled in the art based on these drawings. In addition, the drawings in the following description can be regarded as schematic diagrams, and are not limited to the actual size, actual process, actual timing of signals, etc. of the products involved in the embodiments of the present disclosure.

[0032] Figure 1 A plan view of a display device according to some embodiments; Figure 2 A sectional view of a display device according to some embodiments; Figure 3 A schematic view of a light emitting substrate according to some embodiments; Figure 4 A sectional view of a light emitting substrate according to some embodiments; Figure 3 A partial enlarged view of region A in FIG. 8; Figure 5 A sectional view of a light emitting substrate according to some embodiments; Figure 4 A sectional view of C1-C1, C2-C2 and C3-C3 in FIG. 9; Figure 6 A sectional view of a light emitting substrate according to some embodiments; Figure 3 A partial enlarged view of region B in FIG. 10; Figure 7 A schematic view of a control chip according to some embodiments; Figure 8 Another schematic view of a light emitting substrate according to some embodiments; Figure 9 Yet another schematic view of a light emitting substrate according to some embodiments; Figure 10 A sectional view of a light emitting substrate according to some embodiments; Figure 9 A partial enlarged view of region D in FIG. 13; Figure 11 Yet another schematic view of a light emitting substrate according to some embodiments; Figure 12 Yet another schematic view of a light emitting substrate according to some embodiments; Figure 13 A sectional view of a light emitting substrate according to some embodiments; Figure 12 A partial enlarged view of region E in FIG. 16. DETAILED DESCRIPTION

[0033] The technical solutions in the embodiments of the present disclosure will be described clearly and completely with reference to the drawings. Obviously, the described embodiments only represent some of the embodiments of the present disclosure, and not all the embodiments. Based on the embodiments provided in the present disclosure, all other embodiments obtained by those skilled in the art belong to the scope of protection of the present disclosure.

[0034] Unless otherwise required by context, as used herein and throughout this specification, the term "comprise" and variations of the term, such as "comprises" and "comprising," will be understood to imply the inclusion of a stated integer or step or group of integers or steps but not the exclusion of any other integer or step or group of integers or steps. In describing some embodiments, it will be understood that the terms "connect," "connection," and "connected" are intended to be broad and shall not be construed as requiring an actual direct electrical connection between elements.

[0035] In the following description, the terms "first," "second," etc., are used only to describe various tenninates and do not imply a relative importance or a specific order of precedence. Thus, the features defined by these tenninates can explicitly or implicitly include one or more of the features. In the description of embodiments of the present disclosure, the meaning of "a plurality" is two or more unless otherwise specified.

[0036] In describing some embodiments, it can be used that "connect" and its derivatives. The term "connect" should be interpreted broadly, for example, "connect" can be fixedly connected, or detachably connected, or integrated; can be directly connected, or indirectly connected through an intermediate medium.

[0037] "A, B, and C at least one of" has the same meaning as "at least one of A, B, or C", both of which include the following combinations of A, B, and C: only A, only B, only C, a combination of A and B, a combination of A and C, a combination of B and C, and a combination of A, B, and C.

[0038] "A and / or B" includes the following three combinations: only A, only B, and a combination of A and B.

[0039] As used herein, the term "if' is, optionally, interpreted as meaning "when" or "while" or "in response to determining" or "in response to detecting," depending on the context. Similarly, the phrase "if it is determined" or "if [stated condition or event] is detected," is, optionally, interpreted as meaning "upon determining" or "in response to determining" or "upon detecting [stated condition or event]" or "in response to detecting [stated condition or event]," depending on the context.

[0040] Use of "adapted to" or "configured to" herein means open and inclusive language that does not exclude additional devices or steps not specifically recited.

[0041] Additionally, use of "based on" means open and inclusive, as the process, step, calculation, or other action based on a stated condition or value can actually be based on additional conditions or values beyond those stated.

[0042] As used herein, "about," "approximately," or "circa" includes the recited value and the mean within an acceptable range of deviation from the particular value, as determined by one of ordinary skill in the art considering the measurement in question and the error in measuring the particular quantity (i.e., the limitations of the measurement system).

[0043] As used herein, "parallel," "perpendicular," "equal" includes the recited condition and conditions that approximate the recited condition, the approximation being within an acceptable range of deviation, as determined by one of ordinary skill in the art considering the measurement in question and the error in measuring the particular quantity (i.e., the limitations of the measurement system). For example, "parallel" includes absolute parallel and near parallel, where the acceptable range of deviation for near parallel can be, for example, within 5°; "perpendicular" includes absolute perpendicular and near perpendicular, where the acceptable range of deviation for near perpendicular can also be, for example, within 5°. "Equal" includes absolute equality and near equality, where the acceptable range of deviation for near equality can be, for example, a difference between the two that is less than or equal to 5% of either.

[0044] It will be understood that when a layer or element is referred to as being "on" another layer or substrate, it can be directly on the other layer or substrate, or intervening layers can also be present.

[0045] Exemplary embodiments are described herein with reference to cross-sectional and / or plan view illustrations that are schematic illustrations of idealized embodiments. In this regard, the thicknesses of the layers can be exaggerated in the drawings for clarity. Thus, the exemplary embodiments should not be construed as limited to the shapes of regions illustrated in the drawings, but are to include shapes that are distorted in relation to the illustrated shapes, for example, as a result of manufacturing techniques and / or tolerances. For example, an etched region illustrated as a rectangle will generally have a curved shape. Thus, the regions illustrated in the drawings are schematic and their shapes are not intended to illustrate the precise shape of a region of a device and are not intended to limit the exemplary embodiments to a precise geometric shape. The exemplary embodiments are to be construed as not limited to the particular shapes of regions illustrated in the drawings but are to include deviations in shapes that result, for example, from manufacturing processes.

[0046] Referring to Figure 1 Some embodiments of the disclosure provide a display device 1000, which can be any device that displays whether moving (e.g., video) or fixed (e.g., still image) and whether text or image.

[0047] Exemplarily, the display device 1000 can be a mobile phone, a wireless device, a personal data assistant (PDA), a wearable device, an augmented reality (AR) device, a virtual reality (VR) device, a handheld or portable computer, a GPS receiver / navigator, a camera, an MP4 video player, a camcorder, a game console, a watch, a clock, a calculator, a television monitor, a flat panel display, a computer monitor, an automobile display (e.g., a speedometer display, etc.), a cockpit controller and / or display, a display of a camera view (e.g., a display of a rear view camera in a vehicle), an electronic photo, an electronic billboard or sign, a projector, a packaging and aesthetic structure (e.g., a display of an image for a piece of jewelry), etc.

[0048] In some embodiments, the display device 1000 described above can be rectangular, circular, or any other arbitrary shape, and embodiments of the disclosure are not limited thereto. In the following, some embodiments of the disclosure are schematically described taking a rectangular display device as an example, but the embodiments of the disclosure are not limited thereto, and any other display device can also be considered as long as the same technical idea is applied.

[0049] In some embodiments, the display device 1000 described above can be a liquid crystal display device (LCD). Referring to Figure 2The display device 1000 can include a backlight module 100, a display panel 200, and a glass cover plate 300. The display panel 200 includes a display side and a non-display side. The display side refers to a side of the display panel 200 used for displaying a picture (e.g., an upper side of the display panel 200), and the non-display side refers to another side opposite to the display side. The backlight module 100 is disposed at the non-display side of the display panel 200 (e.g., a lower side of the display panel 200), and is used for providing a backlight source for the display panel 200. The glass cover plate 300 is disposed at the display side of the display panel 200, and is used for shielding and protecting the display panel 200. Figure 2 The display device 1000 can include a backlight module 100, a display panel 200, and a glass cover plate 300. The display panel 200 includes a display side and a non-display side. The display side refers to a side of the display panel 200 used for displaying a picture (e.g., an upper side of the display panel 200), and the non-display side refers to another side opposite to the display side. The backlight module 100 is disposed at the non-display side of the display panel 200 (e.g., a lower side of the display panel 200), and is used for providing a backlight source for the display panel 200. The glass cover plate 300 is disposed at the display side of the display panel 200, and is used for shielding and protecting the display panel 200. Figure 2 The display device 1000 can include a backlight module 100, a display panel 200, and a glass cover plate 300. The display panel 200 includes a display side and a non-display side. The display side refers to a side of the display panel 200 used for displaying a picture (e.g., an upper side of the display panel 200), and the non-display side refers to another side opposite to the display side. The backlight module 100 is disposed at the non-display side of the display panel 200 (e.g., a lower side of the display panel 200), and is used for providing a backlight source for the display panel 200. The glass cover plate 300 is disposed at the display side of the display panel 200, and is used for shielding and protecting the display panel 200.

[0050] In some embodiments, referring to Figure 2 In a case where the display device 1000 is a liquid crystal display device, the display panel 200 can be a liquid crystal display panel, and the display panel 200 can include an array substrate 210, a counter substrate 220, and a liquid crystal layer 230 disposed between the array substrate 210 and the counter substrate 220. The array substrate 210 is provided with a thin-film transistor 212 (TFT) and a pixel electrode 213 on a first substrate 211. The thin-film transistor 212 includes an active layer, a source, a drain, a gate, and a gate insulating layer, the source and the drain are in contact with the active layer respectively, and the pixel electrode 213 is electrically connected with the drain of the thin-film transistor 212.

[0051] In some embodiments, as shown in Figure 2 The array substrate 210 further includes a common electrode 214 disposed on the first substrate 211. The pixel electrode 213 and the common electrode 214 can be disposed on different layers, in which case, as shown in Figure 2 a first insulating layer 215 is disposed between the pixel electrode 213 and the common electrode 214. In a case where the common electrode 214 is disposed between the thin-film transistor 212 and the pixel electrode 213, as shown in Figure 2 a second insulating layer 216 is further disposed between the common electrode 214 and the thin-film transistor 212.

[0052] The pixel electrode 213 and the common electrode 214 can also be disposed on the same layer (not shown in the figure), in which case, the pixel electrode 213 and the common electrode 214 are both comb structures including a plurality of strip sub-electrodes. In other embodiments, the common electrode 214 can also be disposed in the counter substrate 220.

[0053] As shown in Figure 2As shown, the opposite substrate 220 can include a color filter layer 222 disposed on the second substrate 221, in which case the opposite substrate 220 can also be referred to as a color filter substrate (English: Color filter; abbreviation: CF). Where the backlight module 100 is configured to emit white light, the color filter layer 222 includes at least a red photoresist unit, a green photoresist unit, and a blue photoresist unit, which are respectively in one-to-one correspondence with the sub-pixels of the display panel 200. The opposite substrate 220 further includes a black matrix pattern 223 disposed on the second substrate 221, which is configured to separate the red photoresist unit, the green photoresist unit, and the blue photoresist unit.

[0054] As shown, Figure 2 The display panel 200 can further include a first polarizer 240 disposed on the side of the opposite substrate 220 distal to the liquid crystal layer 230, and a second polarizer 250 disposed on the side of the array substrate 210 distal to the liquid crystal layer 230. In addition, the display panel 200 can further include other film layers or structures, which will not be enumerated one by one in the embodiments of the present disclosure.

[0055] In some embodiments, the backlight module 100 includes a light-emitting substrate 110. The light-emitting substrate 110 can directly emit white light, which is uniformly processed and then emitted to the display panel 200. Alternatively, the light-emitting substrate 110 can emit light of other colors, which is color-converted and uniformly processed and then emitted to the display panel 200. The backlight module 100 can further include an optical film 120, which can include a diffusion plate and / or an optical brightening film, which will not be specifically limited in the embodiments of the present disclosure. The diffusion plate has scattering and diffusion effects, and can further mix the above-mentioned white light; the optical brightening film can improve the light extraction efficiency of the backlight module 100. In addition, the backlight module 100 can further include other film layers or structures, which will not be enumerated one by one in the embodiments of the present disclosure.

[0056] In some embodiments, referring to Figure 3 and Figure 4 The light-emitting substrate 110 includes a substrate 10, a plurality of signal line groups 30, a plurality of element groups 40, and a plurality of control chips 50. Wherein, Figure 3 is a structural schematic diagram of the light-emitting substrate when the first protruding portion and the second protruding portion are arranged side by side in the first direction; Figure 4 is a structural diagram of the connection relationship between an element group, a signal line group, and a control chip.

[0057] The light-emitting substrate 110 can include a device area AA and a frame area BB. The device area AA is configured to arrange the plurality of element groups 40 and the plurality of control chips 50, and at least part of the plurality of signal lines included in the signal line group 30 is arranged in the device area AA. The device area AA is also configured to emit light. The frame area BB is located at least one side of the device area AA, for example, the frame area BB is arranged around the device area AA. The frame area BB is configured to arrange signal lines, for example, the frame area BB includes a bonding area BB1 located at one side of the device area AA along the second direction Y. The bonding area BB1 can be configured to arrange fan-out lines and bonding pins of the signal line group 30, etc.

[0058] The substrate 10 can be a rigid substrate or a flexible substrate. Exemplarily, the material of the substrate 10 can include any one of glass, quartz, plastic, FR-4 grade material, resin, polyimide (PI) or polymethyl methacrylate (PMMA). Embodiments of the present disclosure are not limited in this regard.

[0059] The plurality of signal line groups 30 are arranged on the substrate 10 and arranged along the first direction X. Each signal line group 30 includes a plurality of signal lines arranged along the first direction X. Each signal line group 30 is electrically connected to one column of element groups 40 and one column of control chips 50, configured to control one column of control chips 50 and one column of element groups 40, and control the element groups 40 to emit light through the control chips 50.

[0060] Exemplarily, as shown in Figure 3 and Figure 4 The plurality of signal lines of the signal line group 30 can include a first voltage signal line VLED, a ground signal line GND, an addressing signal line ADDR, a power signal line PWR and a feedback signal line FB, etc. Of course, the signal line group 30 can also include other signal lines, such as including a connection line between the element group 40 and the control chip 50 (see below), which will not be listed one by one here.

[0061] In some embodiments, referring to Figure 5 , Figure 5A cross-sectional structure diagram of the light-emitting substrate 110. The light-emitting substrate 110 can be a single metal layer structure, in other words, the light-emitting substrate 110 only includes one conductive metal layer, at this time, the plurality of signal lines of the signal line group 30 are made of the same material and arranged in the same layer, based on this, the plurality of signal line groups 30 can be prepared by one patterning process, in this way, it is beneficial to simplify the preparation process of the light-emitting substrate 110, and further reduce the manufacturing cost of the light-emitting substrate 110. Exemplarily, the light-emitting substrate 110 can also include an insulating layer 20, which is arranged on the side of the signal line group 30 away from the substrate 10. The insulating layer 20 can cover the conductive layer where the signal line group 30 is located, so as to play an electrical isolation role. Of course, the light-emitting substrate 110 can also include other layer structures, and the embodiments of the present disclosure will not be enumerated one by one.

[0062] The plurality of element groups 40 are arranged along the first direction X, each of the plurality of element groups 40 includes a plurality of element groups 40 arranged along the second direction Y, and each of the plurality of element groups 40 is electrically connected to part of the signal lines of one signal line group 30. Each of the plurality of element groups 40 includes a plurality of light-emitting elements 41 arranged along the first direction X and electrically connected in sequence.

[0063] The plurality of element groups 40 of each column are connected to one signal line group 30, so that the number of signal line groups 30 is equal to the number of columns of element groups 40. The plurality of light-emitting elements 41 of each element group 40 are arranged along the first direction X, and in the case that the arrangement number and arrangement density of the light-emitting elements 41 remain unchanged, the space occupied by the element group 40 along the first direction X can be maximized, thereby reducing the number of columns of element groups 40 and reducing the number of signal line groups 30.

[0064] Exemplarily, as shown in Figure 4 Each of the element groups 40 is electrically connected to the first voltage signal line VLED of the signal line group 30, and the element group 40 is electrically connected to the control chip 50. Each of the element groups 40 can include two, four, six or eight light-emitting elements 41, and the embodiments of the present disclosure do not make specific limitations thereon. In the following embodiments of the present disclosure, an example in which each of the element groups 40 includes four light-emitting elements 41 is described.

[0065] Exemplarily, one element group 40 includes four light emitting elements 41 arranged in a two-row two-column (2*2) manner, and 2N columns of element groups 40 can be arranged on the substrate 10. Assuming that, in the case that the size of the substrate 10 is unchanged and the arrangement density of the light emitting elements 41 is unchanged, one element group 40 includes four light emitting elements 41 arranged along the first direction X (1*4), then N columns of element groups 40 can be arranged on the substrate 10, that is, by the arrangement manner of the element group 40 of the present application, the number of columns of the element group 40 can be reduced to one half of the original, and based on this, the number of the signal line groups 30 can be reduced to one half of the original. This is conducive to reducing the number of fan-out lines, and further reducing the width of the peripheral region BB, especially reducing the width of the bonding region BB1. Moreover, due to the reduction in the number of signal line groups 30, in the case that the area of the substrate 110 is unchanged and the arrangement density of the light emitting elements 41 is unchanged, the wiring space of the signal line group 30 can be greatly improved, which is conducive to increasing the width of the plurality of signal lines included in the signal line group 30, and further reducing the resistance of the plurality of signal lines included in the signal line group 30, and based on this, the thickness of the signal lines included in the signal line group 30 can be reduced, and the amount of etching liquid used in the preparation process of the signal line group 30 can be reduced.

[0066] It needs to be understood that the preparation process of the signal line group 30 can include forming a continuous whole-layer metal layer on the substrate 10 by a magnetron sputtering process, of course, the preparation process of the above-mentioned continuous whole-layer metal layer is not limited to this, for example, processes such as evaporation, chemical vapor deposition or material vapor deposition can also be used for preparation, as long as a continuous whole-layer metal layer can be prepared. Then, a mask layer is formed on the continuous whole-layer metal layer, and the process of forming the mask layer can include coating, exposure and development, etc. Then, the above-mentioned continuous whole-layer metal layer is etched by etching liquid, so as to obtain the signal line group 30. Finally, the mask layer is removed by etching process. Based on the above-mentioned preparation process of the signal line group 30, reducing the thickness of the signal lines included in the signal line group 30 is conducive to reducing the thickness of the formed continuous whole-layer metal layer, and further reducing the amount of etching liquid used in the subsequent etching process. The material of the whole-layer metal layer can be copper, for example.

[0067] In some embodiments, from the type of the light emitting element 41, the light emitting element 41 can be an LED with quantum well junction, an LED with columnar structure, an LED with double heterojunction, etc. From the size of the light emitting element 41, the light emitting element 41 can be a structure with a size of micron level. For example, the area of the light emitting region of the light emitting element 41 can be 1mm 2 Hereinafter, or the area of the light emitting region of the light emitting element 41 can be 10000μm 2 Hereinafter, or the area of the light emitting region of the light emitting element 41 can be 3000μm 2The area of ​​the light-emitting region of the light-emitting element 41 can be 700 μm. 2 The area of ​​the light-emitting region of the light-emitting element 41 can be 200 μm. 2 The following is a summary of the embodiments disclosed herein. Of course, the embodiments disclosed herein are not limited to these. The light-emitting element 41 may also be a light-emitting element with other structures, as long as the same technical concept as this application is applied.

[0068] The light-emitting element 41 may include a P-terminal (positive) and a N-terminal (negative). The P-terminal of the light-emitting element 41 may be electrically connected to the first voltage signal line VLED, and the N-terminal may be electrically connected to the control chip 50. In a group of two interconnected light-emitting elements 41 of an element group 40, the N-terminal of one light-emitting element 41 (the one closer to the first voltage signal line VLED) is electrically connected to the P-terminal of the other light-emitting element 41. That is, the two interconnected light-emitting elements 41 are arranged in series.

[0069] Multiple control chips 50 are arranged along a first direction X, and each column of control chips 50 includes multiple control chips 50 arranged at intervals along a second direction Y. A column of control chips 50 is disposed on one side of a column of component group 40 and is electrically connected to a portion of the signal lines of the column of component group 40 and a signal line group 30.

[0070] In this embodiment, one control chip 50 can control one or more component groups 40, and the embodiments of this disclosure do not specifically limit this. In the following embodiments of this disclosure, the control chip 50 is used to control one component group 40 and four component groups 40 respectively for exemplary description. It can be understood that the control chip 50 can also be used to control other numbers of component groups 40, as long as the same technical concept as this application is applied.

[0071] For example, in the case where a control chip 50 is used to control a group of components 40, such as Figure 6 As shown, the control chip 50 may include a signal input pin Di (the input pin of the address signal ADDR), a signal output pin Do, a ground pin 57, and a power supply pin 58. Multiple control chips 50 in a row are cascaded (not shown in the figure), and in two cascaded control chips 50, the signal output pin Do of the higher-level control chip 50 is electrically connected to the signal input pin Di of the lower-level control chip 50. The ground pin 57 is electrically connected to the ground trace GND, and the power supply pin 58 can be electrically connected to the power signal line PWR. The signal output pin Do is also electrically connected to multiple light-emitting elements 41 of the component group 40; for example, the signal output pin Do is electrically connected to the N-pole of the light-emitting element 41. The P-pole of the light-emitting element 41 is electrically connected to the first voltage signal line VLED.

[0072] Exemplarily, in the case that one control chip 50 is used to control four element groups 40, as shown in Figure 7 The control chip 50 can include a signal input pin Di, a signal output pin Do, a power signal input pin VCC-In, a power signal output pin VCC-Out, a data signal input pin Data-In, a data signal output pin Data-Out, a first ground pin 571, a second ground pin 572, and four output pins CH, which are electrically connected with the four element groups 40 respectively. The first ground pin 571 and the second ground pin 572 are both electrically connected with the ground wire GND. In the two control chips 50 connected in cascade, the signal output pin Do of the upper control chip 50 is electrically connected with the signal input pin Di of the lower control chip 50, and the power signal output pin VCC-Out of the upper control chip 50 is electrically connected with the power signal input pin VCC-In of the lower control chip 50 through the power signal line PWR. The signal line group 30 can further include a data connection line, the data signal output pin Data-Out of the upper control chip 50 is electrically connected with the data signal input pin Data-In of the lower control chip 50 through the data connection line.

[0073] It can be understood that the structure of the above two control chips 50 is exemplary only, and the embodiments of the present disclosure are not limited thereto, as long as the same technical idea is adopted.

[0074] In some embodiments, the signal line group 30 includes the ground wire GND and a first voltage signal line VLED, which is arranged at one side of the plurality of light emitting elements 41 of the element group 40 along the first direction X. The ground wire GND can be arranged between two adjacent light emitting elements 41 of the plurality of light emitting elements 41 (as shown in Figure 3 and Figure 4 ), or the ground wire GND can be arranged at the other side of the plurality of light emitting elements 41 of the element group 40 along the first direction X (as shown in Figure 12 and Figure 13 ).

[0075] In the case that the ground wire GND is arranged between two adjacent light emitting elements 41 of the plurality of light emitting elements 41, referring to Figure 4The element group 40 comprises a plurality of light-emitting elements 41, including a first light-emitting element 42 and at least one second light-emitting element 43. The first light-emitting element 42 is located at one end of the element group 40 along a first direction X. The following embodiments of this disclosure are exemplified by an element group 40 comprising four light-emitting elements 41, with the first light-emitting element 42 being the leftmost of the four light-emitting elements 41. Thus, the four light-emitting elements 41 include a leftmost first light-emitting element 42 and three second light-emitting elements 43 located to the right of the first light-emitting element 42.

[0076] like Figure 4 As shown, the signal line group 30 includes a ground trace GND and a first voltage signal line VLED. The first voltage signal line VLED is used to provide power supply voltage to the light-emitting element 41, and the first voltage signal line VLED is disposed on the side of at least one second light-emitting element 43 away from the first light-emitting element 41. In other words, the first voltage signal line VLED is disposed on the right side of the plurality of light-emitting elements 41 included in the element group 40. The ground trace GND is located between the first light-emitting element 42 and at least one second light-emitting element 43 (all the second light-emitting elements 43). This allows the ground trace GND and the first voltage signal line VLED to utilize the gap between two adjacent element groups 40 (see below), further increasing the area of ​​the ground trace GND and the first voltage signal line VLED, reducing the resistance of the ground trace GND and the first voltage signal line VLED, and reducing the thickness of the ground trace GND and the first voltage signal line VLED. This can optimize the layout of the multiple signal lines of the signal line group 30 and improve the space utilization of the substrate 10.

[0077] For example, such as Figure 4 As shown, taking a control chip 50 controlling a component group 40 as an example, the control chip 50 can be disposed on one side of the first light-emitting element 42 along the second direction Y. In this way, the control chip 50 is also located on the side of the grounding trace GND close to the first light-emitting element 42. For example, the control chip 50 can be disposed on the lower side of the first light-emitting element 42.

[0078] like Figure 4 As shown, the grounding trace GND is disposed between the first light-emitting element 42 and the second light-emitting element 43. The first light-emitting element 42 and the second light-emitting element 43 cannot be directly electrically connected through the connecting line disposed on the same layer as the signal line group 30. Therefore, the light-emitting substrate 110 also includes a first bridging portion 51, which is configured to connect the first light-emitting element 42 and the second light-emitting element 43 closest to the first light-emitting element 42, so as to connect multiple light-emitting elements 41 in sequence.

[0079] Exemplarily, the first bridge 51 can be a chip resistor or a jumper resistor. The jumper resistor, also known as a zero ohm resistor, is a special-purpose resistor with a very small resistance value. The jumper resistor can be set between two points in the wiring substrate that cannot be directly connected by a line by using an automatic chip mounter or an automatic component mounter to realize the electrical connection of the two points. And it is beneficial to reduce the resistance value between the first light emitting element 42 and the second light emitting element 43.

[0080] In some embodiments, as shown in Figure 4 The element group 40 includes a plurality of second light emitting elements 43. The signal line group 30 further includes a first connection line 33. The first connection line 33 is arranged between two adjacent second light emitting elements 43, and the first connection line 33 is configured to connect the two adjacent second light emitting elements 43.

[0081] Exemplarily, the resistivity of the first bridge 51 is less than the resistivity of the first connection line 33, so as to be beneficial to reduce the resistance value between the first light emitting element 42 and the second light emitting element 43.

[0082] In some embodiments, as shown in Figure 4 The first connection line 33 extends along the first direction X, and a plurality of first connection lines 33 electrically connected to a plurality of second light emitting elements 43 of the same element group 40 are arranged along the first direction X, so as to minimize the space occupied by the plurality of first connection lines 33 along the second direction Y, thereby improving the utilization rate of the wiring space on the substrate 10.

[0083] Continuing to refer to Figure 4 The light emitting substrate 110 further includes a first connection pattern 31 and a second connection pattern 32. The first connection pattern 31 is electrically connected to the second light emitting element 43 closest to the first light emitting element 42, and the second connection pattern 32 is electrically connected to the first light emitting element 42. The two ends of the first bridge 51 are respectively electrically connected to the first connection pattern 31 and the second connection pattern 32, so that the second light emitting element 43 closest to the first light emitting element 42 is sequentially electrically connected to the first light emitting element 42 through the first connection pattern 31, the first bridge 51 and the second connection pattern 32.

[0084] As shown in Figure 4 The size of the first connection pattern 31 along the second direction Y is greater than the size of the first connection line 33 along the second direction Y, so as to be beneficial to increase the area of the first connection pattern 31, thereby reducing the connection difficulty between the first connection pattern 31 and the first bridge 51, and being beneficial to increase the heat dissipation capacity of the first connection pattern 31 to avoid heat accumulation on the first connection pattern 31. As shown in Figure 4 The first connection pattern 31 can be located on one side of the second light emitting element 43 along the second direction Y; or, as Figure 8As shown, the first connection pattern 31 can be located between the second light emitting element 43 and the ground trace GND.

[0085] As shown, the first connection pattern 31 can be located between the second light emitting element 43 and the ground trace GND. Figure 4 As shown, in the case that the first connection pattern 31 is located at one side of the second light emitting element 43 along the second direction Y, the first connection pattern 31 can include a first sub-pattern 311, a second sub-pattern 312 and a third sub-pattern 313. The first sub-pattern 311, the second sub-pattern 312 and the third sub-pattern 313 are arranged side by side along the second direction Y. The first sub-pattern 311 extends along the first direction X, and one end of the first sub-pattern 311 is electrically connected with the second light emitting element 43 closest to the first light emitting element 42, and the other end is connected with the second sub-pattern 312. The size of the first sub-pattern 311 along the second direction Y can be equal to the size of the first connection line 33 along the second direction Y, so that the size of the pad on the signal line group 30 electrically connected with each second light emitting element 43 can be equal, which is beneficial to improve the structural uniformity of the light emitting substrate 110. The second sub-pattern 312 extends along the second direction Y, and one end of the second sub-pattern 312 is connected with the end of the first sub-pattern 311 close to the first light emitting element 42, and the other end is electrically connected with the third sub-pattern 313. The third sub-pattern 313 can extend along the first direction X, and the size of the third sub-pattern 313 along the first direction X is greater than the size of the first sub-pattern 311 along the first direction X, and the size of the third sub-pattern 313 along the second direction Y is greater than the size of the first sub-pattern 311 along the second direction Y. The first bridge portion 51 is connected with the third sub-pattern 313 of the first connection pattern 31, which increases the area of the third sub-pattern 313 (compared with the first sub-pattern 311), which is beneficial to the connection between the third sub-pattern 313 and the first bridge portion 51, and reduces the resistance of the first connection pattern 31. Moreover, the first connection pattern 31 is located at one side of the second light emitting element 43 along the second direction Y, and more signal lines (the first protruding portion and the second protruding portion) can be arranged between two adjacent element groups 40 along the second direction Y, which is beneficial to improve the utilization rate of the wiring space of the substrate 10.

[0086] As shown, the first connection pattern 31 can be located between the second light emitting element 43 and the ground trace GND. Figure 8As shown, when the first connection pattern 31 is located between the second light-emitting element 43 and the ground trace GND, the first connection pattern 31 may include a first sub-pattern 311 and a fourth sub-pattern 314, which are arranged side by side along the first direction X. The first sub-pattern 311 extends along the first direction X, and one end of the first sub-pattern 311 is electrically connected to the second light-emitting element 43 closest to the first light-emitting element 42, while the other end is connected to the fourth sub-pattern 314. The dimension of the first sub-pattern 311 along the second direction Y can be equal to the dimension of the first connection line 33 along the second direction Y. This ensures that the pads electrically connected to each light-emitting element 41 on the signal line group 30 are of equal size, which is beneficial for improving the structural uniformity of the light-emitting substrate 110. The fourth sub-pattern 314 can be rectangular, and the dimension of the third sub-pattern 313 along the second direction Y is larger than the dimension of the first sub-pattern 311 along the second direction Y. The first bridging portion 51 is connected to the fourth sub-pattern 314 of the first connecting pattern 31, increasing the area of ​​the fourth sub-pattern 314 (compared to the first connecting pattern 31), which is beneficial for the connection between the fourth sub-pattern 314 and the first bridging portion 51. The first connecting pattern 31 is located between the second light-emitting element 43 and the grounding line GND, which helps to simplify the structure of the first connecting pattern 31.

[0087] It is understood that the specific shapes of the two first connection patterns 31 described above are merely examples, and the embodiments disclosed herein are not limited thereto. As long as the first connection pattern 31 can connect the second light-emitting element 43, which is closest to the first light-emitting element 42, to the first bridging portion 51, it is acceptable.

[0088] In some embodiments, such as Figure 4 and Figure 8 As shown, for reasons similar to the first connecting pattern 31, the second connecting pattern 32 is electrically connected to the first light-emitting element 42 and the first bridging part 51, and the size of the second connecting pattern 32 along the second direction Y is larger than the size of the first connecting line 33 along the second direction Y. This helps to increase the area of ​​the second connecting pattern 32, thereby reducing the connection difficulty between the second connecting pattern 32 and the first bridging part 51, and reducing the resistance of the second connecting pattern 32.

[0089] See Figure 4 The second connecting pattern 32 can be located on one side of the first light-emitting element 42 along the second direction Y, or, see [reference needed]. Figure 8 The second connection pattern 32 can be located between the first light-emitting element 42 and the grounding trace GND.

[0090] When the second connecting pattern 32 is located on one side of the first light-emitting element 42 along the second direction Y, such as Figure 4As shown, the second connection pattern 32 can include a fifth sub-pattern 321, a sixth sub-pattern 322 and a seventh sub-pattern 323. The fifth sub-pattern 321 extends along the first direction X, and one end of the fifth sub-pattern 321 is electrically connected with the first light emitting element 42, and the other end is connected with the sixth sub-pattern 322. The size of the fifth sub-pattern 321 along the second direction Y can be equal to the size of the first connection line 33 along the second direction Y, so that the size of the pad electrically connected with the first light emitting element 42 and the size of the pad electrically connected with the second light emitting element 43 are equal, which is conducive to improving the structural uniformity of the light emitting substrate 110. The sixth sub-pattern 322 extends along the second direction Y, and the fifth sub-pattern 321 is connected with the middle of the sixth sub-pattern 322 along the second direction Y, and the sixth sub-pattern 322 is connected with the seventh sub-pattern 323 along the second direction Y close to one end (lower end) of the bridge portion 51. The seventh sub-pattern 323 is substantially rectangular, and the size of the seventh sub-pattern 323 along the first direction X is greater than the size of the fifth sub-pattern 321 along the first direction X, and the size of the seventh sub-pattern 323 along the second direction Y is greater than the size of the fifth sub-pattern 321 along the second direction Y. Among them, the first bridge portion 51 is connected with the seventh sub-pattern 323 of the second connection pattern 32, increasing the area of the seventh sub-pattern 323 (compared with the fifth sub-pattern 321), which is conducive to the connection of the seventh sub-pattern 323 and the first bridge portion 51, and is conducive to improving the utilization rate of the wiring space of the substrate 10.

[0091] In the case that the second connection pattern 32 can be located between the first light emitting element 42 and the ground trace GND, as shown, Figure 8 As shown, the second connection pattern 32 can include a fifth sub-pattern 321 and an eighth sub-pattern 324, and the fifth sub-pattern 321 and the eighth sub-pattern 324 are arranged side by side along the first direction X. The fifth sub-pattern 321 extends along the first direction X, and one end of the fifth sub-pattern 321 is electrically connected with the first light emitting element 42, and the other end is connected with the eighth sub-pattern 324. The size of the fifth sub-pattern 321 along the second direction Y can be equal to the size of the first connection line 33 along the second direction Y, which is conducive to improving the structural uniformity of the light emitting substrate 110. The eighth sub-pattern 324 can be rectangular, and the size of the eighth sub-pattern 324 along the second direction Y is greater than the size of the fifth sub-pattern 321 along the second direction Y. Among them, the first bridge portion 51 is connected with the eighth sub-pattern 324 of the second connection pattern 32, increasing the area of the eighth sub-pattern 324 (compared with the fifth sub-pattern 321), which is conducive to the connection of the eighth sub-pattern 324 and the first bridge portion 51. The second connection pattern 32 is located between the first light emitting element 42 and the ground trace GND, which is conducive to simplifying the structure of the second connection pattern 32.

[0092] In the embodiment of the present disclosure, the trace can be arranged between two adjacent element groups 40 along the second direction Y, so as to improve the utilization of the wiring space on the substrate 10 and reduce the resistance of the corresponding signal line.

[0093] In some embodiments, the ground trace GND comprises a first body part 22 and a plurality of first protruding parts 23. The first body part 22 extends along the second direction Y and is located between the first light emitting element 42 and at least one second light emitting element 43 (all the second light emitting elements 43). The plurality of first protruding parts 23 are located on the side of the first body part 22 close to the at least one second light emitting element 43 and are connected with the first body part 23. The first body part 22 is also used to connect the plurality of first protruding parts 23 as a whole. The first protruding part 23 extends along the first direction and is located between two adjacent element groups 40 along the second direction Y. In the embodiment of the present disclosure, the first protruding part 23 is arranged in the gap between the two adjacent element groups 40, which can increase the area of the ground trace GND without increasing the area of the substrate 10, thereby reducing the resistance of the ground trace GND, which is conducive to reducing the size of the first body part 22 along the first direction X and reducing the size of the signal line group 30 along the first direction X. Moreover, it is conducive to reducing the thickness of the ground trace GND, reducing the amount of etching liquid used in the preparation process of the ground trace GND, and reducing the preparation difficulty and cost of the ground trace GND.

[0094] In some embodiments, as shown in Figure 4 The size of the first body part 22 along the first direction X is D1, which is 1.9mm~2.1mm, which is conducive to increasing the area of the first body part 22, thereby reducing the resistance and thickness of the ground trace GND. For example, the size D1 of the first body part 22 along the first direction X can be 1.9mm, 2.0mm or 2.1mm, of course, the embodiment of the present disclosure is not limited to this, as long as the size D1 of the first body part 22 along the first direction X is within 1.9mm~2.1mm, the size D1 of the first body part 22 along the first direction X can be arbitrarily valued.

[0095] It can be understood that if the size D1 of the first body part 22 along the first direction X is too large (such as greater than 2.1mm), on the one hand, the span between the first light emitting element 42 and the second light emitting element 43 is large, which is not conducive to the uniform distribution of the light emitting element 41, on the other hand, the space occupied by the signal line group 30 along the first direction X is large, which is not conducive to improving the wiring density and the arrangement density of the light emitting element of the light emitting substrate 110. If the size D1 of the first body part 22 along the first direction X is too small (such as greater than 1.9mm), it is not conducive to reducing the resistance of the ground trace GND.

[0096] In some embodiments, referring to Figure 9The at least one of the plurality of first voltage signal lines VLED included in the plurality of signal line groups 30 is a first target signal line VLED1. The light-emitting substrate 110 includes a plurality of signal line groups 30, each of which includes one first voltage signal line VLED. Thus, the light-emitting substrate 110 includes a plurality of first voltage signal lines VLED, at least one of which is the first target signal line VLED1.

[0097] Referring to Figure 9 The first target signal line VLED1 includes a second main body portion 24 and a plurality of second protruding portions 25. The second main body portion 24 extends along the second direction Y and is located on a side of at least one second light-emitting element 43 (all second light-emitting elements 43 of one element group 40) away from the first light-emitting element 42. The plurality of second protruding portions 25 are located on a side of the second main body portion 24 close to the ground trace GND and are connected to the second main body portion 24. The second main body portion 24 is also used to connect the plurality of first protruding portions 23 as a whole. The second protruding portions 25 extend along the first direction X and are located between two adjacent element groups 40 along the second direction Y. In the embodiments of the present disclosure, the second protruding portions 25 are arranged in the gap between the two adjacent element groups 40, which can increase the area of the first target signal line VLED1 without increasing the area of the substrate 10, thereby reducing the resistance of the first target signal line VLED1. This is conducive to reducing the size of the second main body portion 24 along the first direction X and reducing the size of the signal line group 30 along the first direction X. Moreover, this is conducive to reducing the thickness of the first target signal line VLED1, reducing the amount of etching solution used in the preparation process of the ground trace GND, and reducing the preparation difficulty and cost of the first target signal line VLED1.

[0098] For example, one second light-emitting element 43 farthest from the first light-emitting element 42 can be connected to the second main body portion 24. There is a gap between the first connecting line 33 and the first protruding portion 23 along the second direction Y to avoid signal interference between the first connecting line 33 and the first protruding portion 23.

[0099] In some embodiments, as shown in Figure 4 The size of the second main body portion 24 along the first direction X is D2, which is 3.4 mm to 3.7 mm. This is conducive to increasing the area of the second main body portion 24, thereby reducing the resistance and thickness of the first voltage signal line VLED. For example, the size D1 of the first main body portion 22 along the first direction X can be 3.4 mm, 3.5 mm, or 3.7 mm. Of course, the embodiments of the present disclosure are not limited to this. As long as the size D2 of the first main body portion 22 along the first direction X is within 3.4 mm to 3.7 mm, the size D2 of the second main body portion 24 along the first direction X can be arbitrarily selected.

[0100] It can be understood that if the size D2 of the second main body part 24 along the first direction X is too large (for example, greater than 3.7 mm), the signal line group 30 occupies a larger space along the first direction X, which does not help to improve the wiring density and the arrangement density of the light-emitting elements of the light-emitting substrate 110. If the size D1 of the second main body part 24 along the first direction X is too small (for example, greater than 3.4 mm), it is not conducive to reduce the resistance of the ground trace GND.

[0101] In some embodiments, referring to Figure 9 , Figure 10 and Figure 11 , the plurality of signal line groups 30 include at least one of the plurality of first voltage signal lines VLED as a second target signal line VLED2. The second target signal line VLED2 includes a plurality of second protruding parts 25. The plurality of second protruding parts 25 are arranged at intervals along the second direction Y. Each second protruding part VLED2 is connected to a corresponding element group 40, and the second protruding part VLED2 is located on one side of the element group 40 (corresponding to the second protruding part VLED2) along the second direction Y. The light-emitting substrate 110 further includes a plurality of second bridge parts 52, which are configured to connect two second protruding parts 25 adjacent along the second direction Y. That is, the second target signal line VLED2 includes a plurality of second protruding parts 25 arranged at intervals along the second direction Y, and the plurality of second protruding parts 25 are electrically connected by the second bridge part 52. In this way, the space occupied by the signal line group 30 along the first direction X can be further reduced, thereby enabling the light-emitting substrate 110 to achieve a narrow frame.

[0102] In some embodiments, as shown in Figure 10 , the second protruding part 25 of the second target signal line VLED2 can be arranged side by side with the first protruding part 23 along the first direction X, or, as shown in Figure 11 , the second protruding part 25 of the second target signal line VLED2 can be arranged side by side with the first protruding part 23 along the second direction Y.

[0103] In some embodiments, as shown in Figure 9 , among the plurality of first voltage signal lines VLED included in the plurality of signal line groups 30, the first voltage signal line VLED located at the outermost side along the first direction X is the second target signal line VLED2, and the second target signal line VLED2 is adjacent to the frame area BB of the light-emitting substrate 110. That is, the first voltage signal line VLED close to the frame area BB in the signal line group 30 is the second voltage signal line VLED2, which is conducive to reducing the frame width on the side close to the second voltage signal line VLED2 in the frame area BB, thereby reducing the width of the frame area BB of the light-emitting substrate 110, and facilitating the display device 1000 to achieve a narrow frame.

[0104] Exemplarily, along the first direction X, the two first voltage signal lines VLED in the two outermost signal line groups 30 are both the outermost first voltage signal lines VLED, but referring to Figure 9 , the first voltage signal line VLED in one signal line group 30 is located at the right side of the ground trace GND. In this way, the signal line close to the frame area BB of the left signal line group 30 is the GND trace, and the signal line close to the frame area BB of the right signal line group 30 is the first voltage signal trace. Based on this, the first voltage signal line VLED adjacent to the frame area BB in the light-emitting substrate 110 only includes the first voltage signal line VLED of the rightmost signal line group 30, in other words, the first voltage signal line VLED of the rightmost signal line group 30 is the second target signal line VLED2, which is conducive to reducing the width of the right frame area of the light-emitting substrate 110 and realizing the super-narrow frame of the display device 1000.

[0105] It can be understood that the embodiments of the present disclosure are not limited thereto, and in other embodiments, any one of the plurality of first voltage signal lines VLED can be set as the first target signal line VLED1 or the second target signal line VLED2, and the embodiments of the present disclosure do not make specific limitations thereto as long as the same technical idea is adopted.

[0106] In some embodiments, referring to Figure 10 , along the second direction Y, a first protruding portion 23 and a second protruding portion 25 are arranged between the two adjacent element groups 40. The first protruding portion 23 and the second protruding portion 25 are arranged side by side along the second direction Y. In this way, it is conducive to increasing the size of the first protruding portion 23 and the second protruding portion 25 along the second direction Y, thereby increasing the length of the connecting portion between the first protruding portion 23 and the first main body portion 22 and the length of the connecting portion between the second protruding portion 25 and the second main body portion 24, and further reducing the resistance of the ground trace GND and the first voltage signal line VLED (the first target signal line VLED1).

[0107] Exemplarily, the size of the first protruding portion 23 along the first direction X can be equal to the size of the second protruding portion 25 along the first direction X. And the size of the first protruding portion 23 along the second direction Y can be equal to the size of the second protruding portion 25 along the second direction Y. In this way, it is conducive to increasing the structural consistency of the first protruding portion 23 and the second protruding portion 25, increasing the structural uniformity of the signal line group 30, and reducing the difficulty of preparing the signal line group 30.

[0108] In some embodiments, as Figure 10As shown, the first connection pattern 31 of the light-emitting substrate 110 is located on the side of the second light-emitting element 43 closest to the first light-emitting element 42 along the second direction Y. Between the two adjacent element groups 40, of the first protruding portion 23 and the second protruding portion 25, the second protruding portion 25 is closer to the first connection pattern 31. And the first connection pattern 31 is arranged side by side with the second protruding portion 25 along the first direction X, so as to improve the space utilization between the two adjacent element groups 40 and maximize the area of the ground wire GND and the first voltage signal line VLED.

[0109] In some embodiments, in the case where the first protruding portion 23 and the second protruding portion 25 are arranged side by side along the first direction X, referring to Figure 11 , the first connection pattern 31 of the light-emitting substrate 110 is located between the second light-emitting element 43 closest to the first light-emitting element 42 and the ground wire GND. In this way, the size of the first connection pattern 31 along the second direction Y can be minimized, thereby increasing the wiring space of the first protruding portion 23 and increasing the size of the first protruding portion 23 along the second direction Y.

[0110] In some embodiments, along the first direction X, the first connection pattern 31 of the light-emitting substrate 110 is arranged side by side with the second protruding portion 25 along the first direction X. The size of the first protruding portion 23 along the first direction X is greater than the size of the second protruding portion 25 along the first direction X. In this way, the wiring space between the two adjacent element groups 40 can be maximized, and the resistance of the ground wire GND and the first voltage signal line VLED can be reduced.

[0111] In some embodiments, referring to Figure 11 , along the second direction Y, one first protruding portion 23 and one second protruding portion 25 are arranged between the two adjacent element groups 40. The first protruding portion 23 and the second protruding portion 25 are arranged side by side along the second direction Y. In this way, the space utilization between the two adjacent element groups 40 can be improved.

[0112] Exemplarily, as shown in Figure 11 , the size of the third sub-pattern 313 of the first connection pattern 31 along the second direction Y is substantially equal to the size of the second protruding portion 25 along the second direction Y, and the size of the second protruding portion 25 along the second direction Y can be greater than the size of the first protruding portion 23 along the second direction Y. The size of the second protruding portion 25 along the first direction X can be greater than the size of the third sub-pattern 313 along the first direction X.

[0113] It should be understood that in some other embodiments, when the first voltage signal line VLED of the signal line group 30 is the first target signal line VLED1, one of the first protrusion 23 and the second protrusion 25 may also be included between two adjacent element groups 40, and the arrangement order and distribution density of the first protrusion 23 and the second protrusion 25 along the second direction Y can be arbitrarily selected, as long as the same technical concept is applied. When the second voltage signal line VLED of the signal line group 30 is the second target signal line VLED2, at least one second protrusion 25 is included between two adjacent element groups 40, and the distribution density of the first protrusion 23 can be arbitrarily selected. For example, two, three, or four element groups 40 are included between every two adjacent first protrusions 23.

[0114] In some embodiments, such as Figure 11 As shown, the signal line group 30 also includes an addressing signal line ADDR, a power signal line, and a feedback signal line. Along the first direction, the addressing signal line ADDR, the power signal line PWR, the ground trace GND, the feedback signal line FB, and the first voltage signal line VLED are arranged sequentially. A portion of the addressing signal line ADDR and a portion of the power signal line PWR are located between the first light-emitting element 42 and at least one second light-emitting element 43. The feedback signal line FB is located on the side of the ground trace GND away from the control chip 50 and extends along the boundary of the side of the ground trace GND away from the control chip 50.

[0115] In some embodiments, see Figure 9 The light-emitting substrate 110 also includes a first boundary 1101, a second boundary 1102, and a bonding pin 1103. The ground trace GND closest to the first boundary 1101 in the signal line group 30 is closer to the first boundary 1101 than the first voltage signal line VLED closest to the first boundary 1101. The distance between the first boundary 1101 and the signal line group 30 is D3, which is 2.0mm to 2.3mm. For example, the distance D3 between the first boundary 1101 and the signal line group 30 is 2.0mm, 2.2mm, or 2.3mm.

[0116] The first boundary 1101 and the second boundary 1102 are opposite each other along the first direction X. The first voltage signal line VLED, which is closest to the second boundary 1102 in the signal line group 30, is closer to the second boundary 1102 than the ground trace GND, which is also closest to the second boundary 1102. The distance between the second boundary 1102 and the signal line group 30 is D4, where D4 is 2.0mm to 2.3mm. Exemplarily, the distance D4 between the second boundary 1102 and the signal line group 30 is 2.0mm, 2.1mm, or 2.3mm; the embodiments of this disclosure do not specifically limit this.

[0117] The interval D3 between the first boundary 1101 and the signal line group 30 and the interval D4 between the second boundary 1102 and the signal line group 30 can be equal or unequal, which is not limited in the embodiments of the present disclosure. For example, the interval D3 between the first boundary 1101 and the signal line group 30 and the interval D4 between the second boundary 1102 and the signal line group 30 are equal, so that the width of the frame area on the opposite sides of the light-emitting substrate 110 along the first direction X is equal, which is beneficial to the symmetrical arrangement of the frame width of the display device 1000.

[0118] Along the second direction, the minimum interval between the binding pin 1103 and the signal line group 30 is D5, and D5 is 1.3 mm to 1.6 mm. For example, the minimum interval D5 between the binding pin 1103 and the signal line group 30 is 1.3 mm, 1.45 mm, or 1.6 mm, etc., which is not limited in the embodiments of the present disclosure.

[0119] In other embodiments, when the plurality of light-emitting elements 41 of the element group 40 is arranged between the ground trace GND and the first voltage signal line VLED, referring to Figure 12 and Figure 13 , the light-emitting substrate 110 further comprises a second connecting line 34. The second connecting line 34 is located between the adjacent two light-emitting elements 41 of the element group 40 and is configured to connect the adjacent two light-emitting elements 41. The size of the second connecting line 34 along the second direction Y is greater than the size of the light-emitting element 41 along the second direction Y. Along the second direction Y, the interval between the adjacent two second connecting lines 34 is smaller than the size of the second connecting line 34 along the second direction. In the embodiments of the present disclosure, the second connecting line 34 with a larger area is formed by using the gap between the adjacent two element groups 40, which is beneficial to reduce the resistance of the second connecting line 34, accelerate the heat dissipation efficiency of the second connecting line 34, and reduce the thickness of the signal line group 30, thereby reducing the amount of etching liquid used in the formation process of the signal line group 30.

[0120] In some embodiments, the ground trace GND comprises a third main body part 35 and at least one third protruding part 36. The third main body part 35 extends along the second direction Y. The third protruding part 36 is located on the side of the third main body part 35 close to the first voltage signal line VLED and is connected with the third main body part 35. The third protruding part 36 extends along the first direction X and is located between the adjacent two element groups 40.

[0121] Exemplarily, the third protruding portion 36 has a dimension along the first direction X greater than a dimension of the second connecting line 34 along the first direction X, so that the dimension of the third protruding portion 36 along the first direction X can be maximized to reduce the span of the third bridge portion 53. The third protruding portion 36 has a dimension along the second direction Y less than a dimension of the second connecting line 34 along the second direction Y, which is beneficial to increase the area of the second connecting line 34 and thus reduce the resistance of the second connecting line 34.

[0122] The first voltage signal line VLED includes a fourth main portion 37 and at least one fourth protruding portion 38. The fourth main portion 37 extends along the second direction Y. The at least one fourth protruding portion 38 is located on a side of the fourth main portion 37 close to the ground trace GND and connected to the fourth main portion 37. The fourth protruding portion 38 extends along the first direction X and is located between two adjacent element groups 40.

[0123] The light-emitting substrate 110 further includes a third bridge portion 53 and a fourth bridge portion 54. One end of the third bridge portion 53 is electrically connected to an end of the third protruding portion 36 away from the third main portion 35, and the other end is electrically connected to the ground trace GND of the adjacent signal line group 30. That is, the third bridge portion 53 can electrically connect two ground traces GND of two adjacent signal line groups 30, and thus connect multiple ground traces GND of multiple signal line groups 30 to form a mesh structure, thereby reducing the resistance of the ground trace GND.

[0124] One end of the fourth bridge portion 54 is electrically connected to an end of the fourth protruding portion 38 away from the fourth main portion 37, and the other end is electrically connected to the first voltage signal line VLED of the adjacent signal line group 30. That is, the fourth bridge portion 54 can electrically connect two first voltage signal lines VLED of two adjacent signal line groups 30, and thus connect multiple first voltage signal lines VLED of multiple signal line groups 30 to form a mesh structure, thereby reducing the resistance of the first voltage signal line VLED.

[0125] In some embodiments, at least one element group 40 is arranged between the first protruding portion 36 and the second protruding portion 38 adjacent along the second direction Y, that is, at most one of the first protruding portion 36 and the second protruding portion 38 is included between two adjacent element groups 40 along the second direction Y. In this way, more wiring space can be left between the two adjacent element groups 40 for arranging the second connecting line 34, which is beneficial to increase the dimension of the second connecting line 34 along the second direction Y and thus reduce the resistance of the second connecting line 34.

[0126] Exemplarily, referring to Figure 12 along the second direction Y, the dimension D6 of the third protruding portion 36 is less than the dimension D7 of the second connecting line 34, and the dimension D8 of the second protruding portion 38 is less than the dimension D7 of the second connecting line 34.

[0127] In some embodiments, referring to Figure 12 , the light-emitting substrate 110 has a device area AA and a bonding area BB1 arranged side by side along the second direction Y, and a plurality of light-emitting elements 41 of a plurality of element groups 40 are arranged in the device area AA. The light-emitting substrate 110 further includes a bonding pin 1103 and a fifth bridge 55. The bonding pin 1103 includes a first voltage signal pin VLED for transmitting a first voltage signal and a ground pin Gnd. The fifth bridge 55 is configured to connect the first voltage signal line VLED and the first voltage signal pin VLED. The ground trace GND is connected to the ground pin Gnd.

[0128] In some embodiments, referring to Figure 12 and Figure 13 , the signal line group 30 further includes an addressing signal line ADDR, a data signal line Data, and a power signal line PWR. Along the first direction, the first voltage signal line VLED, the power signal line PWR, the data signal line Data, the addressing signal line ADDR, and the ground trace GND are arranged in sequence.

[0129] The above merely provides a specific implementation of the present disclosure, but the protection scope of the present disclosure is not limited thereto. Any person skilled in the art who thinks of changes or replacements within the technical scope disclosed by the present disclosure shall be covered within the protection scope of the present disclosure. Therefore, the protection scope of the present disclosure shall be subject to the protection scope of the claims.

Claims

1. A light-emitting substrate, characterized in that, The light-emitting substrate includes: substrate; Multiple signal line groups are disposed on the substrate, the multiple signal line groups are arranged along a first direction, and each signal line group includes multiple signal lines arranged along the first direction; Multiple rows of element groups are arranged along the first direction. Each row of element groups includes multiple element groups arranged at intervals along the second direction. A row of element groups is electrically connected to a portion of the signal lines of a signal line group. Each element group includes multiple light-emitting elements arranged at intervals along the first direction and electrically connected in sequence. The first direction intersects the second direction. Multiple control chips are arranged along the first direction, and each column of control chips includes multiple control chips arranged at intervals along the second direction; a column of control chips is electrically connected to a portion of the signal lines of the column of components and a signal line group.

2. The light-emitting substrate according to claim 1, characterized in that, The multiple light-emitting elements of the element group include a first light-emitting element and at least one second light-emitting element; The first light-emitting element is located at one end of the element group along the first direction; The signal line group includes: a grounding trace and a first voltage signal line, wherein the grounding trace is located between the first light-emitting element and the at least one second light-emitting element, and the first voltage signal line is located on the side of the at least one second light-emitting element away from the first light-emitting element; The control chip is disposed on one side of the first light-emitting element along the second direction.

3. The light-emitting substrate according to claim 2, characterized in that, The light-emitting substrate further includes a first bridging portion, which is configured to connect the first light-emitting element and a second light-emitting element that is closest to the first light-emitting element.

4. The light-emitting substrate according to claim 3, characterized in that, The element group includes a plurality of the second light-emitting elements; The signal line group further includes: a first connecting line, which is disposed between two adjacent second light-emitting elements and configured to connect the two adjacent second light-emitting elements; The light-emitting substrate further includes: a first connection pattern, which is electrically connected to the second light-emitting element closest to the first light-emitting element and electrically connected to the first bridging portion; Wherein, the dimension of the first connecting pattern along the second direction is greater than the dimension of the first connecting line along the second direction.

5. The light-emitting substrate according to claim 4, characterized in that, The resistivity of the first bridging portion is less than the resistivity of the first connecting wire.

6. The light-emitting substrate according to claim 4, characterized in that, The signal line group further includes: a second connection pattern, electrically connected to the first light-emitting element and electrically connected to the first bridging portion; Wherein, the dimension of the second connecting pattern along the second direction is greater than the dimension of the first connecting line along the second direction.

7. The light-emitting substrate according to claim 6, characterized in that, The second connection pattern is located on one side of the first light-emitting element along the second direction, or between the first light-emitting element and the grounding trace.

8. The light-emitting substrate according to claim 2, characterized in that, The grounding trace includes: A first main body portion extends along the second direction and is located between the first light-emitting element and the at least one second light-emitting element; A plurality of first protrusions are located on the side of the first main body portion near the at least one second light-emitting element and are connected to the first main body portion; the first protrusions extend along the first direction and are located between two adjacent groups of the elements along the second direction.

9. The light-emitting substrate according to claim 8, characterized in that, At least one of the multiple first voltage signal lines included in the plurality of signal line groups is a first target signal line, and the first target signal line includes: The second main body extends along the second direction and is located on the side of the at least one second light-emitting element away from the first light-emitting element; Multiple second protrusions are located on the side of the second main body near the grounding trace and are connected to the second main body; the second protrusions extend along the first direction and are located between two adjacent element groups along the second direction.

10. The light-emitting substrate according to claim 8, characterized in that, At least one of the multiple first voltage signal lines included in the plurality of signal line groups is a second target signal line, and the second target signal line includes: Multiple second protrusions are spaced apart along the second direction; each second protrusion is connected to a component group, and the second protrusion is located on one side of the component group along the second direction; The light-emitting substrate further includes a plurality of second bridging portions, the second bridging portions being configured to electrically connect two adjacent second protrusions along the second direction.

11. The light-emitting substrate according to claim 10, characterized in that, Among the multiple first voltage signal lines included in the multiple signal line groups, the first voltage signal line located on the outermost side along the first direction is the second target signal line, and the second target signal line is adjacent to the frame area of ​​the light-emitting substrate.

12. The light-emitting substrate according to any one of claims 9 to 11, characterized in that, Along the second direction, a first protrusion and a second protrusion are provided between two adjacent groups of the elements; The first protrusion and the second protrusion are arranged side by side along the first direction.

13. The light-emitting substrate according to claim 12, characterized in that, The first connection pattern of the light-emitting substrate is located between the second light-emitting element closest to the first light-emitting element and the grounding trace.

14. The light-emitting substrate according to any one of claims 9 to 11, characterized in that, Along the second direction, a first protrusion and a second protrusion are provided between two adjacent element groups; The first protrusion and the second protrusion are arranged side by side along the second direction.

15. The light-emitting substrate according to claim 14, characterized in that, The first connection pattern of the light-emitting substrate is located on the side of the second light-emitting element closest to the first light-emitting element along the second direction.

16. The light-emitting substrate according to claim 15, characterized in that, Along the first direction, the first connection pattern of the light-emitting substrate and the second protrusion are arranged side by side along the first direction; The dimension of the first protrusion along the first direction is greater than the dimension of the second protrusion along the first direction.

17. The light-emitting substrate according to any one of claims 2 to 11, characterized in that, The signal line group also includes addressing signal lines, power signal lines, and feedback signal lines; Along the first direction, the addressing signal line, the power signal line, the grounding trace, the feedback signal line, and the first voltage signal line are arranged in sequence; A portion of the addressing signal line and a portion of the power signal line are located between the first light-emitting element and the at least one second light-emitting element. The feedback signal line is located on the side of the ground trace away from the control chip and extends along the boundary of the side of the ground trace away from the control chip.

18. A light-emitting substrate, characterized in that, The light-emitting substrate includes: substrate; Multiple signal line groups are disposed on the substrate, the multiple signal line groups are arranged along a first direction, and each signal line group includes multiple signal lines arranged along the first direction; the multiple signal lines include a ground trace and a first voltage signal line, the ground trace includes a third main body and at least one third protrusion, the third main body extends along a second direction, the third protrusion is located on the side of the third main body near the first voltage signal line and is connected to the third main body; the first voltage signal line includes a fourth main body and at least one fourth protrusion, the fourth main body extends along the second direction, the fourth protrusion is located on the side of the fourth main body near the ground trace and is connected to the fourth main body; multiple column element groups are arranged along the first direction, each column element group includes multiple element groups arranged at intervals along a second direction, one column element group is electrically connected to a portion of the signal lines of a signal line group, each element group includes multiple light-emitting elements arranged at intervals along the first direction and electrically connected in sequence; the multiple light-emitting elements of the element group are disposed between the ground trace and the first voltage signal line; the first direction and the second direction intersect; Multiple control chips are arranged along the first direction, and each column of control chips includes multiple control chips arranged at intervals along the second direction; a column of control chips is electrically connected to a portion of the signal lines of the column of components and a signal line group.

19. The light-emitting substrate according to claim 18, characterized in that, The light-emitting substrate further includes: The second connecting line is located between two adjacent light-emitting elements in the element group and is configured to connect the two adjacent light-emitting elements. The dimension of the second connecting line along the second direction is greater than the dimension of the light-emitting element along the second direction; the interval between two adjacent second connecting lines along the second direction is less than the dimension of the second connecting line along the second direction.

20. The light-emitting substrate according to claim 19, characterized in that, The third protrusion extends along the first direction and is located between two adjacent element groups; The fourth protrusion extends along the first direction and is located between two adjacent element groups; The light-emitting substrate further includes: The third bridging portion has one end electrically connected to the end of the third protrusion away from the third main body, and the other end electrically connected to the grounding trace of the adjacent signal line group; The fourth bridging portion has one end electrically connected to the end of the fourth protrusion away from the fourth main body, and the other end electrically connected to the first voltage signal line of the adjacent signal line group.

21. The light-emitting substrate according to claim 20, characterized in that, At least one of the element groups is provided between adjacent third and fourth protrusions along the second direction; along the second direction, the size of the third protrusion is smaller than the size of the second connecting line, and the size of the fourth protrusion is smaller than the size of the second connecting line.

22. The light-emitting substrate according to any one of claims 18 to 21, characterized in that, The light-emitting substrate has a device area and a bonding area arranged side by side along the second direction, and a plurality of light-emitting elements of the plurality of element groups are disposed in the device area; The light-emitting substrate further includes: A first voltage signal pin is disposed in the bonding area; The fifth bridging section is configured to connect the first voltage signal line and the first voltage signal pin.

23. The light-emitting substrate according to any one of claims 18 to 21, characterized in that, The signal line group further includes addressing signal lines, data signal lines, and power signal lines; along the first direction, the first voltage signal line, the power signal line, the data signal line, the addressing signal line, and the grounding trace are arranged in sequence.

24. A display device, characterized in that, The display device includes: The light-emitting substrate as described in any one of claims 1 to 23; The display panel has a light-emitting substrate located on the non-display side of the display panel.