Bus performance simulation analysis method and device and electronic equipment

Abstract

The application provides a bus performance simulation analysis method and device and electronic equipment, and relates to the technical field of computer system bus. The method comprises the following steps: acquiring a bus performance simulation waveform file; determining a signal extraction file based on a preset signal configuration file; performing statistical analysis on the signal extraction file based on a preset access analysis script to obtain an access information statistical file; labeling data meeting a preset condition in the access information statistical file based on a preset labeling generation script, and generating a waveform labeling script; and extracting multiple data in the bus performance simulation waveform file according to the flexibly configured signal configuration file, which greatly expands the analyzable data. The access request is analyzed and labeled piece by piece, and statistical analysis is performed on all data to improve the flexibility of the analysis method. Since the bus performance simulation waveform file is fixed data, simulation does not need to be performed again when new analysis statistical information is added, time is saved, and efficiency is improved.

Description

Technical Field

[0001] This invention relates to the field of computer system bus technology, and in particular to a bus performance simulation and analysis method, apparatus, and electronic device. Background Technology

[0002] Existing bus performance simulation and analysis methods typically involve adding a bus statistics module during bus performance simulation, and accessing the statistics module in real time to detect, record, and analyze bus performance.

[0003] However, the information analyzed by existing bus performance simulation analysis methods is limited by the bus statistics module. The amount of data that can be analyzed is limited, there is not enough detail for the analysis of each data item, and the analysis method is not flexible enough. If new analysis statistics are needed, the simulation needs to be repeated, which is time-consuming and inefficient. Summary of the Invention

[0004] The purpose of this invention is to provide a bus performance simulation analysis method, apparatus, and electronic device. It extracts various data from the bus performance simulation waveform file based on a flexibly configurable signal configuration file, greatly expanding the analyzable data. It analyzes and annotates access requests one by one and performs statistical analysis on all data, improving the flexibility of the analysis method. Since the bus performance simulation waveform file is fixed data, it is not necessary to re-simulate when adding new analysis and statistical information, saving time and improving efficiency.

[0005] In a first aspect, the present invention provides a bus performance simulation and analysis method, comprising:

[0006] Obtain bus performance simulation waveform files;

[0007] Based on a preset signal configuration file, a signal extraction script is used to determine the signal extraction file corresponding to the bus performance simulation waveform file. The signal configuration file includes the data information of the target signal and a preset conversion protocol. The signal extraction file includes the target signal value and the times when the target signal value changes.

[0008] The signal extraction file is statistically analyzed based on a preset access analysis script to obtain an access information statistics file. The access information statistics file shall include at least one of the following: access initiation time, access completion time, access size, and number of accesses in transit.

[0009] Based on the preset annotation generation script, the data in the access information statistics file that meet the preset conditions will be annotated, and a waveform annotation script will be generated.

[0010] In some preferred embodiments of the present invention, after the step of performing statistical analysis on the signal extraction file based on a preset access analysis script to obtain an access information statistics file, the method further includes:

[0011] Structured data, including various target data, is created based on access information statistics files;

[0012] Output the statistical charts corresponding to the target data; the statistical charts should include at least one of the following: histogram and bar chart.

[0013] In some preferred embodiments of the present invention, the target data includes at least one of the following: delayed data, in-transit access data, and delayed data.

[0014] In some preferred embodiments of the present invention, the step of performing statistical analysis on the signal extraction file based on a preset access analysis script to obtain an access information statistics file includes:

[0015] Index the signal types in the signal extraction file by column;

[0016] Analyze the access requests line by line, store the initiation time of each access request in the request dictionary, and store the response time of each access request in the response dictionary;

[0017] By comparing the request dictionary and the response dictionary, the initiation time and response time corresponding to the same access request are identified as information record entries and stored in the access information statistics file;

[0018] Calculate various statistical data on bus performance and write them to the access information statistics file.

[0019] In some preferred embodiments of the present invention, after the steps of annotating data in the access information statistics file that meets preset conditions based on a preset annotation generation script and generating a waveform annotation script, the method further includes:

[0020] Input the waveform annotation script into the preset waveform debugging tool to output the positioning analysis results.

[0021] In some preferred embodiments of the present invention, the step of annotating data in the access information statistics file that meets preset conditions based on a preset annotation generation script, and generating a waveform annotation script, includes:

[0022] Read the access information statistics file;

[0023] Create an interface instance and record the access information in the access statistics file;

[0024] A waveform annotation script is generated based on access information that exceeds a preset time.

[0025] In some preferred embodiments of the present invention, the waveform file format includes at least one of the following: binary waveform file format, standard ASCII text waveform file format, and binary standard ASCII text waveform file format.

[0026] In some preferred embodiments of the present invention, the conversion protocol includes at least one of the following: advanced microcontroller bus architecture, advanced scalable interface, advanced high-performance bus, and coherent hub interface.

[0027] Secondly, the present invention provides a bus performance simulation and analysis device, comprising:

[0028] The waveform file extraction module is used to obtain waveform files for bus performance simulation.

[0029] The signal extraction file processing module is used to determine the signal extraction file corresponding to the bus performance simulation waveform file based on a preset signal configuration file and a signal extraction script. The signal configuration file includes the data information of the target signal and a preset conversion protocol. The signal extraction file includes the target signal value and the times when the target signal value changes.

[0030] The access information statistics file processing module is used to perform statistical analysis on the signal extraction file based on a preset access analysis script to obtain an access information statistics file; wherein, the content of the access information statistics file includes at least one of the following: access initiation time, access completion time, access size, and number of accesses in transit;

[0031] The waveform annotation module is used to annotate data in the access information statistics file that meets the preset conditions based on the preset annotation generation script, and generate waveform annotation script.

[0032] Thirdly, the present invention provides an electronic device, including a processor and a memory, wherein the memory stores computer-executable instructions that can be executed by the processor, and the processor executes the computer-executable instructions to implement the bus performance simulation analysis method provided in the first aspect above.

[0033] This invention brings the following beneficial effects:

[0034] This invention provides a bus performance simulation analysis method, apparatus, and electronic device, comprising: acquiring a bus performance simulation waveform file; determining a signal extraction file corresponding to the bus performance simulation waveform file based on a preset signal configuration file and a signal extraction script; wherein, the signal configuration file includes data information of the target signal and a preset conversion protocol; the signal extraction file includes the target signal value and the time when the target signal value changes; performing statistical analysis on the signal extraction file based on a preset access analysis script to obtain an access information statistics file; wherein, the content of the access information statistics file includes at least one of the following: access initiation time, access completion time, access size, and number of accesses in transit; annotating the data in the access information statistics file that meets preset conditions based on a preset annotation generation script, and generating a waveform annotation script; extracting various data from the bus performance simulation waveform file according to a flexibly configured signal configuration file greatly expands the analyzable data, analyzes and annotates access requests one by one, and performs statistical analysis on all data, improving the flexibility of the analysis method. Since the bus performance simulation waveform file is fixed data, it is not necessary to re-simulate when adding new analysis statistics, saving time and improving efficiency. Attached Figure Description

[0035] To more clearly illustrate the specific embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the specific embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present invention. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0036] Figure 1 A flowchart of a bus performance simulation and analysis method provided in an embodiment of the present invention;

[0037] Figure 2 This is a schematic diagram of the structure of a bus performance simulation and analysis device provided in an embodiment of the present invention;

[0038] Figure 3 This is a schematic diagram of the structure of an electronic device provided in an embodiment of the present invention.

[0039] Icons: 310 - Waveform file extraction module; 320 - Signal extraction file processing module; 330 - Access information statistics file processing module; 340 - Waveform annotation module; 400 - Memory; 401 - Processor; 402 - Bus; 403 - Communication interface. Detailed Implementation

[0040] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. The components of the embodiments of the present invention described and shown in the accompanying drawings can generally be arranged and designed in various different configurations.

[0041] Therefore, the following detailed description of the embodiments of the invention provided in the accompanying drawings is not intended to limit the scope of the claimed invention, but merely to illustrate selected embodiments of the invention. All other embodiments obtained by those skilled in the art based on the embodiments of the invention without inventive effort are within the scope of protection of the invention.

[0042] It should be noted that similar labels and letters in the following figures indicate similar items. Therefore, once an item is defined in one figure, it does not need to be further defined and explained in subsequent figures.

[0043] In the description of this invention, it should be noted that the terms "center," "upper," "lower," "left," "right," "vertical," "horizontal," "inner," and "outer," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, or the orientation or positional relationship commonly used when the product of this invention is in use. They are only for the convenience of describing this invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this invention. In addition, the terms "first," "second," "third," etc., are only used to distinguish descriptions and should not be construed as indicating or implying relative importance.

[0044] Furthermore, terms such as "horizontal," "vertical," and "sag" do not imply that components must be absolutely horizontal or suspended, but rather that they can be slightly tilted. For example, "horizontal" simply means that its direction is more horizontal relative to "vertical," and does not mean that the structure must be completely horizontal, but can be slightly tilted.

[0045] In the description of this invention, it should also be noted that, unless otherwise explicitly specified and limited, the terms "set," "install," "connect," and "link" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal connection of two components. Those skilled in the art can understand the specific meaning of the above terms in this invention based on the specific circumstances.

[0046] The following detailed description of some embodiments of the present invention is provided in conjunction with the accompanying drawings. Unless otherwise specified, the following embodiments and features can be combined with each other.

[0047] Example 1

[0048] This invention provides a bus performance simulation and analysis method, see [link to relevant documentation]. Figure 1 The flowchart shown in this embodiment of the invention provides a bus performance simulation and analysis method, which includes:

[0049] Step S102: Obtain the bus performance simulation waveform file.

[0050] Specifically, waveform files are records of low-level signal changes generated by simulation tools during the operation of the simulated chip; their essence is a timing database. Different simulation tools generate waveform files in different formats. For example, VCS simulators often generate waveform files in FSDB format, while ModelSim often generates waveform files in VCD format. This invention supports multiple formats, is independent of a specific simulation environment, and has good versatility and portability. Users can directly perform analysis without cumbersome format conversions.

[0051] Furthermore, in some preferred embodiments of the present invention, the waveform file format includes at least one of the following: binary waveform file format, standard ASCII text waveform file format, and binary standard ASCII text waveform file format.

[0052] Specifically, binary waveform files (FSDB) have the advantages of high compression ratio and fast read / write speed, making them suitable for simulation of large-scale designs; standard ASCII text waveform files (VCD), although large in size, are in plain text format, making them highly versatile and processable by all text editing tools; binary standard ASCII text waveform files (VPD) strike a balance between the two. Adapting to multiple formats ensures the ability to handle waveform data from different development stages and simulation environments, greatly expanding application scenarios.

[0053] Step S104: Based on the preset signal configuration file, determine the signal extraction file corresponding to the bus performance simulation waveform file through the signal extraction script; wherein, the signal configuration file includes the data information of the target signal and the preset conversion protocol; the signal extraction file includes the target signal value and the time when the target signal value changes.

[0054] Specifically, the signal configuration file acts as a "translation dictionary," defining the specific signal paths to be monitored and their corresponding protocol logic functions. Based on this configuration, the signal extraction script precisely filters and extracts the change events of the target signal from a vast waveform database and outputs them as structured text. This step converts the difficult-to-parse binary waveforms into machine-readable timing data, avoiding the performance overhead of processing irrelevant data.

[0055] Furthermore, in some preferred embodiments of the present invention, the conversion protocol includes at least one of the following: advanced microcontroller bus architecture, advanced scalable interface, advanced high-performance bus, and coherent hub interface.

[0056] Specifically, support for multiple mainstream bus protocols such as AMBA, AXI, AHB, and CHI means that this method has broad applicability. The AXI protocol is complex but high-performance, the AHB protocol is relatively simple, and CHI is used for multi-core coherent interconnection. The analysis method can understand the handshake signals, transmission stages, and transaction types of different protocols (such as AXI's read / write channel separation and CHI's packet transmission), thus correctly parsing the semantics of "access." This multi-protocol support capability allows this method to be applied to the performance analysis of various system-on-a-chip devices, from simple microcontrollers to complex multi-core SoCs.

[0057] Step S106: Perform statistical analysis on the signal extraction file based on the preset access analysis script to obtain an access information statistics file; wherein, the content of the access information statistics file includes at least one of the following: access initiation time, access completion time, access size, and number of accesses in transit.

[0058] Specifically, the access analysis script is the core data processing engine. By identifying specific signal combinations, it accurately determines the start and end of an access. It calculates latency by measuring time differences, determines access size by parsing burst length and data width, and counts the number of accesses in transit by tracking the number of requests that have not received a response. This process transforms low-level signal transitions into high-level performance transactions with clear business implications.

[0059] Furthermore, in some preferred embodiments of the present invention, the step of performing statistical analysis on the signal extraction file based on a preset access analysis script to obtain an access information statistics file includes: indexing the signal types in the signal extraction file by column; analyzing access requests line by line, storing the initiation time corresponding to each access request in a request dictionary, and storing the response time corresponding to each access request in a response dictionary; comparing the request dictionary and the response dictionary, determining the initiation time and response time corresponding to the same access request as information record entries, and storing them in the access information statistics file; calculating various statistical data of bus performance respectively, and writing them into the access information statistics file.

[0060] Specifically, a dictionary data structure is used to temporarily store data, typically using transaction IDs or sequence numbers as keys. By comparing request and response dictionaries, a request can be accurately associated with its corresponding response, even if they are completed in a different order than they were initiated. This ensures the accuracy of performance statistics, which is particularly crucial for evaluating the performance improvements brought about by out-of-order execution.

[0061] Furthermore, in some preferred embodiments of the present invention, after the step of performing statistical analysis on the signal extraction file based on a preset access analysis script to obtain an access information statistical file, the method further includes: creating structured data including multiple target data based on the access information statistical file; outputting statistical charts corresponding to the target data respectively; wherein the statistical charts include at least one of the following: histogram and bar chart.

[0062] Specifically, histograms can clearly show the distribution of latency, helping users discover long-tail effects; bar charts are suitable for comparing average latency, bandwidth, and other metrics across different host devices or address ranges. This graphical output transforms dry numbers into intuitive visual information, greatly accelerating the identification and location of performance bottlenecks.

[0063] Furthermore, in some preferred embodiments of the present invention, the target data includes at least one of the following: delayed data, in-transit access data, and delayed data.

[0064] Specifically, latency data directly reflects the system's response speed; in-transit access data reflects the bus's parallel processing capability and efficiency, and a high volume of in-transit access data helps to hide memory access latency; while bandwidth data measures the overall efficiency of data throughput. A comprehensive analysis of these three dimensions allows for a holistic and multi-dimensional evaluation of the bus system's performance, accurately identifying whether latency, concurrency, or bandwidth has become the system bottleneck.

[0065] Step S108: Based on the preset annotation generation script, the data in the access information statistics file that meet the preset conditions are annotated, and a waveform annotation script is generated.

[0066] Specifically, the annotation generation script reads the statistical files generated by the analysis, filters out points of interest (such as abnormal accesses with a delay exceeding 100ns), and then automatically generates a script that can be executed in the waveform browser. This script contains commands to add custom markers or annotations at specific time points, thereby mapping the statistical analysis conclusions back to the original waveform view.

[0067] Furthermore, in some preferred embodiments of the present invention, the step of annotating data in the access information statistics file that meets the preset conditions based on the preset annotation generation script, and generating a waveform annotation script includes: reading the access information statistics file; creating an interface instance and recording the access information in the access information statistics file; and generating a waveform annotation script based on access information that exceeds a preset time.

[0068] Specifically, creating an interface instance refers to the programming interface object that interacts with the waveform browser API. The start and end times of all accesses are recorded programmatically, then filtered based on preset thresholds (such as "preset time"), and finally, annotation commands are generated in batches. This method avoids the tediousness and oversight of manually searching for anomalies on the waveform, achieving "one-click location" of performance problems and significantly improving debugging efficiency.

[0069] Furthermore, in some preferred embodiments of the present invention, after the steps of annotating the data in the access information statistics file that meet the preset conditions based on the preset annotation generation script and generating the waveform annotation script, the method further includes: inputting the waveform annotation script into a preset waveform debugging tool and outputting the positioning analysis results.

[0070] Specifically, the generated waveform annotation script is loaded into the waveform debugging tool and executed. The tool automatically highlights all long-delay accesses that meet the criteria at the corresponding time points on the waveform graph. Engineers can directly observe the internal signal states on the bus and related logic modules when these abnormal accesses occur without manual searching, thereby quickly analyzing the root cause of the performance problem.

[0071] This invention provides a bus performance simulation and analysis method, which forms an automated and efficient closed-loop workflow of "analysis-location-debugging" through simulation-signal extraction-access analysis-access annotation-debugging.

[0072] This invention provides a bus performance simulation analysis method, comprising: acquiring a bus performance simulation waveform file; determining a signal extraction file corresponding to the bus performance simulation waveform file based on a preset signal configuration file and a signal extraction script; wherein, the signal configuration file includes data information of the target signal and a preset conversion protocol; the signal extraction file includes the target signal value and the time when the target signal value changes; performing statistical analysis on the signal extraction file based on a preset access analysis script to obtain an access information statistics file; wherein, the content of the access information statistics file includes at least one of the following: access initiation time, access completion time, access size, and number of accesses in transit; annotating the data in the access information statistics file that meets preset conditions based on a preset annotation generation script, and generating a waveform annotation script; extracting various data from the bus performance simulation waveform file according to a flexibly configured signal configuration file greatly expands the analyzable data, analyzes and annotates access requests one by one, and performs statistical analysis on all data, improving the flexibility of the analysis method. Since the bus performance simulation waveform file is fixed data, it is not necessary to re-simulate when adding new analysis statistics, saving time and improving efficiency.

[0073] Example 2

[0074] Based on the above embodiments, this invention provides a bus performance simulation and analysis device, see [link to relevant documentation]. Figure 2 The diagram shown is a structural schematic of a bus performance simulation and analysis device provided in an embodiment of the present invention. The device includes:

[0075] The waveform file extraction module 310 is used to obtain the waveform file of bus performance simulation.

[0076] The signal extraction file processing module 320 is used to determine the signal extraction file corresponding to the bus performance simulation waveform file based on a preset signal configuration file and a signal extraction script; wherein, the signal configuration file includes the data information of the target signal and a preset conversion protocol; the signal extraction file includes the target signal value and the time when the target signal value changes.

[0077] The access information statistics file processing module 330 is used to perform statistical analysis on the signal extraction file based on a preset access analysis script to obtain an access information statistics file; wherein, the content of the access information statistics file includes at least one of the following: access initiation time, access completion time, access size, and number of accesses in transit.

[0078] The waveform annotation module 340 is used to annotate data in the access information statistics file that meets the preset conditions based on the preset annotation generation script, and generate the waveform annotation script.

[0079] Furthermore, in some preferred embodiments of the present invention, the apparatus further includes: a graphing module, used to create structured data including multiple target data based on access information statistics files; and output statistical graphs corresponding to the target data respectively; wherein the statistical graphs include at least one of the following: histograms and bar charts.

[0080] Furthermore, in some preferred embodiments of the present invention, the target data includes at least one of the following: delayed data, in-transit access data, and delayed data.

[0081] Furthermore, in some preferred embodiments of the present invention, the access information statistics file processing module 330 is used to index the signal types in the signal extraction file by column; analyze the access requests line by line, store the initiation time corresponding to each access request in the request dictionary, and store the response time corresponding to each access request in the response dictionary; compare the request dictionary and the response dictionary, determine the initiation time and response time corresponding to the same access request as information record entries, and store them in the access information statistics file; calculate various statistical data of bus performance respectively, and write them into the access information statistics file.

[0082] Furthermore, in some preferred embodiments of the present invention, the waveform annotation module 340 is also used to input the waveform annotation script into a preset waveform debugging tool and output the positioning analysis results.

[0083] Furthermore, in some preferred embodiments of the present invention, the waveform annotation module 340 is used to read the access information statistics file; create an interface instance and record the access information in the access information statistics file; and generate a waveform annotation script based on the access information that exceeds a preset time.

[0084] Furthermore, in some preferred embodiments of the present invention, the waveform file format includes at least one of the following: binary waveform file format, standard ASCII text waveform file format, and binary standard ASCII text waveform file format.

[0085] Furthermore, in some preferred embodiments of the present invention, the conversion protocol includes at least one of the following: advanced microcontroller bus architecture, advanced scalable interface, advanced high-performance bus, and coherent hub interface.

[0086] Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the specific working process of the bus performance simulation analysis device described above can be referred to the corresponding process in the embodiments of the aforementioned bus performance simulation analysis method, and will not be repeated here.

[0087] Example 3

[0088] This invention also provides an electronic device for running a bus performance simulation analysis method; see [link to related documentation]. Figure 3 The schematic diagram of an electronic device provided by the embodiment of the present invention shown above includes a memory 400 and a processor 401. The memory 400 is used to store one or more computer instructions, which are executed by the processor 401 to implement the bus performance simulation analysis method described above.

[0089] Furthermore, Figure 3 The electronic device shown also includes a bus 402 and a communication interface 403. The processor 401, the communication interface 403 and the memory 400 are connected via the bus 402.

[0090] The memory 400 may include high-speed random access memory (RAM) and may also include non-volatile memory, such as at least one disk storage device. Communication between this system network element and at least one other network element is achieved through at least one communication interface 403 (which can be wired or wireless), such as the Internet, wide area network, local area network, metropolitan area network, etc. The bus 402 can be an ISA bus, PCI bus, or EISA bus, etc. The bus can be divided into address bus, data bus, control bus, etc. For ease of representation, Figure 3 The symbol is represented by a single double-headed arrow, but this does not mean that there is only one bus or one type of bus.

[0091] Processor 401 may be an integrated circuit chip with signal processing capabilities. In implementation, each step of the above method can be completed by the integrated logic circuitry in the hardware of processor 401 or by instructions in software form. Processor 401 can be a general-purpose processor, including a Central Processing Unit (CPU), a Network Processor (NP), etc.; it can also be a Digital Signal Processor (DSP), an Application Specific Integrated Circuit (ASIC), a Field-Programmable Gate Array (FPGA), or other programmable logic devices, discrete gate or transistor logic devices, or discrete hardware components. It can implement or execute the methods, steps, and logic block diagrams disclosed in the embodiments of this invention. The general-purpose processor can be a microprocessor or any conventional processor. The steps of the methods disclosed in the embodiments of this invention can be directly manifested as execution by a hardware decoding processor, or execution by a combination of hardware and software modules in the decoding processor. The software module can reside in a readily available storage medium in the art, such as random access memory, flash memory, read-only memory, programmable read-only memory, electrically erasable programmable memory, or registers. This storage medium is located in memory 400, and processor 401 reads information from memory 400 and, in conjunction with its hardware, completes the steps of the method described in the foregoing embodiments.

[0092] This invention also provides a computer-readable storage medium storing computer-executable instructions. When these computer-executable instructions are called and executed by a processor, they cause the processor to implement the aforementioned bus performance simulation analysis method. For specific implementation details, please refer to the method embodiments, which will not be repeated here.

[0093] The computer program products of the bus performance simulation analysis method, apparatus and electronic device provided in the embodiments of the present invention include a computer-readable storage medium storing program code. The instructions included in the program code can be used to execute the methods in the preceding method embodiments. For specific implementation, please refer to the method embodiments, which will not be repeated here.

[0094] Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the specific working process of the system and / or device described above can be referred to the corresponding process in the foregoing method embodiments, and will not be repeated here.

[0095] Furthermore, in the description of the embodiments of the present invention, unless otherwise explicitly specified and limited, the terms "installation," "connection," and "linking" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal connection of two components. Those skilled in the art can understand the specific meaning of the above terms in the present invention based on the specific circumstances.

[0096] If the aforementioned functions are implemented as software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this invention, essentially, or the part that contributes to the prior art, or a portion of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of this invention. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0097] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A bus performance simulation and analysis method, characterized in that, include: Obtain bus performance simulation waveform files; Based on a preset signal configuration file, a signal extraction script is used to determine the signal extraction file corresponding to the bus performance simulation waveform file; wherein, the signal configuration file includes the data information of the target signal and a preset conversion protocol; the signal extraction file includes the target signal value and the times when the target signal value changes; The signal extraction file is statistically analyzed based on a preset access analysis script to obtain an access information statistics file; wherein, the content of the access information statistics file includes at least one of the following: access initiation time, access completion time, access size, and number of accesses in transit; Based on a preset annotation generation script, the data in the access information statistics file that meet the preset conditions are annotated, and a waveform annotation script is generated. The steps of performing statistical analysis on the signal extraction file based on a preset access analysis script to obtain an access information statistics file include: Index the signal types in the extracted signal file by column; The access requests are analyzed line by line, and the initiation time of each access request is stored in the request dictionary, and the response time of each access request is stored in the response dictionary; By comparing the request dictionary and the response dictionary, the initiation time and the response time corresponding to the same access request are determined as information record entries and stored in the access information statistics file; Calculate various statistical data of bus performance and write them into the access information statistics file; The method further includes: Based on the access information statistics file, structured data including various target data is created; Output the statistical charts corresponding to the target data respectively; wherein the statistical charts include at least one of the following: histogram and bar chart.

2. The bus performance simulation and analysis method according to claim 1, characterized in that, The target data includes at least one of the following: delayed data, in-transit access data, and delayed data.

3. The bus performance simulation and analysis method according to claim 1, characterized in that, After the steps of annotating the data in the access information statistics file that meet the preset conditions based on the preset annotation generation script, and generating the waveform annotation script, the method further includes: Input the waveform annotation script into the preset waveform debugging tool to output the positioning analysis results.

4. The bus performance simulation and analysis method according to claim 1, characterized in that, The steps of annotating data in the access information statistics file that meets preset conditions based on a preset annotation generation script, and generating a waveform annotation script, include: Read the access information statistics file; Create an interface instance and record the access information in the access information statistics file; The waveform annotation script is generated based on the access information that exceeds a preset time.

5. The bus performance simulation and analysis method according to claim 1, characterized in that, The waveform file format includes at least one of the following: binary waveform file format, standard ASCII text waveform file format, and binary standard ASCII text waveform file format.

6. The bus performance simulation and analysis method according to claim 1, characterized in that, The conversion protocol includes at least one of the following: advanced microcontroller bus architecture, advanced scalable interface, advanced high-performance bus, and conformance hub interface.

7. A bus performance simulation and analysis device, characterized in that, include: The waveform file extraction module is used to obtain waveform files for bus performance simulation. The signal extraction file processing module is used to determine the signal extraction file corresponding to the bus performance simulation waveform file based on a preset signal configuration file and a signal extraction script; wherein, the signal configuration file includes the data information of the target signal and a preset conversion protocol; the signal extraction file includes the target signal value and the time when the target signal value changes; The access information statistics file processing module is used to perform statistical analysis on the signal extraction file based on a preset access analysis script to obtain an access information statistics file; wherein, the content of the access information statistics file includes at least one of the following: access initiation time, access completion time, access size, and number of accesses in transit; The waveform annotation module is used to annotate data in the access information statistics file that meets preset conditions based on a preset annotation generation script, and to generate a waveform annotation script. The access information statistics file processing module is used to index the signal types in the signal extraction file by column; analyze the access requests line by line, store the initiation time corresponding to each access request in the request dictionary, and store the response time corresponding to each access request in the response dictionary; compare the request dictionary and the response dictionary, determine the initiation time and response time corresponding to the same access request as information record entries, and store them in the access information statistics file; calculate various statistical data of bus performance and write them into the access information statistics file. The device further includes: a graphing module, used to create structured data including multiple target data based on the access information statistics file; and output statistical graphs corresponding to the target data respectively; wherein the statistical graphs include at least one of the following: histogram and bar chart.

8. An electronic device, characterized in that, The method includes a processor and a memory, wherein the memory stores computer-executable instructions that can be executed by the processor, and the processor executes the computer-executable instructions to implement the bus performance simulation analysis method according to any one of claims 1 to 6.

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