Image rendering method and device
By sharing the rendering task between the image processing unit and the artificial intelligence processing unit of the image processor, the rendering delay problem of laptops when operating with rotary or sliding buttons is solved, and smooth image rendering is achieved.
Patent Information
- Application Number
- CN202511233205.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-08-29
- Publication Date
- 2025-12-12
AI Technical Summary
In laptops, using the rotary or sliding buttons to perform continuous image color correction or rendering results in a large number of commands being triggered continuously, causing rendering delays and failing to meet rendering requirements.
The rendering task is shared by the image processing unit and the artificial intelligence processing unit of the image processor, which process the image sets of the first and second frames respectively, and synthesize the final target image set to avoid delay.
It enables AI-assisted rendering when the graphics processor is overloaded, avoiding delays in the rendering process and ensuring smooth image rendering.
Smart Images

Figure CN121120357A_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The embodiment of the present application relates to the field of image processing, and relates to but is not limited to an image rendering method and device. BACKGROUND
[0002] For a notebook computer with an image rendering function, the current problem is that in the process of performing continuous image toning or image rendering, a large number of instructions are continuously triggered due to continuous sliding of a button or continuous rotation of a button, so that the rendering or toning capability of the notebook computer cannot meet the rendering requirement, and thus rendering delay becomes a technical problem to be solved urgently. SUMMARY
[0003] Therefore, the embodiment of the present application provides an image rendering method and device.
[0004] The technical scheme of the embodiment of the present application is as follows:
[0005] In a first aspect, the embodiment of the present application provides an image rendering method, comprising:
[0006] In response to continuously issued rendering instructions, determining a target frame number of images to be rendered in a unit time based on attribute parameters of the rendering instructions and a number of trigger instructions issued in the unit time;
[0007] In a case where the target frame number is greater than a first frame number, determining a frame number difference between the target frame number and the first frame number as a second frame number, wherein the first frame number is determined based on real-time performance of an image processor used for processing the rendering instructions;
[0008] rendering, by an image processing unit of the image processor, a first image set satisfying the first frame number in the unit time, and rendering, by an artificial intelligence processing unit of the image processor, a second image set satisfying the second frame number in the unit time;
[0009] Synthesizing the first image set and the second image set to obtain a target image set completed in the unit time.
[0010] In a second aspect, the embodiment of the present application provides an image rendering device, comprising: an artificial intelligence chip and an image processor, the image processor comprising an image processing unit and an artificial intelligence processing unit,
[0011] The artificial intelligence chip is configured to, in response to continuously issued rendering instructions, determine a target frame number of images to be rendered in a unit time based on attribute parameters of the rendering instructions and a number of trigger instructions issued in the unit time;
[0012] The artificial intelligence chip is further configured to determine, in a case where the target frame number is greater than the first frame number, a frame number difference between the target frame number and the first frame number as a second frame number, wherein the first frame number is determined based on real-time performance of an image processor used to process the rendering instruction;
[0013] The image processing unit is configured to render a first image set satisfying a first frame number in a unit time;
[0014] The artificial intelligence processing unit is configured to render a second image set satisfying a second frame number in a unit time;
[0015] The image processor is further configured to synthesize the first image set and the second image set to obtain a target image set completed in the unit time.
[0016] In a third aspect, an electronic device is provided, including a memory and a processor, the memory storing a computer program capable of running on the processor, and the processor implements the steps in the above method when executing the program.
[0017] In a fourth aspect, a storage medium is provided, storing executable instructions for implementing the steps in the above method when executed by a processor.
[0018] In a fifth aspect, a computer program product is provided, including a computer program or instructions, which, when executed by a processor, implements the steps in the above method. BRIEF DESCRIPTION OF DRAWINGS
[0019] Figure 1 An implementation flowchart of an image rendering method provided by an embodiment of the present application is shown in the figure;
[0020] Figure 2A An implementation flowchart of adjusting the first frame number provided by an embodiment of the present application is shown in the figure;
[0021] Figure 2B An implementation flowchart of adjusting the first frame number provided by an embodiment of the present application is shown in the figure;
[0022] Figure 2C An implementation flowchart of adjusting the first frame number provided by an embodiment of the present application is shown in the figure;
[0023] Figure 3A An implementation flowchart of an image rendering method provided by an embodiment of the present application is shown in the figure;
[0024] Figure 3B An implementation flowchart of an image rendering method provided by an embodiment of the present application is shown in the figure;
[0025] Figure 3CA flowchart for generating continuous execution instructions is provided for the embodiments of the present application.
[0026] Figure 3D A schematic diagram of system hardware is provided for the embodiments of the present application.
[0027] Figure 3E A flowchart for pre-adjusting hardware parameters is provided for the embodiments of the present application.
[0028] Figure 4A A schematic diagram of image rendering real-time efficiency is provided for the embodiments of the present application.
[0029] Figure 4B A schematic diagram of picture rendering is provided for the embodiments of the present application.
[0030] Figure 5 A schematic diagram of the composition structure of an image rendering device is provided for the embodiments of the present application.
[0031] Figure 6 A hardware entity schematic diagram of an electronic device is provided for the embodiments of the present application. DETAILED DESCRIPTION
[0032] In order to make the purpose, technical solutions and advantages of the embodiments of the present application clearer, the specific technical solutions of the embodiments of the present application will be further described in detail below with reference to the drawings in the embodiments of the present application. The following embodiments are used to illustrate the present application, but not to limit the scope of the present application.
[0033] In the following description, "some embodiments" are described, which describe a subset of all possible embodiments, but it can be understood that "some embodiments" can be the same subset or different subset of all possible embodiments, and can be combined with each other without conflict.
[0034] In the following description, the terms "first\second\third" are only to distinguish similar objects, and do not represent a specific order of the objects. It can be understood that "first\second\third" can be interchanged with a specific order or sequence as allowed, so that the embodiments of the present application described herein can be implemented in an order other than that illustrated or described herein.
[0035] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which the present application belongs. The terms used herein are only for the purpose of describing the embodiments of the present application, and are not intended to limit the present application.
[0036] The embodiments of the present application provide an image rendering method, as shown in the figure, the method comprises: Figure 1
[0037] Step S110, in response to the continuously issued rendering instructions, determining a target frame number of images to be rendered in a unit time based on attribute parameters of the rendering instructions and a number of trigger instructions issued in the unit time;
[0038] Here, the rendering of images can be implemented using a graphics processing unit (GPU). Image rendering is the process of converting a 3D model or 2D data into a pixel matrix, i.e., an image. In a game scenario, each frame can be independently rendered as a complete image to achieve dynamic effects through a high frame rate (e.g., 60 FPS). In a film special effect or building visualization scenario, the GPU can render in blocks and then merge them to finally output a high-resolution image (e.g., 8K / 16K) for a complex scene (e.g., containing millions of polygons and global lighting).
[0039] An image rendering command is a series of instructions executed by a GPU to generate a picture (e.g., setting materials, lighting, drawing objects, etc.). Its complexity (e.g., number of polygons, texture resolution, shader logic) directly affects the amount of computation for single-frame rendering.
[0040] In implementation, the complexity of a rendering command can be determined based on its attribute parameters such as identification, function, name, etc. Among them, complex commands (e.g., high-precision lighting, dynamic shadows) require more computing resources and prolong the single-frame rendering time. Simplified commands (e.g., reducing overdraw, merging batch processing, using low-resolution textures) can shorten the single-frame rendering time.
[0041] The number of trigger instructions issued in a unit time can be determined based on trigger parameters such as the rotation speed of a rotation button triggered by a user and the sliding speed of a sliding key triggered by a user.
[0042] In implementation, the target frame number of images to be rendered in a unit time can be determined based on the complexity of the rendering instructions and the number of rendering instructions triggered by a user in a unit time. For example, in the case of high complexity and a large number of trigger instructions in a unit time, the target frame number of rendering may not be met in a unit time; in the case of low complexity and a small number of trigger instructions in a unit time, the image processor can implement rendering of the target frame number in a unit time.
[0043] Step S120, in the case where the target frame number is greater than a first frame number, determining a frame number difference between the target frame number and the first frame number as a second frame number, wherein the first frame number is determined based on the real-time performance of an image processor for processing the rendering instructions;
[0044] Here, the real-time performance of the GPU can be determined based on at least one of the following parameters: hardware configuration of the GPU, GPU utilization, i.e. usage rate (percentage) of the core computing unit, usage rate of the display memory (used / total display memory), GPU core temperature, etc.
[0045] In the implementation process, the real-time performance of the GPU can be determined based on the above-obtained parameters. Then, based on the real-time performance of the GPU, the frame number of the image that the GPU can currently smoothly render, i.e. the first frame number, is determined.
[0046] If it is determined that the target frame number is greater than the first frame number, i.e. it is determined that the current GPU cannot smoothly render all the target frame numbers, the target frame number can be divided into two parts: the first frame number that can be smoothly rendered, and the remaining frame number (second frame number) other than the first frame number.
[0047] In step S130, the image processing unit of the image processor is used to render a first image set satisfying the first frame number within the unit time, and the artificial intelligence processing unit of the image processor is used to render a second image set satisfying the second frame number within the unit time.
[0048] Here, the image processor can be divided into an image processing unit and an artificial intelligence processing unit. The traditional image processing unit is used for tasks such as vertex shading, pixel shading, and geometry processing in graphics rendering, and accelerates 3D graphics processing through large-scale parallel computing. The artificial intelligence processing unit is used to complete rendering based on rendering instructions using AI image generation technology.
[0049] In the implementation process, the first image set of the first frame number is processed by the image processing unit, and the second image set of the second frame number is processed by the artificial intelligence processing unit. In this way, the image processing unit can smoothly process the first image set of the first frame number. The AI processing unit can assist in processing the second image set of the remaining second frame number.
[0050] In step S140, the first image set and the second image set are synthesized to obtain a target image set that is completed in rendering within the unit time.
[0051] Here, the first image set and the second image set can be synthesized by the GPU to obtain the target image set that is completed in rendering.
[0052] In some embodiments, each of the first image set and the second image set can be identified based on the input order of the source image, and the first image set and the second image set can be synthesized based on the identification of the input order to obtain the target image set that is completed in rendering.
[0053] In some embodiments, the number of frames in the target image set can be preset. During implementation, a first image set and a second image set can be synthesized based on the number of frames to obtain a target image set that meets the required frame count. For example, the number of frames in the target image set can be preset to 30, and the first image set and the second image set can each have 30 frames. Then, a first image from the first image set and a second image from the second image set can be synthesized to obtain a single frame in the target image set.
[0054] In this embodiment, when the target frame number of the image to be rendered is determined to be greater than the first frame number that the image processor can smoothly process, the image processing unit and the artificial intelligence processing unit of the image processor simultaneously render the image to be rendered at the target frame number. This enables the graphics processor to smoothly process images larger than the first frame number, and because the artificial intelligence processing unit and the image processing unit work together, screen lag during rendering is effectively avoided.
[0055] In some embodiments, such as Figure 2A As shown in the figure, this application embodiment provides a method for adjusting the number of the first frame, which can be achieved through the following steps:
[0056] Step S201: Detect the target images in the target image set and determine the proportion of pixel changes in the image within the unit time.
[0057] In some embodiments, during the image rendering process, the partially rendered target image can be detected to determine the number of changing pixels in a frame per unit time. Then, based on the total number of pixels in a frame, the percentage of pixel change can be determined. For example, if a frame has a total of 2 million pixels and 500,000 pixels have changed, then the percentage of change is 500,000 divided by 2 million, which equals 25%, meaning that 25% of the pixels in a frame have changed.
[0058] In some embodiments, the ratio value can also be determined after image rendering is completed, as a reference for adjusting the first frame number in the next rendering.
[0059] Step S202: If the ratio value is greater than the ratio threshold, reduce the number of the first frames;
[0060] Here, the ratio threshold can be determined based on the real-time processing capability of the image processor, or it can be set by the user based on actual rendering needs.
[0061] During implementation, if the ratio value is greater than the ratio threshold, it can be determined that there are too many pixels to be rendered, meaning that the image processor cannot smoothly render the first frame of the image within a unit of time. Therefore, the number of the first frame needs to be reduced so that the image processor can smoothly render the reduced first frame of the image within a unit of time.
[0062] For example, if the percentage threshold is set to 50%, the first frame count is 30 frames; if the percentage change is set to 75%, the first frame count can be adjusted to 15 frames so that the image processor can smoothly render 15 frames per unit of time.
[0063] Step S203: If the ratio value is less than the ratio threshold, increase the number of the first frames.
[0064] During implementation, if the ratio is less than the ratio threshold, it can be determined that the number of pixels to be rendered is relatively small. This means that the image processor can smoothly render more than the number of first frames per unit time. Therefore, the number of first frames needs to be increased so that the image processor can smoothly render the increased number of first frames per unit time.
[0065] For example, if the percentage threshold is set to 50%, the first frame count is 30 frames; if the percentage change is set to 25%, the first frame count can be adjusted to 60 frames, so that the image processor can smoothly render 60 frames of images per unit time.
[0066] In this embodiment, target images in the target image set are detected in real time or after completion, and the first frame number is adjusted based on the proportion of pixel change per unit time. Thus, the adjusted first frame number can more accurately represent the real-time processing capability of the image processor.
[0067] In some embodiments, such as Figure 2B As shown in the figure, this application embodiment provides a method for adjusting the number of the first frame, which can be achieved through the following steps:
[0068] Step S211: Detect the target images in the target image set and determine the total number of pixels that change within the unit time.
[0069] In some embodiments, during the image rendering process, detection can be performed on a portion of the rendered target image. This can involve first determining the amount of change in pixels at the same coordinate position per unit time, and then determining the total number of pixels with corresponding changes at all coordinates within the unit time. For example, the total number of pixels changing across all images within one second can be determined to be 500,000.
[0070] In some embodiments, the total number of pixels can be determined after image rendering is completed, as a reference for adjusting the number of the first frame in the next rendering.
[0071] Step S212: If the total number of pixels is greater than the pixel threshold, reduce the number of the first frame.
[0072] Here, the pixel threshold can be determined based on the real-time processing capability of the image processor, or the user can set the pixel threshold based on actual rendering requirements.
[0073] During implementation, if the total number of changing pixels is greater than the pixel threshold, it can be determined that the number of pixels to be rendered is too large, meaning that the image processor cannot smoothly render the first frame of the image within a unit of time. Therefore, the number of the first frame needs to be reduced so that the image processor can smoothly render the reduced first frame of the image within a unit of time.
[0074] For example, if the pixel threshold is set to 500,000, the first frame count is 30 frames; if the total number of changing pixels is set to 1 million, the first frame count can be adjusted to 15 frames, so that the image processor can smoothly render 15 frames of image per unit time.
[0075] Step S213: If the total number of pixels is less than the pixel threshold, increase the number of the first frame.
[0076] During implementation, if the total number of changing pixels is less than the pixel threshold, it can be determined that the number of pixels to be rendered is relatively small. In other words, it can be determined that the image processor can smoothly render more than the number of first frames per unit time. Therefore, the number of first frames needs to be increased so that the image processor can smoothly render the increased number of first frames per unit time.
[0077] For example, if the pixel threshold is set to 500,000, the first frame count is 30 frames; if the total number of changing pixels is set to 250,000, the first frame count can be adjusted to 60 frames, so that the image processor can smoothly render 60 frames of images per unit time.
[0078] In this embodiment, target images in the target image set are detected in real time or after completion, and the first frame number is adjusted based on the total number of pixels changing per unit time. Thus, the adjusted first frame number can more accurately represent the real-time processing capability of the image processor.
[0079] In some embodiments, this application provides a method for adjusting the number of first frames, such as... Figure 2C As shown, this can be achieved through the following steps:
[0080] Step S221: Obtain the resource configuration information of the image processor;
[0081] Here, the resource configuration information of the image processor includes the number of GPU cores, GPU frequency, GPU utilization, video memory usage, and other resources that can be allocated to render images.
[0082] During implementation, since the image processor may perform other image processing tasks in addition to rendering images, and the resource configuration required for different tasks is different, it is necessary to obtain the resource configuration information that can be provided for rendering images in real time.
[0083] For example, the RTX 5080 has 7680 CUDA cores, which can determine in real time the number of cores that can be allocated to image rendering tasks; it can also determine parameters such as the current video memory capacity that the GPU can provide in real time.
[0084] Step S222: If the real-time rendering capability of the image processor is reduced based on the resource configuration information, the first frame rate is reduced.
[0085] Based on resource configuration information, a reduction in the resources allocated to the graphics processor (GPU) for image rendering tasks indicates a decrease in the GPU's real-time rendering capability. For example, if the number of allocated cores is reduced from 300 to 200, a decrease in the GPU's real-time rendering capability can be determined. In this case, the first frame rate can be reduced to allow the GPU to smoothly render the reduced first frame rate within a given unit of time.
[0086] Step S223: If the real-time rendering capability of the image processor is increased based on the resource configuration information, the first frame count is increased.
[0087] By determining that an increase in resources allocated to the image processor for image rendering tasks based on resource configuration information, it can be concluded that the image processor's real-time rendering capability has increased. For example, if the number of allocated cores increases from 300 to 400, it can be determined that the image processor's real-time rendering capability has increased. In this case, the first frame rate can be increased so that the image processor can smoothly render the increased first frame rate within a unit of time.
[0088] In this embodiment, resource configuration information that can be provided for rendering the image can be obtained in real time, and the first frame number can be adjusted based on this resource configuration information. In this way, the adjusted first frame number can more accurately represent the real-time processing capability of the image processor.
[0089] In some embodiments, the above step S140, "synthesizing the first image set and the second image set to obtain the target image set that has been rendered within the unit time," can be achieved through the following steps:
[0090] Step 141: Obtain the first time identifier corresponding to each first image in the first image set;
[0091] During implementation, an artificial intelligence chip (AI chip) can be used to time-mark the input rendering instructions to mark the corresponding image to be rendered for each rendering instruction. That is, each image to be rendered can be set with a time stamp, and the first image obtained after the image to be rendered has the same time stamp as the corresponding image to be rendered.
[0092] For example, in the case of batch image processing, if the rendering command corresponds to the 1st second, the image to be rendered in the 1st second is marked as 1. Similarly, the image to be rendered in the 3rd second is marked as 3, and the image to be rendered in the 5th second is marked as 5. After rendering the above 3 frames of images, the resulting three first images are marked as 1, 3, and 5 respectively.
[0093] For example, when processing a single image, each rendering command can be identified. The first image obtained from the rendering command triggered in the 1st second is identified as 1. Similarly, the first image obtained from the rendering command triggered in the 3rd second is identified as 3, and the first image obtained from the rendering command triggered in the 5th second is identified as 5. The resulting three first images are identified as 1, 3, and 5, respectively.
[0094] Step 142: Obtain the second time identifier corresponding to each second image in the second image set;
[0095] During implementation, the second image obtained after the image to be rendered is identified by the same time stamp as the corresponding image to be rendered.
[0096] For example, if the rendering command corresponds to the 2nd second, the image to be rendered at the 2nd second is labeled as 2. Similarly, the image to be rendered at the 4th second is labeled as 4, and the image to be rendered at the 6th second is labeled as 6. After rendering these 3 frames, the resulting first images are labeled as 2, 4, and 6 respectively.
[0097] For example, when processing a single image, each rendering command can be identified. The second image obtained from the rendering command triggered at the 2nd second is identified as 2. Similarly, the second image obtained from the rendering command triggered at the 4th second is identified as 4, and the second image obtained from the rendering command triggered at the 6th second is identified as 6. The resulting three first images are identified as 2, 4, and 6, respectively.
[0098] Step 143: Based on the first time identifier corresponding to each first image and the second time identifier corresponding to each second image, synthesize the target image set.
[0099] During implementation, the first and second images can be synthesized based on the order in which the instructions are issued. For example, images labeled 1 (first image), 2 (second image), 3 (first image), 4 (second image), 5 (first image), and 6 (second image) can be synthesized to obtain the target image set.
[0100] In some embodiments, the first image and the second image can be synthesized based on the number of image frames in the target image set. For example, if the number of image frames is one frame (3D image or 2D image), the above 6 image frames can be synthesized to obtain one target image frame. If the number of image frames is two frames, the images identified as 1 (first image), 2 (second image), and 3 (first image) can be synthesized to obtain the first image frame, and the images identified as 4 (second image), 5 (first image), and 6 (second image) can be synthesized to obtain the second image frame.
[0101] In this embodiment, a target image set is synthesized based on a first time identifier corresponding to each first image and a second time identifier corresponding to each second image. Thus, since the time identifiers correspond to the output command and the input images included in the command, the resulting target image set can match the temporal order of the input command and the input images, resulting in a target image set that satisfies the rendering time order.
[0102] In some embodiments, the above image rendering method can also be implemented through the following steps:
[0103] Step S150: If the target frame number is less than or equal to the first frame number, the image processor renders a third set of images that meet the target frame number within the unit time, thereby obtaining a target image set that has been rendered.
[0104] Here, the first frame number is determined based on the real-time performance of the image processor used to process rendering instructions, that is, the image processor is capable of smoothly processing images to be rendered that are less than or equal to the target frame number per unit time.
[0105] During implementation, an artificial intelligence chip can be used to determine that the target frame number is less than or equal to the first frame number. This means that based on the real-time processing capabilities of the image processor, the image processing unit of that processor can smoothly process the third set of images with the target frame number. For example, if the first frame number is 30 frames and the target frame number is 25 frames, the image rendering task can be directly completed using the image processing unit of the image processor.
[0106] In this embodiment, if the target frame number is determined to be less than or equal to the first frame number, the image processor renders a third set of images that meet the target frame number within a unit of time. This allows for smooth image rendering without activating the image processor's artificial intelligence processing unit, provided the image processor can smoothly render the target frame number.
[0107] In some embodiments, such as Figure 3A As shown in the embodiments of this application, an image rendering method is also provided, which can be implemented through the following steps:
[0108] Step S310: In response to the continuously issued rendering commands, determine the target number of images to be rendered per unit time based on the attribute parameters of the rendering commands and the number of trigger commands issued per unit time.
[0109] Step S320: If the target frame number is greater than the first frame number, determine the instruction threshold that the image processor can process per unit time.
[0110] Here, the instruction threshold can be determined based on the real-time processing capability of the image processor.
[0111] In some embodiments, there is a correspondence between the instruction threshold and the number of first frames, that is, the instruction threshold can characterize the number of instructions that can be processed per unit time, and the number of instructions can correspond to the number of first frames that can be processed.
[0112] Step S330: Intermittently extract target instructions that meet the instruction threshold from the trigger instruction data;
[0113] Here, target instructions that meet the instruction threshold can be extracted at intervals from the trigger instruction data.
[0114] For example, when a user triggers the rotation button and rotates the screen one full circle, 500 color rendering instructions are generated. User A rotates the screen in 2 seconds, and within those 2 seconds, the image processor can only smoothly receive and execute 50 instructions. Therefore, 50 instructions can be captured at even intervals from these 500 points. User B rotates the screen in 6 seconds, also generating 500 instructions. In 6 seconds, the image processor can execute 150 instructions, so 150 points can be captured at even intervals from these 500 points.
[0115] Step S340: Process the target instruction using the image processor to obtain a set of target images that have been rendered.
[0116] During implementation, the intercepted target instructions can be sent to the image processor for rendering instruction processing. For example, when user A triggers the rotation button, 50 instructions can be intercepted at an average interval from 500 points and sent to the image processor for rendering instruction processing; when user B triggers the rotation button, 150 instructions can be intercepted at an average interval from 500 points and sent to the image processor for rendering instruction processing.
[0117] In this embodiment, if the target frame number is determined to be greater than the first frame number, target instructions that meet the instruction threshold can be extracted from the trigger instruction data at intervals. The image processor can then process the target instructions to obtain a set of target images that have been rendered. This allows the image processor to process the target instructions smoothly, effectively avoiding delays that occur during image rendering.
[0118] Figure 3B This is a flowchart illustrating an image rendering method provided in an embodiment of this application, as shown below. Figure 3B As shown, this can be achieved through the following steps:
[0119] Step 1: Detect the application scenarios in which the system is running;
[0120] Here, application scenario detection refers to detecting whether the rendering program is currently being called to perform image rendering, and the instruction attribute parameters of the controls used for different rendering processes that trigger rendering commands in the image rendering scenario.
[0121] Step 2: The number of instructions that can be received and executed per unit of time;
[0122] During implementation, the number of instructions that the rendering program can continuously receive and execute per unit time can be determined based on the efficiency of the user-triggered control, that is, the number of instructions triggered by the triggering control per unit time.
[0123] For example, you can first calculate the rotation speed of the rotary button, and then determine the number of instructions that need to be executed per unit time based on the rotation speed.
[0124] Step 3: Continuously input commands into the control unit;
[0125] During implementation, the instruction is continuously input into the control unit. Based on the complexity of the rendering corresponding to different instructions and the efficiency of instruction triggering, the number of instructions that the rendering program can receive and execute smoothly per unit time can be determined, that is, the number of instructions that can be continuously executed by default per unit time can be determined.
[0126] Step 4: Based on the information, collect the continuously input instructions at discrete intervals;
[0127] During implementation, the execution of continuous input can be sampled at discrete intervals based on the number of instructions that the rendering program can continuously receive and execute per unit time, and the default number of instructions that can be continuously executed per unit time.
[0128] In some embodiments, the following can be performed: Figure 3C Step 3 shown: Remove the remaining instructions (instructions that cannot be rendered smoothly) at intervals, or process the remaining instructions with AI.
[0129] Step 5: Input the commands that can be executed continuously after collection;
[0130] In some embodiments, instructions that can be processed smoothly can be input into the GPU's image processing unit, while other instructions are not processed.
[0131] In some embodiments, instructions that can be smoothly processed can be input into the GPU's image processing unit to handle them; the remaining instructions can be input into the GPU's artificial intelligence processing unit for AI processing. In this way, AI can be used to fill in the missing instructions, achieving the original number of instructions.
[0132] Step 6: The CPU, GPU, and other components render images and videos according to the received instructions.
[0133] In some embodiments, the GPU's image processing unit can be used to process instructions that can be processed smoothly, so as to achieve the effect of smooth processing of rendering instructions.
[0134] In some embodiments, the GPU's image processing unit can be used to process instructions that can be processed smoothly; at the same time, the GPU's artificial intelligence processing unit or the CPU's artificial intelligence processing unit can be used to perform AI processing on the remaining instructions. This can also achieve the effect of smoothly processing rendering instructions.
[0135] In this embodiment, system performance is analyzed in real time, and the computing speed of the laptop in various scenarios is preset in advance; or intelligent AI calculates the computing speed of the laptop in various scenarios in real time. The rotation or sliding speed of different users, or the same user at different times, is analyzed to calculate the number of commands issued per unit time, thereby calculating the number of times color adjustment or rendering is required. Based on the smooth speed supported by the laptop's performance, continuous rotation data is effectively averaged to achieve a smooth rendering effect. Thus, based on the laptop's processing power, the speed at which commands are intercepted is determined, and then sent to the central processing unit or image processor for processing, thereby ensuring the smoothness of the laptop's rendering of images or videos in real time.
[0136] Figure 3C This application provides a flowchart illustrating the generation of continuously executed instructions, as shown in the embodiments.Figure 3C As shown, this can be achieved through the following steps:
[0137] Step 1: Determine the default number of consecutive instructions per unit of time;
[0138] During implementation, the number of instructions that the rendering program can receive and execute smoothly per unit time can be determined based on the complexity of the rendering corresponding to different instructions and the efficiency of instruction triggering, that is, the number of instructions that can be continuously executed per unit time by default.
[0139] Step 2: Determine the default first discrete instruction data per unit time;
[0140] During implementation, the default number of continuous instructions per unit time can be used to determine the first discrete instruction data per default unit time based on the number of continuous instructions per default unit time determined in step 1.
[0141] Step 3: Remove the remaining instructions at intervals, or process the remaining instructions using AI.
[0142] In some embodiments, the interval can be determined based on the first discrete instruction number to remove the remaining instructions, retain the instructions that can be executed smoothly, input the instructions that can be processed smoothly into the GPU's image processing unit, and leave the remaining instructions unprocessed.
[0143] In some embodiments, instructions can be divided into instructions executed using a graphics processing unit and remaining instructions processed by AI, based on a first discrete instruction count. Instructions that can be processed smoothly can be input into the GPU's graphics processing unit for processing; the remaining instructions are input into the GPU's AI processing unit for AI processing. In this way, AI can be used to fill in the eliminated instructions, achieving the original instruction count.
[0144] Figure 3D A schematic diagram of system hardware provided for an embodiment of this application, such as... Figure 3D As shown in the diagram, the system includes: an embedded controller 31, an operating system 32, a rendering application 33, an image processor 34, a central processing unit 35, and a unit computing power calculation 36.
[0145] The embedded controller (EC) 31 is used to obtain the rendering instructions triggered by the rotation button and to obtain the calculation of unit computing power.
[0146] The operating system (OS) 32 is used to obtain rendering commands and real-time performance metrics of the image processor 34 sent by the EC 31; and to send the rendering commands and real-time performance metrics of the image processor 34 to the unit computing power calculation 36. The unit computing power calculation 36 can perform computing power calculations based on the central processing unit 35.
[0147] The unit computing power calculation 36 uses the central processing unit 35 to calculate the number of instructions that the image processor 34 can process and render, and the remaining instructions that need to be removed at intervals, based on the obtained rendering instructions and the real-time performance indicators of the image processor 34.
[0148] EC31 is used to obtain the number of instructions that can be rendered in a flow, and the remaining instructions that need to be removed at intervals; or to obtain the number of instructions that can be rendered in a flow, and the remaining instructions processed using AI; and to execute operations such as... using the instruction classification results. Figure 3B Steps 5 and 6 are shown.
[0149] In some embodiments, the above image rendering method further includes the following steps:
[0150] Step S190: If the target frame number is greater than the first frame number, adjust the resource configuration parameters of the image processor to improve the rendering capability of the image processor.
[0151] During implementation, if it is determined in advance that the target frame number is greater than the first frame number, the resource configuration parameters of the image processor can be adjusted before image rendering. For example, adjustment strategies such as increasing the number of CUDA cores used for image rendering, increasing the GPU memory usage, increasing the GPU frequency, and increasing the GPU utilization rate can be implemented to improve the rendering capability of the image processor.
[0152] Figure 3E This application provides a flowchart illustrating a pre-adjustment of hardware parameters, as shown in the embodiments below. Figure 3E As shown, this can be achieved through the following steps:
[0153] Step 1: Detect the application scenarios in which the system is running;
[0154] Here, application scenario detection refers to detecting whether the rendering program is currently being called to perform image rendering, and the instruction attribute parameters of the controls used for different rendering processes that trigger rendering commands in the image rendering scenario.
[0155] Step 2: The control unit acquires the rotational acceleration;
[0156] During implementation, the number of instructions that the rendering program can continuously receive and execute per unit time can be determined based on the efficiency of the user-triggered control, that is, the number of instructions triggered by the triggering control per unit time.
[0157] For example, it can be used as Figure 3D The embedded controller 31 shown first calculates the rotational acceleration of the rotary button, and then determines the number of instructions to be executed per unit time based on the rotational acceleration.
[0158] Step 3: Determine the system performance requirements;
[0159] When a user triggers a knob rotation to execute a rendering command, the system detects the user's rotation acceleration to determine the system performance requirements of the rotation speed; it also detects the applications running on the system to determine the application's performance requirements.
[0160] Step 4: Determine the performance adjustment level of the system in real time and then make the adjustments.
[0161] During implementation, the performance level that needs to be adjusted can be continuously and in real time based on performance requirements. Then, before the application starts adjusting, the performance settings can be set to the required level in advance.
[0162] For example, as shown in Table 1 below, different levels of CPU, GPU video memory (VRAM), and system memory are provided for different application scenarios.
[0163] Table 1
[0164]
[0165] As shown in Table 1 above, Scenario 1: The joystick rotates rapidly at high speed; rendered by CPU or dedicated graphics card (dGPU):
[0166] For the CPU, set the CPU cTDP / Freq.OC Level 1. cTDP allows the user or system to dynamically adjust the processor's standard Thermal Design Power (TDP) to adapt to different cooling conditions and performance requirements. This can be achieved by lowering the core frequency and voltage to reduce TDP below the standard value, thus reducing power consumption and cooling requirements; or by increasing the frequency and voltage (where cooling allows), releasing more performance. Freq.OC refers to increasing the processor's core frequency (and voltage) to improve performance, typically exceeding the manufacturer's default frequency range. With sufficient cooling and power supply, overclocking can significantly improve the processor's single-core or multi-core performance, suitable for high-load scenarios such as gaming, 3D rendering, and scientific computing.
[0167] GPU memory settings, GPU OC (overclock) refers to adjusting the GPU's core frequency, memory frequency, or voltage to run it at a higher frequency than the default frequency in order to improve performance.
[0168] Memory overclocking refers to adjusting parameters such as memory frequency, timings, or voltage to run it at a higher level than the manufacturer's default settings, thereby increasing memory bandwidth and reducing latency, and thus enhancing overall system performance.
[0169] Scenario 2: The creator rapidly rotates the joystick; the CPU or dGPU only performs intermediate loading, such as when zooming in / out on an image.
[0170] For the CPU, setting CPU cTDP / Freq.OC Level 2 results in CPU performance being lower than CPU cTDP / Freq.OC Level 1.
[0171] GPU memory is set to GPU P0, where memory requirements are lower than GPU OC. P-State is NVIDIA's GPU performance / power consumption level system, ranging from P0 to P12 (higher numbers indicate lower performance and lower power consumption). The main differences between P-States lie in the GPU core frequency, memory frequency, and power limits. P0 is one of NVIDIA GPU's "Performance States," representing the highest performance mode. In this mode, the GPU core frequency, memory frequency, and power consumption are all at their maximum values to provide optimal performance.
[0172] For memory, set Memory full freq; the memory requirements at this level are lower than Memroy OC.
[0173] Scenario 3: The joystick rotates slowly and gradually, with a light load on the CPU or dGPU:
[0174] For the CPU, setting CPU cTDP / Freq.OC Level 3 results in CPU performance that is lower than CPU cTDP / Freq.OC Level 2.
[0175] GPU memory is set to GPU P1, where the memory requirements are lower than those of GPU P0.
[0176] For memory, set Memory freq.x; at this level, the memory requirement is lower than Memory full freq.
[0177] In this embodiment, if it is determined in advance that the target frame number is greater than the first frame number, the resource configuration parameters of the image processor are adjusted before image rendering. In this way, the rendering capability of the image processor can be improved by adjusting the resource configuration parameters of the image processor, so as to achieve smooth processing of the image to be rendered with the target frame number.
[0178] This application provides an image rendering apparatus, including an artificial intelligence chip and an image processor. The image processor includes an image processing unit and an artificial intelligence processing unit, wherein...
[0179] The artificial intelligence chip is used to respond to continuously issued rendering commands and determine the target number of images to be rendered per unit time based on the attribute parameters of the rendering commands and the number of trigger commands issued per unit time.
[0180] The artificial intelligence chip is further configured to determine the frame difference between the target frame number and the first frame number as a second frame number when the target frame number is greater than the first frame number, wherein the first frame number is determined based on the real-time performance of the image processor used to process the rendering instructions;
[0181] The image processing unit is used to render a first image set that satisfies the first number of frames within the unit time.
[0182] The artificial intelligence processing unit is used to render a second set of images that satisfies the second frame number within the unit time.
[0183] The image processor is further configured to synthesize the first image set and the second image set to obtain a target image set that has been rendered within the unit time.
[0184] In this embodiment, when it is determined that the target frame number of the image to be rendered is greater than the first frame number that the image processor can smoothly process, the target frame number is split using an artificial intelligence chip. Then, the image processing unit and the artificial intelligence processing unit of the image processor simultaneously render the image to be rendered with the target frame number. In this way, it is possible to achieve smooth processing of the image to be rendered when the graphics processor can process more than the first frame number, and because the artificial intelligence processing unit and the image processing unit process together, the screen delay phenomenon that occurs during the rendering process is effectively avoided.
[0185] In some embodiments, the image processor is further configured to synthesize the first image set and the second image set to obtain a target image set rendered within the unit time, including:
[0186] The artificial intelligence chip is also used to obtain a first time identifier corresponding to each first image in the first image set; and to obtain a second time identifier corresponding to each second image in the second image set;
[0187] The image processor is further configured to synthesize the target image set based on the first time identifier corresponding to each of the first images and the second time identifier corresponding to each of the second images.
[0188] In this embodiment, an artificial intelligence chip records a first time identifier corresponding to each first image and a second time identifier corresponding to each second image, and an image processor is used to synthesize a target image set. Thus, since the time identifiers correspond to the output instructions and the input images included in the instructions, the resulting target image set can match the temporal order of the input instructions and input images, resulting in a target image set that satisfies the rendering time order.
[0189] Figure 4A This is a schematic diagram illustrating the real-time efficiency of image rendering as provided in an embodiment of this application, such as... Figure 4A As shown, the schematic diagram includes: a time axis, a rendering efficiency axis, a real-time rendering indicator line 41, and a rendering balance point indicator line 42.
[0190] When the real-time rendering efficiency of the screen is greater than the rendering efficiency corresponding to the marker line 42 of the process rendering balance point, the screen rendering will be delayed.
[0191] When the real-time rendering efficiency is less than the rendering efficiency corresponding to the flow rendering balance point marker line 42, smooth rendering can be achieved.
[0192] Figure 4B This is a schematic diagram of a screen rendering provided in an embodiment of this application, such as... Figure 4B As shown in the diagram, the schematic includes: an artificial intelligence chip 41 and an image processor 42, wherein,
[0193] The GPU intelligently detects the information output by the display unit in real time.
[0194] Real-time detection of changes in the image at the same coordinate, i.e., the number of times each pixel changes per unit time.
[0195] Real-time detection of changes in the entire screen, that is, the proportion of the displayed content (pixels) that changes in the entire screen per unit time.
[0196] The number of pixels rendered per unit time is determined to be equal to or lower than the smooth rendering balance point, and is marked as the rendering lag balance point. That is, the number of times the user needs to render per unit time is within the smooth performance range of the system, and rendering can be performed according to the user input information.
[0197] Given that the number of rendering points per unit time is higher than the smooth rendering equilibrium point:
[0198] The image processor 42 notifies the artificial intelligence chip 41 to break down the rendering input instructions;
[0199] The AI chip 41 detects the efficiency of user input instructions per unit time, that is, the number of instructions output per unit time.
[0200] The AI chip 41 marks the input instructions with time coordinates, and then divides the instructions into two parts: smooth rendering instructions and the remaining instructions after splitting the smooth rendering instructions.
[0201] Image processor 42 divides image rendering into two parts:
[0202] In the smooth rendering section, the image processing unit 421 of the image processor 42 performs rendering according to the smooth rendering instructions input by the artificial intelligence chip 42.
[0203] The image processor 41's artificial intelligence processing unit 422 performs artificial intelligence processing on the image based on the input split instructions (the split instructions that the GPU cannot render smoothly).
[0204] The image processor 42 combines the image processed by the artificial intelligence processing unit 422 with the image processed smoothly by the image processing unit itself, according to the time coordinates recorded by the artificial intelligence chip 41, and then outputs it to the display unit.
[0205] During implementation, the efficiency of the image processor 42 in smoothly processing instructions per unit time can be preset based on its computing power. Furthermore, during real-time rendering, self-correction is performed based on machine learning (ML). For example, an RTX 5070 GPU is preset to render 50 times per unit time, but this may not be the case depending on the user's real-time rendering needs. Therefore, by reducing the amount of content rendered per unit time, the number of smooth rendering operations can be increased.
[0206] In this embodiment of the application, a customized rendering scheme is used to eliminate the delay caused by rotation or sliding, effectively improving the user's image rendering experience.
[0207] Based on the foregoing embodiments, this application provides an image rendering apparatus, which includes various modules, each module including sub-modules, which can be implemented by a processor in an electronic device; of course, it can also be implemented by specific logic circuits; in the implementation process, the processor can be a central processing unit (CPU), a microprocessor unit (MPU), a digital signal processor (DSP), or a field programmable gate array (FPGA), etc.
[0208] Figure 5This is a schematic diagram of the composition structure of the image rendering apparatus provided in the embodiments of this application, such as... Figure 5 As shown, the device 500 includes:
[0209] The first determining module 510, in response to continuously issued rendering commands, determines the target number of images to be rendered per unit time based on the attribute parameters of the rendering commands and the number of trigger commands issued per unit time.
[0210] The second determining module 520 is used to determine the frame difference between the target frame number and the first frame number as the second frame number when the target frame number is greater than the first frame number, wherein the first frame number is determined based on the real-time performance of the image processor used to process the rendering instructions;
[0211] The first rendering module 530 is used to render a first set of images that satisfy the first number of frames within the unit time using the image processing unit of the image processor, and at the same time to render a second set of images that satisfy the second number of frames within the unit time using the artificial intelligence processing unit of the image processor.
[0212] The compositing module 540 is used to compose the first image set and the second image set to obtain the target image set that has been rendered within the unit time.
[0213] In some embodiments, the image rendering apparatus further includes a third determining module, a first reducing module, and a first increasing module, wherein the third determining module is used to detect target images in the target image set and determine the proportion of pixel changes in the image within the unit time; the first reducing module is used to reduce the number of first frames when the proportion is greater than a proportion threshold; and the first increasing module is used to increase the number of first frames when the proportion is less than the proportion threshold.
[0214] In some embodiments, the image rendering apparatus further includes a fourth determining module, a second reducing module, and a second increasing module, wherein the fourth determining module is used to detect target images in the target image set and determine the total number of pixels that change within the unit time; the second reducing module is used to reduce the number of the first frame if the total number of pixels is greater than a pixel threshold; and the second increasing module is used to increase the number of the first frame if the total number of pixels is less than the pixel threshold.
[0215] In some embodiments, the image rendering apparatus further includes an acquisition module, a third reduction module, and a third increase module, wherein the acquisition module is used to acquire resource configuration information of the image processor; the third reduction module is used to reduce the first frame number when the real-time rendering capability of the image processor is determined to be reduced based on the resource configuration information; and the third increase module is used to increase the first frame number when the real-time rendering capability of the image processor is determined to be increased based on the resource configuration information.
[0216] In some embodiments, the synthesis module 540 includes a first acquisition submodule, a second acquisition submodule, and a synthesis submodule, wherein the first acquisition submodule is used to acquire a first time identifier corresponding to each first image in the first image set; the second acquisition submodule is used to acquire a second time identifier corresponding to each second image in the second image set; and the synthesis submodule is used to synthesize the target image set based on the first time identifier corresponding to each first image and the second time identifier corresponding to each second image.
[0217] In some embodiments, the apparatus further includes a second rendering module, configured to, when determining that the target frame number is less than or equal to the first frame number, use the image processor to render a third set of images that satisfy the target frame number within the unit time, thereby obtaining a target image set that has been rendered.
[0218] In some embodiments, the image rendering apparatus further includes a fifth determining module, a command interception module, and a command processing module, wherein the second determining module is used to determine an instruction threshold that the image processor can process per unit time when the target frame number is greater than the first frame number; the command interception module is used to periodically intercept target instructions that meet the instruction threshold from the trigger instruction data; and the command processing module is used to process the target instructions using the image processor to obtain a set of target images that have been rendered.
[0219] In some embodiments, the image rendering apparatus further includes an adjustment module, configured to adjust the resource configuration parameters of the image processor to improve the rendering capability of the image processor when it is determined that the target frame number is greater than the first frame number.
[0220] The descriptions of the above device embodiments are similar to those of the above method embodiments, and have similar beneficial effects. For technical details not disclosed in the device embodiments of this application, please refer to the descriptions of the method embodiments of this application for understanding.
[0221] It should be noted that, in the embodiments of this application, if the above methods are implemented as software functional modules and sold or used as independent products, they can also be stored in a computer-readable storage medium. Based on this understanding, the technical solutions of the embodiments of this application, or the parts that contribute to related technologies, can be embodied in the form of software products. These computer software products are stored in a storage medium and include several instructions to cause electronic devices (such as mobile phones, tablets, laptops, desktop computers, etc.) to execute all or part of the methods described in the various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), magnetic disks, or optical disks. Thus, the embodiments of this application are not limited to any specific hardware and software combination.
[0222] Correspondingly, embodiments of this application provide a storage medium storing a computer program thereon, which, when executed by a processor, implements the steps in the image rendering method provided in the above embodiments.
[0223] Correspondingly, embodiments of this application provide an electronic device, Figure 6 A schematic diagram of a hardware entity of an electronic device provided in an embodiment of this application, such as... Figure 6 As shown, the hardware entity of the device 600 includes a memory 601 and a processor 602. The memory 601 stores a computer program that can run on the processor 602. When the processor 602 executes the program, it implements the steps in the image rendering method provided in the above embodiments.
[0224] The memory 601 is configured to store instructions and applications executable by the processor 602, and can also cache data to be processed or already processed (e.g., image data, audio data, voice communication data and video communication data) of the processor 602 and various modules in the electronic device 600, and can be implemented by flash memory or random access memory (RAM).
[0225] It should be noted that the descriptions of the storage medium and device embodiments above are similar to the descriptions of the method embodiments above, and have similar beneficial effects. For technical details not disclosed in the storage medium and device embodiments of this application, please refer to the descriptions of the method embodiments of this application for understanding.
[0226] It should be understood that the phrase "one embodiment" or "an embodiment" throughout the specification means that a specific feature, structure, or characteristic related to the embodiment is included in at least one embodiment of this application. Therefore, "in one embodiment" or "in an embodiment" appearing throughout the specification does not necessarily refer to the same embodiment. Furthermore, these specific features, structures, or characteristics can be combined in any suitable manner in one or more embodiments. It should be understood that in the various embodiments of this application, the sequence numbers of the above-described processes do not imply a sequential order of execution; the execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of this application. The sequence numbers of the above-described embodiments are merely descriptive and do not represent the superiority or inferiority of the embodiments.
[0227] It should be noted that, in this document, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Unless otherwise specified, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes that element.
[0228] In the several embodiments provided in this application, it should be understood that the disclosed devices and methods can be implemented in other ways. The device embodiments described above are merely illustrative. For example, the division of units is only a logical functional division, and in actual implementation, there may be other division methods, such as: multiple units or components can be combined, or integrated into another system, or some features can be ignored or not executed. In addition, the coupling, direct coupling, or communication connection between the various components shown or discussed can be through some interfaces, and the indirect coupling or communication connection between devices or units can be electrical, mechanical, or other forms.
[0229] The units described above as separate components may or may not be physically separate. The components shown as units may or may not be physical units. They may be located in one place or distributed across multiple network units. Some or all of the units may be selected to achieve the purpose of this embodiment according to actual needs.
[0230] In addition, each functional unit in the various embodiments of this application can be integrated into one processing unit, or each unit can be a separate unit, or two or more units can be integrated into one unit; the integrated unit can be implemented in hardware or in the form of hardware plus software functional units.
[0231] Those skilled in the art will understand that all or part of the steps of the above method embodiments can be implemented by hardware related to program instructions. The aforementioned program can be stored in a computer-readable storage medium. When the program is executed, it performs the steps of the above method embodiments. The aforementioned storage medium includes various media that can store program code, such as mobile storage devices, read-only memory (ROM), magnetic disks, or optical disks.
[0232] Alternatively, if the integrated units described above are implemented as software functional modules and sold or used as independent products, they can also be stored in a computer-readable storage medium. Based on this understanding, the technical solutions of the embodiments of this application, or the parts that contribute to related technologies, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause an electronic device (which may be a mobile phone, tablet computer, laptop computer, desktop computer, etc.) to execute all or part of the methods described in the various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as mobile storage devices, ROM, magnetic disks, or optical disks.
[0233] The methods disclosed in the several method embodiments provided in this application can be arbitrarily combined without conflict to obtain new method embodiments.
[0234] The features disclosed in the several product embodiments provided in this application can be arbitrarily combined without conflict to obtain new product embodiments.
[0235] The features disclosed in the several method or device embodiments provided in this application can be arbitrarily combined without conflict to obtain new method or device embodiments.
[0236] The above description is merely an embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.
Claims
1. An image rendering method, the method comprising: In response to continuously issued rendering commands, the target number of images to be rendered per unit time is determined based on the attribute parameters of the rendering commands and the number of trigger commands issued per unit time. If it is determined that the target frame number is greater than the first frame number, the frame number difference between the target frame number and the first frame number is determined as the second frame number, wherein the first frame number is determined based on the real-time performance of the image processor used to process the rendering instructions; The image processing unit of the image processor renders a first set of images that satisfies the first number of frames within the unit time, and the artificial intelligence processing unit of the image processor renders a second set of images that satisfies the second number of frames within the unit time. The first image set and the second image set are synthesized to obtain the target image set that is rendered within the unit time.
2. The method of claim 1, further comprising: Detect the target images in the target image set and determine the proportion of pixel change in the image within the unit time. If the ratio value is determined to be greater than the ratio threshold, the number of the first frame is reduced. If the ratio value is determined to be less than the ratio threshold, the number of the first frame is increased.
3. The method of claim 1, further comprising: The target images in the target image set are detected to determine the total number of pixels that change within the unit time. If the total number of pixels is determined to be greater than the pixel threshold, the number of the first frame is reduced. If the total number of pixels is determined to be less than the pixel threshold, the number of the first frame is increased.
4. The method of claim 1, further comprising: Obtain the resource configuration information of the image processor; If the real-time rendering capability of the image processor is reduced based on the resource configuration information, the number of the first frame will be reduced. If the real-time rendering capability of the image processor is increased based on the resource configuration information, the number of the first frame rate is increased.
5. The method according to any one of claims 1 to 4, wherein synthesizing the first image set and the second image set to obtain the target image set rendered within the unit time time comprises: Obtain the first time identifier corresponding to each first image in the first image set; Obtain the second time identifier corresponding to each second image in the second image set; The target image set is synthesized based on the first time identifier corresponding to each of the first images and the second time identifier corresponding to each of the second images.
6. The method according to any one of claims 1 to 4, wherein the method further comprises: If the target frame number is determined to be less than or equal to the first frame number, the image processor renders a third set of images that meet the target frame number within the unit time, thereby obtaining a target image set that has been rendered.
7. The method according to any one of claims 1 to 4, wherein the method further comprises If the target number of frames is greater than the first number of frames, a threshold of instructions that the image processor can process per unit time is determined. Target instructions that satisfy the instruction threshold are periodically extracted from the trigger instruction data; The target instructions are processed using the image processor to obtain a set of target images that have been rendered.
8. The method according to any one of claims 1 to 4, wherein the method further comprises: If the target frame count is determined to be greater than the first frame count, the resource configuration parameters of the image processor are adjusted to improve the rendering capability of the image processor.
9. An image rendering apparatus, the apparatus comprising: An artificial intelligence chip and an image processor, wherein the image processor includes an image processing unit and an artificial intelligence processing unit. The artificial intelligence chip is used to respond to continuously issued rendering commands and determine the target number of images to be rendered per unit time based on the attribute parameters of the rendering commands and the number of trigger commands issued per unit time. The artificial intelligence chip is further configured to determine the frame difference between the target frame number and the first frame number as a second frame number when the target frame number is greater than the first frame number, wherein the first frame number is determined based on the real-time performance of the image processor used to process the rendering instructions; The image processing unit is used to render a first image set that satisfies the first number of frames within the unit time. The artificial intelligence processing unit is used to render a second set of images that satisfies the second frame number within the unit time. The image processor is further configured to synthesize the first image set and the second image set to obtain a target image set that has been rendered within the unit time.
10. The apparatus of claim 9, wherein the image processor is further configured to synthesize the first image set and the second image set to obtain a target image set rendered within the unit time, comprising: The artificial intelligence chip is also used to obtain the first time identifier corresponding to each first image in the first image set; Obtain the second time identifier corresponding to each second image in the second image set; The image processor is further configured to synthesize the target image set based on the first time identifier corresponding to each of the first images and the second time identifier corresponding to each of the second images.