Charge pump voltage stabilization method and device and storage medium

Abstract

The invention relates to a charge pump voltage stabilization method and device and a storage medium, first output voltage of a charge pump is subjected to voltage stabilization through a high voltage stabilizer to obtain target output voltage of the charge pump, and the target output voltage and second output voltage of the charge pump are compared through a high voltage comparator; the gate voltage is compared with a first output voltage of the charge pump. The PMOS tube is selected to be turned on or turned off according to the comparison, so that the ripple is reduced, and the output voltage is stabilized.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of integrated circuits, and in particular to a charge pump voltage stabilizing method, device and storage medium. BACKGROUND

[0002] The output high voltage ripple of a conventional charge pump system significantly increases when the load current experiences a transient mutation, and the stability is insufficient; and the ripple exceeds an acceptable range in some application scenarios. In related technologies, a large-capacity on-chip capacitor is usually added at the output end to suppress the ripple, but adding a large-capacity on-chip capacitor at the output end greatly increases the chip area, resulting in a cost increase. SUMMARY

[0003] The present application provides a charge pump voltage stabilizing method, device and storage medium, and aims to at least solve one of the technical problems existing in the prior art.

[0004] The technical solution of the present application is a charge pump voltage stabilizing method, comprising the following steps:

[0005] The first output voltage of the charge pump is passed through a high voltage stabilizer to obtain a target output voltage of the charge pump through voltage stabilization;

[0006] The size of the target output voltage and the second output voltage of the charge pump is compared using a high voltage comparator, and the size of the gate voltage and the first output voltage of the charge pump is compared to turn on or off a PMOS tube, thereby stabilizing the output voltage.

[0007] According to some embodiments of the present application, if the second output voltage of the charge pump is greater than the target output voltage, and the gate voltage is equal to the first output voltage of the charge pump, the PMOS tube is turned off.

[0008] According to some embodiments of the present application, if the second output voltage of the charge pump is less than the target output voltage, and the gate voltage is equal to zero, the PMOS tube is turned on.

[0009] According to some embodiments of the present application, the first output voltage of the charge pump satisfies the following formula:

[0010] VPUMP = VOUT_TARGET + 0.2V,

[0011] In the formula, VPUMP represents the first output voltage of the charge pump, and VOUT_TARGET represents the target output voltage.

[0012] The technical solution of the present application also relates to a charge pump voltage stabilizing circuit for executing the charge pump voltage stabilizing method as described above, and the charge pump voltage stabilizing circuit comprises:

[0013] a charge pump;

[0014] a high voltage comparator connected with the charge pump;

[0015] a high voltage regulator connected with the connection point of the charge pump and the high voltage comparator.

[0016] According to some embodiments of the present application, further comprising a PMOS tube and a PGATE terminal, a drain of the PMOS tube is connected with the connection point of the charge pump and the high voltage comparator, a substrate of the PMOS tube is connected with the connection point of the charge pump and the high voltage comparator, and a gate of the PMOS tube is connected with the PGATE terminal.

[0017] According to some embodiments of the present application, further comprising a VOUT terminal and a VOUT_TARGET terminal, the VOUT terminal is connected with the high voltage comparator, the VOUT_TARGET terminal is connected with the high voltage comparator, and the PGATE terminal is connected with the high voltage comparator.

[0018] According to some embodiments of the present application, the VOUT terminal outputs a second output voltage of the charge pump, the VOUT_TARGET terminal outputs a target output voltage, and the PGATE terminal outputs a gate voltage.

[0019] The technical solution of the present application further relates to a charge pump voltage stabilizing device for executing the charge pump voltage stabilizing method, and the charge pump voltage stabilizing device comprises:

[0020] a voltage stabilizing unit for stabilizing a first output voltage of a charge pump through a high voltage regulator to obtain a target output voltage of the charge pump;

[0021] a comparison unit for comparing the target output voltage with a second output voltage of the charge pump and comparing a gate voltage with the first output voltage of the charge pump by using a high voltage comparator, so as to open or close a PMOS tube and stabilize an output voltage.

[0022] The technical solution of the present application further relates to a computer device comprising a memory and a processor, wherein the processor executes a computer program stored in the memory to implement the method.

[0023] The technical solution of the present application further relates to a computer readable storage medium, which stores program instructions, and the program instructions are executed by a processor to implement the method.

[0024] The beneficial effects of the present application include: the first output voltage of the charge pump is passed through the high voltage stabilizer to stabilize the target output voltage of the charge pump, the high voltage comparator is used to compare the size of the target output voltage and the second output voltage of the charge pump, and the size of the gate voltage and the first output voltage of the charge pump is compared. The PMOS tube is turned on or off by comparing the size, thereby reducing the ripple and stabilizing the output voltage.

[0025] In addition, additional aspects and advantages of the present application will be described in part below, will become apparent from the following description, or will be learned by practicing the present application. BRIEF DESCRIPTION OF DRAWINGS

[0026] Figure 1 is an optional flow chart of the charge pump voltage stabilizing method in the embodiment of the present application.

[0027] Figure 2 is a circuit diagram of the charge pump voltage stabilizing circuit in the embodiment of the present application.

[0028] Figure 3 is a schematic diagram of the charge pump voltage stabilizing device in the embodiment of the present application.

[0029] Figure 4 is a comparison diagram of the results of using the charge pump voltage stabilizing method in the embodiment of the present application.

[0030] The above drawings contain the following reference signs:

[0031] PM1, PMOS tube; PUMP, charge pump; HV-REG, high voltage stabilizer; HV-COMP, high voltage comparator. DETAILED DESCRIPTION

[0032] The concept, specific structure and generated technical effects of the present application will be described clearly and completely below in combination with the embodiments and the drawings, so as to fully understand the purpose, scheme and effect of the present application. It should be noted that the embodiments in the present application and the features in the embodiments can be combined with each other without conflict.

[0033] It should be noted that, unless otherwise specified, when a certain feature is referred to as being "fixed" or "connected" to another feature, it can be directly fixed or connected to the other feature, or indirectly fixed or connected to the other feature. In addition, the up, down, left, right, top, bottom and other descriptions used in the present application are only relative to the relative positions of the components of the present application in the drawings.

[0034] Also, unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used in the description herein is for describing particular embodiments only and is not intended to be limiting of the application. The use herein of the terms "and / or" includes a combination of one or more of the associated listed items.

[0035] It should be understood that, although the terms first, second, third, etc. can be used herein to describe various elements, these elements should not be limited to these terms. These terms are only used to distinguish one element from another. For example, a first element could also be termed a second element, and, similarly, a second element could also be termed a first element without departing from the scope of the present application.

[0036] Reference Figure 1 In some embodiments, the charge pump voltage stabilizing method of the present application comprises at least the following steps:

[0037] S100, stabilizing a first output voltage of a charge pump to obtain a target output voltage of the charge pump by using a high-voltage stabilizer;

[0038] S200, comparing the target output voltage with a second output voltage of the charge pump and comparing a gate voltage with the first output voltage of the charge pump by using a high-voltage comparator to turn on or turn off a PMOS transistor, thereby stabilizing the output voltage.

[0039] It can be seen that the first output voltage of the charge pump is stabilized to obtain the target output voltage of the charge pump by using the high-voltage stabilizer, and the target output voltage is compared with the second output voltage of the charge pump and the gate voltage is compared with the first output voltage of the charge pump by using the high-voltage comparator. The PMOS transistor is turned on or turned off by comparing the sizes as described above, thereby reducing the ripple and stabilizing the output voltage.

[0040] In some embodiments, if the second output voltage of the charge pump is greater than the target output voltage and the gate voltage is equal to the first output voltage of the charge pump, the PMOS transistor is turned off.

[0041] In some embodiments, if the second output voltage of the charge pump is less than the target output voltage and the gate voltage is equal to zero, the PMOS transistor is turned on.

[0042] In some embodiments, the first output voltage of the charge pump satisfies the following formula:

[0043] VPUMP = VOUT_TARGET + 0.2V,

[0044] In the formula, VPUMP represents the first output voltage of the charge pump, and VOUT_TARGET represents the target output voltage.

[0045] It can be understood that, Figure 2 In the high-voltage charge pump voltage stabilizing mode, the charge pump with coarse adjustment can obtain a high voltage of about 0.2V higher than the target output voltage in various ways.

[0046] It should be understood that the first output voltage of the charge pump is stabilized by the high-voltage stabilizer to obtain the target output voltage of the charge pump, and the high-voltage comparator is used to compare the size of the target output voltage and the second output voltage of the charge pump. If the second output voltage of the charge pump is greater than the target output voltage, and the gate voltage is equal to the first output voltage of the charge pump, the PMOS tube is closed. If the second output voltage of the charge pump is less than the target output voltage, and the gate voltage is equal to zero, the PMOS tube is opened, so as to stabilize the output voltage.

[0047] Referring to Figure 2 The embodiment of the present application also provides a charge pump voltage stabilizing circuit for executing the charge pump voltage stabilizing method, and the charge pump voltage stabilizing circuit comprises:

[0048] a charge pump PUMP;

[0049] a high-voltage comparator HV-COMP, which is connected with the charge pump PUMP;

[0050] a high-voltage stabilizer HV-REG, which is connected with the connection point of the charge pump PUMP and the high-voltage comparator HV-COMP.

[0051] In some embodiments, a PMOS tube PM1 and a PGATE end are further included, the drain of the PMOS tube PM1 is connected with the connection point of the charge pump PUMP and the high-voltage comparator HV-COMP, the substrate of the PMOS tube PM1 is connected with the connection point of the charge pump PUMP and the high-voltage comparator HV-COMP, and the gate of the PMOS tube PM1 is connected with the PGATE end.

[0052] Specifically, the PMOS tube is a P-channel MOSFET (P-channel Metal-Oxide-Semiconductor Field-Effect Transistor).

[0053] In some embodiments, a VOUT end and a VOUT_TARGET end are further included, the VOUT end is connected with the high-voltage comparator HV-COMP, the VOUT_TARGET end is connected with the high-voltage comparator HV-COMP, and the PGATE end is connected with the high-voltage comparator HV-COMP.

[0054] In some embodiments, the VOUT end outputs the second output voltage of the charge pump, the VOUT_TARGET end outputs the target output voltage, and the PGATE end outputs the gate voltage.

[0055] Specifically, Figure 2 VOUT (i.e. the second output voltage of the charge pump mentioned above): the final output terminal voltage of the charge pump, i.e. the boosted (or negative voltage) power supply provided by the chip to the external load. VPUMP (i.e. the first output voltage of the charge pump mentioned above): an internal node of the charge pump, referring to the transient high voltage node at a certain stage in the boosting process; sometimes also refers to the "pumped-up" voltage (VOUT ≈ VPUMP) generated by the charge pump as a whole. In short, VPUMP is the "pumped-up" high voltage, and VOUT is the stable high voltage "delivered" to the load.

[0056] It can be understood that, Figure 2 PGATE is the gate voltage, and the PGATE terminal outputs the gate voltage. The PGATE terminal is the gate driving terminal of the PMOS, and the PGATE terminal outputs a controlled gate voltage for turning on / off the external (or internal) high-voltage PMOS power tube, thereby controlling the charging path or output path of the charge pump.

[0057] Referring to Figure 4 , Figure 4 is a comparison diagram of the voltage stabilizing method of the conventional high-voltage charge pump and the result after the charge pump voltage stabilizing method is applied. Figure 4 The upper thin line is the traditional Reg VPUMP, and the lower thick line is the output waveform after the application of the present application. It can be seen that the present application greatly improves the stability of the voltage and reduces the ripple.

[0058] Referring to Figure 3 , the embodiment of the present application also provides a charge pump voltage stabilizing device for executing the charge pump voltage stabilizing method, and the charge pump voltage stabilizing device comprises:

[0059] a voltage stabilizing unit for stabilizing the first output voltage of the charge pump through a high-voltage stabilizer to obtain the target output voltage of the charge pump;

[0060] a comparison unit for comparing the target output voltage and the second output voltage of the charge pump by using a high-voltage comparator, and comparing the gate voltage and the first output voltage of the charge pump to turn on or off the PMOS tube, thereby stabilizing the output voltage.

[0061] The embodiment of the present application also provides a computer device comprising a memory and a processor, wherein the processor executes the computer program stored in the memory to implement the above-mentioned method.

[0062] The embodiment of the present application also provides a computer readable storage medium having program instructions stored thereon, wherein the program instructions are executed by a processor to implement the above-mentioned method.

[0063] It should be appreciated that the steps of the methods in accordance with the embodiments of the application can be implemented or performed by a computer hardware, a combination of hardware and software, or by computer instructions stored in a non-transitory computer readable medium. The methods can use standard programming techniques. Each program can be implemented in a high level procedural or object oriented programming language to be executed by a computer system. However, if desired, the programs can be implemented in assembly or machine language. In any case, the language can be a compiled or interpreted language. Moreover, the programs can be stored on a storage media or device (memory like a computer readable medium) which can be read by a computer system in order to program the computer system to perform the processes described in this application.

[0064] Further, the operations of the processes described herein can be performed in any suitable order unless otherwise indicated herein or otherwise clearly contradicted by context. The processes described herein (or variations and / or combinations thereof) can be performed under the control of one or more computer systems configured with executable instructions (e.g., computer programs, one or more computer programs, or one or more applications) to perform the processes described herein, and can be implemented as code (e.g., executable instructions, one or more computer programs, or one or more applications) running on a computer system (e.g., distributed or local) and / or executed by a computer system, hardware, or combinations thereof. The computer programs include program instructions that can be executed by one or more processors.

[0065] Further, the methods can be implemented in any suitable type of computing platform operably connected to any suitable type of computing platform, including but not limited to a personal computer, a mini-computer, a mainframe, a workstation, a network or distributed computing environment, a separate or integrated computer platform, or in communication with a charged particle tool or other imaging device, and the like. Aspects of the application can be implemented in machine readable code stored on a non-transitory storage medium or device, whether removable or integrated to the computing platform, such as a hard disk, an optical read and / or write storage medium, RAM, ROM, and the like, such that it can be read by a programmable computer to configure and operate the computer to perform the processes described herein when the storage medium or device is read by the computer. Further, the machine readable code, or portions thereof, can be transmitted over a wired or wireless network. The application described herein includes these and other different types of non-transitory computer readable storage media when such media include instructions or programs that implement the steps described above in conjunction with a microprocessor or other data processor. The application can also include the computer itself when programmed in accordance with the methods and techniques described in the application.

[0066] The computer programs can be applied to input data to perform the functions described herein, to transform the input data to generate output data that is stored to a non-volatile memory. The output information can also be applied to one or more output devices, such as a display. In preferred embodiments of the application, the transformed data represents a physical and tangible object, including a particular visual depiction of a physical and tangible object produced on a display.

[0067] The above merely describes preferred embodiments of the present application, and the present application is not limited to the above-described embodiments. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application, as long as the same technical effects are achieved by the same means, shall be included in the protection scope of the present application. The technical solutions and / or embodiments within the protection scope of the present application can have various modifications and changes.

Claims

1. A charge pump voltage regulation method, characterized in that, Includes the following steps: The first output voltage of the charge pump is regulated by a high-voltage regulator to obtain the target output voltage of the charge pump. A high-voltage comparator is used to compare the target output voltage with the second output voltage of the charge pump, and to compare the gate voltage with the first output voltage of the charge pump, so as to turn the PMOS transistor on or off, thereby stabilizing the output voltage.

2. The charge pump voltage stabilization method according to claim 1, characterized in that, If the second output voltage of the charge pump is greater than the target output voltage, and the gate voltage is equal to the first output voltage of the charge pump, then the PMOS transistor is turned off.

3. The charge pump voltage stabilization method according to claim 2, characterized in that, If the second output voltage of the charge pump is less than the target output voltage and the gate voltage is equal to zero, then the PMOS transistor is turned on.

4. The charge pump voltage regulation method according to claim 1, characterized in that, The first output voltage of the charge pump satisfies the following formula: VPUMP = VOUT_TARGET + 0.2V, In the formula, VPUMP represents the first output voltage of the charge pump, and VOUT_TARGET represents the target output voltage.

5. A charge pump voltage regulator circuit for performing the charge pump voltage regulation method as described in any one of claims 1 to 4, characterized in that, The charge pump voltage regulator circuit includes: Charge pump; A high-voltage comparator (HV-COMP) is connected to the charge pump (PUMP); A high-voltage regulator (HV-REG) is connected at the junction of the charge pump (PUMP) and the high-voltage comparator (HV-COMP).

6. The charge pump voltage regulator circuit according to claim 5, characterized in that, It also includes the PMOS transistor (PM1) and the PGATE terminal. The drain of the PMOS transistor (PM1) is connected to the junction of the charge pump (PUMP) and the high voltage comparator (HV-COMP), the substrate of the PMOS transistor (PM1) is connected to the junction of the charge pump (PUMP) and the high voltage comparator (HV-COMP), and the gate of the PMOS transistor (PM1) is connected to the PGATE terminal.

7. The charge pump voltage regulator circuit according to claim 6, characterized in that, It also includes the VOUT end and the VOUT_TARGET end. The VOUT terminal is connected to the high voltage comparator (HV-COMP), the VOUT_TARGET terminal is connected to the high voltage comparator (HV-COMP), and the PGATE terminal is connected to the high voltage comparator (HV-COMP).

8. The charge pump voltage regulator circuit according to claim 7, characterized in that, The VOUT terminal outputs the second output voltage of the charge pump, the VOUT_TARGET terminal outputs the target output voltage, and the PGATE terminal outputs the gate voltage.

9. A charge pump voltage regulator for performing the charge pump voltage regulation method as described in any one of claims 1 to 4, characterized in that, The charge pump voltage regulator includes: The voltage regulator unit is used to regulate the first output voltage of the charge pump through a high-voltage regulator to obtain the target output voltage of the charge pump. The comparison unit is used to compare the target output voltage with the second output voltage of the charge pump using a high-voltage comparator, and to compare the gate voltage with the first output voltage of the charge pump, so as to turn the PMOS transistor on or off, thereby stabilizing the output voltage.

10. A computer-readable storage medium having stored thereon program instructions that, when executed by a processor, perform the method as described in any one of claims 1 to 4.

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