A double mixed rejection phase-locked loop method based on generalized second-order integrator
The DHSO-SOGI-PLL method solves the problem of decreased synchronization accuracy of phase-locked loops caused by low-order harmonics and DC offset in complex power grid environments. It achieves dual suppression of low-order harmonics and DC offset in the power grid, thereby improving the steady-state accuracy and dynamic performance of the phase-locked loop.
Patent Information
- Application Number
- CN202511650579.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2025-11-12
- Publication Date
- 2026-02-27
- Estimated Expiration
- 2045-11-12
AI Technical Summary
Existing phase-locked loops are susceptible to low-order harmonics and DC offset disturbances in actual power grid operation, resulting in decreased synchronization accuracy and dynamic performance, making it difficult to achieve accurate phase and frequency locking in complex power grid environments.
A dual-hybrid suppression phase-locked loop (DHSO-SOGI-PLL) method based on a generalized second-order integrator is adopted. Through Clark transform, DHSO-SOGI module, Park transform and phase compensation module, dual suppression of low-order harmonics and DC offset of the power grid is achieved, ensuring the steady-state accuracy and dynamic characteristics of the phase-locked loop in complex environments.
It significantly improves the synchronization accuracy and robustness of the phase-locked loop in complex power grid environments, reduces the low-order harmonic content at the output, and effectively solves the steady-state phase offset problem, ensuring that the output phase of the phase-locked loop is strictly synchronized with the actual phase of the power grid.
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Abstract
Description
TECHNICAL FIELD
[0001] The application belongs to the technical field of grid-connected control, and particularly relates to a double hybrid suppression phase-locked loop method based on a generalized second-order integrator. BACKGROUND
[0002] With the increasing depletion of traditional fossil fuels, the application scale of renewable energy such as solar energy and wind energy continues to expand. Under this background, the research on grid-connected control technology is particularly important, because it bears the key function of connecting the renewable energy system and the power grid. Among them, the accurate extraction of the grid voltage synchronization signal is one of the core technical challenges to realize grid operation, and is also a key technical path to improve system stability. At present, the extraction of the grid voltage synchronization signal mainly uses the phase-locked loop (PLL) and its upgrading technology. However, the performance of the phase-locked loop is easily affected by multiple power quality disturbances under actual working conditions, among which the low-order harmonic pollution and the DC offset problem are more prominent. Research shows that the zero drift of the voltage sensor, the quantization error of the analog-to-digital converter, the parameter mismatch of the semiconductor device, and the asymmetric fault of the power grid may all introduce DC components. Such offset will cause the oscillation of the phase-locked loop output phase and frequency, and seriously affect the synchronization control accuracy. In addition, the voltage waveform distortion, power grid frequency fluctuation and other problems further aggravate the technical challenges of phase locking in complex power grid environment. At present, the optimization design of the phase-locked loop for non-ideal power grid conditions has become a research hotspot in the field of grid-connected control of power electronic converters, and the core is to achieve the best balance between harmonic suppression, dynamic response speed and steady-state accuracy. SUMMARY
[0003] In order to solve the problem that the low-order harmonics and DC offset contained in the voltage signal in the actual operation of the power grid will seriously reduce the synchronization accuracy and dynamic performance of the phase-locked loop, the application proposes a double hybrid suppression phase-locked loop method based on a generalized second-order integrator, which proposes a double hybrid suppression second-order generalized integrator phase-locked loop (DHSO-SOGI-PLL). This type of phase-locked loop can realize double suppression of low-order harmonics and DC offset of the power grid. DHSO-SOGI-PLL can still realize accurate and fast phase-locked performance under complex power grid environment, and has significant advantages in steady-state accuracy and dynamic characteristics.
[0004] The technical scheme of the application is as follows:
[0005] A double hybrid suppression phase-locked loop method based on a generalized second-order integrator, a double hybrid suppression second-order generalized integrator phase-locked loop (DHSO-SOGI-PLL) is proposed, the grid phase information is obtained through the DHSO-SOGI-PLL, and double suppression of low-order harmonics and DC offset of the power grid is realized. Specifically, the following steps are included:
[0006] Step 1, collect three-phase voltage in the power grid through the voltage sensor and perform Clark transformation to obtain the voltage value of the three-phase voltage in the power grid converted to the two-phase static coordinate system;
[0007] Step 2, input the voltage value in the two-phase static coordinate system into two DHSO-SOGI modules respectively to obtain the voltage signals in the two-phase static coordinate system in phase with the input voltage and the voltage signals in phase quadrature;
[0008] Step 3, use the voltage signals in phase and the voltage signals in phase quadrature to extract the positive sequence component of the grid voltage to obtain the voltage signal containing only the positive sequence component in the two-phase static coordinate system converted from the three-phase voltage in the power grid;
[0009] Step 4, perform Park transformation on the voltage signal containing only the positive sequence component to obtain the voltage signal in the two-phase rotating coordinate system;
[0010] Step 5, input the voltage signal in the two-phase rotating coordinate system into the phase compensation module, and then input the compensated signal into the proportional-integral regulator, superimpose the output of the proportional-integral regulator with the actual grid rated frequency to obtain the phase-locked loop estimated frequency and phase information.
[0011] Further, the specific process of step 1 is:
[0012] The three-phase voltage in the power grid is expressed as a form containing positive and negative sequence components:
[0013] ;
[0014] Wherein, 、 、 are the three-phase voltage in the power grid; is the fundamental amplitude; is the fundamental angular frequency of the power grid; is the initial phase angle of the power grid fundamental; is the time; is the harmonic number in the power grid, is the fundamental, is the positive sequence component of the grid voltage, is the negative sequence component of the grid voltage; is a positive integer;
[0015] The Clark transformation formula is:
[0016] ;
[0017] Wherein, and are the voltage values in the two-phase static and coordinate system, respectively. is the in-phase output signal without harmonic processing; is the transpose symbol; is the Clarke transformation matrix, denoted as:
[0018]
[0019]
[0020]
[0021]
[0022]
[0023]
[0024]
[0025] Further, in step 2, a first-order high-pass filter link and a harmonic extraction branch are added on the basis of the second-order generalized integrator to obtain a DHSO-SOGI module; the specific process of step 2 is as follows:
[0026] The closed-loop transfer function between the input and the output of the DHSO-SOGI module is designed, and the module is an input and two outputs, which correspond to the following two closed-loop transfer functions respectively:
[0027]
[0028]
[0029] is the closed-loop transfer function from to or to is the closed-loop transfer function from to or to is a complex variable; is the cutoff frequency of the DHSO-SOGI; is the resonance frequency of the DHSO-SOGI and is a gain coefficient;
[0030] After passing through the two DHSO-SOGI modules, the output is obtained as:
[0031] ;
[0032] ;
[0033] wherein, and are voltage signals in phase with and respectively in two-phase stationary and coordinate systems; and are voltage signals orthogonal in phase with and respectively in two-phase stationary and coordinate systems; is the imaginary unit.
[0034] Further, in the step 3, the calculation formula of the voltage signals and containing only positive sequence components in the two-phase stationary and coordinate systems is:
[0035] ;
[0036] ;
[0037] wherein, is the additional phase shift caused by the first-order high-pass filter in the DHSO-SOGI.
[0038] Further, in the step 4, the Park transformation formula is:
[0039] ;
[0040] wherein, and are voltage signals in two-phase rotating and coordinate systems; is the Park transformation matrix, expressed as:
[0041] ;
[0042] wherein, is the phase angle estimated by the phase-locked loop;
[0043] At this time, the following is obtained:
[0044] ;
[0045] ;
[0046] wherein, is the phase-locked loop estimated frequency; is the power grid fundamental initial phase angle is the phase difference between the phase-locked loop estimated phase angle and the phase information.
[0047] Further, in the step 5, the phase compensation module eliminates the additional phase offset by constructing a correction amount, and the correction amount The formula of the correction amount is:
[0048] ;
[0049] The output of the proportional-integral regulator is The calculation formula of the output is:
[0050] ;
[0051] wherein, is the proportional coefficient of the proportional-integral regulator; is the integral coefficient of the proportional-integral regulator;
[0052] The phase-locked loop estimated frequency and the phase information is calculated as:
[0053] ;
[0054] ;
[0055] wherein, is the actual power grid rated frequency;
[0056] The phase-locked loop estimated phase angle is the final required phase information.
[0057] The beneficial technical effects brought by the present application are as follows.
[0058] 1) The DHSO-SOGI-PLL adopts a composite filtering mechanism, and realizes the blocking of the direct current offset in the frequency domain, significantly reducing the low-order harmonic content at the output end. Experimental results show that, compared with the existing DSOGI-PLL, the proposed DHSO-SOGI-PLL scheme shows excellent synchronization accuracy and robust performance under the conditions of harmonic distortion and direct current offset, and is suitable for complex power grid operating environments.
[0059] 2) The DHSO-SOGI-PLL introduces a dynamic phase correction strategy to compensate for the additional phase shift generated by the high-pass filter in real time, effectively solving the steady-state phase offset problem and ensuring that the output phase of the phase-locked loop is strictly synchronized with the actual phase of the power grid. Attached Figure Description
[0060] Figure 1 This is a block diagram of the DHSO-SOGI structure of the present invention.
[0061] Figure 2 This is a block diagram of the DHSO-SOGI-PLL structure of the present invention.
[0062] Figure 3 The figure shows a comparison of the simulation results of DHSO-SOGI-PLL and DSOGI-PLL under harmonic disturbance in the experiment of this invention; where (a), (b), and (c) are schematic diagrams of the three-phase power grid voltage waveform, the phase-locked loop estimated frequency waveform, and the phase error waveform, respectively.
[0063] Figure 4 The figure shows a comparison of the simulation results of DHSO-SOGI-PLL and DSOGI-PLL under DC offset disturbance in the experiment of this invention; where (a), (b), and (c) are schematic diagrams of the three-phase grid voltage waveform, the phase-locked loop estimated frequency waveform, and the phase error waveform, respectively.
[0064] Figure 5 The figure shows a comparison of the experimental results of DHSO-SOGI-PLL and DSOGI-PLL under harmonic disturbance in the experiment of this invention; where (a), (b), and (c) are schematic diagrams of the A-phase grid voltage waveform, the phase-locked loop estimated frequency waveform, and the phase error waveform, respectively.
[0065] Figure 6 The figure shows a comparison of the experimental results of DHSO-SOGI-PLL and DSOGI-PLL under DC offset disturbance in the experiment of this invention; where (a), (b), and (c) are schematic diagrams of the A-phase grid voltage waveform, the phase-locked loop estimated frequency waveform, and the phase error waveform, respectively. Detailed Implementation
[0066] The present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments:
[0067] like Figure 1 The diagram shows the DHSO-SOGI structure, which adds a first-order high-pass filter and harmonic extraction branch to the SOGI module (second-order generalized integrator). The calculation principle of DHSO-SOGI is as follows:
[0068] ;
[0069] ;
[0070] ;
[0071] ;
[0072] ;
[0073] wherein, is an input signal; is a first-order high-pass filter output signal; is a complex variable; is a cutoff frequency of the DHSO-SOGI; is a harmonic extraction branch output signal; is a gain coefficient; is a resonance frequency of the DHSO-SOGI; is an unharmonically processed in-phase output signal; is a harmonically processed in-phase output signal; is a quadrature output signal.
[0074] The method of the present application proposes a double hybrid suppression type second-order generalized integrator phase-locked loop (DHSO-SOGI-PLL), as shown in Figure 2 The structure block diagram of the DHSO-SOGI-PLL is shown in the figure, taking the DHSO-SOGI as the main structure, through the DHSO-SOGI-PLL, the grid phase information can be obtained, and double suppression of low-order harmonics and DC offset of the grid can be realized; specifically including the following steps:
[0075] Step 1, acquiring three-phase voltage in the grid through a voltage sensor , and and performing Clark transformation to obtain voltage values of the three-phase voltage in the grid converted to two-phase stationary and coordinate system and .
[0076] The three-phase voltage in the grid is expressed in the form of containing positive and negative sequence components at the same time:
[0077] ;
[0078] wherein, , , are three-phase voltages in the grid; is a fundamental amplitude; is a fundamental angular frequency of the grid; is the initial phase angle of the fundamental of the power grid; is time; is the harmonic number in the power grid, is the fundamental, is the positive sequence component of the power grid voltage, is the negative sequence component of the power grid voltage; is a positive integer.
[0079] The Clark transformation formula is:
[0080]
[0081] wherein, and are the voltage values in the two-phase static and coordinate systems respectively; is the transpose symbol; is the Clark transformation matrix, which can be expressed as:
[0082]
[0083] then and are:
[0084]
[0085] when or :
[0086]
[0087] when :
[0088]
[0089] Step 2, input the voltage values in the two-phase static and coordinate systems, and respectively, into two DHSO-SOGI modules to obtain the voltage signals and in the two-phase static and coordinate systems respectively, which are in phase with and respectively, and the voltage signals and which are orthogonal to the phases of and respectively.
[0090] The closed-loop transfer function between the input and the output of the DHSO-SOGI module is designed, and the module is one input and two outputs, which correspond to the following two closed-loop transfer functions respectively:
[0091]
[0092]
[0093] wherein, is the closed-loop transfer function from to or to ; is the closed-loop transfer function from to or to ; is a complex variable; is the cutoff frequency of the DHSO-SOGI; is the resonant frequency of the DHSO-SOGI, and .
[0094] and After passing through the two DHSO-SOGI modules, the output is obtained as:
[0095]
[0096]
[0097] wherein, and are the voltage signals in phase with and respectively in the two-phase stationary and coordinate systems; and are the voltage signals in quadrature with and respectively in the two-phase stationary and coordinate systems; is an imaginary unit.
[0098] Step 3, the positive sequence component of the grid voltage is extracted by using the above in-phase voltage signals and the quadrature voltage signals, and the three-phase voltage in the grid is converted to the voltage signals containing only the positive sequence component in the two-phase stationary and coordinate systems and .
[0099] The conversion is performed using the following equation:
[0100] ;
[0101] wherein and are the voltage signals containing only positive sequence components in the two-phase stationary and coordinate system;
[0102] Since the first-order high-pass filter in the DHSO-SOGI causes a phase shift, the conversion equation after the phase shift is substituted is:
[0103] ;
[0104] ;
[0105] wherein is the additional phase shift caused by the first-order high-pass filter in the DHSO-SOGI. At this time, the negative sequence component is no longer contained, i.e. .
[0106] Step 4, Park transform is performed on the voltage signals and , so that the voltage signals and in the two-phase stationary and coordinate system are converted to the voltage signals and in the two-phase rotating and coordinate system.
[0107] The Park transform equation is:
[0108] ;
[0109] wherein and are the voltage signals in the two-phase rotating and coordinate system; is the Park transform matrix, which can be expressed as:
[0110] ;
[0111] wherein is the phase angle estimated by the phase-locked loop;
[0112] At this time, the following can be obtained:
[0113] ;
[0114] ;
[0115] wherein, is the phase-locked loop estimated frequency, which is taken as the resonant frequency of the DHSO-SOGI, thereby realizing the frequency adaptive function; , is the initial phase angle of the power grid fundamental wave and the phase difference between the phase-locked loop estimated phase angle .
[0116] Step 5, input the voltage signal and into the phase compensation module, and after compensation, input into the PI regulator (proportional-integral regulator), and the output of the PI regulator is superimposed with the actual power grid rated frequency to obtain the phase-locked loop estimated frequency and the phase information. The specific process is as follows:
[0117] If is directly taken as the input of the PI regulator, although frequency synchronization can be realized, i.e. , an additional phase deviation will be introduced, so that . Therefore, the phase compensation module eliminates the phase deviation by constructing a correction amount. The formula of the correction amount is as follows:
[0118] ;
[0119] wherein, is the correction amount;
[0120] Because , according to the trigonometric function relationship, the following can be obtained:
[0121] ;
[0122] Simplifying the formula of the correction amount, the following can be obtained:
[0123] ;
[0124] This operation completely eliminates the influence of , so that the input of the PI regulator only contains the true phase difference , ensuring that the phase locking satisfies , and the amplitude is consistent with the original input signal. At the same time, the phase compensation module shares the frequency feedback loop with the DHSO-SOGI, and can realize dynamic update with , maintaining the compensation accuracy.
[0125] Output of the PI regulator The calculation formula is:
[0126]
[0127] Wherein, Kp is the proportional coefficient of the PI regulator; Ki is the integral coefficient of the PI regulator;
[0128] PLL estimated frequency The calculation formula of the phase information is:
[0129]
[0130]
[0131] Wherein, Fref is the actual power grid rated frequency, which is 50 Hz;
[0132] PLL estimated phase angle That is the final required phase information.
[0133] The feasibility of the present application is verified below in combination with experiments.
[0134] As shown in Figure 3 , for the power grid condition with harmonic pollution, the present application carries out simulation experiments, and tests the harmonic suppression ability of the proposed DHSO-SOGI-PLL and DSOGI-PLL respectively. The experimental results show that, compared with the DSOGI-PLL, the DHSO-SOGI-PLL reduces the maximum phase error and the maximum frequency error by about 39.3% and 47.1% respectively.
[0135] As shown in Figure 4 , in the DC offset disturbance experiment, the phase-locked performance of the DHSO-SOGI-PLL and the DSOGI-PLL is compared and evaluated by injecting a DC component into the grid voltage. The experimental results show that, under the DC offset disturbance, the DSOGI-PLL cannot stably track the phase and frequency, while the DHSO-SOGI-PLL can quickly recover to stability, and the time for the phase and frequency to reach 2% steady-state error is 29 ms and 20 ms respectively.
[0136] The performance of the proposed DHSO-SOGI-PLL compared with the traditional DSOGI-PLL is verified by comparison experiments. The obtained results are shown in Table 1. The experimental data show that the dynamic performance of the two phase-locked loops presents significant differences.
[0137] Table 1 Comparison of experimental results of two phase-locked loops
[0138] .
[0139] The above results clearly show that the DHSO-SOGI-PLL has high-precision synchronization performance advantages in the complex harmonic and DC offset disturbance environment.
[0140] The application further builds an experimental test platform, and experimentally verifies the DHSO-SOGI-PLL and compares it with the DSOGI-PLL. Figure 5 and Figure 6 The experimental results shown in the table show that the frequency response characteristics of the DHSO-SOGI-PLL are highly consistent with the simulation results. It should be noted that due to the limitation of experimental conditions, the phase error data is calculated by post-processing the collected waveforms through MATLAB / Simulink, and there is an acceptable deviation between the specific values and the simulation results, but the dynamic trend of phase tracking is consistent with the simulation conclusion. The experimental results further prove that the proposed DHSO-SOGI-PLL has significant advantages in suppressing low-order harmonics and dealing with DC offset disturbances.
[0141] Of course, the above description is not a limitation on the application, and the application is not limited to the above examples. Changes, modifications, additions or replacements made by those skilled in the art within the essential scope of the application should also be within the protection scope of the application.
Claims
1. A dual hybrid rejection phase locked loop method based on a generalized second order integrator characterized by, A double hybrid suppression second-order generalized integrator phase-locked loop (DHSO-SOGI-PLL) is proposed, which obtains grid phase information through the DHSO-SOGI-PLL to realize double suppression of low-order harmonics and DC offset in the grid; the specific steps include: Step 1, the three-phase voltage in the grid is collected through the voltage sensor and the Clarke transformation is performed to obtain the voltage value of the three-phase voltage in the grid converted to the two-phase stationary coordinate system; Step 2, the voltage value in the two-phase stationary coordinate system is input into two DHSO-SOGI modules to obtain the voltage signal in phase with the input voltage and the voltage signal in phase quadrature in the two-phase stationary coordinate system; In step 2, a first-order high-pass filter link and a harmonic extraction branch are added to the second-order generalized integrator to obtain the DHSO-SOGI module; the specific process of step 2 is as follows: The closed-loop transfer function between the input and output of the DHSO-SOGI module is designed, and the module is an input and two outputs, corresponding to the following two closed-loop transfer functions: ; ; wherein, is the closed loop transfer function from to or to ; is the closed loop transfer function from to or to ; is a complex variable; is the cut-off frequency of the DHSO-SOGI; is the resonance frequency of the DHSO-SOGI and ; is the fundamental angular frequency of the grid; is the gain coefficient; and are the voltage values in the two-phase stationary and coordinate systems, respectively; and After two-way DHSO-SOGI module, the output is obtained: ; ; wherein and are voltage signals in a two-phase stationary and coordinate system respectively in phase with and voltage signals in phase quadrature; and are voltage signals in a two-phase stationary and coordinate system respectively in phase quadrature with and voltage signals in phase quadrature; is the imaginary unit; is the harmonic number in the power grid, is the fundamental wave, is the positive sequence component of the power grid voltage, is the negative sequence component of the power grid voltage; is a positive integer; Step 3, the positive sequence component of the grid voltage is extracted using the voltage signal in phase and the voltage signal in phase quadrature to obtain the voltage signal in the two-phase stationary coordinate system containing only the positive sequence component of the three-phase voltage in the grid; In step 3, the two-phase stationary and The calculation formula of the voltage signal containing only positive sequence components in the coordinate system is: and The calculation formula of the voltage signal containing only positive sequence components in the coordinate system is: ; ; wherein, is the additional phase shift caused by the first order high pass filter in the DHSO-SOGI; is the fundamental amplitude; is the grid fundamental initial phase angle; is time; Step 4, the voltage signal containing only the positive sequence component is subjected to Park transformation to obtain the voltage signal in the two-phase rotating coordinate system; Step 5, the voltage signal in the two-phase rotating coordinate system is input into the phase compensation module, and the compensated signal is input into the proportional-integral regulator; the output of the proportional-integral regulator is superimposed with the actual grid rated frequency to obtain the estimated frequency and phase information of the phase-locked loop; In step 5, the phase compensation module eliminates the additional phase offset by constructing a correction amount, and the correction amount is The formula is: ; wherein, the grid fundamental initial phase angle the phase difference with the phase angle estimated by the phase-locked loop the phase difference with the phase angle estimated by the phase-locked loop The output of the proportional-integral regulator The calculation formula is: ; wherein is a proportional coefficient of a proportional-integral regulator; is an integral coefficient of a proportional-integral regulator; Phase-locked loop estimates frequency The calculation formula of the phase information is: ; ; wherein is the actual grid rated frequency; Phase-locked loop estimates phase angle That is the final phase information required.
2. The dual-mixing type phase-locked loop based on generalized second-order integrator according to claim 1, characterized in that, The specific process of step 1 is as follows: The three-phase voltage in the grid is expressed as a form containing positive and negative sequence components: ; wherein , , are the three-phase voltages in the power grid, respectively; The Clarke transformation formula is as follows: ; wherein is the in-phase output signal without harmonic processing; is the transpose symbol; is the Clarke transformation matrix, denoted as: ; then and is: ; When or when: ; When Time: 。 3. The dual-mixing type phase-locked loop based on generalized second-order integrator according to claim 2, characterized in that, In step 4, the Park transformation formula is as follows: ; wherein and are the voltage signals in the two-phase rotating and coordinate system; is the Park transformation matrix, represented as: ; wherein, to estimate the phase angle for a phase locked loop; At this time, we get: ; ; wherein, is the phase-locked loop estimated frequency.
Citation Information
Patent Citations
Improved phase-locked loop for suppressing DC offset and harmonic interference
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