A solar cell and a solar module using the same and a method of manufacturing the same

Abstract

The present application relates to the technical field of solar cells, in particular to a kind of cell piece and assembly for photovoltaic module and preparation method, comprising the following steps, after etching, the front and back of silicon wafer are carried out selective patterning etching to form at least one mirror groove for piece, the number of mirror groove on the two sides of silicon wafer is same, etching mirror platform at the laminated position of the back of silicon wafer, then generating pyramid groove for gluing, then in turn plating amorphous silicon / microcrystalline silicon film and transparent conductive film, then removing transparent conductive film in mirror groove, screen printing is carried out to cell, finally, the whole piece cell is processed by mirror groove to obtain the cell of photovoltaic assembly. By using mirror groove and impurity removal, mirror groove flexible processing and pyramid groove glue point sinking processing technology, the problems of serious carrier edge recombination leading to efficiency drop, piece laminated position and glue point position prone to hidden crack of multiple piece cell are improved.

Description

Technical Field

[0001] This invention relates to the field of solar cell technology, specifically to a photovoltaic cell, a module, and a method for its fabrication. Background Technology

[0002] Multi-cell photovoltaic (PV) cell technology reduces current loss and improves module efficiency by cutting cells into half-cells, third-cells, quarter-cells, etc. However, its implementation faces numerous challenges. For example, at the cell level, laser cutting causes edge recombination of charge carriers at these defects, resulting in a heat-affected zone and mechanical damage. This is because the laser has a certain temperature, and thermal damage can destroy the passivation film around the cell, leading to efficiency loss. Furthermore, the passivation film can sputter to the surrounding area under high laser temperature, forming new recombination centers. Microcracks and burrs at the cell edges after cutting can easily cause microcracks or subsequent encapsulation failures. If these problems are not resolved, they will also affect the passivation effect after slicing, leading to poor passivation and large fluctuations in efficiency improvement after passivation. At the module level, when multi-cell cells are connected in series with negative-pitch welding machines, because crystalline silicon cells are rigid and brittle silicon substrate materials, a certain height difference exists in the stacked areas when they are stacked. When encapsulated into modules by a laminator, a certain proportion of microcracks will occur at the stacked areas.

[0003] Currently, the effects of laser cutting after slab assembly are typically addressed through non-destructive cutting and optimizing laser parameters (such as power and speed) to reduce the heat-affected zone. While these methods reduce laser heat impact and thermal damage, defects still exist. For the issue of microcracks due to negative spacing between multiple slabs, flattening the welding wire in the stacking area is commonly used to reduce height differences and increase the contact area of ​​the rigid material to improve microcracks. However, the stacking of rigid substrate materials still results in some microcracks. Therefore, to address these issues, it is necessary to develop a novel photovoltaic module cell, module, and manufacturing method that synergistically improves the problems of poor passivation due to large heat impact after slab assembly, reduced efficiency due to severe carrier recombination at the cutting edges, and the tendency for microcracks to occur at the stacking positions of slab cells from both the cell and module ends. Summary of the Invention

[0004] The purpose of this invention is to provide a solar cell for photovoltaic modules, a module, and a manufacturing method, which solves the technical problems in the prior art, such as poor passivation effect due to large heat-affected zone after slicing, severe recombination of charge carriers at the cutting edge leading to reduced efficiency, and microcracks easily generated at the stacking position of slicing cells.

[0005] This invention discloses a method for preparing solar cells for photovoltaic modules, comprising the following steps: selectively patterning and etching both sides of a texturized silicon wafer to form at least one mirror groove for slicing, with the same number of mirror grooves on both sides of the silicon wafer; etching a mirror platform at the stacking point on the reverse side of the silicon wafer to generate a pyramid groove for adhesive application; then sequentially depositing an amorphous silicon / microcrystalline silicon thin film and a transparent conductive film; removing the transparent conductive film from the mirror groove; screen printing the solar cell; and finally slicing the entire solar cell through the mirror groove to obtain a solar cell for photovoltaic modules.

[0006] Principle and function:

[0007] The mirrored grooves set in the front and back slab areas of the solar cell can effectively prevent incomplete removal of the transparent conductive film by the etching paste or laser, or damage to the amorphous / microcrystalline layer. Without this area, the fluid etching paste will extend outward, causing excessive etching in unwanted areas due to the outward flow, thus reducing the transparent conductive film and affecting current collection.

[0008] One of the functions of the transparent conductive film layer is to collect photogenerated charge carriers and conduct them laterally to the metal grid lines. After the laser cleaves the mirror groove, the charge carriers in the cleaved area will recombine due to the effects of heat and mechanical damage, thus affecting the photoelectric conversion efficiency of the segmented cell. Therefore, the transparent conductive film in the mirror groove is removed first, and then the surface receiving light is cleaved.

[0009] The pyramidal groove is used in the application of adhesive at locations without main grids. Its purpose is twofold: firstly, it reduces the height of the adhesive dots, making them flush with the grid lines on the solar cell, which reduces the risk of microcracks. It also positions the adhesive dots within the groove, preventing the adhesive from spreading before it cures. Spreading adhesive has a certain light-blocking rate, which can affect the light transmittance and light absorption of the solar cell. Secondly, the pyramidal textured surface of the groove has a large specific surface area, which is beneficial to the adhesion of the adhesive dots, thereby improving the adhesion between the solar cell, the adhesive dots, and the welding wire, making it less likely for the welding wire to fall off.

[0010] Furthermore, the transparent conductive film is a TCO transparent conductive layer.

[0011] Furthermore, the width of the recessed groove on the light-receiving surface is smaller than the width of the non-light-receiving surface.

[0012] Furthermore, the width of the mirror groove is 1-5mm, the depth of the mirror groove is 5-20um, and the flatness of the mirror groove base is 1-10nm.

[0013] When removing transparent conductive films using lasers with smooth, mirror-like grooves, the removal effect is not affected by the pyramidal texture on the silicon wafer. This is because the film layers on the silicon wafer are arranged sequentially: an amorphous film of approximately 6nm, a microcrystalline film of approximately 20nm, and a transparent conductive film of approximately 100nm. The height and depth of the pyramids on the silicon wafer range from 1000-3000nm. When the transparent conductive film is deposited on the pyramid, it has an undulating shape, similar to the pyramid itself. During laser removal, the apex of the pyramid can be removed effectively, while the grooves require higher laser energy. However, higher laser energy can damage the amorphous and microcrystalline films grown on the pyramid. Therefore, forming mirror-like grooves in this area effectively solves the problem of damage to the bottom amorphous and microcrystalline films during laser removal of the transparent conductive film due to the depth and undulation of the pyramid. Furthermore, forming mirror-like grooves of a certain width, depth, and smoothness in this area, which is the stacking area for segmented solar cell modules, reduces the height difference between the original cells, thus reducing fragmentation during stacking and solving the problem of fragility in the segmented stacking area.

[0014] The depth of this mirror groove can prevent the etching paste from spreading outwards, and the smaller cross-sectional area of ​​the mirror groove will reduce the thermal impact and mechanical damage caused by the laser, keeping the thermal impact and mechanical damage within the mirror groove; since the flatness of the mirror groove substrate is not affected by the pyramid, the etching paste or laser can effectively remove TCO without affecting the microcrystalline and amorphous films underneath the TCO.

[0015] Furthermore, the method for preparing the mirror groove is as follows: selectively masking the texturized silicon wafer with nano-silica, and etching the non-masked areas using a solution method. Specifically, the solution method uses a solution of 1%-10% hydrogen peroxide and 1%-10% potassium hydroxide or sodium hydroxide for 60-200 seconds and at a temperature of 60-80℃.

[0016] Furthermore, the depth of the pyramid groove is 1-10 micrometers and the width is 1-5 millimeters.

[0017] Furthermore, the fabrication process of the pyramidal groove involves selectively masking the texturized silicon wafer with nano-silica, and etching the non-masked areas using a solution method to form flat grooves. Specifically, a solution of 1%-10% hydrogen peroxide and 1%-10% potassium hydroxide or sodium hydroxide is used for 60-200 seconds at a temperature of 60-80°C. Then, the flat grooves are grown into pyramidal textured grooves using a low-concentration alkaline etching solution. Specifically, a solution of 1%-5% hydrogen peroxide and 1%-5% potassium hydroxide or sodium hydroxide is used for 60-120 seconds at a temperature of 60-80°C.

[0018] Furthermore, the method for preparing the flat groove is the same as that for preparing the mirror groove used for segmentation.

[0019] Furthermore, the transparent conductive film is removed using a laser with the following process parameters: laser power 7%-9%, speed 1.5-2.5m / s, and 2-4 laser passes.

[0020] Furthermore, the slicing is performed from the mirror groove on the light-receiving surface of the battery cell.

[0021] Furthermore, the slicing is performed using a non-destructive laser cutting method.

[0022] Furthermore, during the slicing process, grooves are first cut at both ends of the mirror groove area on the light-receiving surface of the battery cell, and then thermal stress is used to split the cells in the mirror groove area to obtain the slicing.

[0023] Because the transparent conductive film layer is removed in the mirror groove area, it prevents the collection of charge carriers in the TCO and the resulting recombination on the side. In addition, the mechanical damage of the heat-affected zone and the cleavage can be controlled in the mirror groove, which is beneficial for subsequent plasma etching removal. Furthermore, the reason for laser fission from the front rather than the back is that the P-type microcrystalline silicon layer is located on the intrinsic amorphous silicon layer on the back of the cell, forming a PN junction with the N-type crystalline silicon substrate. This layer not only participates in the formation of the PN junction, but also acts as a hole transport layer, helping holes to be transported from the silicon substrate to the front contact layer. The back fission has a greater impact on efficiency than the front fission.

[0024] Furthermore, after the slicing is completed, the edges are protected, including plasma etching and edge passivation.

[0025] Plasma etching is used to remove composite centers, microcracks, burrs, etc., formed by passivation film sputtering onto the battery periphery under high temperature laser.

[0026] Because lasers cause mechanical damage to the heat-affected zone and the cleavage, including thermal damage leading to the destruction of the passivation film around the battery, and the formation of new recombination centers by the sputtering of the passivation film to the battery periphery at high laser temperatures, microcracks and burrs exist at the edges of the battery cells after cleaving, which can easily lead to hidden cracks or subsequent encapsulation failures. Therefore, plasma is used to remove these damages after laser cleaving, and a passivation layer is deposited by subsequent plasma deposition to achieve good surface passivation in the cleaved area, so that no new carrier recombination is generated.

[0027] Furthermore, the edge passivation is performed using plasma-enhanced chemical vapor deposition of side-side amorphous silicon thin films and side-side silicon nitride thin films.

[0028] Furthermore, the amorphous silicon thin film on the side uses silane and hydrogen as source gases, with a silane flow rate of 600-1000 sccm and a hydrogen flow rate of 6000-9000 sccm. The gas pressure inside the chamber is 100-150 Pa, the temperature is 150-180℃, and the RF power density during deposition is 0.01-0.04 W / cm². 2 The plasma treatment time is 200-1500s, and the overall thickness of the passivation film is 30-100nm. Amorphous silicon is deposited here because amorphous silicon, through hydrogen-saturated dangling bonds, can reduce the recombination rate on the silicon wafer surface to below 10 cm / s. Its passivation effect is significantly better than that of silicon dioxide (recombination rate of about 100 cm / s) and SiNx (about 50 cm / s).

[0029] Furthermore, the silicon nitride film uses silane and ammonia as source gases, with a radio frequency power of 1600-1900W, a temperature of 100-150℃, a deposition time of 100-200s, a pressure of 1600-1800mTorr, and a SiH4:NH3 flow ratio of 1:5-1:10. A silicon nitride thickness of 100-150nm is deposited on the amorphous silicon thin film, with a refractive index of 1.6-1.9.

[0030] Silicon nitride is deposited here to protect the amorphous silicon and the edges of the silicon wafer by taking advantage of silicon nitride's excellent resistance to moisture and corrosion.

[0031] Furthermore, when the silicon wafer size is 210×105mm, there are 1-2 mirror grooves on both the front and back sides of the silicon wafer;

[0032] When the silicon wafer size is 210×210mm, there are 1-4 mirror grooves on both the front and back sides of the silicon wafer.

[0033] A segmented photovoltaic cell is prepared using the above method.

[0034] Furthermore, the spacing between the grid lines at the battery edge is smaller than the spacing between the fine grid lines in the middle.

[0035] Furthermore, the edge grid lines of the battery cell are unequally spaced gradient grid lines.

[0036] Furthermore, the unequal spacing gradually changes to a smaller spacing closer to the edge of the battery cell.

[0037] Furthermore, the spacing between the grid lines at the edge of the segmented region is smaller than the spacing between the grid lines at the edge of the unsegmented region.

[0038] Because the carrier recombination in the segmented region is relatively severe and the carrier obstruction is strong, edge grid lines with small spacing can be set at this edge.

[0039] Furthermore, the edge grid lines of the battery cell are equidistant grid lines.

[0040] Furthermore, the edge grid lines include edge grid lines on the short side and edge grid lines on the long side.

[0041] Furthermore, the ratio of the edge grid line spacing of the long side to the middle fine grid spacing is 0.5-1.5mm : 0.6-3mm.

[0042] By setting the spacing of the edge grid lines on the long side, the problem of inconsistent EL brightness between the edge area and the middle area on the long side can be improved. Furthermore, by adopting a gradient form, the light-blocking area is not increased while optimizing contact performance and current collection performance, ensuring that the light-receiving area remains unchanged and maximizing the light absorption of the battery.

[0043] Furthermore, the spacing between the edge grid lines on the long side is equidistant, and the spacing between the fine grid lines in the middle is also equidistant.

[0044] This method can enhance the edge current collection capability and fully unleash the carrier transport potential at the battery edge.

[0045] Furthermore, the spacing between the intermediate fine grids is equal, the intermediate fine grids are in rows 1-10, and the spacing between the edge grid lines on the long side is an unequal, gradually changing grid line.

[0046] This method can be used in batteries where edge carrier recombination is not severe or edge carrier collection resistance is not significant, with the grid line spacing gradually decreasing from the middle. Alternatively, the grid line spacing at the edge of the segmented region can be smaller than that at the edge of the unsegmented region, because carrier recombination is relatively severe and carrier resistance is stronger in the segmented region; this edge can be configured as an enhanced electrode collection grid line.

[0047] Furthermore, the length of the edge grid line on the long side is 1-15mm.

[0048] Furthermore, the ratio of the edge grid line spacing of the short side to the middle fine grid spacing is 0.5-1.5mm : 0.6-3mm.

[0049] By adjusting the spacing of the edge grid lines on the short side, the problem of inconsistent EL brightness between the edge region and the middle region can be improved, thereby enhancing the edge current collection capability.

[0050] Furthermore, the edge grid line length of the short side is 1-16mm.

[0051] Furthermore, the length of the edge grid line on the short side is from the edge of the battery cell to the first welding line.

[0052] This method is an enhanced edge current collection design for batteries with severe relative recombination of charge carriers and strong charge carrier obstruction.

[0053] Furthermore, the length of the edge grid line on the short side is from the edge of the battery cell to the second welding line.

[0054] A segmented photovoltaic cell module is obtained by stringing together the aforementioned cell cells.

[0055] Furthermore, when there is only one mirror groove, during stacking, the mirror platform of the solar cell is located above the mirror groove of another solar cell.

[0056] The height difference of the original solar cells has been reduced, so they are less likely to break during the stacking process, and the problem of fragility in the stacking area has also been improved.

[0057] Furthermore, during battery string welding, adhesive dots are applied to the pyramid groove, then a first flexible buffer layer is set in the mirror groove, a second flexible buffer layer is set in the stacked area of ​​another battery cell that is not treated with the mirror groove, and finally welding wire is laid for interconnection.

[0058] The purpose is to coat the mirror-finished groove area with a layer of flexible silicone (organic silicone or EVA adhesive), thereby changing the contact from hard to soft without significantly increasing the height difference. Therefore, this area is less prone to breakage during stacking, improving the fragility of the stacking area. The gridless adhesive application area has a pyramidal textured groove. On one hand, this reduces the height of the adhesive dots, making them flush with the grid lines on the solar cell, reducing the risk of microcracks. It also positions the adhesive dots within the groove, preventing adhesive diffusion before curing. Diffused adhesive has a certain light-blocking rate, affecting the light transmittance and light absorption of the solar cell. On the other hand, the large surface area of ​​the groove's textured surface is beneficial for the adhesion of the adhesive dots, thereby improving the adhesion between the solar cell, the adhesive dots, and the welding wire, making the welding wire less likely to detach.

[0059] Compared with the prior art, the beneficial effects of the present invention are:

[0060] 1. The mirror groove treatment at the segmentation position of the present invention avoids excessive TCO removal caused by etching slurry epitaxy or incomplete TCO removal or damage to the amorphous layer and microcrystalline layer at the bottom of the battery due to the influence of the pyramid during laser TCO removal.

[0061] 2. This invention removes impurities and then passivates the mirror grooves at the segmentation positions, thereby providing a good surface condition for edge passivation, improving battery efficiency, and eliminating the presence of edge micro-cracks and burrs, reducing the breakage rate during the lamination of segmented battery modules.

[0062] 3. This invention performs low-temperature plasma edge amorphous silicon / silicon nitride passivation protection on the cells after slicing, which improves the conversion efficiency of the slicing cells and the power of the module, and also enhances the long-term reliability of the module.

[0063] 4. The present invention performs flexible treatment on the mirror groove area of ​​the segmented battery and the edge area of ​​the non-segmented battery, thereby changing the hard contact to a soft contact, without increasing the height difference too much. Therefore, this area is not easy to break during stacking, thus improving the problem of the stacking area being fragile.

[0064] 5. The pyramid-shaped textured grooves set at the gridless adhesive application position of the segmented battery in this invention reduce the height of the adhesive dots, which can reduce the risk of microcracks. In addition, the textured surface area of ​​the grooves is large, which is conducive to the adhesion of the adhesive dots, thereby improving the adhesion between the battery cell, the adhesive dots and the welding wire at this location, and making the welding wire less likely to fall off.

[0065] 6. The present invention employs unequally spaced gradient lines on both the short and long sides of the cell electrode grid lines, which can improve the problem of inconsistent EL brightness between the edge and middle areas of the overall cell, fully release the carrier transport potential at the cell edge, enhance the edge current collection capability, and thus improve cell efficiency and module power. Attached Figure Description

[0066] To more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings used in the embodiments will be briefly introduced below. It should be understood that the following drawings only show some embodiments of the present invention and should not be regarded as a limitation on the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0067] Figure 1 This is a schematic diagram of the battery structure before it is segmented according to the present invention.

[0068] Figure 2 This is a schematic diagram of the battery passivation structure after the battery is sliced ​​according to the present invention.

[0069] Figure 3 Comparison of laser TCO tests before and after traditional process segmentation.

[0070] Figure 4 This is a comparison of laser TCO testing before and after the process of this invention in the segmented area.

[0071] Figure 5 This is a microscopic test image of a piece repaired by plasma treatment after being segmented using traditional methods.

[0072] Figure 6 This is a microscopic test image of the piece after it has been repaired by plasma treatment following the process of this invention.

[0073] Figure 7 This is a schematic diagram of the interconnection of a traditional multi-segment gridless battery module.

[0074] Figure 8 This is a schematic diagram of the interconnection of the segmented battery modules of the present invention.

[0075] Figure 9 This is a schematic diagram of the segmented battery grid structure of the present invention.

[0076] In the above figures, the meanings of each mark are as follows: 1-Silicon wafer, 2-Intrinsic amorphous silicon thin film, 3-Doped microcrystalline silicon thin film, 4-TCO transparent conductive layer, 5-Mirror groove, 6-Pyramid groove, 7-Grid line, 8-Mirror platform, 9-Side amorphous silicon thin film, 10-Side silicon nitride thin film, 11-First flexible buffer layer, 12-Second flexible buffer layer, 13-Adhesive dot, 14-Weld wire, 15-Battery cell, 16-Edge grid line, 17-Middle fine grid, 18-Long side, 19-Short side, 20-Segmentation area. Detailed Implementation

[0077] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments.

[0078] Example 1

[0079] This embodiment discloses a photovoltaic module cell, a module, and a fabrication method, with the specific structure as follows: Figure 1 and Figure 2 As shown, it includes the following steps:

[0080] Step 1: Select the texturized silicon wafer 1 and perform a patterning mask. Then, etch the masked silicon wafer 1 to form a front mirror groove 5, a back mirror groove 5, a front pyramid groove 6, and a back pyramid groove 6 in the non-masked areas. The mirror groove 5 is used for wafer separation and stacking, and the pyramid groove 6 is used for photoresist application. The silicon wafer 1 has dimensions of 210×105mm, and there is one mirror groove 5 on both the front and back sides of the silicon wafer 1. This step specifically includes the following steps:

[0081] (1) First, nano-silica is used to selectively mask the texturized silicon wafer 1.

[0082] (2) After the masking is completed, the silicon wafer 1 is etched in one go to form the front and back grooves for wafer stacking and the groove for applying adhesive. At this time, all the grooves are mirror grooves 5, which are etched by solution method. The process parameters are: a solution of 1% hydrogen peroxide and 5% potassium hydroxide or sodium hydroxide, time 200s, and temperature 80℃.

[0083] (3) After the front and back mirror grooves 5 are formed, the mirror grooves 5 of the sliced ​​and stacked slices are masked to expose the grooves that need to be coated. The grooves are then subjected to low-concentration alkaline etching to form pyramid substrate grooves. The process parameters are a solution of 0.5% hydrogen peroxide and 3% potassium hydroxide or sodium hydroxide, time 100s, and temperature 80℃.

[0084] It is particularly important to note that the front mirror groove 5, back mirror groove 5, front pyramid groove 6, and back pyramid groove 6 have different functions and dimensions. Mirror groove 5 is used for sheet separation and stacking, while pyramid groove 6 is used for adhesive application. Their specific functions are as follows:

[0085] (1) The mirror groove 5 at the slab section is divided into a front mirror groove 5 and a back mirror. The groove width is 3mm, the groove depth is 5-20um, and the groove base flatness is 5nm. This groove can prevent the etching paste from spreading outward and the groove will keep the heat effect and mechanical damage in the groove, which is conducive to removal. The flatness of the groove base is set because there is no pyramid effect. The etching paste or laser can remove TCO well without affecting the microcrystalline film and amorphous film under TCO.

[0086] (2) The pyramid groove 6 is located on the front and back of the solar cell 15. The diameter of the pyramid textured groove is 3mm and the depth is 4um. It is used for applying adhesive without a main grid. The purpose is to reduce the height of the adhesive dots 13, so that the adhesive dots 13 are flush with the grid lines 7 on the solar cell 15, which can reduce the risk of microcracks. It can also position the adhesive dots 13 in the groove to prevent the adhesive from spreading when the adhesive is not cured. The spread adhesive has a certain light-blocking rate, which will affect the light transmittance of the solar cell 15 and affect light absorption. On the other hand, the pyramid textured surface of the groove has a large specific surface area, which is conducive to the adhesion of the adhesive dots 13, thereby improving the adhesion between the solar cell 15, the adhesive dots 13 and the welding wire 14. The welding wire 14 is not easy to fall off.

[0087] Step 2: Deposit intrinsic amorphous silicon thin film 2 / doped microcrystalline silicon thin film 3 on both sides of the etched silicon wafer 1.

[0088] Step 3: Deposit TCO transparent conductive layer 4 on both sides of silicon wafer 1.

[0089] Step 4: Remove the TCO in the groove of silicon wafer 1, which can be done by etching paste or laser.

[0090] The TCO etching process is as follows: First, print the etching paste on the front mirror groove 5. The printing thickness should not exceed the groove depth, and the printing width should not exceed the groove width to prevent the etching paste from spreading outwards and affecting areas that do not need etching. After printing, dry the etching paste. After drying, print the etching paste on the back mirror groove 5. The printing thickness should not exceed the groove depth, and the printing width should not exceed the groove width to prevent the etching paste from spreading outwards and affecting areas that do not need etching. After printing, dry the etching paste again. Finally, clean and dry the dried blue film with pure water in an ultrasonic tank. Without this groove area, the fluid etching paste will extend outwards, causing excessive etching in areas that do not need etching due to the outward flow, thus reducing the transparent conductive film and affecting current collection. The process parameters are: etching paste width of 3mm, thickness of 20um for groove printing, etching paste drying temperature of 150℃, drying time of 3 minutes, and cleaning time of 60s.

[0091] The laser TCO removal process is as follows: Picosecond lasers are used to remove TCO from both the light-receiving and non-light-receiving surfaces. Because the grooved substrate is etched into a flat surface using a solution, the film layers within this groove sequentially consist of an amorphous thin film of approximately 6nm, a microcrystalline thin film of approximately 20nm, and a TCO thin film of approximately 100nm. The pyramid on silicon wafer 1 has a height and depth of 1000-3000nm. When TCO is deposited on the pyramid, it exhibits an undulating pattern, similar to the pyramid itself. During laser removal, the apex of the pyramid is easily removed, while the grooves require higher laser energy. However, higher laser energy can damage the amorphous and microcrystalline films grown on the pyramid. Therefore, a flat, mirror-like substrate groove is formed in this area, effectively solving the problem of damage to the bottom amorphous and microcrystalline films during laser TCO removal due to the depth and undulation of the pyramid. Figure 3 and Figure 4 As shown. The process parameters are: laser power 7%, speed 2.5m / s, and laser strikes 2 times.

[0092] Step 5: Silicon wafer 1 undergoes sequential screen printing, curing or sintering, and photo-injection or electro-injection to form the finished solar cell 15. The printed solar cell 15 features unequal-spaced gradient lines on both the short and long sides, which improves the inconsistent EL brightness between the edge and center areas of the overall solar cell 15. This fully releases the carrier transport potential at the cell edges, enhances the edge current collection capability, and thus improves cell efficiency and module power. Figure 9 As shown.

[0093] Step 6: Use laser non-destructive cutting to slice the battery cell 15 at the mirror groove 5;

[0094] Step 7: The stacked solar cells 15 are subjected to plasma etching at the edges to remove composite centers formed by the passivation film sputtering to the periphery of the cell under high laser temperature, microcracks at the cell edges, burrs, etc. Figure 5 and Figure 6 As shown.

[0095] Process parameters: In plasma discharge etching, the ion source material is a mixture of carbon tetrafluoride and oxygen. The reaction gas volume ratio is carbon tetrafluoride:oxygen = 1:0.05~0.15. The radio frequency power is 300W, the etching time is 1 minute, the chamber pressure is 10pa, and the temperature is 60℃.

[0096] Step 8: The edges of the solar cell 15 are passivated and protected by plasma-enhanced chemical vapor deposition of amorphous silicon film 9 and silicon nitride film 10.

[0097] The amorphous silicon thin film 9 on the side was prepared using a PECVD plasma-enhanced chemical vapor deposition system, with silane and hydrogen as the source gases. The silane flow rate was 1000 sccm, and the hydrogen flow rate was 9000 sccm. The pressure inside the chamber was 100 Pa, the temperature was 160℃, and the power density of the RF power supply during deposition was 0.04 W / cm². 2 The plasma treatment time was 800 s, and the overall thickness of the passivation film was 60 nm. Amorphous silicon was deposited here. Because amorphous silicon can reduce the recombination rate on the surface of silicon wafer 1 to below 10 cm / s through hydrogen atom saturated dangling bonds, its passivation effect is significantly better than that of SiO2 (recombination rate of about 100 cm / s) and SiNx (about 50 cm / s).

[0098] The side-side silicon nitride film was prepared using PECVD (plasma-enhanced chemical vapor deposition) equipment. Silane and ammonia gases were introduced, with a radio frequency power of 1600W, a temperature of 150℃, a deposition time of 200s, a pressure of 1600mTorr, and a SiH4:NH3 flow ratio of 1:5-1:10. A 100nm thick silicon nitride film with a refractive index of 1.6 was deposited on the amorphous silicon film. This silicon nitride deposition leverages silicon nitride's excellent resistance to moisture and corrosion to protect the amorphous silicon and the edges of the silicon wafer.

[0099] Step 9: The battery cells 15 with completed edge passivation are subjected to efficiency testing and grading.

[0100] Step 10: Perform module string welding on the segmented cells. During cell string welding, apply adhesive dots 13 to the pyramid groove 6, then set a first flexible buffer layer 11 in the mirror groove 5, and set a second flexible buffer layer 12 in the stacked area of ​​another cell 15 that is not treated by the mirror groove 5. Finally, lay welding wire 14 for interconnection.

[0101] When the cells are arranged in series, such as Figure 8 As shown, a layer of flexible silicone (organic silicone or EVA adhesive) is coated in the mirror groove 5 area, thus changing the contact from hard to soft without significantly increasing the height difference. Therefore, this area is less prone to breakage during stacking, improving the fragility of the stacking area. A pyramidal textured groove is provided at the gridless adhesive application location. On one hand, this reduces the height of the adhesive dots 13, making them flush with the grid lines 7 on the cell 15, reducing the risk of microcracks. It also positions the adhesive dots 13 within the groove, preventing adhesive diffusion before curing. Diffused adhesive has a certain light-blocking rate, affecting the light transmittance and light absorption of the cell 15. On the other hand, the large surface area of ​​the groove's textured surface is beneficial for the adhesion of the adhesive dots 13, thereby improving the adhesion between the cell 15, the adhesive dots 13, and the welding wire 14, making the welding wire 14 less likely to detach.

[0102] Step 11: Stack and laminate the serially welded segments to form a photovoltaic module.

[0103] Example 2

[0104] This embodiment discloses a solar cell for photovoltaic modules, a module, and a preparation method. The only changes are to the mirror groove 5 at the slicing point, the groove width is 4mm, the groove depth is 3um, and the groove base flatness is 2nm.

[0105] This groove can prevent the etching paste from spreading outwards, and the groove will retain the thermal effects and mechanical damage in the groove, which is conducive to removal; the groove base is set with flatness because there is no pyramid effect, the etching paste or laser can remove TCO well without affecting the microcrystalline film and amorphous film under TCO.

[0106] Example 3

[0107] This embodiment discloses a solar cell for photovoltaic modules, a module, and a preparation method. The only change from Embodiment 1 is the application of adhesive to the pyramidal groove 6, which has a diameter of 3mm and a depth of 8um.

[0108] In this embodiment, the adhesive application location without a main grid has a pyramidal textured groove. On the one hand, this reduces the height of the adhesive dots 13, making them flush with the grid lines 7 on the battery cell 15, which can reduce the risk of microcracks. It also positions the adhesive dots 13 within the groove, preventing the adhesive from spreading before it cures. Spreading adhesive has a certain light-blocking rate, which would affect the light transmittance of the battery cell 15 and its light absorption. On the other hand, the textured surface of the groove has a large specific surface area, which is beneficial to the adhesion of the adhesive dots 13, thereby improving the adhesion between the battery cell 15, the adhesive dots 13, and the welding wire 14, making it less likely for the welding wire 14 to fall off.

[0109] Example 4

[0110] This embodiment discloses a photovoltaic cell, a module, and a manufacturing method. The only change from Embodiment 1 is that the spacing of the edge grid lines 16 is smaller than the spacing of the central fine grid lines 17, and the edge grid lines 16 of the cell 15 are unequal-pitched gradient grid lines 7, with the spacing decreasing closer to the edge of the cell 15. Figure 9 As shown, the design of the gradient line spacing grid line 7 can improve the problem of inconsistent EL brightness between the edge area and the middle area. Furthermore, the gradient form optimizes the contact performance and current collection performance without increasing the light-blocking area, ensuring that the light-receiving area remains unchanged and maximizing the light absorption of the battery.

[0111] Example 5

[0112] This embodiment discloses a photovoltaic module cell, a module, and a manufacturing method. Figure 9 As shown, the only change from Embodiment 4 is that the edge grid lines 16 of the battery cell 15 are equidistant grid lines 7, the edge grid lines 16 include a short side 19 and a long side 18, the ratio of the spacing of the edge grid lines 16 on the long side 18 to the spacing of the fine grid lines 17 in the middle is 0.5-1.5mm : 0.6-3mm, the length of the edge grid lines 16 on the long side 18 is 1-15mm, the spacing of the edge grid lines 16 on the long side 18 is equidistant, and the spacing of the fine grid lines 17 in the middle is also equidistant;

[0113] The spacing ratio of the edge grid lines 16 on the short side 19 to the spacing of the fine grid lines 17 in the middle is 0.5-1.5mm:0.6-3mm. The length of the edge grid lines 16 on the short side 19 is 1-16mm, and the length extends from the edge of the cell 15 to the second welding line. This improves the inconsistent EL brightness between the edge and middle regions of the overall cell 15, fully releases the carrier transport potential at the cell edge, enhances the edge current collection capability, and thus improves cell efficiency and module power.

[0114] In some embodiments, the spacing of the edge grid lines 16 of the segmented region 20 is smaller than the spacing of the edge grid lines 16 of the unsegmented region 20.

[0115] The above are the embodiments listed in this example. However, this example is not limited to the optional embodiments described above. Those skilled in the art can arbitrarily combine the above methods to obtain other various embodiments. Anyone can derive other various forms of embodiments based on the inspiration of this example. The above specific embodiments should not be construed as limiting the scope of protection of this example. The scope of protection of this example should be determined by the claims, and the specification can be used to interpret the claims.

Claims

1. A method for preparing solar cells for photovoltaic modules, characterized in that: The process includes the following steps: selectively patterning and etching both sides of the texturized silicon wafer to form at least one mirror groove for slicing, with the same number of mirror grooves on both sides of the silicon wafer; etching a mirror platform at the stacking point on the back side of the silicon wafer; generating a pyramid groove for gridless adhesive application; the pyramid groove is located on both the front and back sides of the silicon wafer; then sequentially depositing an amorphous silicon / microcrystalline silicon thin film and a transparent conductive film; removing the transparent conductive film from the mirror groove; screen printing the cell; and finally slicing the entire cell through the mirror groove to obtain the cell for photovoltaic modules.

2. The method for preparing a photovoltaic module cell according to claim 1, characterized in that: The manufacturing process of the mirror groove and mirror platform includes selectively masking the texturized silicon wafer with nano-silica, and etching the non-masked areas using a solution method, specifically using a solution of 1%-10% hydrogen peroxide and 1%-10% potassium hydroxide or sodium hydroxide for 60-200 seconds at a temperature of 60-80℃.

3. The method for preparing a solar cell for a photovoltaic module according to claim 1, characterized in that: The depth of the pyramid groove is 1-10 micrometers and the width is 1-5 millimeters.

4. A method for preparing a solar cell for a photovoltaic module according to claim 1 or 3, characterized in that: The fabrication process of the pyramidal grooves involves selectively masking the fabricated silicon wafer with nano-silica, and etching the non-masked areas using a solution method to form flat grooves. Specifically, a solution of 1%-10% hydrogen peroxide and 1%-10% potassium hydroxide or sodium hydroxide is used for 60-200 seconds at a temperature of 60-80°C. Then, the flat grooves are grown into pyramidal textured grooves using a low-concentration alkaline etching solution. Specifically, a solution of 1%-5% hydrogen peroxide and 1%-5% potassium hydroxide or sodium hydroxide is used for 60-120 seconds at a temperature of 60-80°C.

5. The method for preparing a solar cell for a photovoltaic module according to claim 1, characterized in that: When the silicon wafer size is 210×105mm, there are 1-2 mirror grooves on both the front and back sides of the silicon wafer; When the silicon wafer size is 210×210mm, there are 1-4 mirror grooves on both the front and back sides of the silicon wafer.

6. The method for preparing a solar cell for a photovoltaic module according to claim 1, characterized in that: After the slicing is completed, the edges are protected, including plasma etching and edge passivation.

7. A solar cell for photovoltaic modules, characterized in that: The solar cell for a photovoltaic module is prepared using the method described in any one of claims 1-6.

8. A photovoltaic module, characterized in that: The cells are made using the method for preparing a photovoltaic module cell according to any one of claims 1-6 or the method for preparing a photovoltaic module cell according to claim 7. During string welding, adhesive dots are applied to the pyramid grooves, and finally, welding wires are laid for interconnection.

9. A photovoltaic module according to claim 8, characterized in that: When there is one mirror groove on both the front and back of the silicon wafer, the mirror platform of the solar cell is located above the mirror groove of the other solar cell during stacking.

10. A photovoltaic module according to claim 9, characterized in that: The mirror groove is provided with a first flexible buffer layer, and a second flexible buffer layer is provided on the mirror platform of another battery cell.

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