Inverter fault ride-through reactive current instruction amplitude limiting method and system

Abstract

The invention belongs to the technical field of inverter control, and provides an inverter fault ride-through reactive current instruction amplitude limiting method and system, and the method comprises the steps: obtaining the positive-sequence and negative-sequence components and phase information of a power grid voltage through detecting a three-phase voltage instantaneous value when the power grid is in a fault; calculating a positive sequence capacitive reactive current instruction and a negative sequence inductive reactive current instruction according to national standard requirements; analyzing the relationship between the reactive current instruction and the positive sequence voltage amplitude, the negative sequence voltage amplitude and the negative sequence voltage initial phase to obtain the uniform amplitude and phase of the total reactive current instruction in the coordinate system; and carrying out amplitude limiting processing on the reactive current instruction, so that the maximum value in the three-phase reactive current peak values does not exceed the maximum peak value limit value of the output current of the inverter, and obtaining the amplitude-limited reactive current peak value. According to the invention, when the power grid breaks down, amplitude limiting processing can be effectively carried out on the reactive current instruction provided by the inverter, and the situation that the inverter is shut down due to an over-current fault caused by the fact that the reactive current instruction exceeds the maximum current limit of the inverter is avoided.

Description

Technical Field

[0001] This invention belongs to the field of inverter control technology, specifically relating to a method and system for limiting reactive current command during inverter fault ride-through. Background Technology

[0002] When a grid fault occurs, the inverter needs to operate continuously within the standard requirements without disconnecting from the grid and needs to provide corresponding reactive current support. Grid faults can be categorized into three-phase symmetrical faults and three-phase asymmetrical faults. For three-phase symmetrical faults, only the positive-sequence component of the grid voltage changes, while the negative-sequence and zero-sequence voltages remain unchanged; the inverter only needs to provide positive-sequence reactive current. However, for three-phase asymmetrical faults, both the positive-sequence and negative-sequence components of the grid voltage change, requiring the inverter to provide both positive-sequence and negative-sequence reactive current simultaneously. When the grid fault is severe, the reactive current command calculated according to the standard formula may exceed the inverter's maximum reactive current output capacity. In this case, appropriate limiting processing of the reactive current command is required. For symmetrical faults, where only positive-sequence reactive current exists, limiting the positive-sequence q-axis reactive current command is sufficient. However, for asymmetrical faults, where both positive-sequence and negative-sequence reactive currents exist simultaneously, the negative-sequence reactive current command is influenced by both the negative-sequence d-axis and q-axis, and the positive-sequence q-axis reactive current further complicates matters. Therefore, a reasonable reactive current command limiting method is needed to ensure the inverter does not shut down due to excessive command current. Existing solutions rely on positive-sequence q-axis, negative-sequence d-axis, and q-axis commands, along with the inverter's maximum current I. M The method directly limits the reactive current command without considering the impact of different initial phases of the negative-sequence grid voltage on the magnitude of the reactive current command. This causes the reactive current command limiting to fail under certain asymmetrical fault conditions, resulting in the actual reactive current command potentially exceeding the inverter's maximum current I. M This caused the inverter to shut down due to excessive output current. Summary of the Invention

[0003] The purpose of this invention is to overcome the existing defects and provide a method and system for limiting reactive current command during inverter fault ride-through.

[0004] To solve the above-mentioned technical problems, the present invention provides the following technical solution:

[0005] The primary objective of this invention is to provide a method for limiting reactive current command during inverter fault ride-through, comprising:

[0006] (1) Detect the instantaneous values ​​of the three-phase voltage during a power grid fault, and obtain the positive sequence, negative sequence components and phase information of the power grid voltage;

[0007] (2) Calculate the positive sequence capacitive reactive current command and the negative sequence inductive reactive current command according to the national standard requirements;

[0008] (3) Analyze the relationship between the reactive current command and the amplitude of the positive sequence voltage, the amplitude of the negative sequence voltage and the initial phase of the negative sequence voltage, and obtain the amplitude and phase of the unified total reactive current command in the abc coordinate system;

[0009] (4) Limit the reactive current command so that the maximum value of the three-phase reactive current peak does not exceed the maximum peak value of the inverter output current, and obtain the peak value of the limited reactive current.

[0010] Furthermore, in step (1), the instantaneous value expression of the three-phase grid voltage is:

[0011]

[0012] Where v ga v gb v gc These are the three-phase voltages of the power grid, A, B, and C, respectively, in V. gp V gn V g0 These represent the peak values ​​of the positive-sequence, negative-sequence, and zero-sequence components of the grid voltage, respectively; ω is the angular velocity of the grid voltage; t is time; and φ is... n φ0 is the initial phase of the negative sequence voltage and φ0 is the initial phase of the zero sequence component.

[0013] Furthermore, in step (2), the calculation method for the positive sequence capacitive reactive current command is as follows:

[0014]

[0015] Among them, I n K is the rated current of the inverter, K1 is a user-defined current coefficient, and K p V is the positive sequence reactive current coefficient. n This is the rated voltage of the inverter.

[0016] Furthermore, in step (2), the calculation method for the negative sequence inductive reactive current command is as follows:

[0017]

[0018] Among them, I n K is the rated current of the inverter, K2 is a user-defined current coefficient, and K n It is the negative sequence reactive current coefficient.

[0019] Furthermore, in step (3), the reactive current command is calculated as follows:

[0020]

[0021] in, The initial phases of the three-phase reactive current command are represented as follows:

[0022]

[0023] Given K1 > 0 and K2 > 0, the maximum expression for the peak value of the three-phase reactive current is:

[0024]

[0025] Among them, I qmax Let M be the maximum peak value of the three-phase reactive current command, and M be the maximum value obtained, expressed as:

[0026] M = max{cos(φ) n cos(φ) n -120°)cos(φ n +120°)}

[0027] The specific calculation method for the value of M is as follows:

[0028]

[0029] Furthermore, in step (4), the limiting of the reactive current command is achieved in the following way:

[0030] a. When 0°≤φ n <60° or 300°≤φ n When <360°, I qmax =I aq If That is, the maximum peak value of the reactive current is greater than the maximum peak value limit I of the inverter output current. M The peak value of the three-phase reactive current command is expressed as:

[0031]

[0032] b. When 60°≤φ n When <180°, I qmax =I bq ,like That is, the maximum peak value of the reactive current is greater than the maximum peak value limit I of the inverter output current. M The peak value of the three-phase reactive current command is expressed as:

[0033]

[0034] c. When 180°≤φ n When <300°, I qmax =I cq ,like That is, the maximum peak value of the reactive current is greater than the maximum peak value limit I of the inverter output current. M The peak value of the three-phase reactive current command is expressed as:

[0035]

[0036] After limiting, the instantaneous value of the three-phase reactive current command is expressed as:

[0037]

[0038] Another object of the present invention is to provide an inverter fault-through reactive current command limiting system, characterized in that the system comprises:

[0039] The voltage detection module is used to detect the instantaneous values ​​of the three-phase voltage during power grid faults and to obtain the positive sequence, negative sequence components and phase information of the power grid voltage.

[0040] The current calculation module is used to calculate the positive sequence capacitive reactive current command and the negative sequence inductive reactive current command according to national standards.

[0041] The phase analysis module is used to analyze the relationship between the reactive current command and the positive-sequence voltage amplitude, negative-sequence voltage amplitude, and initial phase of the negative-sequence voltage, so as to obtain the amplitude and phase of the total reactive current command in the abc coordinate system.

[0042] The limiting module is used to limit the reactive current command so that the maximum value of the three-phase reactive current peak does not exceed the maximum peak value of the inverter output current.

[0043] The control output module is used to generate PWM control signals that meet the amplitude limiting requirements.

[0044] Another object of the present invention is to provide an electronic device, including a processor and a memory storing a computer program, wherein the processor executes the computer program to implement the inverter fault-through reactive current command limiting method provided by the first object of the present invention.

[0045] Another object of the present invention is to provide a computer-readable storage medium having a computer program stored thereon, wherein the computer program, when executed by a processor, implements the inverter fault-through reactive current command limiting method provided by the first object of the present invention.

[0046] Another object of the present invention is to provide a server comprising at least one processor and a memory communicatively connected to the processor, the memory storing instructions executable by the at least one processor, the instructions being executed by the processor to cause the at least one processor to perform the inverter fault-through reactive current command limiting method provided in the first object of the present invention.

[0047] In combination with the above technical solutions, the beneficial effects of the present invention compared with the prior art are as follows:

[0048] This invention analyzes the relationship between reactive current command and positive-sequence voltage amplitude, negative-sequence voltage amplitude and phase when a power grid fault occurs, and obtains the amplitude and phase of a unified total reactive current command in the abc coordinate system, thereby achieving precise limiting of the reactive current command and ensuring that the sinusoidal degree of the reactive current command in the abc coordinate system is not distorted.

[0049] When a grid fault occurs, it can effectively limit the size of the inverter's reactive current command, ensuring reliable inverter operation; it can directly limit the reactive current command in the abc coordinate system and ensure that the sinusoidal degree of the command is not distorted. The control algorithm can directly adopt PR control in the natural coordinate system, which is simple to control, has a small amount of computation, occupies few resources, and is easy to implement. Attached Figure Description

[0050] The accompanying drawings are provided to further illustrate the invention and form part of the specification. They are used in conjunction with embodiments of the invention to explain the invention and do not constitute a limitation thereof. In the drawings:

[0051] Figure 1 This is a flowchart of the inverter fault ride-through reactive current command limiting method provided in an embodiment of the present invention;

[0052] Figure 2 This is a control principle diagram provided in an embodiment of the present invention;

[0053] Figure 3 This is a schematic diagram of the inverter fault-crossing reactive current command limiting system provided in an embodiment of the present invention. Detailed Implementation

[0054] The preferred embodiments of the present invention will be described below with reference to the accompanying drawings. It should be understood that the preferred embodiments described herein are for illustration and explanation only and are not intended to limit the present invention.

[0055] Example 1:

[0056] like Figure 1 The image shows an embodiment of the inverter fault-through reactive current command limiting method provided by the present invention, which specifically includes the following steps:

[0057] S1: Detect the instantaneous values ​​of the three-phase voltage during a power grid fault, and obtain the positive sequence, negative sequence components and phase information of the power grid voltage;

[0058] S2: Calculate the positive sequence capacitive reactive current command and the negative sequence inductive reactive current command according to national standards;

[0059] S3: Analyze the relationship between the reactive current command and the amplitude of the positive-sequence voltage, the amplitude of the negative-sequence voltage, and the initial phase of the negative-sequence voltage to obtain the amplitude and phase of the unified total reactive current command in the abc coordinate system;

[0060] S4: Limit the reactive current command so that the maximum value of the three-phase reactive current peak does not exceed the maximum peak value of the inverter output current, and obtain the peak value of the limited reactive current.

[0061] Specifically, when a grid fault occurs, the inverter needs to simultaneously provide positive-sequence capacitive reactive current and negative-sequence inductive reactive current. Since the provided reactive current may be excessive, potentially causing inverter failure or damage, this invention can limit the reactive current command provided by the inverter during fault ride-through, ensuring it remains within the inverter's allowable output current range. During grid faults, this invention directly analyzes the relationship between the reactive current command and the amplitudes and phases of the positive-sequence and negative-sequence voltages to obtain a unified amplitude and phase of the total reactive current command in the abc coordinate system, thereby achieving precise limiting of the reactive current command and ensuring that the sinusoidal nature of the reactive current command in the abc coordinate system remains undistorted. When a grid fault occurs, it can effectively limit the reactive current command provided by the inverter, preventing the reactive current command from exceeding the inverter's maximum current limit and causing overcurrent fault shutdown.

[0062] 1. The instantaneous voltage expression of the three-phase power grid is shown in equation (1), where v ga v gb v gc These are the three-phase voltages of the power grid, A, B, and C, respectively, in V. gp V gn V g0 These represent the peak values ​​of the positive-sequence, negative-sequence, and zero-sequence components of the grid voltage, respectively; ω is the angular velocity of the grid voltage; t is time; and φ is... n φ0 is the initial phase of the negative sequence voltage and φ0 is the initial phase of the zero sequence component.

[0063]

[0064] The phases of subsequent positive-sequence capacitive reactive current and negative-sequence reactive current need to be calculated based on the voltage phase, which serves as a reference for the current phase.

[0065] 2. According to the national standard GB / T 34120, when an asymmetrical fault occurs in the grid voltage, the inverter needs to provide positive-sequence capacitive reactive current and negative-sequence inductive reactive current. The positive-sequence capacitive reactive current is used to support the recovery of the positive-sequence grid voltage, and the negative-sequence inductive reactive current is used to suppress the rise of the negative-sequence grid voltage. The phase of the positive-sequence capacitive reactive current leads the phase of the positive-sequence grid voltage by 90°, and its expression is shown in equation (2):

[0066]

[0067] In the formula I n K is the rated current of the inverter, and K1 is a user-defined current coefficient. According to the requirements of the national standard GB / T 34120, the calculation formula for K1 is shown in equation (3), where K p V is the positive sequence reactive current coefficient. n The inverter's rated voltage:

[0068]

[0069] The phase of the negative-sequence inductive reactive current lags behind the phase of the negative-sequence grid voltage by 90°, and its expression is shown in equation (4):

[0070]

[0071] In the formula, K2 is a user-defined current coefficient. According to the requirements of the national standard GB / T 34120, its calculation formula is shown in formula (5), where K n Negative sequence reactive current coefficient:

[0072]

[0073] 3. When a grid fault occurs, the total reactive current that the inverter needs to provide is i. aq i bq i cq And its expression is processed accordingly, as shown in equation (6):

[0074]

[0075] After performing trigonometric function processing on equation (6), the expression for reactive current is shown in equation (7).

[0076]

[0077] in These are the initial phases of the three-phase reactive current command, and their calculation formula is shown in equation (8):

[0078]

[0079] Since K1 > 0 and K2 > 0, the maximum expression for the peak value of the three-phase reactive current is shown in equation (9):

[0080]

[0081] In equation (12), I qmax M represents the maximum peak value of the three-phase reactive current command, and M is a calculated maximum value. The expression for M is shown in equation (10).

[0082] M = max{cos(φ) n cos(φ) n -120°)cos(φ n +120°)} (10)

[0083] Through analysis, the specific value of M can be obtained, as shown in equation (11).

[0084]

[0085] 4. To limit the three-phase reactive current, simply ensure that the maximum value of the three-phase reactive current peak does not exceed the inverter output current maximum peak limit I. M That's fine.

[0086] The limiting of reactive current commands can be implemented in the following ways:

[0087] a. When 0°≤φ n <60° or 300°≤φ n When <360°, there is I qmax =I aq

[0088] if That is, the maximum peak value of the reactive current is greater than the maximum peak value limit I of the inverter output current. M The peak value expression for the three-phase reactive current command is shown in equation (12):

[0089]

[0090] b. When 60°≤φ n <180°, there is I qmax =I bq

[0091] if That is, the maximum peak value of the reactive current is greater than the maximum peak value limit I of the inverter output current. M The peak value expression for the three-phase reactive current command is shown in equation (13):

[0092]

[0093] c. When 180°≤φ n <300°, there is I qmax =I cq

[0094] if That is, the maximum peak value of the reactive current is greater than the maximum peak value limit I of the inverter output current. M The peak value expression for the three-phase reactive current command is shown in equation (14):

[0095]

[0096] The instantaneous value expression of the final three-phase reactive current command is shown in equation (15):

[0097]

[0098] Example 2:

[0099] like Figure 3 As shown, this embodiment of the invention provides an inverter fault ride-through reactive current command limiting system, comprising:

[0100] The voltage detection module is used to detect the instantaneous values ​​of the three-phase voltage during power grid faults and to obtain the positive sequence, negative sequence components and phase information of the power grid voltage.

[0101] The current calculation module is used to calculate the positive sequence capacitive reactive current command and the negative sequence inductive reactive current command according to national standards.

[0102] The phase analysis module is used to analyze the relationship between the reactive current command and the positive-sequence voltage amplitude, negative-sequence voltage amplitude, and initial phase of the negative-sequence voltage, so as to obtain the amplitude and phase of the total reactive current command in a unified coordinate system.

[0103] The limiting module is used to limit the reactive current command so that the maximum value of the three-phase reactive current peak does not exceed the maximum peak value of the inverter output current.

[0104] The control output module is used to generate PWM control signals that meet the amplitude limiting requirements.

[0105] Example 3: This embodiment of the invention provides an electronic device, including a processor and a memory storing a computer program. When the processor executes the computer program, it implements the inverter fault-through reactive current command limiting method provided in Example 1 of the invention.

[0106] Example 4: This embodiment of the invention provides a computer-readable storage medium storing a computer program thereon. When the computer program is executed by a processor, it implements the inverter fault-crossing reactive current command limiting method provided in Example 1 of the invention.

[0107] Example 5: This embodiment of the invention provides a server, including at least one processor and a memory communicatively connected to the processor. The memory stores instructions that can be executed by the at least one processor. The instructions are executed by the processor to cause the at least one processor to execute the inverter fault-through reactive current command limiting method provided in Example 1 of the invention.

[0108] It should be understood that although the steps in the flowcharts of the various embodiments of the present invention are shown sequentially according to the arrows, these steps are not necessarily executed in the order indicated by the arrows. Unless explicitly stated in the present invention, there is no strict order restriction on the execution of these steps, and these steps can be executed in other orders. Moreover, at least some steps in the various embodiments may include multiple sub-steps or multiple stages. These sub-steps or stages are not necessarily completed at the same time, but can be executed at different times. The execution order of these sub-steps or stages is not necessarily sequential, but can be performed alternately or in turn with other steps or at least a portion of the sub-steps or stages of other steps.

[0109] Those skilled in the art will understand that all or part of the processes in the methods of the above embodiments can be implemented by a computer program instructing related hardware. The program can be stored in a non-volatile computer-readable storage medium, and when executed, it can include the processes of the embodiments of the above methods. Any references to memory, storage, databases, or other media used in the embodiments provided by this invention can include non-volatile and / or volatile memory. Non-volatile memory can include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM), or flash memory. Volatile memory can include random access memory (RAM) or external cache memory. By way of illustration and not limitation, RAM is available in various forms, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), dual data rate SDRAM (DDRSDRAM), enhanced SDRAM (ESDRAM), synchronous link DRAM (SLDRAM), RAMbus direct RAM (RDRAM), direct memory bus dynamic RAM (DRDRAM), and RAMbus dynamic RAM (RDRAM), etc.

[0110] Finally, it should be noted that the above descriptions are merely preferred embodiments of the present invention and are not intended to limit the present invention. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art can still modify the technical solutions described in the foregoing embodiments or make equivalent substitutions for some of the technical features. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. A method for inverter fault ride through reactive current command limiting, comprising: The method comprises: (1) detecting the three-phase voltage instantaneous value at the time of power grid failure, obtaining the positive sequence, negative sequence components and phase information of the power grid voltage; (2) calculating the positive sequence capacitive reactive current instruction and the negative sequence inductive reactive current instruction according to the national standard requirements; (3) analyzing the relationship between the reactive current instruction and the positive sequence voltage amplitude, the negative sequence voltage amplitude and the initial phase of the negative sequence voltage, obtaining the amplitude and phase of the unified total reactive current instruction in the abc coordinate system; (4) limiting the amplitude of the reactive current instruction, so that the maximum value of the three-phase reactive current peak value does not exceed the maximum peak value limit of the inverter output current, obtaining the limited amplitude of the reactive current peak value.

2. The method of claim 1, wherein, In step (1), the three-phase power grid voltage instantaneous value expression is: where v ga , v gb , v gc are the three-phase phase voltages of the power grid A, B, C, respectively, V gp , V gn , V g0 are the positive, negative, and zero sequence component peak values of the grid voltage, ω is the grid voltage angular velocity, t is the time, φ n is the initial phase of the negative sequence voltage, and φ0 is the initial phase of the zero sequence component.

3. The method of claim 2, wherein, In step (2), the calculation method of the positive sequence capacitive reactive current instruction is: where I n is the inverter rated current, K1 is a self-defined current coefficient, K p is the positive sequence reactive current coefficient, V n is the inverter rated voltage.

4. The method of claim 3, wherein, In step (2), the calculation method of the negative sequence inductive reactive current instruction is: where I n is the inverter rated current, K2 is a self-defined current coefficient, K n is the negative sequence reactive current coefficient.

5. The method of claim 4, wherein, In step (3), the calculation method of the reactive current instruction is: wherein, are the initial phases of the three-phase reactive current commands, respectively, expressed as: From K1>0, K2>0, the maximum expression of the three-phase reactive current peak value is: where I qmax is the maximum peak value of the three-phase reactive current command, M is the maximum value sought, expressed as: M = max {cos(φ n ) cos(φ n -120°) cos(φ n +120°)} M = max {cos(φ n ) cos(φ n -120°) cos(φ n +120°)} The specific value calculation method of M is:

6. The method of claim 5, wherein, In step (4), the amplitude limiting processing of the reactive current instruction is realized by the following method: a. when 0° < φ < 60° or 300° < φ < 360°, I n < 60° or 300° < φ < 360°, I n < 60° or 300° < φ < 360°, I qmax < 60° or 300° < φ < 360°, I aq < 60° or 300° < φ < 360°, I < 60° or 300° < φ < 360°, I M < 60° or 300° < φ < 360°, I b. when 60° < φ < 180°, I n = I qmax = I bq , if i.e. the maximum peak value of the reactive current is greater than the limit value I M of the maximum peak value of the inverter output current, the peak value of the three-phase reactive current command is expressed as: c. when 180° < φ < 300°, I n = I qmax , if cq < 0, then i.e. the maximum peak value of the reactive current is greater than the limit value I M of the maximum peak value of the inverter output current, the peak value of the three-phase reactive current command is expressed as: After limiting the amplitude, the instantaneous value of the three-phase reactive current instruction is represented as:

7. An inverter fault ride-through reactive current command limiter system, characterized by, The system comprises: A voltage detection module for detecting the three-phase voltage instantaneous value at the time of power grid failure, obtaining the positive sequence, negative sequence components and phase information of the power grid voltage; A current calculation module for calculating the positive sequence capacitive reactive current instruction and the negative sequence inductive reactive current instruction according to the national standard requirements; A phase analysis module for analyzing the relationship between the reactive current instruction and the positive sequence voltage amplitude, the negative sequence voltage amplitude and the initial phase of the negative sequence voltage, obtaining the amplitude and phase of the unified total reactive current instruction in the abc coordinate system; An amplitude limiting processing module for limiting the amplitude of the reactive current instruction, so that the maximum value of the three-phase reactive current peak value does not exceed the maximum peak value limit of the inverter output current; A control output module for generating a PWM control signal meeting the amplitude limiting requirements.

8. An electronic device comprising a processor and a memory having a computer program stored therein, characterized in that, The processor executes the computer program to realize the inverter fault ride-through reactive current instruction limiting amplitude method of any one of claims 1 to 6.

9. A computer readable storage medium having stored thereon a computer program, characterized in that, The computer program is executed by the processor to realize the inverter fault ride-through reactive current instruction limiting amplitude method of any one of claims 1 to 6.

10. A server, characterized by: The device comprises at least one processor, and a memory connected with the processor in communication, the memory stores instructions executable by the at least one processor, and the instructions are executed by the processor to make the at least one processor execute the inverter fault ride-through reactive current instruction limiting amplitude method of any one of claims 1 to 6.

Images