Solar cell, preparation method thereof and photovoltaic module

Abstract

The invention relates to a solar cell, a preparation method thereof and a photovoltaic module. The solar cell comprises a silicon substrate, wherein a first tunneling oxide layer, a first phosphorus-doped polycrystalline silicon layer, a nitrogen-doped polycrystalline silicon layer and a second phosphorus-doped polycrystalline silicon layer are sequentially stacked on the back surface of the silicon substrate; wherein the phosphorus doping concentration of the first phosphorus-doped polycrystalline silicon layer and the phosphorus doping concentration of the second phosphorus-doped polycrystalline silicon layer are different and are both greater than the nitrogen doping concentration of the nitrogen-doped polycrystalline silicon layer; the nitrogen doping concentration of the nitrogen-doped polycrystalline silicon layer is 3 * 10 < 19 > / cm < 3 > to 1 * 10 < 20 > / cm < 3 >. The solar cell has relatively high passivation performance and low contact resistance, so that the photoelectric conversion efficiency of the solar cell is remarkably improved.

Description

Technical Field

[0001] This application relates to the field of solar cells, and in particular to a solar cell and its preparation method, and a photovoltaic module. Background Technology

[0002] TOPCon (Tunnel Oxide Passivating Contacts) solar cells are a type of solar cell based on selective carrier transport and have broad application prospects. Traditional TOPCon cells typically have a back-side structure including a tunnel oxide layer and a phosphorus-doped polycrystalline silicon layer, but they still suffer from poor passivation performance and the need to improve photoelectric conversion efficiency. Summary of the Invention

[0003] Based on this, some embodiments of this application provide a solar cell with improved passivation performance, thereby achieving high photoelectric conversion efficiency.

[0004] In addition, some other embodiments of this application also provide a method for preparing a solar cell and a photovoltaic module.

[0005] A solar cell includes a silicon substrate, wherein a first tunneling oxide layer, a first phosphorus-doped polycrystalline silicon layer, a nitrogen-doped polycrystalline silicon layer and a second phosphorus-doped polycrystalline silicon layer are sequentially stacked on the back side of the silicon substrate.

[0006] The phosphorus doping concentration of the first phosphorus-doped polysilicon layer is different from that of the second phosphorus-doped polysilicon layer, and both are greater than the nitrogen doping concentration of the nitrogen-doped polysilicon layer.

[0007] The nitrogen doping concentration of the nitrogen-doped polycrystalline silicon layer is 3 × 10⁻⁶. 19 pcs / cm 3 ~1×10 20 pcs / cm 3 .

[0008] In some embodiments, the phosphorus doping concentration of the first phosphorus-doped polysilicon layer is greater than the phosphorus doping concentration of the second phosphorus-doped polysilicon layer.

[0009] In some embodiments, the phosphorus doping concentration of the first phosphorus-doped polysilicon layer is 5 × 10⁻⁶. 20 pcs / cm 3 ~4×10 21 pcs / cm 3 The phosphorus doping concentration of the second phosphorus-doped polysilicon layer is 4 × 10⁻⁶. 19 pcs / cm 3 ~1×10 20 pcs / cm 3 .

[0010] In some embodiments, one or more of the following conditions are met:

[0011] (1) The thickness of the first phosphorus-doped polycrystalline silicon layer is 40 nm to 80 nm;

[0012] (2) The thickness of the nitrogen-doped polycrystalline silicon layer is 20 nm to 50 nm;

[0013] (3) The thickness of the second phosphorus-doped polycrystalline silicon layer is 10 nm to 30 nm;

[0014] (4) The thickness of the tunneling oxide layer is 1 nm to 3 nm.

[0015] In some embodiments, a back passivation layer and a back electrode are also provided on the side of the second phosphorus-doped polysilicon layer away from the silicon substrate.

[0016] In some embodiments, a boron diffusion layer, a front passivation layer, and a front electrode are sequentially stacked on the front side of the silicon substrate.

[0017] A method for fabricating a solar cell includes the following steps:

[0018] A solar cell is fabricated by forming a tunneling oxide layer, a first phosphorus-doped polycrystalline silicon layer, a nitrogen-doped polycrystalline silicon layer, and a second phosphorus-doped polycrystalline silicon layer stacked on the back side of a silicon substrate.

[0019] The phosphorus doping concentration of the first phosphorus-doped polysilicon layer is different from that of the second phosphorus-doped polysilicon layer, and both are greater than the nitrogen doping concentration of the nitrogen-doped polysilicon layer.

[0020] The nitrogen doping concentration of the nitrogen-doped polycrystalline silicon layer is 3 × 10⁻⁶. 19 pcs / cm 3 ~1×10 20 pcs / cm 3 .

[0021] In some embodiments, the step of forming a stacked first phosphorus-doped polysilicon layer, a nitrogen-doped polysilicon layer, and a second phosphorus-doped polysilicon layer includes:

[0022] A first phosphorus-doped amorphous silicon layer, a nitrogen-doped amorphous silicon layer, and a second phosphorus-doped amorphous silicon layer are formed in a stacked configuration.

[0023] The first phosphorus-doped amorphous silicon layer, the nitrogen-doped amorphous silicon layer, and the second phosphorus-doped amorphous silicon layer are annealed to convert the amorphous silicon into polycrystalline silicon, thereby obtaining the first phosphorus-doped polycrystalline silicon layer, the nitrogen-doped polycrystalline silicon layer, and the second phosphorus-doped polycrystalline silicon layer.

[0024] In some embodiments, the step of forming a first phosphorus-doped amorphous silicon layer, a nitrogen-doped amorphous silicon layer, and a second phosphorus-doped amorphous silicon layer stacked together includes:

[0025] The first phosphorus-doped amorphous silicon layer was prepared by setting the silane flow rate to 2000 sccm~3000 sccm, the phosphorus source flow rate to 800 sccm~1000 sccm, and the hydrogen flow rate to 6000 sccm~10000 sccm.

[0026] A nitrogen-doped amorphous silicon layer was prepared by setting the silane flow rate to 2000 sccm~3000 sccm, the nitrogen source flow rate to 10 sccm~50 sccm, and the hydrogen flow rate to 6000 sccm~10000 sccm.

[0027] A second phosphorus-doped amorphous silicon layer was prepared by setting the silane flow rate to 2000 sccm~3000 sccm, the phosphorus source flow rate to 300 sccm~400 sccm, and the hydrogen flow rate to 6000 sccm~10000 sccm.

[0028] In some embodiments, the phosphorus source includes phosphine, and the nitrogen source includes one or more of ammonia and nitrogen.

[0029] In some embodiments, the first phosphorus-doped amorphous silicon layer, the nitrogen-doped amorphous silicon layer, and the second phosphorus-doped amorphous silicon layer are formed by plasma-enhanced chemical vapor deposition, wherein in the step of forming the first phosphorus-doped amorphous silicon layer, the nitrogen-doped amorphous silicon layer, and the second phosphorus-doped amorphous silicon layer, the plasma pulse duty cycle is independently 30:(350~600).

[0030] In some embodiments, the annealing temperature is 910°C to 940°C, and the annealing time is 20 min to 50 min.

[0031] In some embodiments, prior to the annealing process, the method further includes: forming a mask layer on the second phosphorus-doped amorphous silicon layer, wherein during the preparation of the mask layer, the flow rate of SiH4 is 1500 sccm to 1800 sccm, the flow rate of N2O is 6000 sccm to 8000 sccm, the plasma pulse duty cycle is 30:(500 to 600), and the thickness of the mask layer is 15 nm to 30 nm.

[0032] In some embodiments, during the preparation of the tunneling oxide layer, the N2O flow rate is 7000 sccm to 9000 sccm, the deposition temperature is 410°C to 430°C, the deposition time is 100 s to 120 s, and the plasma pulse duty cycle is 20:(950 to 1150).

[0033] In some embodiments, prior to the step of forming a tunneling oxide layer on the back side of the silicon substrate, the method further includes: texturing the silicon substrate, front-side boron diffusion, and back-side alkaline polishing to form a boron diffusion layer on the front side of the silicon substrate.

[0034] In some embodiments, after the step of forming a second phosphorus-doped polysilicon layer on the back side of the silicon substrate, the steps further include de-plating cleaning, forming a back passivation layer and a back electrode on the back side of the silicon substrate, and forming a front passivation layer and a front electrode on the front side of the silicon substrate.

[0035] A photovoltaic module includes a solar cell and an encapsulation structure. The solar cell is prepared as described above or by the above-described preparation method, and the encapsulation structure is used to encapsulate the solar cell.

[0036] This study found that while the phosphorus-doped polycrystalline silicon layer in traditional TOPCon solar cells has some advantages in parasitic light absorption and good light transmittance, its passivation effect is poor. Furthermore, phosphorus doping at high temperatures easily causes phosphorus atoms to diffuse into the silicon substrate, resulting in losses in open-circuit voltage, fill factor, and cell efficiency. Therefore, the photoelectric conversion efficiency of traditional TOPCon solar cells still needs to be improved.

[0037] Based on this, some embodiments of this application provide a solar cell with a back-side structure comprising a tunneling oxide layer, a first phosphorus-doped polycrystalline silicon layer, a nitrogen-doped polycrystalline silicon layer, and a second phosphorus-doped polycrystalline silicon layer stacked sequentially. In the nitrogen-doped polycrystalline silicon layer, the nitrogen doping concentration is very low. On the one hand, nitrogen atom doping widens the band gap of the polycrystalline silicon, resulting in lower parasitic absorption of photogenerated carriers, thus exhibiting light transmittance comparable to that of the phosphorus-doped polycrystalline silicon film. Simultaneously, the low doping concentration and few impurities in the nitrogen-doped polycrystalline silicon layer provide strong passivation performance compared to the phosphorus-doped polycrystalline silicon layer. Furthermore, the nitrogen-doped polycrystalline silicon layer is positioned between two phosphorus-doped polycrystalline silicon layers with different and higher doping concentrations. On the one hand, this reduces the risk of phosphorus atoms penetrating into the silicon substrate, resulting in a higher open-circuit voltage for the cell. On the other hand, it increases the lateral electron transport rate and improves the film-layer contact performance between the nitrogen-doped and phosphorus-doped polycrystalline silicon layers, thereby enabling the cell to have not only a higher open-circuit voltage but also a lower contact resistance.

[0038] Therefore, the aforementioned solar cells have high passivation performance and low contact resistance, thereby significantly improving the photoelectric conversion efficiency of the solar cells. Attached Figure Description

[0039] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0040] Figure 1 This is a schematic diagram of the structure of a solar cell according to some embodiments of this application;

[0041] Figure 2 This is a schematic diagram of a process flow for the fabrication method of a solar cell according to some embodiments of this application;

[0042] Figure 3 This is a schematic diagram of a process flow for the fabrication method of a solar cell according to other embodiments of this application. Detailed Implementation

[0043] To facilitate understanding of this application, a more comprehensive description of the application will be provided below in conjunction with specific embodiments. Preferred embodiments of the application are given in the specific embodiments. However, this application can be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided to provide a more thorough and complete understanding of the disclosure of this application.

[0044] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein in the specification of this application is for the purpose of describing particular embodiments only and is not intended to be limiting of the application. The term "and / or" as used herein includes any and all combinations of one or more of the associated listed items.

[0045] Unless otherwise stated or in case of conflict, the terms or phrases used in this application shall have the following meanings:

[0046] In this application, the terms "upper," "lower," "left," "right," "front," "rear," "top," "bottom," "inner," "outer," "vertical," "horizontal," "lateral," and "longitudinal" indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. These terms are primarily for the purpose of better describing this application and its embodiments, and are not intended to limit the indicated device, element, or component to having a specific orientation, or to be constructed and operated in a specific orientation.

[0047] Furthermore, in addition to indicating location or positional relationship, some of the aforementioned terms may also have other meanings. For example, the term "above" may also be used in some cases to indicate a certain dependency or connection relationship. Those skilled in the art can understand the specific meaning of these terms in this application based on the specific circumstances.

[0048] Furthermore, the terms "installation," "setup," "equipped with," "connection," and "linked" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral structure; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium, or an internal connection between two devices, components, or parts. Those skilled in the art can understand the specific meaning of these terms in this application based on the specific circumstances.

[0049] In this application, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Therefore, a feature defined with "first" and "second" may explicitly or implicitly include at least one of those features.

[0050] In the description of this application, "multiple" means at least two, such as two, three, etc., unless otherwise expressly and specifically limited.

[0051] In this application, "one or more" refers to any one, any two, or any two or more of the listed items. "Several" refers to any two or more.

[0052] Unless otherwise specified, all percentage concentrations mentioned in this application refer to the final concentration. The final concentration refers to the proportion of the added component in the system after the addition of that component.

[0053] In this document, terms such as "further," "even further," "especially," "for example," "as," "example," and "exemplary" are used for descriptive purposes to indicate a connection in the coverage of different technical solutions presented earlier and later. However, they should not be construed as limitations on the preceding technical solution or on the scope of protection of this document. Unless otherwise specified, A (as in B) indicates that B is a non-limiting example of A, and it can be understood that A is not limited to B.

[0054] In this document, "optionally," "optionally," and "optional" mean that something is optional, that is, it is selected from either "present" or "absent." If multiple "options" appear in a technical solution, unless otherwise specified and there are no contradictions or mutual constraints, each "option" is independent. In this application, descriptions such as "optionally contains" and "optionally includes" indicate "contains or does not contain." "Optional component X" indicates whether component X exists or does not exist, or whether component X is contained or not.

[0055] When a numerical range is disclosed in this application, the range is considered continuous and includes the minimum and maximum values ​​of the range, as well as every value between the minimum and maximum values. Furthermore, when the range refers to an integer, it includes every integer between the minimum and maximum values ​​of the range. Additionally, when multiple ranges are provided to describe a feature or characteristic, the ranges may be merged. In other words, unless otherwise specified, all ranges disclosed in this application should be understood to include any and all subranges to which they are included.

[0056] In this application, the technical features described in an open-ended manner include both closed technical solutions consisting of the listed features and open technical solutions that include the listed features.

[0057] The terms "comprising" and "having," and any variations thereof, used in the embodiments of this application, are intended to cover non-exclusive inclusion. For example, a process, method, system, product, or device that includes a series of steps or units is not limited to the steps or units listed, but may optionally include steps or units not listed, or may optionally include other steps or components inherent to such processes, methods, products, or devices.

[0058] In this application, the reference to "embodiment" means that a specific feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment of this application. The appearance of this phrase in various places throughout the specification does not necessarily refer to the same embodiment, nor is it a mutually exclusive, independent, or alternative embodiment. It will be explicitly and implicitly understood by those skilled in the art that the embodiments described in this application can be combined with other embodiments.

[0059] As described in the background section, while phosphorus-doped polycrystalline silicon layers in traditional TOPCon cells offer some passivation performance, there is still significant room for improvement. Furthermore, phosphorus doping at high temperatures can easily cause phosphorus atoms to diffuse into the silicon substrate, leading to a decrease in the cell's open-circuit voltage and consequently severely impacting the cell's photoelectric conversion efficiency.

[0060] Based on this, in a first aspect, a solar cell is provided, comprising: a silicon substrate, wherein a first tunneling oxide layer, a first phosphorus-doped polycrystalline silicon layer, a nitrogen-doped polycrystalline silicon layer and a second phosphorus-doped polycrystalline silicon layer are sequentially stacked on the back side of the silicon substrate.

[0061] The phosphorus doping concentration of the first phosphorus-doped polysilicon layer is different from that of the second phosphorus-doped polysilicon layer, and both are greater than the doping concentration of the nitrogen-doped polysilicon layer.

[0062] The nitrogen doping concentration of the nitrogen-doped polysilicon layer is 3 × 10⁻⁶. 19 pcs / cm 3 ~1×10 20 pcs / cm 3 .

[0063] Undoped (phosphorus or boron) polycrystalline silicon is a material with very strong passivation properties, but its light transmittance is not as strong as that of doped polycrystalline silicon. After introducing a nitrogen-doped polycrystalline silicon layer (without phosphorus doping), the light transmittance of the battery will be slightly reduced. Therefore, in this application, the nitrogen doping concentration is controlled during the fabrication of the nitrogen-doped polycrystalline silicon layer, introducing a very small amount of N atoms. On the one hand, N atom doping widens the band gap of the polycrystalline silicon, resulting in lower parasitic absorption of photogenerated carriers in the nitrogen-doped polycrystalline silicon layer, thus achieving light transmittance comparable to that of phosphorus-doped polycrystalline silicon layers. On the other hand, the nitrogen-doped polycrystalline silicon layer has very low impurity concentration, resulting in strong passivation properties. In other words, by introducing a nitrogen-doped polycrystalline silicon layer with a low doping concentration between two phosphorus-doped polycrystalline silicon layers, the nitrogen-doped polycrystalline silicon layer not only retains the high light transmittance advantage of the phosphorus-doped polycrystalline silicon layer but also possesses extremely strong passivation properties due to its low nitrogen doping concentration.

[0064] Furthermore, the nitrogen-doped polysilicon layer is positioned between two phosphorus-doped polysilicon layers, reducing the risk of phosphorus atoms penetrating into the silicon substrate and resulting in a higher open-circuit voltage for the battery. On the other hand, it increases the lateral electron transport rate and improves the film-layer contact performance between the nitrogen-doped and phosphorus-doped polysilicon layers, thereby enabling the battery to have not only a higher open-circuit voltage but also a lower contact resistance.

[0065] In summary, the solar cell with the above-described structural design not only has high transmittance and passivation performance, but also low contact resistance, which significantly improves the photoelectric conversion efficiency of the solar cell.

[0066] In some embodiments, the thickness of the tunneling oxide layer is 1 nm to 3 nm. For example, the thickness of the tunneling oxide layer may be, but is not limited to, 1 nm, 1.5 nm, 2 nm, 2.5 nm, 3 nm, or any combination of these values.

[0067] In some embodiments, the tunneling oxide layer may be, for example, a silicon oxide layer.

[0068] In some embodiments, the phosphorus doping concentration of the first phosphorus-doped polysilicon layer is greater than that of the second phosphorus-doped polysilicon layer. In some embodiments, the phosphorus doping concentration of the first phosphorus-doped polysilicon layer is 5 × 10⁻⁶. 20 pcs / cm 3 ~4×10 21 pcs / cm 3 The phosphorus doping concentration of the second phosphorus-doped polysilicon layer is 4 × 10⁻⁶. 19 pcs / cm 3 ~1×10 20 pcs / cm 3 For example, the phosphorus doping concentration of the first phosphorus-doped polysilicon layer can be, but is not limited to, 5 × 10⁻⁶. 20 pcs / cm 3 6×10 20 pcs / cm 3 8×10 20 pcs / cm 3 1×10 21 pcs / cm 3 1.5×10 21 pcs / cm 3 2×10 21 pcs / cm 3 2.5×10 21 pcs / cm 3 3×10 21 pcs / cm 3 3.5×10 21 pcs / cm 3 4×10 20 pcs / cm 3 Or any range of any two of these values. The phosphorus doping concentration of the second phosphorus-doped polysilicon layer can be, but is not limited to, 4 × 10⁻⁶. 19 pcs / cm 3 5×10 19 pcs / cm 3 6×10 19 pcs / cm 3 7×10 19 pcs / cm 3 8×10 19 pcs / cm 3 9×10 19 pcs / cm 3 1×10 20 pcs / cm 3 Or a range consisting of any two of these values. The first phosphorus-doped polycrystalline silicon layer has a higher phosphorus doping concentration, which is beneficial for carrier transport and increases the short-circuit current of the TOPCon solar cell.

[0069] In some embodiments, the thickness of the first phosphorus-doped polysilicon layer is 40 nm to 80 nm. For example, the thickness of the first phosphorus-doped polysilicon layer may be, but is not limited to, 40 nm, 45 nm, 50 nm, 55 nm, 60 nm, 65 nm, 70 nm, 75 nm, 80 nm, or any combination of these values.

[0070] In some embodiments, the nitrogen doping concentration of the nitrogen-doped polysilicon layer is 3 × 10⁻⁶. 19 pcs / cm 3 ~1×10 20 pcs / cm 3 Nitrogen-doped polycrystalline silicon (PSS) layers widen the band gap of polycrystalline silicon, resulting in lower parasitic absorption of photogenerated carriers and thus exhibiting similar light transmittance to phosphorus-doped PSS layers. Furthermore, within the aforementioned doping concentration range, the nitrogen-doped PSS layer contains very few impurities, resulting in strong passivation performance. Excessive nitrogen doping concentration, however, leads to a decrease in passivation performance. For example, in a nitrogen-doped PSS layer, the nitrogen doping concentration can be, but is not limited to, 3 × 10⁻⁶. 19 pcs / cm 3 4×10 19 pcs / cm 3 5×10 19 pcs / cm 3 6×10 19 pcs / cm 3 7×10 19 pcs / cm 3 8×10 19 pcs / cm 3 9×10 19 pcs / cm 3 1×10 20 pcs / cm 3 Or the range formed by any two of these values.

[0071] In some embodiments, the thickness of the nitrogen-doped polysilicon layer is 20 nm to 50 nm. For example, the thickness of the nitrogen-doped polysilicon layer can be, but is not limited to, 20 nm, 25 nm, 30 nm, 35 nm, 40 nm, 45 nm, 50 nm, or any combination of these values. If a polysilicon layer is directly disposed between two phosphorus-doped polysilicon layers, although this is beneficial for improving passivation performance, it will cause a decrease in light transmittance. Therefore, in some embodiments of this application, a small amount of nitrogen atoms are doped into the polysilicon layer to widen the material band gap, reduce parasitic absorption, enhance light transmittance, and increase short-circuit current. At the same time, due to the very low doping concentration and few impurities, it has a strong passivation performance compared to the phosphorus-doped polysilicon layer.

[0072] In some embodiments, the thickness of the second phosphorus-doped polysilicon layer is 10 nm to 30 nm. For example, the thickness of the second phosphorus-doped polysilicon layer may be, but is not limited to, 10 nm, 12 nm, 15 nm, 18 nm, 20 nm, 22 nm, 25 nm, 28 nm, 30 nm, or any combination of these values.

[0073] In some embodiments, the solar cell further includes a back passivation layer and a back electrode disposed on the side of the second phosphorus-doped polycrystalline silicon layer away from the silicon substrate.

[0074] For example, the back passivation layer can be, but is not limited to, any one or more combinations of silicon nitride, silicon oxynitride, silicon oxide, and aluminum oxide layers, as long as it can produce a good passivation effect on the silicon substrate and help improve the conversion efficiency of the battery. For example, the back passivation layer is a silicon nitride layer or a stack of silicon nitride, silicon oxide, and silicon oxynitride layers. In this application, the specific type of back electrode is not particularly limited; for example, the back electrode can be a silver electrode, an aluminum electrode, or a silver-aluminum electrode.

[0075] In some embodiments, the silicon substrate is an N-type silicon substrate. Boron doping on the front side forms a PN junction, and phosphorus doping on the back side forms an n-n+ high-low junction. The back side design, as described in some embodiments of this application, enhances back-side electron transport and blocks holes.

[0076] In some embodiments, the thickness of the silicon substrate is 80μm to 200μm, whichever is sufficient to meet the purpose of this application and is not specifically limited thereto.

[0077] In some embodiments, a boron diffusion layer is provided on the front side of the silicon substrate. Specifically, the boron diffusion layer can be formed by performing a boron diffusion process on the front side of the silicon substrate.

[0078] Specifically, in the boron diffusion step, BCl3 is used to diffuse at 900℃~1050℃ to form a PN junction.

[0079] In some embodiments, the silicon substrate may be a pre-treated silicon substrate. Taking an N-type silicon wafer as an example, the pre-treatment process for the silicon substrate includes texturing, front boron diffusion, and back alkaline polishing.

[0080] Specifically, texturing is performed using a sodium hydroxide solution. The sodium hydroxide solution has a mass percentage concentration of 1% to 3%. After texturing, a step of cleaning the silicon substrate is included. For example, the silicon substrate is cleaned using a mixture of hydrogen peroxide and NaOH. In the mixture, the mass percentage concentration of sodium hydroxide is 0.5% to 1%, and the mass percentage concentration of hydrogen peroxide is 2% to 3%.

[0081] Specifically, in the boron diffusion step, BCl3 is used to diffuse at 900℃~1050℃ to form a PN junction.

[0082] Specifically, in the back-side alkaline polishing step, a chain-type HF equipment is used to remove the borosilicate glass (BSG) that has been boron-wound onto the back side of the silicon substrate, and then a tank-type wet process equipment is used to remove the PN junction on the back side and edges of the silicon substrate.

[0083] In some embodiments, a front passivation layer and a front electrode are also provided on the front side of the silicon substrate.

[0084] In this application, the specific type of the front passivation layer is not particularly limited. For example, the front passivation layer may be any one or more of silicon nitride, silicon oxynitride, silicon oxide, and aluminum oxide layers, as long as it can produce a good passivation effect on the silicon substrate and help improve the conversion efficiency of the battery.

[0085] In this application, the specific type of the front electrode is not particularly limited. For example, the front electrode is a silver electrode, an aluminum electrode, or a silver-aluminum electrode.

[0086] In some embodiments, an antireflection layer is further provided between the front passivation layer and the front electrode. For example, the antireflection layer may be, but is not limited to, a silicon nitride layer, a silicon oxynitride layer, a silicon oxide layer, etc.

[0087] In one example, the passivation layer on the front is an aluminum oxide layer, and the antireflection layer is a silicon nitride layer. The silicon nitride layer serves not only to reduce reflection but also to passivate the surface.

[0088] This application does not impose any particular limitation on the thickness of each functional layer, such as the passivation layer and the antireflection layer, as long as the purpose of this application can be achieved. For example, in one embodiment, the thickness of the front passivation layer, such as the aluminum oxide layer, is 3nm to 7nm, the thickness of the antireflection layer, such as the silicon nitride layer, is 80nm to 100nm, and the thickness of the back passivation layer, such as the silicon nitride layer, is 80nm to 100nm.

[0089] Please see Figure 1 In some embodiments of this application, the solar cell 100 includes a silicon substrate 101. A tunneling oxide layer 102, a first phosphorus-doped polycrystalline silicon layer 103, a nitrogen-doped polycrystalline silicon layer 104, a second phosphorus-doped polycrystalline silicon layer 105, a back passivation layer 106, and a back electrode 107 are sequentially stacked on the back side of the silicon substrate 101. A boron diffusion layer 108, a front passivation layer 109, an anti-reflection layer 110, and a front electrode 111 are sequentially stacked on the front side of the silicon substrate 101.

[0090] The back electrode 107 forms an ohmic contact with the first phosphorus-doped polysilicon layer 103, and the front electrode 111 forms an ohmic contact with the boron diffusion layer 108.

[0091] The solar cells in some embodiments of this application have a structure that differs from the traditional TOPCon cell structure. Traditional TOPCon cells typically consist of three phosphorus-doped polycrystalline silicon layers. While phosphorus-doped polycrystalline silicon layers have high light transmittance, their passivation performance is poor. In some embodiments of this application, instead of using a fully phosphorus-doped polycrystalline silicon layer on the back side of the silicon substrate, a nitrogen-doped polycrystalline silicon layer partially replaces the phosphorus-doped polycrystalline silicon layer. This cell not only possesses the high light absorption of traditional TOPCon solar cells but also exhibits extremely strong passivation performance. Furthermore, because nitrogen atoms are introduced during the polycrystalline silicon fabrication process, the band gap of the material widens, parasitic absorption in the film layer decreases, and therefore the short-circuit current of the cell is also increased.

[0092] Specifically, the solar cells of some embodiments of this application have at least the following advantages:

[0093] (1) In some embodiments of this application, the solar cell replaces the second doped layer of the conventional TOPCon cell with a nitrogen-doped polycrystalline silicon layer, which significantly improves the open-circuit voltage of the cell.

[0094] (2) In some embodiments of the solar cell of this application, N atoms are introduced into the polycrystalline silicon layer to widen the band gap of the material, so that the short-circuit current of the cell will not be lost due to the introduction of the nitrogen-doped polycrystalline silicon layer. By adjusting the doping ratio of N atoms, the short-circuit current of the cell can be improved to a certain extent.

[0095] (3) In some embodiments of the solar cell of this application, the first phosphorus-doped polysilicon layer, which is in direct contact with the nitrogen-doped polysilicon layer and the phosphorus-doped layer, is doped with a high concentration to enhance the film layer matching between the nitrogen-doped polysilicon layer and the first phosphorus-doped polysilicon layer and improve the film layer contact structure, thereby giving the TOPCon solar cell a higher short-circuit current and fill factor.

[0096] (4) In some embodiments of the present application, the nitrogen-doped polycrystalline silicon layer introduced in the solar cell can also reduce the risk of phosphorus atom doping diffusion through to the silicon substrate.

[0097] In summary, the solar cells of some embodiments of this application introduce a nitrogen-doped polycrystalline silicon layer between two phosphorus-doped polycrystalline silicon layers, which brings a high open-circuit voltage to the cell. Furthermore, by introducing N and controlling the doping concentration of P atoms, the cell does not suffer electrical losses due to the introduction of the nitrogen-doped polycrystalline silicon layer. On the contrary, the short-circuit current and fill factor are improved to a certain extent, thereby significantly improving the photoelectric conversion efficiency of the solar cell.

[0098] The second aspect of this application provides a method for fabricating a solar cell, comprising the following steps:

[0099] A tunneling oxide layer, a first phosphorus-doped polycrystalline silicon layer, a nitrogen-doped polycrystalline silicon layer, and a second phosphorus-doped polycrystalline silicon layer are formed on the back side of a silicon substrate to fabricate a solar cell.

[0100] The phosphorus doping concentration of the first phosphorus-doped polysilicon layer is different from that of the second phosphorus-doped polysilicon layer, and both are greater than the nitrogen doping concentration of the nitrogen-doped polysilicon layer.

[0101] The nitrogen doping concentration of the nitrogen-doped polysilicon layer is 3 × 10⁻⁶. 19 pcs / cm 3 ~1×10 20 pcs / cm 3 .

[0102] In some embodiments, the tunneling oxide layer is a silicon oxide layer. Specifically, in the preparation step of the tunneling oxide layer, the N2O flow rate is 7000 sccm to 9000 sccm, the deposition temperature is 410°C to 430°C, and the deposition time is 100 s to 120 s. For example, the N2O flow rate can be, but is not limited to, 7000 sccm, 7500 sccm, 8000 sccm, 8500 sccm, 9000 sccm, or any combination of these values. The deposition time can be, but is not limited to, 100 s, 102 s, 105 s, 108 s, 110 s, 115 s, 118 s, 120 s, or any combination of these values.

[0103] In some embodiments, the tunneling oxide layer is prepared using PECVD. In recent years, TOPCon solar cell fabrication processes based on PECVD (Plasma Enhanced Chemical Vapor Deposition) have become widely used. Compared to the traditional LPCVD (Low Pressure Chemical Vapor Deposition) process, PECVD offers advantages such as faster deposition rates, lower deposition temperatures, and lower production costs.

[0104] Furthermore, in the step of preparing the tunneling oxide layer, the plasma pulse duty cycle is 20:(950~1150). For example, the plasma pulse duty cycle can be, but is not limited to, 20:950, 20:1000, 20:1050, 20:1100, 20:1150, or any range of two of these values.

[0105] In some embodiments, the thickness of the tunneling oxide layer is 1 nm to 3 nm. For example, the thickness of the tunneling oxide layer may be, but is not limited to, 1 nm, 1.5 nm, 2 nm, 2.5 nm, 3 nm, or any combination of these values.

[0106] In some embodiments, the process parameters for preparing the tunneling oxide layer include: using PECVD, setting the N2O flow rate to 7000 sccm~9000 sccm, the deposition temperature to 410℃~430℃, the deposition time to 100s~120s, and the plasma pulse duty cycle to 20:(950~1150).

[0107] In some embodiments, the preparation steps of the first phosphorus-doped polysilicon layer, the nitrogen-doped polysilicon layer, and the second phosphorus-doped polysilicon layer include:

[0108] A first phosphorus-doped amorphous silicon layer, a nitrogen-doped amorphous silicon layer, and a second phosphorus-doped amorphous silicon layer are formed in a stacked configuration.

[0109] Annealing is performed on the first phosphorus-doped amorphous silicon layer, the nitrogen-doped amorphous silicon layer, and the second phosphorus-doped amorphous silicon layer to convert the amorphous silicon into polycrystalline silicon, thereby obtaining the first phosphorus-doped polycrystalline silicon layer, the nitrogen-doped polycrystalline silicon layer, and the second phosphorus-doped polycrystalline silicon layer.

[0110] Specifically, the steps of forming the stacked first phosphorus-doped amorphous silicon layer, nitrogen-doped amorphous silicon layer, and second phosphorus-doped amorphous silicon layer include:

[0111] The SiH4 flow rate was set to 2000 sccm~3000 sccm, the phosphorus source flow rate to 800 sccm~1000 sccm, and the H2 flow rate to 6000 sccm~10000 sccm to prepare the first phosphorus-doped amorphous silicon layer.

[0112] A nitrogen-doped amorphous silicon layer was prepared by setting the SiH4 flow rate to 2000 sccm~3000 sccm, the nitrogen source flow rate to 10 sccm~50 sccm, and the H2 flow rate to 6000 sccm~10000 sccm.

[0113] A second phosphorus-doped amorphous silicon layer was prepared by setting the SiH4 flow rate to 2000 sccm~3000 sccm, the phosphorus source flow rate to 300 sccm~400 sccm, and the H2 flow rate to 6000 sccm~10000 sccm.

[0114] In some embodiments, the phosphorus source includes phosphine, and the nitrogen source includes one or more of ammonia and nitrogen. In a specific example, the phosphorus source includes phosphine, and the nitrogen source includes ammonia.

[0115] In some embodiments, a first phosphorus-doped amorphous silicon layer, a nitrogen-doped amorphous silicon layer, and a second phosphorus-doped amorphous silicon layer are formed by plasma-enhanced chemical vapor deposition.

[0116] Optionally, in the steps of forming the first phosphorus-doped amorphous silicon layer, the nitrogen-doped amorphous silicon layer, and the second phosphorus-doped amorphous silicon layer, the plasma pulse duty cycle is independently 30:(350~600).

[0117] In some embodiments, the deposition temperature for each of the steps of forming the first phosphorus-doped amorphous silicon layer, the nitrogen-doped amorphous silicon layer, and the second phosphorus-doped amorphous silicon layer is independently between 410°C and 430°C. For example, the deposition temperature may be, but is not limited to, 410°C, 412°C, 415°C, 418°C, 420°C, 422°C, 425°C, 428°C, 430°C, or a range of any two of these values.

[0118] The preparation processes of the first phosphorus-doped amorphous silicon layer, the nitrogen-doped amorphous silicon layer, and the second phosphorus-doped amorphous silicon layer are described in detail below.

[0119] In some embodiments, the process parameters of the first phosphorus-doped amorphous silicon layer include: a SiH4 flow rate of 2000 sccm to 3000 sccm, a phosphorus source (e.g., PH3) flow rate of 800 sccm to 1000 sccm, and an H2 flow rate of 6000 sccm to 10000 sccm. For example, in the preparation step of the first phosphorus-doped amorphous silicon layer, the flow rate of SiH4 can be, but is not limited to, 2000 sccm, 2200 sccm, 2400 sccm, 2600 sccm, 2800 sccm, 3000 sccm, or any combination of these values; the flow rate of the phosphorus source can be, but is not limited to, 800 sccm, 850 sccm, 900 sccm, 950 sccm, 1000 sccm, or any combination of these values; and the flow rate of H2 can be, but is not limited to, 6000 sccm, 7000 sccm, 8000 sccm, 9000 sccm, 10000 sccm, or any combination of these values.

[0120] In some embodiments, the first phosphorus-doped amorphous silicon layer is formed using plasma-enhanced chemical vapor deposition. Further, the plasma pulse duty cycle is 30:(350~600). For example, the plasma pulse duty cycle may be, but is not limited to, 30:350, 30:380, 30:400, 30:430, 30:450, 30:480, 30:500, 30:530, 30:550, 30:580, 30:600, or a range of any two of these values.

[0121] In some embodiments, the thickness of the first phosphorus-doped amorphous silicon layer is 40 nm to 80 nm. For example, the thickness of the first phosphorus-doped amorphous silicon layer may be, but is not limited to, 40 nm, 45 nm, 50 nm, 55 nm, 60 nm, 65 nm, 70 nm, 75 nm, 80 nm, or any combination of these values.

[0122] In some embodiments, the deposition temperature in the preparation step of the first phosphorus-doped amorphous silicon layer is 410°C to 430°C.

[0123] In some embodiments, the process parameters for preparing the first phosphorus-doped amorphous silicon layer include: using PECVD, with a SiH4 flow rate of 2000 sccm to 3000 sccm, a phosphorus source flow rate of 800 sccm to 1000 sccm, an H2 flow rate of 6000 sccm to 10000 sccm, a plasma pulse duty cycle of 30:(350 to 600), and a deposition temperature of 410°C to 430°C.

[0124] In some embodiments, the process parameters for preparing the nitrogen-doped amorphous silicon layer include: a SiH4 flow rate of 2000 sccm to 3000 sccm, a nitrogen source (e.g., NH3, N2) flow rate of 10 sccm to 50 sccm, and an H2 flow rate of 6000 sccm to 10000 sccm. For example, in the step of preparing a nitrogen-doped amorphous silicon layer, the flow rate of SiH4 can be, but is not limited to, 2000 sccm, 2200 sccm, 2400 sccm, 2600 sccm, 2800 sccm, 3000 sccm, or any combination of these values; the flow rate of the nitrogen source can be, but is not limited to, 10 sccm, 20 sccm, 30 sccm, 40 sccm, 50 sccm, or any combination of these values; and the flow rate of H2 can be, but is not limited to, 6000 sccm, 7000 sccm, 8000 sccm, 9000 sccm, 9500 sccm, 10000 sccm, or any combination of these values.

[0125] In some embodiments, a nitrogen-doped amorphous silicon layer is formed using plasma-enhanced chemical vapor deposition. Further, in the fabrication step of the nitrogen-doped amorphous silicon layer, the plasma pulse duty cycle is 30:(350~600). For example, the plasma pulse duty cycle can be, but is not limited to, 30:350, 30:380, 30:400, 30:430, 30:450, 30:480, 30:500, 30:530, 30:550, 30:580, 30:600, or a range of any two of these values.

[0126] In some embodiments, the thickness of the nitrogen-doped amorphous silicon layer is 20 nm to 50 nm. For example, the thickness of the nitrogen-doped amorphous silicon layer may be, but is not limited to, 20 nm, 25 nm, 30 nm, 35 nm, 40 nm, 45 nm, 50 nm, or any combination of these values.

[0127] In some embodiments, the deposition temperature in the nitrogen-doped amorphous silicon layer preparation step is 410°C to 430°C.

[0128] In some embodiments, the process parameters for preparing the nitrogen-doped amorphous silicon layer include: using PECVD, a SiH4 flow rate of 2000 sccm to 3000 sccm, a nitrogen source flow rate of 10 sccm to 50 sccm, an H2 flow rate of 6000 sccm to 10000 sccm, a plasma pulse duty cycle of 30:(350 to 600), and a deposition temperature of 410°C to 430°C.

[0129] In some embodiments, the process parameters for preparing the second phosphorus-doped amorphous silicon layer include: a SiH4 flow rate of 2000 sccm to 3000 sccm, a phosphorus source (e.g., PH3) flow rate of 300 sccm to 400 sccm, and an H2 flow rate of 6000 sccm to 10000 sccm. For example, the SiH4 flow rate can be, but is not limited to, 2000 sccm, 2200 sccm, 2400 sccm, 2600 sccm, 2800 sccm, 3000 sccm, or any combination of these values. The phosphorus source flow rate can be, but is not limited to, 300 sccm, 325 sccm, 350 sccm, 375 sccm, 400 sccm, or any combination of these values. The flow rate of H2 can be, but is not limited to, 6000 sccm, 7000 sccm, 8000 sccm, 9000 sccm, 9500 sccm, 10000 sccm, or any combination of these values.

[0130] In some embodiments, a second phosphorus-doped amorphous silicon layer is formed using plasma-enhanced chemical vapor deposition. Further, in the fabrication step of the second phosphorus-doped amorphous silicon layer, the plasma pulse duty cycle is 30:(350~600). For example, the plasma pulse duty cycle can be, but is not limited to, 30:350, 30:380, 30:400, 30:430, 30:450, 30:480, 30:500, 30:530, 30:550, 30:580, 30:600, or a range of any two of these values.

[0131] In some embodiments, the thickness of the second phosphorus-doped amorphous silicon layer is 10 nm to 30 nm. For example, the thickness of the second phosphorus-doped amorphous silicon layer may be, but is not limited to, 10 nm, 12 nm, 15 nm, 18 nm, 20 nm, 22 nm, 25 nm, 28 nm, 30 nm, or any combination of these values.

[0132] In some embodiments, the deposition temperature in the preparation step of the second phosphorus-doped amorphous silicon layer is 410°C to 430°C.

[0133] In some embodiments, the process parameters for preparing the second phosphorus-doped amorphous silicon layer include: using PECVD, with a SiH4 flow rate of 2000 sccm to 3000 sccm, a phosphorus source flow rate of 300 sccm to 400 sccm, an H2 flow rate of 6000 sccm to 10000 sccm, a plasma pulse duty cycle of 30:(350 to 600), and a deposition temperature of 410°C to 430°C.

[0134] In some embodiments, the annealing temperature is 910°C to 940°C, and the annealing time is 20 min to 50 min. For example, the annealing temperature can be, but is not limited to, 910°C, 915°C, 920°C, 925°C, 930°C, 935°C, 940°C, or any combination thereof. The annealing time can be, but is not limited to, 20 min, 25 min, 30 min, 35 min, 40 min, 45 min, 50 min, or any combination thereof. By annealing the above-described doped layers, the amorphous silicon doped layer is converted into a polycrystalline silicon doped layer. Simultaneously, the doped P atoms are activated, and a back-side high-low junction is formed, enhancing the field passivation effect.

[0135] Furthermore, the annealing process is carried out in a nitrogen (N2) or oxygen (O2) environment.

[0136] In some embodiments, prior to annealing, a mask layer is formed on the second phosphorus-doped amorphous silicon layer. Specifically, the mask layer is prepared using PECVD. The mask layer helps protect the second phosphorus-doped amorphous silicon layer.

[0137] In some embodiments, the process gas used in the mask layer fabrication process includes a mixture of SiH4 and N2O. Specifically, during mask layer fabrication, the SiH4 flow rate is 1500 sccm to 1800 sccm, and the N2O flow rate is 6000 sccm to 8000 sccm. For example, the SiH4 flow rate can be, but is not limited to, 1500 sccm, 1550 sccm, 1600 sccm, 1650 sccm, 1700 sccm, 1750 sccm, 1800 sccm, or any combination of these values. The N2O flow rate can be, but is not limited to, 6000 sccm, 6500 sccm, 700 sccm, 7500 sccm, 8000 sccm, or any combination of these values.

[0138] Furthermore, during the fabrication of the mask layer, the plasma pulse duty cycle is 30:(500~600). For example, the plasma pulse duty cycle can be, but is not limited to, 30:500, 30:530, 30:550, 30:560, 30:580, 30:600, or any range of two of these values.

[0139] In some embodiments, the thickness of the mask layer is 15 nm to 30 nm. For example, the thickness of the mask layer may be, but is not limited to, 15 nm, 18 nm, 20 nm, 22 nm, 25 nm, 28 nm, 30 nm, or any combination of these values.

[0140] In some embodiments, after the annealing step, a de-coating cleaning step is further included. The de-coating cleaning removes the tunneling oxide layer, the doped layer, and the mask layer deposited around the surface.

[0141] This application can employ existing decoupling processes to remove the various coating layers, as long as they achieve the objectives of this application; no particular limitation is imposed. For example, a mixture of HNO3 and HF can be used for decoupling cleaning at room temperature, or a NaOH solution can be used for decoupling cleaning at room temperature; alternatively, an RCA cleaning solution can be used for decoupling cleaning. In one example, the RCA cleaning time is 80s~100s.

[0142] In some embodiments, the tunneling oxide layer, the first phosphorus-doped amorphous silicon layer, the nitrogen-doped amorphous silicon layer, the second phosphorus-doped amorphous silicon layer, and the mask layer are all prepared by PECVD.

[0143] In some embodiments, the method for fabricating a solar cell further includes forming a back passivation layer and a back electrode on the surface of a second phosphorus-doped polycrystalline silicon layer.

[0144] In some embodiments, the method for fabricating a solar cell further includes forming a front passivation layer and a front electrode on the front side of a silicon substrate. In one example, an anti-reflection layer is also provided between the front passivation layer and the front electrode.

[0145] The specific materials and thicknesses of the back passivation layer, front passivation layer, antireflection layer, back electrode, and front electrode are as described above and will not be repeated here.

[0146] It is understood that the fabrication steps for the back passivation layer, front passivation layer, back electrode, and front electrode can be those commonly used in the field and are not particularly limited here. For example, the front passivation layer is an aluminum oxide layer, formed using atomic layer deposition (ALD). The back passivation layer is a silicon nitride layer, formed using PECVD. The antireflection layer is a silicon nitride layer, formed using PECVD.

[0147] In one example, the back electrode and front electrode are formed by screen printing grid line paste and sintering. For example, this application does not have any particular limitations on the grid line paste, as long as it can achieve the purpose of this application. For example, the grid line paste can be silver paste or silver-aluminum paste. The sintering temperature and time are not particularly limited; for example, the sintering temperature is 850°C and the time is 120 seconds.

[0148] In some embodiments, a light injection process is included after the sintering step. In this application, conventional light injection processes can be used and are not particularly limited; for example, the light injection temperature is 830°C and the time is 100 seconds.

[0149] In one embodiment, please refer to Figure 2 The fabrication method of solar cells includes the following steps:

[0150] Step S210: The silicon substrate is texturized, boron diffused on the front side, and alkaline polished on the back side to form a boron diffusion layer on the front side of the silicon substrate.

[0151] Step S220: Form a tunneling oxide layer on the back side of the silicon substrate.

[0152] Step S230: A first phosphorus-doped amorphous silicon layer, a nitrogen-doped amorphous silicon layer, a second phosphorus-doped amorphous silicon layer, and a mask layer are sequentially formed on the surface of the tunneling oxide layer.

[0153] Step S240: Anneal the silicon substrate to convert amorphous silicon into polycrystalline silicon, and obtain a first phosphorus-doped polycrystalline silicon layer, a nitrogen-doped polycrystalline silicon layer and a second phosphorus-doped polycrystalline silicon layer.

[0154] Step S250: Perform de-coating cleaning on the silicon substrate.

[0155] Step S260: A front passivation layer and an anti-reflection layer are formed on the front side of the silicon substrate, and a back passivation layer is formed on the back side of the silicon substrate.

[0156] Step S270: A front electrode is formed on the front side of the silicon substrate, and a back electrode is formed on the back side of the silicon substrate to fabricate a solar cell.

[0157] In a specific example, please refer to Figure 3 The fabrication method of solar cells includes the following steps:

[0158] Step S310: The silicon substrate is texturized, front boron diffusion is performed, and back alkaline polishing is performed to form a boron diffusion layer on the front side of the silicon substrate.

[0159] Step S320: Using PECVD, the N2O flow rate is set to 7000 sccm~9000 sccm, the deposition temperature is set to 410℃~430℃, the plasma pulse duty cycle is set to 20:(950~1150), and the deposition time is set to 100s~120s to form a tunneling oxide layer on the back side of the silicon substrate.

[0160] Step S330: Set the SiH4 flow rate to 2000 sccm~3000 sccm, the PH3 flow rate to 800 sccm~1000 sccm, the H2 flow rate to 6000 sccm~10000 sccm, and the plasma pulse duty cycle to 30:(350~600) to form a first phosphorus-doped amorphous silicon layer on the surface of the tunneling oxide layer.

[0161] Step S340: Set the SiH4 flow rate to 2000 sccm~3000 sccm, the NH3 flow rate to 10 sccm~50 sccm, the H2 flow rate to 6000 sccm~10000 sccm, and the plasma pulse duty cycle to 30:(350~600) to form a nitrogen-doped amorphous silicon layer on the surface of the first phosphorus-doped amorphous silicon layer.

[0162] Step S350: Set the SiH4 flow rate to 2000 sccm~3000 sccm, the PH3 flow rate to 300 sccm~400 sccm, the H2 flow rate to 6000 sccm~10000 sccm, and the plasma pulse duty cycle to 30:(350~600) to form a second phosphorus-doped amorphous silicon layer on the surface of the nitrogen-doped amorphous silicon layer.

[0163] Step S360: Set the SiH4 flow rate to 1500 sccm~1800 sccm, the N2O flow rate to 6000 sccm~8000 sccm, and the plasma pulse duty cycle to 30:(500~600) to form a mask layer on the surface of the second phosphorus-doped amorphous silicon layer.

[0164] Step S370: Under a nitrogen or oxygen atmosphere, set the annealing temperature to 910℃~940℃ and anneal the silicon substrate for 20min~50min to convert amorphous silicon into polycrystalline silicon, thereby obtaining a first phosphorus-doped polycrystalline silicon layer, a nitrogen-doped polycrystalline silicon layer, and a second phosphorus-doped polycrystalline silicon layer.

[0165] Step S380: Perform a de-coating cleaning on the silicon substrate to remove the tunneling oxide layer, the first phosphorus-doped polysilicon layer, the nitrogen-doped polysilicon layer, the second phosphorus-doped polysilicon layer, and the mask layer coated on the front side.

[0166] Step S390: A front passivation layer and an anti-reflection layer are formed on the front side of the silicon substrate, and a back passivation layer is formed on the back side of the silicon substrate.

[0167] Step S400: A front electrode is formed on the front side of the silicon substrate, and a back electrode is formed on the back side of the silicon substrate to prepare a solar cell.

[0168] It should be understood that, Figure 2 and Figure 3 These are schematic flowcharts illustrating a method for fabricating a solar cell according to one embodiment of this application. Figure 2 and Figure 3 The steps in the flowchart shown are displayed sequentially according to the arrows. However, these steps are not necessarily performed in the order indicated by the arrows. Unless otherwise specified in this document, there is no strict order requirement for the execution of these steps; they can be executed in other orders. Figure 2 and Figure 3 At least some of the steps in the process may include multiple sub-steps or multiple stages. These sub-steps or stages are not necessarily completed at the same time, but can be executed at different times. Their execution order is not necessarily sequential, but can be executed in turn or alternately with at least some of other steps or other sub-steps or stages.

[0169] The methods for fabricating solar cells according to some embodiments of this application have at least the following advantages:

[0170] (1) The method for preparing solar cells provided in some embodiments of this application prepares a first phosphorus-doped polycrystalline silicon layer, a nitrogen-doped polycrystalline silicon layer and a second phosphorus-doped polycrystalline silicon layer sequentially on the tunneling oxide layer during PECVD deposition of polycrystalline silicon. This method retains the doped polycrystalline silicon structure of traditional TOPCon cells and introduces a nitrogen-doped polycrystalline silicon layer. This cell not only has the high light absorption rate of traditional TOPCon solar cells, but also has extremely strong passivation performance.

[0171] (2) By introducing nitrogen atoms into the polycrystalline silicon layer, the short-circuit current loss of the polycrystalline silicon layer compared with the phosphorus-doped polycrystalline silicon layer is compensated. This makes the introduction of nitrogen-doped polycrystalline silicon layer significantly improve the open-circuit voltage of the battery without reducing the short-circuit current density due to the introduction of nitrogen-doped polycrystalline silicon layer. Moreover, since nitrogen atoms are introduced during the preparation of polycrystalline silicon, the band gap of the material is widened and the parasitic absorption of the film layer is reduced, so the short-circuit current of the battery will also be increased.

[0172] (3) High-concentration phosphorus doping is performed on the first phosphorus-doped polysilicon layer adjacent to the nitrogen-doped polysilicon layer to increase the concentration of charge carriers, thereby increasing the transverse transport rate of electrons and making the nitrogen-doped polysilicon layer and the first phosphorus-doped polysilicon layer more matched, improving the film contact between the nitrogen-doped polysilicon layer and the first phosphorus-doped polysilicon layer, thereby improving the fill factor of the battery and reducing the contact resistance of the battery.

[0173] (4) Designing the nitrogen-doped polysilicon layer between the first phosphorus-doped polysilicon layer and the second phosphorus-doped polysilicon layer can also reduce the risk of phosphorus doping spreading to the silicon substrate and improve the open circuit voltage of the battery.

[0174] In summary, the solar cell fabrication methods of some embodiments of this application significantly improve the open-circuit voltage, short-circuit current, and fill factor of the cell, resulting in extremely high open-circuit voltage, large short-circuit current density, and fill factor, thereby significantly improving the photoelectric conversion efficiency of the solar cell.

[0175] Thirdly, this application provides a photovoltaic module, including a solar cell and an encapsulation structure. The solar cell is prepared as described in the first aspect or by the preparation method of the second aspect above, and the encapsulation structure is used to encapsulate the solar cell. The photovoltaic module is used to convert received light energy into electrical energy and transmit it to an external load.

[0176] Specifically, the encapsulation structure includes an encapsulating film and a cover plate.

[0177] In one embodiment, the photovoltaic module includes: at least one cell string, an encapsulating film, and a cover plate. The cell string is composed of multiple connected solar cells; the encapsulating film covers the surface of the cell string; and the cover plate covers the surface of the encapsulating film facing away from the cell string.

[0178] To make the objectives and advantages of this application clearer, the solar cell and its effects of this application are further described in detail below with reference to specific embodiments. It should be understood that the specific embodiments described herein are only for explaining this application and should not be used to limit this application. Unless otherwise specified, the following embodiments do not include components other than unavoidable impurities. Unless otherwise specified, the drugs and instruments used in the embodiments are conventional choices in the art. Experimental methods in the embodiments that do not specify specific conditions are implemented according to conventional conditions, such as those described in literature, books, or methods recommended by the manufacturer.

[0179] Example 1

[0180] This embodiment provides a solar cell, and the fabrication steps are as follows:

[0181] (1) Pretreatment:

[0182] a. Texturing: An N-type silicon wafer with a thickness of 110μm is used as the silicon substrate. A 1% NaOH solution is used for texturing. After texturing, the silicon substrate is cleaned with a mixture of hydrogen peroxide and NaOH solution. The mass percentage concentration of NaOH in the mixture is 0.5% and the mass percentage concentration of hydrogen peroxide is 2%.

[0183] b. Boron diffusion: The cleaned silicon substrate is placed in a boron diffusion furnace, and BCl3 is introduced at 1000°C to carry out boron diffusion to form a PN junction.

[0184] c. Alkali polishing: A chain-type HF machine (model SC-LSS9600CS) is used to remove the BSG caused by boron winding on the back side of the silicon substrate, and then a tank-type wet process machine (model SC-CSZJ9600E-20F) is used to remove the PN junction on the back side and edge of the silicon substrate.

[0185] (2) Preparation of tunneling oxide layer

[0186] The furnace tube of the PECVD equipment (model PD-520MAX) was evacuated and leak-tested to a vacuum level of 0.1 Pa. The pretreated silicon substrate was placed in the PECVD equipment, heated to 430°C, and then N2O was introduced for ionization for 2 minutes to obtain a SiO2 tunneling oxide layer. The N2O flow rate was 8000 sccm, the plasma pulse duty cycle was 20:1050, and the tunneling oxide layer thickness was 1.5 nm.

[0187] (3) Preparation of the first phosphorus-doped amorphous silicon layer

[0188] A mixture of SiH4, PH3, and H2 was introduced into a PECVD device and ionized for 120 s to obtain a first phosphorus-doped amorphous silicon layer. The flow rates of SiH4, PH3, and H2 were 2600 sccm, 900 sccm, and 8000 sccm, respectively, with a plasma pulse duty cycle of 20:500. The thickness of the first phosphorus-doped amorphous silicon layer was 60 nm, and the phosphorus doping concentration was 2 × 10⁻⁶. 21 pcs / cm 3 .

[0189] (4) Preparation of nitrogen-doped amorphous silicon layer

[0190] The process gases used for depositing the nitrogen-doped amorphous silicon layer were SiH4, NH3, and H2. The flow rate of SiH4 was 2800 sccm, the flow rate of NH3 was 30 sccm, and the flow rate of H2 was 9000 sccm. The plasma pulse duty cycle was 30:500. The thickness of the nitrogen-doped amorphous silicon layer was 40 nm, and the nitrogen doping concentration was 5 × 10⁻⁶. 19 pcs / cm 3 .

[0191] (5) Preparation of the second phosphorus-doped amorphous silicon layer

[0192] A mixture of SiH4, PH3, and H2 was introduced into a PECVD device and ionized for 300 s to obtain a second phosphorus-doped amorphous silicon layer. The flow rates of SiH4, PH3, and H2 were 2400 sccm, 350 sccm, and 7000 sccm, respectively, with a plasma pulse duty cycle of 20:500. The thickness of the second phosphorus-doped amorphous silicon layer was 20 nm, and the phosphorus doping concentration was 8 × 10⁻⁶. 19 pcs / cm 3 .

[0193] (6) Preparation of mask layer

[0194] A mixture of SiH4 and N2O was introduced into the PECVD equipment and ionized for 50 seconds to obtain a mask layer. The flow rate of SiH4 was 1700 sccm, the flow rate of N2O was 7000 sccm, the plasma pulse duty cycle was 30:580, and the thickness of the mask layer was 20 nm.

[0195] (7) Annealing treatment

[0196] Annealing at 920°C for 30 minutes under N2 atmosphere transforms amorphous silicon into polycrystalline silicon, yielding a first phosphorus-doped polycrystalline silicon layer, a nitrogen-doped polycrystalline silicon layer, and a second phosphorus-doped polycrystalline silicon layer.

[0197] (8) De-plating treatment

[0198] At room temperature, a 5% (w / w) NaOH solution was used to clean the light-receiving surface of the annealed silicon substrate to remove the tunneling oxide layer, the first phosphorus-doped polycrystalline silicon layer, the nitrogen-doped polycrystalline silicon layer, the second phosphorus-doped polycrystalline silicon layer, and the mask layer, thus obtaining the initial structure of the solar cell.

[0199] (9) Coating treatment

[0200] An aluminum oxide layer was first deposited as a front passivation layer on the light-receiving side of the initial solar cell structure using an ALD (model KF6000) instrument, followed by a silicon oxynitride layer as an antireflection layer using a PECVD (model PD-520MAX) instrument. A silicon oxynitride layer was then deposited as a back passivation layer on the back side of the initial solar cell structure. The front passivation layer was 5 nm thick, the antireflection layer was 5 nm thick, and the back passivation layer was 80 nm thick.

[0201] (10) Screen printing

[0202] The solar cell of this embodiment was obtained by screen printing, sintering to prepare electrodes, and performing light injection on the light-receiving and back-light-receiving surfaces of the initial structure of the coated solar cell. The electrode printing paste used was Ag / Al paste, the sintering temperature was 850℃, the sintering time was 120s, the light injection temperature was 830℃, and the light injection time was 100s.

[0203] Example 2

[0204] This embodiment provides a solar cell, with fabrication steps similar to those in Embodiment 1. The difference lies in the following: in the fabrication of the nitrogen-doped amorphous silicon layer, the flow rates of SiH4 and H2 are adjusted to 2600 sccm and 8500 sccm, respectively; the thickness of the nitrogen-doped amorphous silicon layer is 32 nm; and the nitrogen doping concentration of the nitrogen-doped amorphous silicon layer is 3.5 × 10⁻⁶. 19 pcs / cm 3 The remaining steps are the same as in Example 1, and will not be repeated here.

[0205] Example 3

[0206] This embodiment provides a solar cell, with fabrication steps similar to those in Embodiment 1. The difference lies in that, in the fabrication of the nitrogen-doped amorphous silicon layer, the flow rates of SiH4 and H2 are adjusted to 3000 sccm and 9500 sccm, respectively; the thickness of the nitrogen-doped amorphous silicon layer is 44 nm; and the nitrogen doping concentration of the nitrogen-doped amorphous silicon layer is 6.5 × 10⁻⁶. 19 pcs / cm 3 The remaining steps are the same as in Example 1, and will not be repeated here.

[0207] Example 4

[0208] This embodiment provides a solar cell, and the preparation steps are similar to those in Embodiment 1. The difference is that in the preparation of the nitrogen-doped amorphous silicon layer, the NH3 flow rate is adjusted to 20 sccm, and the nitrogen doping concentration of the nitrogen-doped amorphous silicon layer is 3.3 × 10⁻⁶. 19 pcs / cm 3 The remaining steps are the same as in Example 1, and will not be repeated here.

[0209] Example 5

[0210] This embodiment provides a solar cell, and the preparation steps are similar to those in Embodiment 1. The difference is that in the preparation of the nitrogen-doped amorphous silicon layer, the NH3 flow rate is adjusted to 50 sccm, and the nitrogen doping concentration of the nitrogen-doped amorphous silicon layer is 8.0 × 10⁻⁶. 19 pcs / cm 3 The remaining steps are the same as in Example 1, and will not be repeated here.

[0211] Example 6

[0212] This embodiment provides a solar cell, and the preparation steps are similar to those in Embodiment 1. The difference is that in the preparation of the first phosphorus-doped amorphous silicon layer, the pH 3 flow rate is adjusted to 850 sccm, and the phosphorus doping concentration of the first phosphorus-doped amorphous silicon layer is 1.5 × 10⁻⁶. 21 pcs / cm 3 The remaining steps are the same as in Example 1, and will not be repeated here.

[0213] Example 7

[0214] This embodiment provides a solar cell, and the preparation steps are similar to those in Embodiment 1. The difference is that in the preparation of the first phosphorus-doped amorphous silicon layer, the pH 3 flow rate is adjusted to 950 sccm, and the phosphorus doping concentration of the first phosphorus-doped amorphous silicon layer is 2.6 × 10⁻⁶. 21 pcs / cm 3 The remaining steps are the same as in Example 1, and will not be repeated here.

[0215] Example 8

[0216] This embodiment provides a solar cell, and the preparation steps are similar to those in Embodiment 1. The difference is that in the preparation of the first phosphorus-doped amorphous silicon layer, the pH 3 flow rate is adjusted to 100 sccm, and the phosphorus doping concentration of the first phosphorus-doped amorphous silicon layer is 2.2 × 10⁻⁶. 20 pcs / cm 3 In the preparation of the second phosphorus-doped amorphous silicon layer, the pH 3 flow rate was adjusted to 1200 sccm, and the phosphorus doping concentration of the second phosphorus-doped amorphous silicon layer was 2.7 × 10⁻⁶. 20 pcs / cm 3 The remaining steps are the same as in Example 1, and will not be repeated here.

[0217] Comparative Example 1

[0218] Comparative Example 1 provides a solar cell whose preparation steps are similar to those of Example 1, except that no N atoms are doped in the preparation of the nitrogen-doped amorphous silicon layer, i.e., the NH3 flux is 0. The remaining steps are the same as in Example 1 and will not be described again.

[0219] Comparative Example 2

[0220] Comparative Example 2 provides a solar cell whose preparation steps are similar to those of Example 1, except that the PH3 doping concentration is the same in the preparation of the first phosphorus-doped amorphous silicon layer as in the second phosphorus-doped amorphous silicon layer. Specifically, in the preparation step of the first phosphorus-doped amorphous silicon layer, the PH3 flow rate is adjusted to 350 sccm. The remaining steps are the same as in Example 1 and will not be repeated here.

[0221] Comparative Example 3

[0222] Comparative Example 3 provides a solar cell whose fabrication steps are similar to those of Example 1, except that the nitrogen-doped amorphous silicon layer is removed during the fabrication process. The remaining steps are the same as in Example 1 and will not be described again.

[0223] Comparative Example 4

[0224] Comparative Example 4 provides a solar cell whose fabrication steps are similar to those of Example 1, except that the nitrogen-doped polycrystalline silicon layer is removed and replaced with a conventional three-layer polycrystalline silicon doped layer for TOPCon cells. Specifically, in Comparative Example 4, steps (2) to (5) are as follows:

[0225] (2) Preparation of tunneling oxide layer

[0226] A mixture of N2O and H2 was introduced into the PECVD equipment and ionized for 110 s to obtain a tunneling oxide layer. The flow rate of N2O was 8000 sccm, the flow rate of H2 was 9000 sccm, the plasma pulse duty cycle was 20:1000, and the thickness was 1.6 nm.

[0227] (3) Preparation of the first phosphorus-doped amorphous silicon layer

[0228] A mixture of SiH4, PH3, and H2 was introduced into a PECVD device and ionized for 120 s to obtain a first phosphorus-doped amorphous silicon layer. The flow rates of SiH4, PH3, and H2 were 2600 sccm, 900 sccm, and 8000 sccm, with a plasma pulse duty cycle of 20:500. The thickness of the first phosphorus-doped amorphous silicon layer was 60 nm, and the phosphorus doping concentration was 2 × 10⁻⁶. 21 pcs / cm 3 .

[0229] (4) Preparation of the second phosphorus-doped amorphous silicon layer

[0230] A mixture of SiH4, PH3, and H2 was introduced into the PECVD equipment to deposit a second phosphorus-doped amorphous silicon layer. The flow rate of SiH4 was 2800 sccm, the flow rate of PH3 was 600 sccm, the flow rate of H2 was 9000 sccm, the plasma pulse duty cycle was 30:500, the thickness of the second phosphorus-doped amorphous silicon layer was 40 nm, and the phosphorus doping concentration was 5 × 10⁻⁶. 20 pcs / cm 3 .

[0231] (5) Preparation of the third phosphorus-doped amorphous silicon layer

[0232] A mixture of SiH4, PH3, and H2 was introduced into the PECVD equipment and ionized for 300 s to obtain a third phosphorus-doped amorphous silicon layer. The flow rates of SiH4, PH3, and H2 were 2400 sccm, 350 sccm, and 7000 sccm, with a plasma pulse duty cycle of 20:500. The thickness of the third phosphorus-doped amorphous silicon layer was 20 nm, and the phosphorus doping concentration was 8 × 10⁻⁶. 19 pcs / cm 3 .

[0233] The remaining steps are the same as in Example 1, and will not be repeated here.

[0234] Comparative Example 5

[0235] Comparative Example 5 provides a solar cell whose fabrication steps are similar to those of Example 1, except that in the fabrication of the nitrogen-doped polycrystalline silicon layer, the NH3 flow rate is adjusted to 80 sccm, and the nitrogen doping concentration of the nitrogen-doped amorphous silicon layer is 1.3 × 10⁻⁶. 20 pcs / cm 3 The remaining steps are the same as in Example 1, and will not be repeated here.

[0236] The performance data of the solar cells in the above embodiments and comparative examples are shown in Table 1 below.

[0237] Table 1 Performance data for each embodiment and comparative example

[0238]

[0239] As can be seen from Table 1 above, the structure of the solar cell in this embodiment of the application has improved open-circuit voltage and fill factor, and decreased contact resistivity compared with the comparative example, thus significantly improving photoelectric conversion efficiency.

[0240] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0241] The embodiments described above are merely illustrative of several implementation methods of this application, intended to facilitate a detailed understanding of the technical solutions of this application, but should not be construed as limiting the scope of protection of the invention patent. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the scope of protection of this application. It should be understood that technical solutions obtained by those skilled in the art based on the technical solutions provided in this application through logical analysis, reasoning, or limited experimentation are all within the scope of protection of the appended claims. Therefore, the scope of protection of this patent application should be determined by the content of the appended claims, and the specification and drawings can be used to interpret the content of the claims.

Claims

1. A solar cell, characterized in that, The silicon substrate includes a tunneling oxide layer, a first phosphorus-doped polysilicon layer, a nitrogen-doped polysilicon layer, and a second phosphorus-doped polysilicon layer, which are sequentially stacked on the back side of the silicon substrate. The phosphorus doping concentration of the first phosphorus-doped polysilicon layer is different from that of the second phosphorus-doped polysilicon layer, and both are greater than the nitrogen doping concentration of the nitrogen-doped polysilicon layer. The nitrogen doping concentration of the nitrogen-doped polycrystalline silicon layer is 3 × 10⁻⁶. 19 pcs / cm 3 ~1×10 20 pcs / cm 3 .

2. The solar cell according to claim 1, characterized in that, The phosphorus doping concentration of the first phosphorus-doped polysilicon layer is greater than that of the second phosphorus-doped polysilicon layer.

3. The solar cell according to claim 2, characterized in that, The phosphorus doping concentration of the first phosphorus-doped polysilicon layer is 5 × 10⁻⁶. 20 pcs / cm 3 ~4×10 21 pcs / cm 3 The phosphorus doping concentration of the second phosphorus-doped polysilicon layer is 4 × 10⁻⁶. 19 pcs / cm 3 ~1×10 20 pcs / cm 3 .

4. The solar cell according to any one of claims 1 to 3, characterized in that, One or more of the following conditions must be met: (1) The thickness of the first phosphorus-doped polycrystalline silicon layer is 40 nm to 80 nm; (2) The thickness of the nitrogen-doped polycrystalline silicon layer is 20 nm to 50 nm; (3) The thickness of the second phosphorus-doped polycrystalline silicon layer is 10 nm to 30 nm; (4) The thickness of the tunneling oxide layer is 1 nm to 3 nm.

5. The solar cell according to any one of claims 1 to 3, characterized in that, It also includes a back passivation layer and a back electrode disposed on the side of the second phosphorus-doped polysilicon layer away from the silicon substrate; and / or, A boron diffusion layer, a front passivation layer, and a front electrode are sequentially stacked on the front side of the silicon substrate.

6. A method for preparing a solar cell, characterized in that, Includes the following steps: A solar cell is fabricated by forming a tunneling oxide layer, a first phosphorus-doped polycrystalline silicon layer, a nitrogen-doped polycrystalline silicon layer, and a second phosphorus-doped polycrystalline silicon layer stacked on the back side of a silicon substrate. The phosphorus doping concentration of the first phosphorus-doped polysilicon layer is different from that of the second phosphorus-doped polysilicon layer, and both are greater than the nitrogen doping concentration of the nitrogen-doped polysilicon layer. The nitrogen doping concentration of the nitrogen-doped polycrystalline silicon layer is 3 × 10⁻⁶. 19 pcs / cm 3 ~1×10 20 pcs / cm 3 .

7. The method for preparing a solar cell according to claim 6, characterized in that, The steps of forming a stacked first phosphorus-doped polysilicon layer, a nitrogen-doped polysilicon layer, and a second phosphorus-doped polysilicon layer include: A first phosphorus-doped amorphous silicon layer, a nitrogen-doped amorphous silicon layer, and a second phosphorus-doped amorphous silicon layer are formed in a stacked configuration. The first phosphorus-doped amorphous silicon layer, the nitrogen-doped amorphous silicon layer, and the second phosphorus-doped amorphous silicon layer are annealed to convert the amorphous silicon into polycrystalline silicon, thereby obtaining the first phosphorus-doped polycrystalline silicon layer, the nitrogen-doped polycrystalline silicon layer, and the second phosphorus-doped polycrystalline silicon layer.

8. The method for preparing a solar cell according to claim 7, characterized in that, The steps of forming a first phosphorus-doped amorphous silicon layer, a nitrogen-doped amorphous silicon layer, and a second phosphorus-doped amorphous silicon layer stacked together include: The first phosphorus-doped amorphous silicon layer was prepared by setting the silane flow rate to 2000 sccm~3000 sccm, the phosphorus source flow rate to 800 sccm~1000 sccm, and the hydrogen flow rate to 6000 sccm~10000 sccm. The nitrogen-doped amorphous silicon layer was prepared by setting the silane flow rate to 2000 sccm~3000 sccm, the nitrogen source flow rate to 10 sccm~50 sccm, and the hydrogen flow rate to 6000 sccm~10000 sccm. The second phosphorus-doped amorphous silicon layer was prepared by setting the silane flow rate to 2000 sccm~3000 sccm, the phosphorus source flow rate to 300 sccm~400 sccm, and the hydrogen flow rate to 6000 sccm~10000 sccm. The phosphorus source includes phosphine, and the nitrogen source includes one or more of ammonia and nitrogen.

9. The method for preparing a solar cell according to claim 7 or 8, characterized in that, The first phosphorus-doped amorphous silicon layer, the nitrogen-doped amorphous silicon layer, and the second phosphorus-doped amorphous silicon layer are formed by plasma-enhanced chemical vapor deposition. In the steps of forming the first phosphorus-doped amorphous silicon layer, the nitrogen-doped amorphous silicon layer, and the second phosphorus-doped amorphous silicon layer, the plasma pulse duty cycle is independently 30:(350~600).

10. The method for preparing a solar cell according to claim 7, characterized in that, The annealing temperature is 910℃~940℃, and the annealing time is 20min~50min; and / or, Prior to the annealing process, the method further includes: forming a mask layer on the second phosphorus-doped amorphous silicon layer; During the preparation of the mask layer, the flow rate of SiH4 is 1500 sccm~1800 sccm, the flow rate of N2O is 6000 sccm~8000 sccm, the plasma pulse duty cycle is 30:(500~600), and the thickness of the mask layer is 15 nm~30 nm.

11. The method for preparing a solar cell according to any one of claims 6-8 and 10, characterized in that, One or more of the following conditions must be met: (1) In the preparation step of the tunneling oxide layer, the flow rate of N2O is 7000sccm~9000sccm, the deposition temperature is 410℃~430℃, the deposition time is 100s~120s, and the plasma pulse duty cycle is 20:(950~1150). (2) Before the step of forming a tunneling oxide layer on the back side of the silicon substrate, the method further includes: texturing the silicon substrate, front boron diffusion and back alkaline polishing, to form a boron diffusion layer on the front side of the silicon substrate; (3) After the step of forming a second phosphorus-doped polysilicon layer on the back side of the silicon substrate, the method further includes the steps of removing the plating and cleaning, forming a back passivation layer and a back electrode on the back side of the silicon substrate, and forming a front passivation layer and a front electrode on the front side of the silicon substrate.

12. A photovoltaic module, characterized in that, The invention includes a solar cell and a packaging structure, wherein the solar cell is prepared according to any one of claims 1 to 5 or by any one of claims 6 to 11, and the packaging structure is used to encapsulate the solar cell.

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