A multi-antenna anti-jamming broadband networking transceiver

Abstract

The application discloses a multi-antenna anti-interference broadband networking transceiver, which comprises an antenna system, a receiving system, a transmitting system, a local oscillator system and a digital baseband processing system; the antenna system is connected with the receiving system and the transmitting system respectively, the receiving system and the transmitting system are connected with the digital baseband processing system respectively, and the local oscillator system is connected with the receiving system and the transmitting system respectively; the antenna system comprises three groups of antennas, each group of antennas corresponds to four receiving channels and one transmitting channel; the receiving system comprises twelve receiving channels, each receiving channel comprises a low-noise amplifier unit and a down-conversion unit which are connected in sequence; the transmitting system comprises one transmitting channel, the transmitting channel comprises an up-conversion unit and three power amplifier units which are connected in sequence; and the digital baseband processing system identifies useful signals by comparing the consistency of the amplitudes and phases of the multiple receiving signals in the same group to realize anti-interference. The application has strong anti-interference ability and can be compatible with two working modes.

Description

Technical Field

[0001] This invention relates to the field of wireless communication equipment technology, and specifically to a multi-antenna anti-interference broadband networking transceiver. Background Technology

[0002] The anti-interference capability of transceivers used in network deployment is a crucial indicator. Existing network transceivers lack ideal anti-interference capabilities against broadband interference signals within their operating frequency band. When the receiving antenna receives strong broadband interference signals within the operating frequency band, attenuators are typically used to reduce the receiving channel gain to prevent blockage. However, this method, when the attenuation reaches a certain level, can degrade the noise figure of the receiving link, reducing receiver sensitivity. Furthermore, when strong interference signals within the radio frequency band enter the received signal, useful signals with strengths near the receiver sensitivity will be submerged in the interference, preventing the digital baseband from distinguishing and processing the useful signals, further reducing receiver sensitivity.

[0003] On the other hand, existing network transceivers can only operate in either TDD (Time Division Duplex) or FDD (Frequency Division Duplex) mode. When the transceiver bands are the same, the transmitted signal will enter the receiving channel, interfering with its operation. Therefore, only TDD mode can be used, where transmission and reception are not synchronized. If simultaneous transmission and reception are required, FDD mode must be used, employing different operating frequency bands, but this requires more spectrum resources. Therefore, there is an urgent need for a transceiver that can simultaneously address both the resistance to broadband interference signals within the operating frequency band and mode compatibility issues. Summary of the Invention

[0004] The technical problem to be solved by the present invention is to provide a multi-antenna anti-interference broadband networking transceiver that not only has strong anti-bandwidth interference signal capability in the operating frequency band, but is also compatible with both TDD and FDD operating modes.

[0005] To solve the above-mentioned technical problems, the technical solution adopted by the present invention is as follows.

[0006] A multi-antenna anti-interference broadband networking transceiver includes an antenna system, a receiving system, a transmitting system, a local oscillator system, and a digital baseband processing system; the antenna system is connected to the receiving system and the transmitting system respectively, the receiving system and the transmitting system are connected to the digital baseband processing system respectively, and the local oscillator system is connected to the receiving system and the transmitting system respectively.

[0007] The antenna system includes three sets of antennas, each set of antennas corresponding to four receiving channels and one transmitting channel, used for receiving and transmitting radio frequency signals;

[0008] The receiving system comprises 12 receiving channels, each of which comprises a low-noise amplifier unit and a down-conversion unit connected in sequence, and is used for down-converting the S~C frequency band radio frequency signals received by the antenna system into intermediate frequency signals;

[0009] The transmitting system comprises one transmitting channel, which comprises an up-conversion unit and three power amplifier units connected in sequence, and is used for up-converting and power amplifying the intermediate frequency signals into S~C frequency band radio frequency signals;

[0010] The local oscillator system is used for providing the receiving system and the transmitting system with fixed local oscillator signals and frequency hopping local oscillator signals;

[0011] The digital baseband processing system is used for AD sampling, demodulating and data processing the intermediate frequency signals output by the receiving system, and generating intermediate frequency signals to be transmitted, and simultaneously identifying useful signals to realize anti-interference by comparing the consistency of amplitudes and phases of multiple receiving signals in the same group.

[0012] Preferably, the local oscillator system comprises one reference clock source circuit and three local oscillator units; the reference clock source circuit comprises a 100MHz constant temperature crystal oscillator, the output end of the constant temperature crystal oscillator is connected with a crystal oscillator power divider and a frequency divider, which are used for generating a 50MHz reference clock signal from the constant temperature crystal oscillator and providing the digital baseband processing system, and generating three reference frequency signals; the three local oscillator units are connected with the output end of the crystal oscillator power divider to obtain the reference frequency signals.

[0013] Preferably, each of the local oscillator units is connected with a fixed local oscillator generating circuit and a frequency hopping local oscillator generating circuit through a local oscillator power divider, which are used for providing the corresponding receiving channels and transmitting channels of the local oscillator unit with required fixed local oscillator signals and frequency hopping local oscillator signals;

[0014] The fixed local oscillator generating circuit comprises:

[0015] a fixed local oscillator phase-locked loop, the reference input end of which is connected with the reference clock source circuit through the local oscillator power divider;

[0016] a fixed local oscillator power divider, which is connected with the output end of the fixed local oscillator phase-locked loop, and divides the fixed local oscillator signals;

[0017] a fixed local oscillator amplifier, which is connected with each output end of the fixed local oscillator power divider, and amplifies the divided fixed local oscillator signals;

[0018] and the fixed local oscillator generating circuits of the three local oscillator units divide the fixed local oscillator signals into thirteen paths, one of which is provided as transmitting one local oscillator to the transmitting channel, and the other twelve of which are provided as receiving two local oscillators to the 12 receiving channels;

[0019] The frequency hopping local oscillator generating circuit comprises a frequency hopping source, the frequency hopping source adopts a frequency hopping local oscillator phase-locked loop ping-pong switching architecture, and comprises:

[0020] Two frequency hopping local oscillator phase-locked loops, the reference input ends of which are connected to the reference clock source circuit through a local oscillator power divider;

[0021] A frequency hopping local oscillator radio frequency switch, the two fixed ends of which are connected to the output ends of the two frequency hopping local oscillator phase-locked loops respectively, and the common end thereof serves as an output end, which is used for alternately selecting the outputs of the two frequency hopping local oscillator phase-locked loops to form a frequency hopping local oscillator signal;

[0022] A frequency hopping local oscillator power divider, which is connected to the output end of the frequency hopping local oscillator radio frequency switch and divides the frequency hopping local oscillator signal;

[0023] A frequency hopping fixed local oscillator amplifier, which is connected to the output end of the frequency hopping local oscillator power divider and amplifies the frequency hopping local oscillator signal after power division;

[0024] The frequency hopping sources of the three frequency hopping local oscillator generating circuits divide the frequency hopping local oscillator signal into thirteen paths, one of which is provided to a transmitting channel as a transmitting local oscillator, and the other twelve of which are provided to twelve receiving channels respectively as receiving local oscillators.

[0025] Preferably, in a single receiving channel of the receiving system, the low-noise amplifier unit comprises, in sequence:

[0026] A first receiving medium filter, which is used for filtering out out-of-band stray signals and suppressing image frequencies;

[0027] A limiter, which is connected to the first receiving medium filter and is used for limiting the amplitude of a strong input signal to protect subsequent circuits;

[0028] A first receiving low-noise amplifier, which is a single-chip amplifier with a high 1 dB compression point, and is connected to the limiter and is used for low-noise amplifying a radio frequency signal;

[0029] A medium band-pass filter, which is connected to the first receiving low-noise amplifier and is used for filtering the amplified signal.

[0030] Preferably, the frequency down-conversion unit is connected to the low-noise amplifier unit and adopts a twice frequency down-conversion structure, and comprises, in sequence, a first down-mixing circuit, a second down-mixing circuit and an intermediate frequency amplification and gain control circuit;

[0031] The first down-mixing circuit comprises a first down-mixer connected with a medium band-pass filter and a corresponding local oscillator unit, the first down-mixer being a high 1dB compression point mixer for mixing and down-converting a radio frequency signal with a received local oscillator to a first intermediate frequency, and sequentially connected with a first receiving low-pass filter, a first receiving FBAR filter, a second receiving low noise amplifier, a second receiving FBAR filter and a second receiving low-pass filter; the first and second receiving low-pass filters are used to filter out unwanted signals of local oscillator harmonics and high-end combined spurs generated by mixing; the first and second receiving FBAR filters are used to adapt to different signal bandwidths and improve the anti-interference capability of the receiving link, and filter out unwanted signals of near-end combined spurs and image frequencies generated by mixing; the second receiving low noise amplifier is used to compensate for the gain loss caused by frequency conversion and filtering;

[0032] The second down-mixing circuit comprises a second down-mixer connected with the first down-mixing circuit and a corresponding local oscillator unit, for mixing and down-converting the first intermediate frequency signal with a received second local oscillator to an intermediate frequency, and sequentially connected with a third receiving low-pass filter and a first receiving surface acoustic wave filter for suppressing radio frequency and local oscillator leakage and providing adjacent channel suppression;

[0033] The intermediate frequency amplification and gain control circuit is connected with the second down-mixing circuit and comprises multiple receiving monolithic amplifiers and a receiving attenuator arranged between the receiving monolithic amplifiers, and the last and third-to-last receiving monolithic amplifiers are respectively provided with bypass paths realized by a receiving radio frequency switch; the intermediate frequency amplification and gain control circuit is used to amplify the intermediate frequency signal and realize multi-gear precise gain control by controlling the conduction and disconnection of the receiving radio frequency switch and combining the receiving attenuator in the adjusting circuit.

[0034] Preferably, the up-conversion unit of the transmitting system adopts a two-stage up-conversion structure, comprising an intermediate frequency processing circuit, a first up-mixing circuit, a second up-mixing circuit and a radio frequency driving and power control circuit connected in sequence;

[0035] The intermediate frequency processing circuit is used to receive and condition the intermediate frequency signal from the digital baseband processing system, and comprises an LTCC filter, a first transmitting low noise amplifier and a transmitting surface acoustic wave filter connected in sequence; the LTCC filter and the transmitting surface acoustic wave filter are used to filter out out-of-band noise, and the first transmitting low noise amplifier is used for signal amplification;

[0036] The first up-mixing circuit comprises a first up-mixer connected with the intermediate frequency processing circuit and its corresponding local oscillator unit, for mixing the intermediate frequency signal with a first local oscillator to up-convert to a first intermediate frequency, and then sequentially connected with a first transmitting low-pass filter, a first transmitting FBAR filter, a second transmitting low-noise amplifier, a second transmitting FBAR filter and a second transmitting low-pass filter, for filtering the high-order harmonics and stray components generated by the mixing;

[0037] The second up-mixing circuit comprises a second up-mixer connected with the first up-mixing circuit and its corresponding local oscillator unit, for mixing the first intermediate frequency signal with a second local oscillator to up-convert to a radio frequency, and then sequentially connected with a first transmitting temperature-compensated attenuator, a first transmitting dielectric filter and a second transmitting temperature-compensated attenuator, for compensating the temperature drift of the link gain and suppressing the out-of-band spurs;

[0038] The radio frequency driving and power control circuit is connected with the second up-mixing circuit, comprising a three-stage transmitting amplifier connected in sequence, and a number-controlled attenuator arranged before and after the second-stage transmitting amplifier, and a second transmitting dielectric filter arranged between the number-controlled attenuator and the third-stage transmitting amplifier, for realizing the accurate control of the transmitting power;

[0039] The output end of the radio frequency driving and power control circuit is connected with the input end of a microwave switch composed of two-stage single-pole double-throw switches in cascade; the three output ends of the microwave switch are respectively connected with three independent power amplifier units, for selectively distributing the radio frequency signal generated by the up-conversion unit to any power amplifier unit.

[0040] Preferably, the power amplifier unit comprises an isolator, a microwave power tube, a two-section circulator and a cavity filter connected in sequence;

[0041] The isolator is connected with the output end of the microwave switch, for improving the input standing wave of the power amplifier unit and preventing the reflected out-of-band signal from reaching the microwave power tube;

[0042] The microwave power tube is used for power amplifying the radio frequency signal;

[0043] The two-section circulator is also connected with a low-noise amplifier unit, for realizing the switching between the transmitting and receiving in the TDD mode, and guiding the transmitting signal to the antenna;

[0044] The cavity filter is used for suppressing the harmonic and out-of-band spur signals to suppress the noise power spectral density of the transmitting link to the out-of-band receiving frequency band.

[0045] Preferably, each group of antennas of the antenna system is a 2×2 passive antenna;

[0046] One of the four receiving channels of each group of antennas shares one antenna with the transmitting channel;

[0047] 4-way receiving channel of each group of antennas shares 1 frequency hopping local oscillator, 3 groups of receiving channels use 3 independent frequency hopping local oscillators respectively;

[0048] 3-way transmitting channel shares 1 frequency hopping local oscillator;

[0049] Thus, transmitting channel and receiving channel in the same group of antennas are in TDD mode, and transmitting channel and receiving channel of different groups of antennas are in FDD mode.

[0050] Preferably, it further comprises a control system and a power control system; the control system is connected with the local oscillator system, the receiving system, the transmitting system, the digital baseband processing system and the power control system respectively, and is used for realizing frequency hopping control, channel gain control and transceiver switching timing control; the power control system is connected with the receiving system, the transmitting system, the local oscillator system, the digital baseband processing system and the control system, and is used for providing working power supply; the power control system comprises sequentially connected anti-reverse connection circuit, surge suppression circuit, EMI filter circuit and power conversion circuit, and is used for converting and stably outputting +28V, +5V, -5V, +3.3V, +1.2V and +12V voltages from external input power supply; the power control system is controlled by the control system, and the on-off of +28V and +5V power supply is controlled through MOSFET driver and P-channel field effect transistor.

[0051] Preferably, it further comprises an aluminum alloy material structure main body, which is used for mechanically bearing and electrically connecting each system, and is formed by stacking and fastening five functional box bodies of power amplifier box, frequency conversion box, local oscillator box, power supply box and terminal box through long screws; the power amplifier box accommodates the power amplifier unit of the transmitting system; the frequency conversion box is arranged with the receiving system corresponding to 2 groups of antennas on two surfaces; one surface of the local oscillator box is arranged with the local oscillator system and the up-conversion unit of the transmitting system, and the other surface is arranged with the receiving system corresponding to 1 group of antennas; the power supply box accommodates the power control system; the terminal box accommodates the digital baseband processing system and the control system; the connection of radio frequency signals, control signals and power supply between each box body is realized through SMP radio frequency connectors arranged on the structure side wall and hidden interconnection cables.

[0052] Thanks to the above technical scheme, the technical progress achieved by the application is as follows.

[0053] The application realizes fourfold anti-interference mechanism and has strong anti-interference ability.

[0054] Spatial domain anti-interference: through spatial diversity of 4-way receiving channel in the same group, combined with the analysis of the digital baseband processing system on the amplitude and phase consistency of multiple signals, the related useful signals can be effectively identified and extracted from strong background noise and interference, and it is especially good at resisting interference close to the frequency of useful signals.

[0055] Frequency domain anti-interference: It adopts fast frequency hopping technology based on dual phase-locked loop ping-pong switching, with a frequency hopping rate of up to 30,000 hops / second, which greatly reduces the probability of the transceiver being continuously interfered with at any specific frequency point.

[0056] Structural domain anti-interference: In the secondary frequency conversion structure of the receiving channel, multiple narrowband filters (such as FBAR filters and surface acoustic wave filters) are carefully designed at the first intermediate frequency and intermediate frequency to "slice" the broadband interference signal into narrowband interference in the frequency domain, which significantly reduces the total interference power entering the subsequent circuit.

[0057] Gain-domain interference immunity: An innovative bypassable amplifier is introduced into the intermediate frequency amplification link, enabling multi-level gain control. This design can quickly reduce gain under strong interference to prevent link saturation. At the same time, since the bypassed stage is the downstream stage of the link, the impact on the overall system noise figure is minimal, thus maximizing receiver sensitivity while resisting strong interference.

[0058] This invention achieves intelligent compatibility between TDD and FDD modes with high spectral efficiency.

[0059] By allocating three independent frequency-hopping local oscillators to the three receiving channels and a shared frequency-hopping local oscillator to the transmitting channel, this invention allows for flexible configuration of the operating mode. TDD mode can be implemented within the same antenna group, saving spectrum resources; FDD mode can be implemented between different antenna groups, supporting full-duplex communication. This compatibility greatly improves the adaptability of the device in different application scenarios and the spectrum utilization efficiency of the entire system.

[0060] This invention features high linearity and high sensitivity:

[0061] The RF front-end of the receiving channel employs a low-noise amplifier and mixer with a high compression point of 1dB (P-1) to ensure that no gain compression or nonlinear distortion occurs when strong interference signals are input, providing a clean foundation for subsequent signal processing. Combined with the above anti-interference measures, the system can maintain excellent receiving sensitivity even in complex electromagnetic environments.

[0062] This invention, through its integrated and modular design, boasts high reliability.

[0063] The overall structure employs a stacked interconnection of five functional boxes: power amplifier box, frequency converter box, local oscillator box, power supply box, and terminal box, achieving physical partitioning and electromagnetic isolation of functions. Interconnection via concealed SMP connectors ensures connection reliability and signal integrity. This modular design also facilitates production, testing, and maintenance. Attached Figure Description

[0064] Figure 1 This is a schematic diagram of the structure of the present invention;

[0065] Figure 2 is a schematic diagram of the local oscillator unit A of the present application;

[0066] Figure 3 is a schematic diagram of the local oscillator unit B of the present application;

[0067] Figure 4 is a schematic diagram of the local oscillator unit C of the present application;

[0068] Figure 5 is a schematic diagram of the local oscillator unit C of the present application;

[0069] Figure 6 is a schematic diagram of the reference clock source circuit of the present application;

[0070] Figure 7 is a schematic diagram of the low noise amplifier unit of the present application;

[0071] Figure 8 is a schematic diagram of the frequency down conversion unit of the present application;

[0072] Figure 9 is a schematic diagram of the frequency up conversion unit of the present application;

[0073] Figure 10 is a schematic diagram of the power amplifier unit of the present application;

[0074] Figure 11 is a schematic diagram of the power supply control system of the present application;

[0075] Figure 12 is a first perspective view of the structural body of the present application;

[0076] Figure 13 is a second perspective view of the structural body of the present application;

[0077] Figure 14 is a third perspective view of the structural body of the present application. DETAILED DESCRIPTION

[0078] The present application will be further described in detail below with reference to the accompanying drawings and specific embodiments.

[0079] A multi-antenna anti-interference broadband networking transceiver, which combines Figures 1 to 2As shown, the system includes an antenna system, a receiving system, a transmitting system, a local oscillator system, a digital baseband processing system, a power control system, a control system, and a structural body, wherein the antenna system is connected with the receiving system and the transmitting system respectively, the receiving system and the transmitting system are connected with the digital baseband processing system respectively, the local oscillator system is connected with the receiving system and the transmitting system respectively, the control system is connected with the local oscillator system, the receiving system, the transmitting system, the digital baseband processing system, and the power control system respectively; the power control system is connected with the receiving system, the transmitting system, the local oscillator system, the digital baseband processing system, and the control system.

[0080] The antenna system includes three groups of antennas, each group of antennas corresponds to four receiving channels and one transmitting channel, and is used for receiving and transmitting radio frequency signals; the receiving system includes twelve receiving channels, each receiving channel includes a low-noise amplifier unit and a down-conversion unit connected in sequence, and is used for down-converting the S~C frequency band radio frequency signals received by the antenna system to intermediate frequency signals and sending the intermediate frequency signals to the digital baseband processing system; the transmitting system includes one transmitting channel, the transmitting channel includes a up-conversion unit and three power amplifier units connected in sequence, and is used for receiving the intermediate frequency signals from the digital baseband processing system, up-converting and power amplifying the intermediate frequency signals to S~C frequency band radio frequency signals, and radiating the S~C frequency band radio frequency signals by the antennas; the local oscillator system is used for providing fixed local oscillator signals and frequency hopping local oscillator signals for the receiving system and the transmitting system; the digital baseband processing system is used for AD sampling, demodulating, and data processing the intermediate frequency signals output by the receiving system, and generating intermediate frequency signals to be transmitted, and simultaneously identifying useful signals to achieve anti-interference by comparing the consistency of amplitudes and phases of multiple receiving signals in the same group; the control system is used for managing the working state of the whole system, such as frequency hopping control, channel gain control, and transmission-reception switching timing control; the power control system is used for providing working power; and the structural body is used for integrating the above systems.

[0081] The antenna system includes three groups of 2×2 passive antennas (such as Figures 1 to 2 Antenna A, Antenna B, and Antenna C) as shown, and supports S~C frequency band operation. One of the four receiving channels of each group of antennas shares an antenna with the transmitting channel, so that each group realizes “4 receiving and 1 transmitting”. The four receiving channels of each group of antennas share one frequency hopping local oscillator, and the three groups of receiving channels use three independent frequency hopping local oscillators respectively; and the three transmitting channels share one frequency hopping local oscillator; thereby realizing TDD working mode for the transmitting channel and the receiving channel in the same group of antennas, and FDD working mode for the transmitting channel and the receiving channel of different groups of antennas.

[0082] The local oscillator system is the key to realizing high performance, and its core lies in the distributed architecture of “one reference clock source and three independent local oscillator units”.

[0083] As shown in the attached Figure 6As shown, the reference clock source is based on a 100MHz oven-controlled crystal oscillator, and the output end of the oven-controlled crystal oscillator is connected with a crystal oscillator power divider and a frequency divider, so that the output is distributed through the crystal oscillator power divider and divided through the frequency divider. Specifically, the output end of the oven-controlled crystal oscillator is divided into four paths through the crystal oscillator power divider, one path is reduced in frequency through the frequency divider and produces a 50MHz reference clock after amplification and filtering to supply the digital baseband processing system; the other three paths of reference frequency signals are respectively provided to three local oscillator units (local oscillator unit A, local oscillator unit B and local oscillator unit C).

[0084] As shown in Figures 3 to 5 , each local oscillator unit is connected with a fixed local oscillator generation circuit and a frequency hopping local oscillator generation circuit through a local oscillator power divider, for providing the required fixed local oscillator signal and frequency hopping local oscillator signal for its corresponding group of receiving channels and transmitting channels.

[0085] The fixed local oscillator generation circuit includes a fixed local oscillator phase-locked loop, a fixed local oscillator power divider and a fixed local oscillator amplifier (AMP g ). A fixed local oscillator phase-locked loop, the reference input end is connected with the reference clock source circuit through the local oscillator power divider; a fixed local oscillator power divider, connected with the output end of the fixed local oscillator phase-locked loop, divides the fixed local oscillator signal; a fixed local oscillator amplifier, connected with each output end of the fixed local oscillator power divider, amplifies the divided fixed local oscillator signal.

[0086] Each fixed local oscillator generation circuit generates a fixed frequency signal from the fixed local oscillator phase-locked loop, which is amplified and divided by the fixed local oscillator power divider. The fixed local oscillator signals of the three fixed local oscillator generation circuits are finally divided into 13 paths: one path is provided as a transmitting local oscillator (LO1_TX) to the transmitting channel, and 12 paths are provided as receiving local oscillators (LO2_RX1~12) to the 12 receiving channels.

[0087] The frequency hopping local oscillator generation circuit includes a frequency hopping source, which adopts a ping-pong switching architecture of two frequency hopping local oscillator phase-locked loops, including two frequency hopping local oscillator phase-locked loops, a frequency hopping local oscillator RF switch, a frequency hopping local oscillator power divider and a frequency hopping fixed local oscillator amplifier (AMP t ). The reference input end of the two frequency hopping local oscillator phase-locked loops is connected with the reference clock source circuit through the local oscillator power divider; the two fixed ends of a frequency hopping local oscillator RF switch are respectively connected with the output ends of the two frequency hopping local oscillator phase-locked loops, and the common end is used as the output end for alternately selecting the outputs of the two frequency hopping local oscillator phase-locked loops to form a frequency hopping local oscillator signal; a frequency hopping local oscillator power divider, connected with the output end of the frequency hopping local oscillator RF switch, divides the frequency hopping local oscillator signal; a frequency hopping fixed local oscillator amplifier, connected with each output end of the frequency hopping local oscillator power divider, amplifies the divided frequency hopping local oscillator signal.

[0088] When a frequency hopping local oscillator phase-locked loop (PLL1) outputs the current operating frequency point, the control system (such as FPGA) has configured the frequency information of the next frequency hopping point to another frequency hopping local oscillator phase-locked loop (PLL2) through the data bus. Before the frequency hopping time comes, PLL2 has already locked the new frequency point. At this time, the FPGA controls a frequency hopping local oscillator frequency switch to quickly switch from the output of PLL1 to the output of PLL2. Since PLL2 is pre-locked, the phase-locked loop locking time required for frequency switching in the conventional single frequency hopping local oscillator phase-locked loop is completely eliminated, thereby greatly increasing the frequency hopping speed to an astonishing 30,000 hops per second, greatly increasing the difficulty of tracking by the interference party. This "ping-pong switching" mechanism is the key to realizing high-speed frequency hopping, and the selection of a high local oscillator frequency avoids low-end spurs and improves spectral purity. The outputs of the three frequency hopping local oscillator generation circuits are also power divided into 13 paths: 1 path is provided as a transmitting second local oscillator (LO2_TX) to the transmitting channel, and 12 paths are provided as receiving first local oscillators (LO1_RX1~12) to the 12 receiving channels, respectively.

[0089] Special attention: the local oscillator unit A needs to provide a common transmitting first local oscillator and a transmitting second local oscillator for the entire transmitting system, so its output end has two power dividers (as shown in the accompanying drawings) more than the local oscillator unit B and the local oscillator unit C, which reflects the flexibility of resource allocation. Figure 3

[0090] As shown in the accompanying drawings, Figure 7 The low-noise amplification unit in the single-channel receiving channel of the receiving system includes, in sequence:

[0091] A first receiving medium filter for filtering out out-of-band spurious signals and suppressing image frequencies;

[0092] An amplitude limiter connected to the first receiving medium filter for limiting the amplitude of strong input signals to protect subsequent circuits;

[0093] A first receiving low-noise amplifier connected to the amplitude limiter for low-noise amplification of the radio frequency signal; and the first receiving low-noise amplifier uses a single-chip amplifier with a high 1 dB compression point (P-1), which can ensure that when there is a strong interference signal in the band, the amplifier will not enter the gain compression region to produce nonlinear distortion, thereby ensuring the authenticity of subsequent signal processing.

[0094] A medium band-pass filter connected to the first receiving low-noise amplifier for filtering the amplified signal to achieve spectral purification.

[0095] As shown in the accompanying drawings, Figure 8 The down-conversion unit is connected to the low-noise amplification unit and adopts a two-stage down-conversion structure to down-convert the radio frequency signal in the S~C frequency band to a fixed intermediate frequency, and includes, in sequence, a first down-mixing circuit, a second down-mixing circuit, and an intermediate frequency amplification and gain control circuit. ​

[0096] The first down-mixing circuit comprises a first down-mixer connected with the medium band-pass filter and its corresponding local oscillator unit (also using a high P-1 device, the principle is the same as before), which is used to mix the radio frequency signal with a received local oscillator to down-convert to a first intermediate frequency. After that, a first receiving low-pass filter, a first receiving FBAR filter, a second receiving low-noise amplifier, a second receiving FBAR filter and a second receiving low-pass filter are sequentially connected, wherein the first receiving low-pass filter and the second receiving low-pass filter are used to filter out unwanted signals such as local oscillator harmonics and high-end combined spurs generated by mixing; the first receiving FBAR filter and the second receiving FBAR filter are used to adapt to different signal bandwidths and improve the anti-interference ability of the receiving link, and filter out unwanted signals such as near-end combined spurs and image frequencies generated by mixing; the second receiving low-noise amplifier is used to compensate for the gain loss caused by frequency conversion and filtering. The first down-mixing circuit has the following advantages by using FBAR and other narrow-band filters: the energy of a wideband interference signal is distributed over a relatively wide frequency band. When it passes through a narrow-band filter, only a small part of its energy that falls within the passband of the filter can pass through. In this way, a wideband interference is "converted" into a narrowband interference with much lower power, greatly reducing its total impact on the subsequent circuit.

[0097] The second down-mixing circuit comprises a second down-mixer connected with the first down-mixing circuit and its corresponding local oscillator unit, which is used to mix the first intermediate frequency signal with a received second local oscillator to down-convert to an intermediate frequency. After that, a third receiving low-pass filter and a first receiving surface acoustic wave filter are sequentially connected, which are used to suppress radio frequency and local oscillator leakage and provide adjacent channel rejection.

[0098] The intermediate frequency amplification and gain control circuit is connected with the second down-mixing circuit and comprises multiple receiving monolithic amplifiers and a receiving attenuator arranged between the receiving monolithic amplifiers. The last receiving monolithic amplifier and the third-to-last receiving monolithic amplifier are respectively provided with bypass paths realized by a receiving radio frequency switch. The intermediate frequency amplification and gain control circuit is used to amplify the intermediate frequency signal and realize multi-gear precise gain control by controlling the conduction and disconnection of the receiving radio frequency switch in combination with the receiving attenuator in the adjusting circuit.

[0099] Specifically, as Figure 8As shown, the intermediate frequency (IF) amplification and gain control circuit contains five amplifier stages: a first receiving monolithic amplifier positioned between the third receiving low-pass filter and the first receiving surface acoustic wave (SAW) filter; a second receiving monolithic amplifier, a receiving temperature-compensated attenuator, a first π-type attenuator, a third receiving monolithic amplifier and a second π-type attenuator connected in parallel via the first receiving RF switch, a third π-type attenuator, a second receiving SAW filter, a fourth receiving monolithic amplifier, and a fifth receiving monolithic amplifier and a fourth π-type attenuator connected in series via the first receiving RF switch, and a fourth receiving low-pass filter. Specifically, the fifth receiving monolithic amplifier (gain 16dB) and the third receiving monolithic amplifier (gain 24dB) each have bypass paths implemented via receiving RF switches. By controlling these two switches, four gain levels (56dB, 40dB, 32dB, and 16dB) can be achieved. The system noise figure mainly depends on the preceding stages of the link (such as the first receiving low-noise amplifier). The bypass amplifier has little impact on the overall noise figure of the system, but it can quickly and significantly reduce the overall gain of the link under strong interference input, effectively preventing the ADC from saturating or the amplifier from entering the nonlinear region, thus achieving a perfect balance between "anti-saturation" and "sensitivity preservation".

[0100] like Figure 9 As shown, the upconversion unit of the transmitting system adopts a double upconversion structure to upconvert the intermediate frequency signal sent by the digital baseband processing system to the radio frequency signal in the S~C band. It includes an intermediate frequency processing circuit, a first upmixer circuit, a second upmixer circuit, and a radio frequency drive and power control circuit connected in sequence.

[0101] The intermediate frequency (IF) processing circuit is used to receive and condition the IF signal from the digital baseband processing system. It includes an LTCC filter, a first transmit low-noise amplifier, and a transmit surface acoustic wave (SAW) filter connected in sequence. The LTCC filter and the transmit SAW filter are used to filter out out-of-band noise. The first transmit low-noise amplifier is used to amplify the signal.

[0102] The first upmixer circuit includes a first upmixer connected to the intermediate frequency processing circuit and its corresponding local oscillator unit, used to mix and upconvert the intermediate frequency signal with the transmitter local oscillator to the first intermediate frequency. Subsequently, a first transmitter low-pass filter, a first transmitter FBAR filter, a second transmitter low-noise amplifier, a second transmitter FBAR filter and a second transmitter low-pass filter are connected in sequence to filter out high-order harmonics and spurious components generated by mixing.

[0103] The second upmixer circuit includes a second upmixer connected to the first upmixer circuit and its corresponding local oscillator unit, used to upconvert the first intermediate frequency signal with the transmit local oscillator to the radio frequency. Subsequently, a first transmit temperature-compensated attenuator, a first transmit dielectric filter and a second transmit temperature-compensated attenuator are connected in sequence to compensate for the temperature drift of the link gain and suppress out-of-band spurious signals.

[0104] The radio frequency drive and power control circuit is connected with the second up-mixing circuit, and includes three-stage transmitting amplifiers connected in sequence, and a number control attenuator is arranged before and after the second-stage transmitting amplifier, and a second transmitting medium filter is arranged between the number control attenuator and the third-stage transmitting amplifier, so as to realize accurate control of transmitting power.

[0105] The output end of the radio frequency drive and power control circuit is connected to the input end of a microwave switch composed of two-stage single-pole double-throw switches in cascade; and the three output ends of the microwave switch are respectively connected to three independent power amplifier units, so as to selectively distribute the radio frequency signals generated by the up-mixing unit to any power amplifier unit.

[0106] As shown in Figure 10 The power amplifier unit includes an isolator, a microwave power tube, a two-section circulator and a cavity filter connected in sequence, specifically, the isolator is connected to the output end of the microwave switch, so as to improve the input standing wave of the power amplifier unit and prevent the reflected out-of-band signals from reaching the microwave power tube; the microwave power tube is used for power amplification of the radio frequency signals; the two-section circulator is also connected to a low-noise amplifier unit, so as to realize the switching of transmission and reception in the TDD mode and guide the transmitting signals to the antenna; it is worth noting that the low-noise amplifier unit connected to the two-section circulator only includes an amplitude limiter, a first receiving low-noise amplifier and a dielectric band-pass filter connected in sequence; and the cavity filter is used for suppressing harmonic and out-of-band noise signals to suppress the noise power spectral density of the out-of-band receiving frequency band of the transmitting link.

[0107] The number control attenuator in the up-mixing unit provides an accurate power control range of up to 63.5dB. The microwave power tube in the power amplifier unit provides high efficiency and output power, and the two-section circulator and the cavity filter can ensure the purity of the transmitting spectrum and avoid self-interference to the receiver, and the two-section circulator realizes the switching of transmission and reception in the TDD mode and guides the transmitting signals to the antenna while isolating the influence of transmission on reception.

[0108] The digital baseband processing system is responsible for AD sampling, demodulation and data processing of 12-channel intermediate frequency signals output by the receiving system, and generates intermediate frequency signals to be transmitted. The core is spatial anti-interference, which compares the amplitude and phase values of 4-channel receiving signals in the same antenna group through algorithm. The principle is that the useful signals from the same far-field signal source reach the closely arranged antenna array with almost parallel wave fronts, so the signals received by each channel have high stability and correlation in amplitude and phase. When the intermediate frequency signals are converted into digital signals, the amplitude difference and phase difference of the 4-channel signals are compared through algorithm, so that the useful signals and interference noise can be accurately separated, and the purpose of anti-interference is achieved.

[0109] AsFigure 11 As shown, the power control system includes six power modules (Power Module A, Power Module B, Power Module C, Power Module D, Power Module E, and Power Module F). The power control system provides the required operating voltages (+28V, +5V, -5V, +3.3V, +1.2V, +12V) for the entire system. The power control system includes sequentially connected reverse polarity protection circuits, surge suppression circuits, EMI filter circuits, and power conversion circuits. The power control system is controlled by the control system, particularly through precise control of the +28V and +5V power supply timings for high-power circuits such as power amplifiers via MOSFET drivers and P-channel field-effect transistors, ensuring system safety.

[0110] The control system (usually integrated into an FPGA) manages the operating status of the entire system through the control bus (CTRL) and provides unified control over: 1) frequency hopping control (generating frequency hopping sequences and controlling PLL configuration and switching); 2) channel gain control (controlling the bypass of intermediate frequency amplification and gain control circuits based on signal strength); and 3) transmit / receive switching timing control (in TDD mode, precisely controlling the power-on / power-off timing of the transmitting and receiving systems to prevent the transmitted signal from damaging the receiver).

[0111] like Figures 12 to 14 As shown, the main structure is made of aluminum alloy and serves as the mechanical support and electrical connection for various systems. It consists of five functional boxes: a power amplifier box, a frequency converter box, a local oscillator box, a power supply box, and a terminal box, which are stacked and fastened together with long screws. The arrangement order of these boxes is not limited in this invention. Specifically, the power amplifier box houses the power amplifier unit of the transmitting system; the frequency converter box has two sets of receiving systems corresponding to two antennas arranged on its two sides; the local oscillator box has the local oscillator system and the up-conversion unit of the transmitting system on one side, and the receiving system corresponding to one set of antennas arranged on the other side; the power supply box houses the power control system; and the terminal box houses the digital baseband processing system and the control system. The boxes are connected to each other via SMP RF connectors located on the side walls of the structure and concealed interconnecting cables to achieve the connection of RF signals, control signals, and power supply.

[0112] The working principle of this invention is as follows:

[0113] Reception process: Electromagnetic waves are received by the antenna → Low noise amplifier unit (filtering, amplification) → First downmixer (mixed with the frequency-hopping receiver's local oscillator) → First intermediate frequency filter → Second downmixer (mixed with the fixed receiver's two local oscillators) → Final intermediate frequency filter and gain control → AD sampling → Digital baseband processing (demodulation, anti-interference algorithm: comparing the amplitude / phase consistency of the 4 signals) → Output data.

[0114] Transmitting process: input data → digital baseband processing (encoding, modulation) → generating intermediate frequency signal → first up-mixing (mixing with fixed transmitting local oscillator) → first intermediate frequency filtering → second up-mixing (mixing with frequency hopping transmitting local oscillator) → radio frequency filtering, driving amplification and power control → power amplifier → antenna radiation.

[0115] Anti-interference and mode switching: throughout the process, the control system makes real-time decisions according to the electromagnetic environment: start frequency hopping to avoid interference; when strong interference is detected, control the receiving link to reduce gain to prevent saturation; extract signals from noise through multiple signal comparison; according to communication requirements, schedule the local oscillator system to work in TDD or FDD mode.

[0116] Through unique local oscillator resource configuration, flexible compatibility of working mode is realized, the specific principle is as follows:

[0117] TDD mode: within the same group of antennas, the receiving and transmitting channels share the same antenna and frequency band through a double-section circulator and time sequence control. The control system ensures that the receiving system is closed when transmitting and the transmitting system is closed when receiving. At this time, the receiving local oscillator and the transmitting local oscillator used by the group come from the same frequency hopping source of the same local oscillator unit, ensuring the consistency of the receiving and transmitting frequencies.

[0118] FDD mode: different groups of antennas can work simultaneously. Three groups of receiving channels use three independent frequency hopping local oscillators (from local oscillator units A, B, and C), while three transmitting channels share one frequency hopping local oscillator (for example, from local oscillator unit A). Therefore, the receiving channel of group 1 can work at frequency f1, while the transmitting channel of group 2 can work at frequency f2 at the same time, without interfering with each other, realizing true frequency division duplexing.

Claims

1. A multi-antenna interference resistant broadband networking transceiver, characterized by: The system comprises an antenna system, a receiving system, a transmitting system, a local oscillator system and a digital baseband processing system; the antenna system is connected with the receiving system and the transmitting system respectively, the receiving system and the transmitting system are connected with the digital baseband processing system respectively, and the local oscillator system is connected with the receiving system and the transmitting system respectively; The antenna system comprises three groups of antennas, each group of antennas corresponds to four receiving channels and one transmitting channel, and is used for receiving and transmitting radio frequency signals; each group of antennas of the antenna system is a 2*2 passive antenna; One of the four receiving channels of each group of antennas shares one antenna with the transmitting channel; The four receiving channels of each group of antennas share one frequency hopping local oscillator, and the receiving channels of the three groups of antennas use three independent frequency hopping local oscillators respectively; The three transmitting channels share one frequency hopping local oscillator; Thus, the transmitting channel and the receiving channel in the same group of antennas are in TDD mode, and the transmitting channel and the receiving channel of different groups of antennas are in FDD mode; The receiving system comprises twelve receiving channels, each receiving channel comprises a low-noise amplifier unit and a frequency down-conversion unit connected in sequence, and is used for frequency down-conversion of the S~C band radio frequency signal received by the antenna system to an intermediate frequency signal; The transmitting system comprises one transmitting channel, the transmitting channel comprises an up-conversion unit and three power amplifier units connected in sequence, and is used for up-conversion and power amplification of the intermediate frequency signal to the S~C band radio frequency signal; The local oscillator system is used for providing fixed local oscillator signals and frequency hopping local oscillator signals for the receiving system and the transmitting system; The digital baseband processing system is used for AD sampling, demodulation and data processing of the intermediate frequency signal output by the receiving system, and generating an intermediate frequency signal to be transmitted, and identifying useful signals to realize anti-interference by comparing the consistency of amplitudes and phases of multiple receiving signals in the same group.

2. The multi-antenna interference resistant wideband networking transceiver of claim 1, wherein: The local oscillator system comprises a reference clock source circuit and three local oscillator units; the reference clock source circuit comprises a 100MHz oven-controlled crystal oscillator, the output end of the oven-controlled crystal oscillator is connected with a crystal oscillator power divider and a frequency divider, which are used for generating a 50MHz reference clock signal from the oven-controlled crystal oscillator and providing the reference clock signal to the digital baseband processing system and generating three reference frequency signals; the three local oscillator units are connected with the output end of the crystal oscillator power divider to obtain the reference frequency signals.

3. A multi-antenna interference resistant wideband networking transceiver according to claim 2, wherein: Each local oscillator unit is connected with a fixed local oscillator generation circuit and a frequency hopping local oscillator generation circuit through a local oscillator power divider, which are used for providing the required fixed local oscillator signals and frequency hopping local oscillator signals for the corresponding receiving channels and transmitting channels; The fixed local oscillator generation circuit comprises: A fixed local oscillator phase-locked loop, the reference input end of which is connected with the reference clock source circuit through the local oscillator power divider; A fixed local oscillator power divider, which is connected with the output end of the fixed local oscillator phase-locked loop to divide the fixed local oscillator signal; A fixed local oscillator amplifier, which is connected with each output end of the fixed local oscillator power divider to amplify the divided fixed local oscillator signal; And the fixed local oscillator generation circuits of the three local oscillator units divide the fixed local oscillator signal into thirteen paths, one of which is used as transmitting one local oscillator to provide the transmitting channel, and the other twelve are used as receiving two local oscillators to provide the twelve receiving channels respectively. The frequency hopping local oscillator generating circuit comprises a frequency hopping source, the frequency hopping source adopts a frequency hopping local oscillator phase-locked loop ping-pong switching architecture, comprising: two frequency hopping local oscillator phase-locked loops, the reference input ends of which are connected with the reference clock source circuit through a local oscillator power divider; a frequency hopping local oscillator radio frequency switch, the two fixed ends of which are connected with the output ends of the two frequency hopping local oscillator phase-locked loops respectively, and the common end thereof is used as an output end for alternately selecting the outputs of the two frequency hopping local oscillator phase-locked loops to form a frequency hopping local oscillator signal; a frequency hopping local oscillator power divider connected with the output end of the frequency hopping local oscillator radio frequency switch for power dividing the frequency hopping local oscillator signal; a frequency hopping fixed local oscillator amplifier connected with each output end of the frequency hopping local oscillator power divider for amplifying the power-divided frequency hopping local oscillator signal; the frequency hopping source of the three frequency hopping local oscillator generating circuits divides the frequency hopping local oscillator signal into thirteen paths, one of which is used as a transmitting two local oscillator to provide a transmitting channel, and the other twelve of which are used as receiving one local oscillators to provide 12 receiving channels respectively.

4. A multi-antenna interference resistant wideband networking transceiver according to claim 3, wherein: In the single receiving channel of the receiving system, the low noise amplifier unit comprises in sequence: a first receiving medium filter for filtering out out-of-band stray signals and suppressing image frequencies; a limiter connected with the first receiving medium filter for limiting the amplitude of strong input signals to protect subsequent circuits; a first receiving low noise amplifier which is a single-chip amplifier with a high 1 dB compression point, connected with the limiter for low noise amplification of the radio frequency signal; a medium band pass filter connected with the first receiving low noise amplifier for filtering the amplified signal.

5. A multi-antenna interference resistant wideband networking transceiver according to claim 4, wherein: The frequency conversion unit is connected with the low noise amplifier unit and adopts a twice frequency conversion structure, comprising in sequence a first down-mixing circuit, a second down-mixing circuit and an intermediate frequency amplification and gain control circuit; the first down-mixing circuit comprises a first down-mixer connected with a medium band pass filter and a corresponding local oscillator unit, the first down-mixer being a mixer with a high 1 dB compression point for mixing and frequency converting the radio frequency signal to a first intermediate frequency with a receiving one local oscillator, and the first down-mixing circuit is sequentially connected with a first receiving low pass filter, a first receiving FBAR filter, a second receiving low noise amplifier, a second receiving FBAR filter and a second receiving low pass filter; the first receiving low pass filter and the second receiving low pass filter are used for filtering out unwanted signals of local oscillator harmonics and high-end combined stray signals generated by mixing; the first receiving FBAR filter and the second receiving FBAR filter are used for adapting to different signal bandwidths and improving the anti-interference ability of the receiving link, and filtering out unwanted signals of near-end combined stray signals and image frequencies generated by mixing; the second receiving low noise amplifier is used for compensating the gain loss caused by frequency conversion and filtering; the second down-mixing circuit comprises a second down-mixer connected with the first down-mixing circuit and a corresponding local oscillator unit, for mixing and frequency converting the first intermediate frequency signal to an intermediate frequency with a receiving two local oscillator, and the second down-mixing circuit is sequentially connected with a third receiving low pass filter and a first receiving surface acoustic wave filter for suppressing radio frequency and local oscillator leakage and providing adjacent channel suppression; The intermediate frequency amplification and gain control circuit is connected with the second down mixing circuit, and comprises multiple receiving monolithic amplifiers and receiving attenuators arranged between the receiving monolithic amplifiers, and the last receiving monolithic amplifier and the third last receiving monolithic amplifier are respectively provided with bypass paths realized by receiving radio frequency switches; the intermediate frequency amplification and gain control circuit is used for amplifying the intermediate frequency signal and realizing multi-grade accurate gain control by controlling the conduction and disconnection of the receiving radio frequency switches and combining the receiving attenuators in the adjusting circuit.

6. The multi-antenna interference resistant wideband networking transceiver of claim 3, wherein: The up conversion unit of the transmitting system adopts a twice up conversion structure, and comprises an intermediate frequency processing circuit, a first up mixing circuit, a second up mixing circuit and a radio frequency driving and power control circuit connected in sequence; The intermediate frequency processing circuit is used for receiving and conditioning the intermediate frequency signal from the digital baseband processing system, and comprises an LTCC filter, a first transmitting low noise amplifier and a transmitting sound table filter connected in sequence; the LTCC filter and the transmitting sound table filter are used for filtering out the out-of-band noise, and the first transmitting low noise amplifier is used for signal amplification; The first up mixing circuit comprises a first up mixer connected with the intermediate frequency processing circuit and a corresponding local oscillator unit thereof, and is used for mixing and up converting the intermediate frequency signal with a transmitting first local oscillator to a first intermediate frequency; a first transmitting low pass filter, a first transmitting FBAR filter, a second transmitting low noise amplifier, a second transmitting FBAR filter and a second transmitting low pass filter are sequentially connected after the first up mixer, and are used for filtering out the high order harmonics and stray components generated in the mixing; The second up mixing circuit comprises a second up mixer connected with the first up mixing circuit and a corresponding local oscillator unit thereof, and is used for mixing and up converting the first intermediate frequency signal with a transmitting second local oscillator to a radio frequency; a first transmitting temperature compensation attenuator, a first transmitting medium filter and a second transmitting temperature compensation attenuator are sequentially connected after the second up mixer, and are used for compensating the temperature drift of the link gain and suppressing the out-of-band stray; The radio frequency driving and power control circuit is connected with the second up mixing circuit, and comprises three-stage transmitting amplifiers connected in sequence, and one digital controlled attenuator arranged before and after the second-stage transmitting amplifier; a second transmitting medium filter is arranged between the digital controlled attenuator and the third-stage transmitting amplifier, and is used for realizing accurate control of the transmitting power; An output end of the radio frequency driving and power control circuit is connected to an input end of a microwave switch composed of two-stage single-pole double-throw switches in cascade; three output ends of the microwave switch are respectively connected to three independent power amplifier units, and are used for selectively distributing the radio frequency signal generated by the up conversion unit to any power amplifier unit.

7. A multi-antenna interference resistant wideband networking transceiver according to claim 6, wherein: The power amplifier unit comprises an isolator, a microwave power tube, a two-section circulator and a cavity filter connected in sequence; The isolator is connected to the output end of the microwave switch, and is used for improving the input standing wave of the power amplifier unit and preventing the reflected out-of-band signal from reaching the microwave power tube; The microwave power tube is used for power amplifying the radio frequency signal; The two-section circulator is also connected with a low noise amplifier unit, and is used for realizing the switching between the transmitting and receiving in the TDD working mode and guiding the transmitting signal to the antenna. The cavity filter is used for suppressing harmonic and out-of-band noise signals to suppress the noise power spectrum density of the transmitting link to the out-of-band receiving frequency band.

8. The multi-antenna interference resistant wideband networking transceiver of claim 1, wherein: The control system is connected with the local oscillator system, the receiving system, the transmitting system, the digital baseband processing system and the power control system respectively, and is used for realizing frequency hopping control, channel gain control and transceiver switching timing control. The power control system is connected with the receiving system, the transmitting system, the local oscillator system, the digital baseband processing system and the control system, and is used for providing working power. The power control system comprises a reverse connection prevention circuit, a surge suppression circuit, an EMI filter circuit and a power conversion circuit connected in sequence, and is used for converting and stably outputting +28V, +5V, -5V, +3.3V, +1.2V and +12V voltages. The power control system is controlled by the control system, and the on-off of +28V and +5V power supply is controlled through a MOSFET driver and a P-channel field effect transistor.

9. A multi-antenna interference resistant wideband networking transceiver according to claim 8, wherein: The structure main body made of an aluminum alloy is used for mechanically bearing and electrically connecting the systems. Five functional box bodies, i.e., a power amplifier box, a frequency conversion box, a local oscillator box, a power supply box and a terminal box, are stacked and fastened through long screws. The power amplifier box accommodates the power amplifier unit of the transmitting system. Two receiving systems corresponding to two groups of antennas are arranged on two surfaces of the frequency conversion box. The local oscillator box is provided with the local oscillator system and the up-conversion unit of the transmitting system on one surface, and is provided with one receiving system corresponding to one group of antennas on the other surface. The power supply box accommodates the power control system. The terminal box accommodates the digital baseband processing system and the control system. The box bodies are connected through SMP radio frequency connectors arranged on the side walls of the structure and hidden interconnection cables to realize the connection of radio frequency signals, control signals and power supply.

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