Time synchronization methods, time synchronization systems and storage media

Abstract

This application discloses a time synchronization method, a time synchronization system, and a storage medium. The method includes: simultaneously receiving and fusing time signals from multiple sources to obtain a local time reference signal; calculating the frequency compensation amount of the local clock source in real time based on an LSTM model trained using the local time reference signal; detecting whether the time signal is available, and determining whether to switch between atomic clock discipline mode and timekeeping mode based on the detection result; inserting a femtosecond-precision timestamp into the initial data packet using a PIC to obtain the target data packet; and sending the time synchronization information and the target data packet to a 6G network node using a precision time protocol of an FPGA chip. This application, based on satellite signals as a time reference, considers both available and unavailable satellite signals, adjusts the local clock source by combining the results of multi-source satellite signal fusion, and incorporates photonic time synchronization to improve time synchronization accuracy and meet the requirements of 6G networks.

Description

Technical Field

[0001] This application relates to, but is not limited to, the field of time synchronization technology, and in particular to a time synchronization method, a time synchronization system, and a storage medium. Background Technology

[0002] As 6G communication evolves towards the terahertz frequency band and an integrated air-space-ground-sea network architecture, its evolution places extreme demands on time synchronization accuracy below 1 nanosecond (ns) and clock jitter below 200 femtoseconds (fs). Current time synchronization technologies, achieved through multi-mode satellite discipline, primarily rely on medium- and high-orbit satellites such as BeiDou and GPS. While this improves reliability, it is still affected by ephemeris errors and ionospheric delays, making it difficult to maintain dynamic accuracy within 10 nanoseconds, which is insufficient to meet the requirements of 6G communication. Summary of the Invention

[0003] This application provides a time synchronization method, a time synchronization system, and a storage medium, which effectively improves time synchronization accuracy and can meet the requirements of 6G networks.

[0004] In a first aspect, embodiments of this application provide a time synchronization method applied to a time synchronization system, the time synchronization system including a local clock source, a photonic integrated circuit (PIC), and an FPGA chip, wherein the local clock source is communicatively connected to the photonic integrated circuit and the FPGA chip respectively, and the method includes:

[0005] Simultaneously receive time signals from multiple sources, wherein the time signals include at least the original time signal and the ground reference signal;

[0006] The local time reference signal is obtained by fusing all the time signals using a weighted Kalman filter algorithm, and an LSTM model is trained based on the local time reference signal.

[0007] The frequency compensation amount of the local clock source is calculated in real time using the trained LSTM model.

[0008] The availability of the time signal is detected, a detection result is obtained, and based on the detection result, it is determined whether to switch between atomic clock discipline mode and timekeeping mode, wherein the timekeeping mode is associated with the frequency compensation amount;

[0009] The target data packet is obtained by inserting a femtosecond-precision timestamp into the initial data packet using a PIC.

[0010] The time synchronization information and the target data packet are sent to the 6G network node through the precision time protocol preset by the FPGA chip.

[0011] In some embodiments, the time signals are fused based on a weighted Kalman filter algorithm to obtain a local time reference signal, including:

[0012] The confidence weights are calculated based on the carrier-to-noise ratio, satellite elevation angle, and multipath error index of each of the aforementioned time signals.

[0013] A first observation noise covariance matrix is ​​constructed based on all the confidence weights, and Kalman filtering fusion processing is performed based on the first observation noise covariance matrix to obtain the local time reference signal.

[0014] In some embodiments, the corresponding confidence weights are calculated based on the carrier-to-noise ratio, satellite elevation angle, and multipath error index of the original time signal and the ground reference signal, respectively, according to the following formula:

[0015] Wi = (C / N0) i * sin(Elevationi) / (1 + MPi);

[0016] Where Wi is the confidence weight of the time signal corresponding to the i-th signal source, (C / N0)i is the carrier-to-noise ratio of the corresponding time signal, Elevationi is the satellite elevation angle of the corresponding time signal, and MPi is the multipath error index of the corresponding time signal.

[0017] In some embodiments, a first observation noise covariance matrix is ​​constructed based on all the confidence weights, and Kalman filtering fusion processing is performed based on the first observation noise covariance matrix to obtain the local time reference signal, including:

[0018] A first time difference is measured based on the local clock source for each of the time signals, wherein the first time difference is used to indicate the time difference between the rising edge of any valid time signal and the corresponding edge of the local clock source;

[0019] Construct a first observation vector based on all of the first time differences;

[0020] The first observation noise covariance matrix is ​​constructed based on preset empirical values ​​and all the confidence weights;

[0021] The local time reference signal is determined by recursively calculating using the first observation vector and the first observation noise covariance matrix through the Kalman filter in the FPGA chip.

[0022] In some embodiments, the local time reference signal is determined by recursively calculating using the first observation vector and the first observation noise covariance matrix through a Kalman filter in the FPGA chip, including:

[0023] The Kalman filter predicts the second reference signal at the current time based on the first reference signal output at the previous time and the clock model.

[0024] The second reference signal is weighted and fused with the first observation vector at the current time to obtain a third reference signal, wherein there are multiple third reference signals, and each third reference signal uniquely corresponds to a first time difference;

[0025] Based on any of the third reference signals, a residual value is calculated with the corresponding first time difference, and the local time reference signal is determined based on whether the residual value exceeds a preset threshold.

[0026] In some embodiments, determining the local time reference signal based on whether the residual value exceeds a preset threshold includes:

[0027] When the residual value exceeds a preset threshold, it is determined that the signal source of the time signal corresponding to the residual value exceeding the preset threshold is abnormal, and the confidence weight of the time signal corresponding to the abnormal signal source is reset to zero. The data associated with the abnormal signal source in the current first observation vector and the first observation noise covariance matrix are removed to obtain the second observation vector and the second observation noise covariance matrix. The Kalman filter predicts the fifth reference signal at the current time based on the fourth reference signal associated with the target signal source at the previous time and the clock model. The fifth reference signal is weighted and fused with the second observation vector at the current time to obtain the sixth reference signal. The sixth reference signal is determined as the local time reference signal. The target signal source is the remaining signal source among all the signal sources corresponding to the time signals, excluding the abnormal signal source.

[0028] When the residual value does not exceed a preset threshold, the third reference signal is determined as the local time reference signal.

[0029] In some embodiments, the local clock source includes a chip-level atomic clock and a temperature-controlled crystal oscillator. Determining whether to switch between atomic clock discipline mode and timekeeping mode based on the detection results includes:

[0030] When the detection result indicates that the time signal is available, switch the atomic clock discipline mode and train the isothermal crystal oscillator through the reference reference signal output by the chip-level atomic clock;

[0031] When the detection result indicates that the time signal is unavailable, switch to timekeeping mode and perform real-time correction on the isothermal crystal oscillator based on the frequency compensation amount.

[0032] In some embodiments, the PIC includes an optical frequency comb generation unit, a linear optical sampling interferometry structure, and a balanced photodetector. The linear optical sampling interferometry structure includes a beam splitter and a beam combiner. The PIC inserts a femtosecond-precision timestamp into the initial data message to obtain the target data message, including:

[0033] Obtain the optical pulse sequence output by the optical frequency comb generation unit in the photonic integrated circuit, wherein the optical pulse sequence includes a first signal pulse;

[0034] When the initial data packet arrives, the electrical signal of the initial data packet triggers a high-speed electro-optic modulator, and the high-speed electro-optic modulator outputs a second signal pulse corresponding to the arrival event of the initial data packet;

[0035] The first signal pulse and the second signal pulse are sequentially passed through the beam splitter and the beam combiner for beam splitting and beam combining, and an interference light intensity signal is output.

[0036] The interference light intensity signal is converted into an interference electrical signal by the balanced photodetector.

[0037] The second time difference between the first signal pulse and the second signal pulse is determined based on the phase of the interference electrical signal;

[0038] The absolute time of the first signal pulse is determined, and the timestamp is obtained by summing the absolute time and the second time difference. The timestamp is then inserted into the initial data packet to obtain the target data packet.

[0039] In a second aspect, embodiments of this application provide a time synchronization system, including at least one control processor and a memory for communicatively connecting to the at least one control processor; the memory stores instructions executable by the at least one control processor, which, when executed by the at least one control processor, enable the at least one control processor to perform the time synchronization method as described in the first aspect.

[0040] Thirdly, embodiments of this application also provide a computer-readable storage medium storing computer-executable instructions for performing the time synchronization method as described in the first aspect.

[0041] This application provides a time synchronization method, a time synchronization system, and a storage medium. The method includes: simultaneously receiving time signals from multiple sources, wherein the time signals include at least an original time signal and a ground reference signal; fusing all the time signals based on a weighted Kalman filter algorithm to obtain a local time reference signal, and training an LSTM model based on the local time reference signal; using the trained LSTM model to calculate the frequency compensation amount of the local clock source in real time; detecting whether the time signal is available, obtaining a detection result, and determining whether to switch between an atomic clock discipline mode or a timekeeping mode based on the detection result, wherein the timekeeping mode is associated with the frequency compensation amount; inserting a femtosecond-precision timestamp into an initial data packet using a PIC to obtain a target data packet; and sending the time synchronization information and the target data packet to a 6G network node using a precision time protocol preset by the FPGA chip. According to the scheme provided in the embodiments of this application, based on satellite signals as a time reference, it also takes into account the two situations of satellite signals being available and unavailable, and adjusts the local clock source by combining the fusion results of multi-source satellite signals, as well as photonic time synchronization, which can solve the problem of multi-mode satellite discipline scheme being affected by ephemeris errors and ionospheric delay, improve time synchronization accuracy, and meet the requirements of 6G network. Attached Figure Description

[0042] Figure 1 This is a flowchart of the steps of a time synchronization method provided in one embodiment of this application;

[0043] Figure 2 This is a structural diagram of a time synchronization system provided in another embodiment of this application. Detailed Implementation

[0044] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this application.

[0045] It is understandable that although functional modules are divided in the device schematic diagram and a logical order is shown in the flowchart, in some cases, the steps shown or described may be performed in a different order than the module division in the device or the order in the flowchart. The terms "first," "second," etc., in the specification, claims, or the aforementioned drawings are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence.

[0046] As 6G communication evolves towards the terahertz frequency band and an integrated air-space-ground-sea network architecture, its evolution places extreme demands on time synchronization accuracy below 1 nanosecond (ns) and clock jitter below 200 femtoseconds (fs). Current time synchronization technologies, achieved through multi-mode satellite discipline, primarily rely on medium- and high-orbit satellites such as BeiDou and GPS. While this improves reliability, it is still affected by ephemeris errors and ionospheric delays, making it difficult to maintain dynamic accuracy within 10 nanoseconds, which is insufficient to meet the requirements of 6G communication.

[0047] To address the aforementioned problems, this application provides a time synchronization method, a time synchronization system, and a storage medium. The method includes: simultaneously receiving time signals from multiple sources, wherein the time signals include at least an original time signal and a ground reference signal; fusing all the time signals based on a weighted Kalman filter algorithm to obtain a local time reference signal, and training an LSTM model based on the local time reference signal; using the trained LSTM model to calculate the frequency compensation amount of the local clock source in real time; detecting whether the time signal is available, obtaining a detection result, and determining whether to switch between an atomic clock discipline mode and a timekeeping mode based on the detection result, wherein the timekeeping mode is associated with the frequency compensation amount; inserting a femtosecond-precision timestamp into an initial data packet using a PIC to obtain a target data packet; and sending the time synchronization information and the target data packet to a 6G network node using a precision time protocol preset by the FPGA chip. According to the scheme provided in the embodiments of this application, based on satellite signals as a time reference, it also takes into account the two situations of satellite signals being available and unavailable, and adjusts the local clock source by combining the fusion results of multi-source satellite signals, as well as photonic time synchronization, which can solve the problem of multi-mode satellite discipline scheme being affected by ephemeris errors and ionospheric delay, improve time synchronization accuracy, and meet the requirements of 6G network.

[0048] The embodiments of this application will be further described below with reference to the accompanying drawings.

[0049] refer to Figure 1 , Figure 1 This is a flowchart illustrating the steps of a time synchronization method provided in one embodiment of this application. This application provides a time synchronization method applied to a time synchronization system. The time synchronization system includes a local clock source, a photonic integrated circuit (PIC), and an FPGA chip. The local clock source is communicatively connected to both the PIC and the FPGA chip. The method includes, but is not limited to, the following steps:

[0050] Step S10: Simultaneously receive time signals from multiple sources, wherein the time signals include at least the original time signal and the ground reference signal.

[0051] It is understood that in this embodiment, the time synchronization system is equipped with a multi-mode satellite receiving unit and a ground reference signal receiving unit. The multi-mode satellite receiving unit and the ground reference signal receiving unit simultaneously receive time signals from multiple sources. The process of the multi-mode satellite receiving unit receiving time signals from multiple sources includes: using the ublox ZED-F9T-11B high-precision time synchronization module to simultaneously receive and parse navigation messages from BeiDou-3 (B1I / B2a), GPS III (L1C / A, L2C), Galileo (E1, E5b), and low-orbit augmentation constellations (such as Starlink downlink pilot signals), and outputting time signals conforming to the NMEA-0183 protocol (the time signal in this embodiment includes the raw time and the second pulse signal 1PPS). The multi-mode satellite receiving unit achieves synchronous reception of multiple signals through an antenna array, which can effectively suppress multipath effects; the ground reference signal receiving unit receives IRIG-B or PTP reference signals from the national time service center or regional reference station through a wired network (such as a fiber optic leased line) as a backup reference when satellite signals fail; thus providing an effective data foundation for the subsequent realization of time synchronization of 6G network nodes.

[0052] Step S20: Based on the weighted Kalman filter algorithm, all time signals are fused to obtain the local time reference signal, and the LSTM model is trained based on the local time reference signal.

[0053] Specifically, in this embodiment, the operation of fusing all time signals based on the weighted Kalman filter algorithm to obtain the local time reference signal and training the LSTM model is performed by the FPGA chip.

[0054] It is understood that this embodiment uses a weighted Kalman filter algorithm to fuse all time signals to obtain a local time reference signal, and trains an LSTM model based on the local time reference signal. This provides effective support for ensuring time synchronization accuracy by ensuring that the local clock source can output an accurate time reference when the time signal becomes unavailable.

[0055] Specifically, in some embodiments, the process of fusing time signals based on a weighted Kalman filter algorithm in step S10 to obtain a local time reference signal includes, but is not limited to, the following steps:

[0056] Step S21: Calculate the corresponding confidence weight based on the carrier-to-noise ratio, satellite elevation angle, and multipath error index of each time signal;

[0057] Step S22: Construct the first observation noise covariance matrix based on all confidence weights, and perform Kalman filtering fusion processing based on the first observation noise covariance matrix to obtain the local time reference signal.

[0058] It should be noted that the confidence weight in step S21 is calculated using the following formula:

[0059] W i = (C / N0) i * sin(Elevation i ) / (1 + MP i );

[0060] Among them, W i Let (C / N0) be the confidence weight corresponding to the time signal of the i-th signal source. i Elevation is the carrier-to-noise ratio of the corresponding time signal. i MP represents the satellite elevation angle corresponding to the time signal. i This is the multipath error exponent for the corresponding time signal.

[0061] Understandably, before calculating the local time reference signal, it is necessary to evaluate the signal quality of the time signals from various signal sources and calculate their confidence weights W in real time. i Specifically, after receiving the time signals from each signal source, the FPGA chip extracts three key quality parameters (including carrier-to-noise ratio, satellite elevation angle, and multipath error index) for each time signal in real time, and calculates the confidence weight W of the corresponding signal using the carrier-to-noise ratio, satellite elevation angle, and multipath error index. i For example, for a GPS satellite with a carrier-to-noise ratio (C / N0) of 45 dB-Hz, an elevation angle of 60 degrees, and a multipath error index (MP) of 0.2, its confidence weight Wgps = 45 * sin(60°) / (1+0.2)≈32.5. This means that a higher C / N0 corresponds to better signal quality; a higher elevation angle results in a shorter path for the signal through the atmosphere, leading to smaller errors; and a larger MP results in larger errors. i It can comprehensively reflect the instantaneous quality of the corresponding time signal. For example, a satellite with a high elevation angle and a strong signal can still obtain a high weight even if there is slight multipath; while the weight of a satellite with a low elevation angle and a weak signal will be automatically reduced. This embodiment can ensure that a highly accurate local time reference signal can be obtained after calculating the confidence weight of each time signal.

[0062] Specifically, step S22 includes, but is not limited to, the following steps:

[0063] Step S221: Measure the first time difference of each time signal based on the local clock source, wherein the first time difference is used to indicate the time difference between the rising edge of any valid time signal and the corresponding edge of the local clock source;

[0064] Step S222: Construct the first observation vector based on all the first time differences;

[0065] Step S223: Construct the first observation noise covariance matrix based on the preset empirical values ​​and all confidence weights;

[0066] Step S224: The local time reference signal is determined by recursive calculation using the first observation vector and the first observation noise covariance matrix through the Kalman filter in the FPGA chip.

[0067] Specifically, step S224 includes, but is not limited to, the following steps:

[0068] Step S2241: The Kalman filter predicts the second reference signal at the current time based on the first reference signal output at the previous time step and the clock model;

[0069] Step S2242: The second reference signal is weighted and fused with the first observation vector at the current time to obtain the third reference signal. There are multiple third reference signals, and each third reference signal uniquely corresponds to a first time difference.

[0070] Step S2243: Based on any third reference signal, calculate the residual value with the corresponding first time difference, and determine the local time reference signal based on whether the residual value exceeds a preset threshold.

[0071] Specifically, step S2243 includes, but is not limited to, the following steps:

[0072] When the residual value exceeds a preset threshold, it is determined that the signal source of the time signal corresponding to the residual value exceeding the preset threshold is abnormal. The confidence weight of the time signal corresponding to the abnormal signal source is reset to zero. The data associated with the abnormal signal source in the current first observation vector and the first observation noise covariance matrix are removed to obtain the second observation vector and the second observation noise covariance matrix. The Kalman filter predicts the fifth reference signal at the current time based on the fourth reference signal of the previous time and the clock model associated with the target signal source. The fifth reference signal is weighted and fused with the second observation vector at the current time to obtain the sixth reference signal. The sixth reference signal is determined as the local time reference signal. The target signal source is the remaining signal source among all the signal sources corresponding to the time signals, excluding the abnormal signal source.

[0073] When the residual value does not exceed the preset threshold, the third reference signal is determined as the local time reference signal.

[0074] Understandably, in calculating the local time reference signal, this embodiment constructs a first observation noise covariance matrix based on all confidence weights corresponding to the time signals, and performs Kalman filtering fusion processing based on the first observation noise covariance matrix to obtain the local time reference signal. Specifically, the first time difference Δt_i of each time signal is measured based on the local clock source, where the first time difference Δt_i is used to indicate the time difference between the rising edge of any valid time signal and the corresponding edge of the local clock source. A first observation vector Z = [Δt_1, Δt_2,..., Δt_n] is constructed based on all the first time differences. T The observation vector is defined as the time difference between the 1PPS rising edge of each signal source and the corresponding rising edge of the local clock source. A first observation noise covariance matrix R is constructed based on preset empirical values ​​and all confidence weights, where R is a diagonal matrix, and its diagonal elements R_ii and confidence weights W... i Inversely proportional (i.e., R_ii = k / W) i (where k is a preset empirical value), which means that signal sources with high confidence weights are given higher confidence during the filtering process; the local time reference signal is finally determined by recursively calculating using the first observation vector and the first observation noise covariance matrix through the Kalman filter in the FPGA chip.

[0075] Specifically, the variables associated with the reference signal output by the Kalman filter include the phase deviation and frequency deviation of the local clock source. The process of the Kalman filter to calculate the local time reference signal includes two stages: prediction and update. (1) Prediction stage: The Kalman filter predicts the second reference signal at the current time based on the first reference signal output at the previous time and the clock model. (2) Update stage: The second reference signal is weighted and fused with the first observation vector at the current time to obtain the third reference signal (i.e., the current optimal state estimate). There are multiple third reference signals, and each third reference signal uniquely corresponds to a first time difference. In the optimal state estimate (i.e., the third reference signal) output by the Kalman filter, the phase deviation part is the high-precision absolute time deviation after fusion correction. This process effectively suppresses noise such as ephemeris error and ionospheric delay of a single satellite, and improves the accuracy of the fused time reference to 2.8 nanoseconds.

[0076] Next, the Kalman filter in this embodiment also has a fault-tolerance mechanism. Based on any third reference signal, a residual value is calculated with the corresponding first time difference. Specifically, the difference between the first time difference Δt_i corresponding to each signal source and the third reference signal output by the corresponding Kalman filter (i.e., the fusion result) is determined as the residual value. The final local time reference signal is determined based on whether the residual value exceeds a preset threshold. When the residual value exceeds the preset threshold (e.g., 3 times the historical residual standard deviation), the signal source corresponding to the residual value exceeding the preset threshold is determined to be abnormal (possibly due to momentary obstruction, signal interference, etc.). The confidence weight of the time signal corresponding to the abnormal signal source is reset to zero, and a re-processing is performed. The new fusion operation involves removing data associated with anomalous signal sources from the current first observation vector and the first observation noise covariance matrix, resulting in a second observation vector and a second observation noise covariance matrix. The Kalman filter predicts the fifth reference signal at the current time based on the fourth reference signal associated with the target signal source at the previous time step and the clock model. The fifth reference signal is then weighted and fused with the current second observation vector to obtain a sixth reference signal, which is determined as the local time reference signal. The target signal source is any signal source other than the anomalous signal source among all time signal sources. Only the remaining normal signal source data is used to re-perform the weighted Kalman filter update. This ensures that even if some signal sources fail, the system can still output a reliable time reference based on high-quality data, greatly enhancing the system's robustness. When the residual value does not exceed a preset threshold, the third reference signal is determined as the local time reference signal.

[0077] Understandably, after all the above steps, the FPGA chip outputs the high-precision local time reference signal (including absolute date and time information and a synchronized 1PPS signal) finally fused in this filtering cycle, and passes it to the high-stability clock discipline module to discipline the oven-controlled crystal oscillator (OCXO). The entire algorithm runs in a loop within the FPGA chip at extremely high speeds (e.g., hundreds or thousands of iterations per second), achieving continuous and accurate calibration of the local clock. Furthermore, the time synchronization method in this embodiment processes up to 20 satellite signals and 1 ground signal in parallel on a Xilinx Artix-7 FPGA, with each filtering update cycle completed within microseconds, ensuring the system's high-speed response capability to dynamic environments.

[0078] Step S30: Calculate the frequency compensation amount of the local clock source in real time using the trained LSTM model.

[0079] It is understood that the FPGA chip in this embodiment also includes an LSTM error compensation engine, which is implemented in the form of a hardware neural network within the FPGA chip. The pre-trained LSTM model parameters are stored in the BRAM of the FPGA chip. The time synchronization system in this embodiment also includes a MAX31865 platinum resistance temperature sensor (accuracy ±0.1℃). This temperature sensor collects OCXO temperature data at a rate of 10Hz, forming a time series [T_current, T_hist_avg, dT / dt] as input to the LSTM model, where T_current is the current temperature of the OCXO in the local clock source, T_hist_avg is the historical temperature moving average, and dT / dt is the temperature change rate. Through real-time inference of the LSTM model, the control voltage (i.e., the frequency compensation amount Δf) for the OCXO is output. Tests showed that this LSTM model improved the frequency stability of the OCXO by 5 times in a temperature range of -40℃ to 85℃, and reduced the temperature recovery time from 8.5 seconds in the traditional solution to 0.8 seconds, providing effective support for high-precision timekeeping functions.

[0080] It is understandable that, in this embodiment, the dynamic temperature compensation engine based on Long Short-Term Memory (LSTM) networks is the core of the high-stability clock discipline module in maintaining high accuracy in timekeeping mode. Its goal is to overcome the inherent nonlinear temperature drift and temperature hysteresis effects of OCXOs. This compensation process is divided into a model training phase (usually completed before system deployment) and a real-time inference phase (continuously performed during system runtime):

[0081] (1) Model training phase (conducted offline)

[0082] Data Acquisition: The high-stability clock discipline module (such as the Rakon HRPO OCXO) was placed in a temperature chamber and subjected to multiple high and low temperature cycle tests within the target operating temperature range (e.g., -40℃ to +85℃). A high-precision frequency counter (e.g., Pendulum CNT-90) was used to measure the actual output frequency f_actual of the OCXO at different temperature points T, and compared with its nominal frequency f_nominal to obtain the frequency deviation Δf = f_actual - f_nominal. Simultaneously, a high-precision temperature sensor (e.g., MAX31865) was used to record the historical temperature data of the OCXO at a fixed sampling rate (e.g., 1 Hz).

[0083] Feature engineering: For each time point t, construct the following three features from the temperature time series as input to the LSTM model:

[0084] Current temperature (T_current): The instantaneous temperature value at time point t.

[0085] Historical temperature moving average (T_history_avg): The average temperature over a historical time window (e.g., 60 seconds). This feature is used to characterize the average thermal state of the OCXO chip and mitigate the impact of transient fluctuations.

[0086] Rate of temperature change (dT / dt): The rate of change of the current temperature relative to the previous moment. This characteristic is key to capturing hysteresis effects because the frequency drift of a crystal oscillator depends not only on the current temperature but also on whether the temperature is rising or falling.

[0087] Label data: The frequency deviation Δf corresponding to time point t is used as the target value for training.

[0088] Network Training: Construct an LSTM model with a 3-node input layer (corresponding to three features), followed by one or more LSTM hidden layers (e.g., 128 neurons), and finally outputting a value, the predicted frequency compensation Δf_pred, through a fully connected layer. Train the model using a large amount of collected (feature, Δf) data, minimizing the mean squared error between the predicted value Δf_pred and the true value Δf using the backpropagation algorithm. After training, solidify the obtained network weights and bias parameters for later use.

[0089] (2) Real-time reasoning stage (conducted online)

[0090] The trained LSTM model is hardware-based and deployed on the FPGA chip of the time synchronization system. The real-time compensation process of the LSTM model is as follows:

[0091] 2.1 Data Acquisition and Preprocessing:

[0092] The FPGA chip reads data from the MAX31865 temperature sensor attached to the OCXO in real time via the SPI interface to obtain the current temperature T_current.

[0093] The FPGA chip maintains a temperature buffer inside, stores the temperature history data for the most recent 60 seconds, and calculates its moving average T_history_avg;

[0094] The FPGA calculates the instantaneous temperature change rate dT / dt based on the current temperature and the temperature at the previous moment.

[0095] 2.2 Feature Vector Construction and LSTM Model Inference:

[0096] The three features [T_current, T_history_avg, dT / dt] are combined into a single input vector;

[0097] The input vector is fed into the hardware-integrated LSTM inference engine within the FPGA chip. The FPGA chip utilizes the parallel computing capabilities of the LSTM inference engine to quickly complete the forward propagation calculation of the LSTM model. The memory cells of the LSTM model can effectively learn the temporal patterns of temperature changes. For example, when the temperature rapidly rises from a low temperature to a high temperature, dT / dt is positive and relatively large. The LSTM model will "remember" that the frequency deviation at this point lags behind the temperature change, thus predicting a more accurate frequency compensation amount Δf_pred than a traditional polynomial model.

[0098] 2.3 Application of frequency compensation:

[0099] Δf_pred is a digital quantity that the FPGA chip converts into an analog voltage value V_comp through its built-in digital-to-analog converter (DAC) or an external DAC chip.

[0100] This compensation voltage V_comp is applied to the voltage-controlled frequency modulation (VC-TCXO / VC-OCXO) terminal of the OCXO to fine-tune its output frequency to compensate for frequency drift caused by temperature changes.

[0101] By accurately modeling the temperature time-series dynamics using the LSTM model, the nonlinear lag problem that traditional compensation methods cannot handle was successfully solved. This enabled the system to maintain nanosecond-level synchronization accuracy in rapid temperature change environments and during the timekeeping phase after satellite lock-up, meeting the extreme requirements of 6G networks.

[0102] Step S40: Detect whether the time signal is available, obtain the detection result, and determine whether to switch the local clock source to atomic clock discipline mode or timekeeping mode based on the detection result, wherein the timekeeping mode is associated with frequency compensation amount.

[0103] Specifically, the local clock source is a hybrid clock source, including a chip-scale atomic clock (CSAC) as a long-term frequency reference and a temperature-controlled crystal oscillator (OCXO) as a short-term stability guarantee. When there is an external satellite signal (i.e., when the time synchronization system receives multiple time signals), the OCXO is tamed based on the CSAC. When there is no external satellite signal, it switches to the OCXO timekeeping mode driven by the error compensation engine, that is, the temperature-controlled crystal oscillator is corrected in real time by the frequency compensation amount output by the LSTM model.

[0104] Specifically, in some embodiments, the local clock source includes a chip-level atomic clock and a temperature-controlled crystal oscillator. The step S40, which determines whether to switch the local clock source to atomic clock discipline mode or timekeeping mode based on the detection result, includes, but is not limited to, the following steps:

[0105] Step S41: When the detection result characterizes the time signal, switch the atomic clock discipline mode and train the temperature-controlled crystal oscillator through the reference reference signal output by the chip-level atomic clock.

[0106] Step S42: When the detection result indicates that the time signal is unavailable, switch to timekeeping mode and perform real-time correction of the temperature-controlled crystal oscillator based on the frequency compensation amount.

[0107] Specifically, this embodiment uses a local clock source associated with a high-stability clock discipline module. This module includes a phase detector and control unit, which consists of a high-precision phase detector (such as AD9901) and digital phase-locked loop (DPLL) logic within the FPGA chip. During normal operation, the phase detector compares the phase difference between the 1PPS_CSAC output from the CSAC and the reference 1PPS_REF provided by the fusion module. The DPLL uses feedback control to lock the OCXO onto the CSAC. When the FPGA chip detects the loss of all external reference sources (i.e., the time signals corresponding to each external signal source are unavailable), it immediately switches to "timekeeping mode," disconnects the CSAC loop, and switches to direct LSTM compensation engine-driven OCXO, achieving a seamless transition.

[0108] Step S50: Insert a femtosecond-precision timestamp into the initial data packet using PIC to obtain the target data packet.

[0109] It is understood that the core function of the silicon-based photonic integrated circuit (PIC) in this embodiment is to provide a timestamp with femtosecond precision. The PIC may include an optical frequency comb generation unit, a linear optical sampling interference structure, and a balanced photodetector. Specifically, in some embodiments, the PIC includes an optical frequency comb generation unit, a linear optical sampling interference structure, and a balanced photodetector. The linear optical sampling interference structure includes a beam splitter and a beam combiner. Step S50 includes, but is not limited to, the following steps:

[0110] Step S51: Obtain the optical pulse sequence output by the optical frequency comb generation unit in the photonic integrated circuit, the optical pulse sequence including the first signal pulse;

[0111] Step S52: When the initial data message arrives, the electrical signal of the initial data message triggers the high-speed electro-optic modulator, and the high-speed electro-optic modulator outputs a second signal pulse corresponding to the arrival event of the initial data message.

[0112] Step S53: The first signal pulse and the second signal pulse are sequentially passed through a beam splitter and a beam combiner for beam splitting and beam combining, and an interference light intensity signal is output.

[0113] Step S54: The interference light intensity signal is converted into an interference electrical signal by a balanced photodetector;

[0114] Step S55: Determine the second time difference between the first signal pulse and the second signal pulse based on the phase of the interference electrical signal;

[0115] Step S56: Determine the absolute time of the first signal pulse, sum the absolute time and the second time difference to obtain the timestamp, insert the timestamp into the initial data packet, and obtain the target data packet.

[0116] Understandably, the PIC also includes a photonic timestamp extraction unit, which is based on the Michelson interferometer principle. A high-speed electro-optic modulator triggered by the data packet converts the electrical signal into an optical pulse. This optical pulse meets the optical pulse of the frequency comb in the interferometer. By detecting the phase of the interference fringes, the arrival time of the data packet can be accurately determined with a resolution within 200 femtoseconds. The timestamp information is then converted into an electrical signal and sent to the FPGA chip. The workflow of the photonic timestamp extraction unit is as follows:

[0117] (1) Optical clock reference input:

[0118] A sequence of optical pulses (serving as an "optical ruler") from the optical frequency comb generation unit is injected into the photonic timestamp extraction unit. This sequence includes a first signal pulse. Generated by a mode-locked femtosecond laser, this pulse sequence exhibits extremely low timing jitter (<10 fs) and extremely high repetition rate stability. It serves as the absolute time reference for the entire measurement system.

[0119] (2) Data triggering and light pulse generation:

[0120] When an initial data packet requiring a timestamp (e.g., a 6G Ethernet frame) arrives, the electrical signal of the initial data packet triggers a high-speed electro-optic modulator (EOM). This modulator modulates a continuous laser (carrier) into an extremely short optical pulse, the second signal pulse, that corresponds precisely to the arrival of the data packet.

[0121] (3) Interference path and time delay measurement:

[0122] The first and second signal pulses are sequentially processed by a beam splitter and a beam combiner to split and combine the beams, outputting an interference light intensity signal. The beam splitter is an asynchronous optical sampling (ASOPS) or linear optical sampling interference structure integrated on an FPGA chip (essentially an integrated variant of a Michelson or Mach-Zehnder interferometer). This beam splitter contains two paths: a reference path with a fixed optical path length and a measurement path containing an adjustable optical delay line; the first and second signal pulses enter these two paths respectively at the beam splitter. Since the arrival time of the initial data message is random, there is a small second time difference Δt between the signal pulse and the nearest reference pulse in the frequency comb. When they return from their respective paths and meet at the beam combiner, interference occurs, outputting an interference light intensity signal.

[0123] (4) Interference signal detection and time difference calculation:

[0124] The interference light intensity signal is received by a high-sensitivity balanced photodetector and converted into an interference electrical signal. The phase of this interference electrical signal is directly proportional to the second time difference Δt between the two pulses. By precisely measuring the phase of this interference electrical signal, the accurate value of the second time difference Δt can be calculated. Due to the extremely short optical wavelength (approximately 1550 nm corresponds to ~200 THz), phase measurement can achieve subwavelength level time resolution, easily reaching within 200 femtoseconds (fs).

[0125] (5) Absolute timestamp synthesis and output:

[0126] The calculated second time difference Δt is the difference between the second signal pulse and a certain first signal pulse. Since the pulse sequence of the frequency comb is strictly equal in time and its absolute time stamp is known (provided by the high-stability clock discipline module), the timestamp = the absolute time of the reference pulse + Δt. After calculating the timestamp based on this relationship, the FPGA chip receives this timestamp and binds it to the corresponding data packet, inserting the timestamp into the initial data packet to obtain the target data packet, thus completing the entire timestamp insertion process. The process is similar for other initial data packets that need to be sent; the timestamp is recorded at the moment of transmission.

[0127] Understandably, in this embodiment, the photonic timestamp extraction unit is integrated onto the PIC, which is manufactured using standard CMOS-compatible processes, achieving miniaturization, low power consumption, and high reliability. Furthermore, the electro-optic modulator is a high-speed modulator implemented using the plasma dispersion effect of silicon, with a modulation rate reaching tens of Gb / s. The interferometer and delay line involved in the interference signal are implemented on the chip using silicon waveguides, beam splitters, beam combiners, and thermo-optic or electro-optic tunable delay lines, resulting in a compact structure that is insensitive to environmental disturbances. The balanced photodetector uses a germanium-silicon (Ge-on-Si) avalanche photodiode (APD) as the balanced detector, exhibiting high responsivity and low noise. Based on these structural foundations in the PIC, extremely high accuracy and low jitter can be achieved. Specifically, utilizing the principle of optical interference, time measurement is converted into phase measurement, with an inherent accuracy 2-3 orders of magnitude higher than that of an electronic TDC (time-to-digital converter), and a measured timestamp jitter of <180 fs RMS. Furthermore, by processing at the physical layer, software latency is bypassed: the generation and extraction of timestamps are entirely completed in the optical domain and dedicated hardware, completely bypassing the microsecond-level uncertain delays introduced by the operating system's protocol stack and CPU scheduling, ensuring nanosecond-level synchronization accuracy. The PIC also features parallel processing capabilities; through wavelength division multiplexing (WDM) technology, it can simultaneously timestamp multiple data channels on the same chip, making it ideal for the multi-user, high-bandwidth scenarios of 6G base stations. It also achieves resistance to electromagnetic interference: the optical signal is unaffected by electromagnetic interference (EMI), maintaining stable high performance in the complex internal environment of 6G equipment. In summary, the photonic timestamp extraction unit, through its innovative optoelectronic fusion design, solves the most demanding challenges of timestamp accuracy and determinism in 6G networks.

[0128] In step S60, time synchronization information and target data packets are sent to the 6G network node through the precision time protocol preset by the FPGA chip.

[0129] It is understood that the time synchronization system in this embodiment includes: a multi-source time reference module for receiving and processing time signals from multiple satellite navigation systems and ground references; an intelligent fusion processing module connected to the multi-source time reference module, which includes a multi-source fusion unit configured to execute a weighted Kalman filter algorithm and an error compensation engine based on a Long Short-Term Memory (LSTM) network; a high-stability clock discipline module connected to the intelligent fusion processing module, which includes a hybrid clock source composed of a chip-scale atomic clock (CSAC) and a temperature-controlled crystal oscillator (OCXO), the hybrid clock source being operable in an atomic clock discipline mode where the CSAC disciplines the OCXO, and a timekeeping mode where the OCXO is driven by the LSTM error compensation engine when an external reference signal is lost; a photonic timestamp processing module connected to the high-stability clock discipline module, which is an optical timestamp extraction unit based on silicon-based photonic integrated circuits, used to provide femtosecond-level precision timestamps for data packets, wherein the photonic timestamp processing module is a silicon-based photonic integrated circuit, which integrates an optical frequency comb generation unit and an optical pulse time measurement unit based on the interference principle; and an FPGA chip. The FPGA chip integrates a hardware time-to-digital converter (TDC) and a hardware timestamp unit for generating timestamps for Precision Time Protocol (PTP) messages. The actual software flow corresponding to the structure of the time synchronization system in the above embodiment includes: after system power-on, the multi-source time reference module quickly locks onto satellite and ground signals, i.e., acquires the time signals from each signal source; the FPGA chip associated with the intelligent fusion processing module executes a weighted Kalman filter algorithm to generate a high-precision local time reference signal, and the OCXO of the local clock source is tamed by a DPLL model trained based on the local time reference signal; simultaneously, the LSTM error compensation engine continuously monitors and compensates for the temperature drift of the OCXO; furthermore, the addition and parsing of timestamps for all target data packets transmitted and received by the 6G base station associated with the time synchronization system of this embodiment are completed in the photonic timestamp module and the hardware timestamp unit of the FPGA chip, completely bypassing the CPU and operating system, ensuring nanosecond-level accuracy. If all time signals from all signal sources are lost, the time synchronization system can switch to timekeeping mode within 1 millisecond, and the OCXO compensated by the LSTM model will continue to provide high-precision time. The time deviation can be controlled within 5 nanoseconds within 24 hours.

[0130] It is understandable that the system in this embodiment effectively solves the extreme time synchronization requirements of 6G networks through the synergistic effect of technologies such as multi-source fusion, AI compensation, hybrid discipline, and photonic processing. It has significant advantages in high precision, high reliability, and scalable deployment. That is, this embodiment, based on satellite signals as a time reference, also considers both available and unavailable satellite signals. It adjusts the local clock source by combining the results of multi-source satellite signal fusion and photonic time synchronization, which can solve the problem of multi-mode satellite discipline schemes being affected by ephemeris errors and ionospheric delays, improve time synchronization accuracy, and meet the requirements of 6G networks.

[0131] like Figure 2 As shown, Figure 2 This is a structural diagram of a time synchronization system provided in one embodiment of this application. The present invention also provides a time synchronization system 200, comprising:

[0132] The processor 210 can be implemented using a general-purpose central processing unit (CPU), microprocessor, application specific integrated circuit (ASIC), or one or more integrated circuits, and is used to execute relevant programs to implement the technical solutions provided in the embodiments of this application.

[0133] The memory 220 can be implemented as a read-only memory (ROM), static storage device, dynamic storage device, or random access memory (RAM). The memory 220 can store the operating system and other applications. When the technical solutions provided in the embodiments of this specification are implemented through software or firmware, the relevant program code is stored in the memory 220 and is invoked by the processor 210 to execute the time synchronization method of the embodiments of this application.

[0134] Input / output interface 230 is used to implement information input and output;

[0135] The communication interface 240 is used to enable communication and interaction between this device and other devices. Communication can be achieved through wired means (such as USB, network cable, etc.) or wireless means (such as mobile network, WIFI, Bluetooth, etc.).

[0136] Bus 250 transmits information between various components of the device (e.g., processor 210, memory 220, input / output interface 230, and communication interface 240);

[0137] The processor 210, memory 220, input / output interface 230 and communication interface 240 are connected to each other within the device via bus 250.

[0138] In addition, this application embodiment also provides a storage medium, which is a computer-readable storage medium, storing a computer program that, when executed by a processor, implements the above-described time synchronization method.

[0139] Memory, as a non-transitory computer-readable storage medium, can be used to store non-transitory software programs and non-transitory computer-executable programs. Furthermore, memory may include high-speed random access memory, and may also include non-transitory memory, such as at least one disk storage device, flash memory device, or other non-transitory solid-state storage device. In some embodiments, memory may optionally include memory remotely located relative to the processor, and these remote memories can be connected to the processor via a network. Examples of such networks include, but are not limited to, the Internet, intranets, local area networks, mobile communication networks, and combinations thereof. The device embodiments described above are merely illustrative, and the units described as separate components may or may not be physically separate, and may be located in one place or distributed across multiple network units. Some or all of the modules can be selected to achieve the purpose of this embodiment according to actual needs.

[0140] It will be understood by those skilled in the art that all or some of the steps and systems in the methods disclosed above can be implemented as software, firmware, hardware, and suitable combinations thereof. Some or all of the physical components can be implemented as software executed by a processor, such as a central processing unit, digital signal processor, or microprocessor, or as hardware, or as an integrated circuit, such as an application-specific integrated circuit. Such software can be distributed on a computer-readable medium, which can include computer storage media (or non-transitory media) and communication media (or transient media). As is known to those skilled in the art, the term computer storage media includes volatile and non-volatile, removable and non-removable media implemented in any method or technology for storing information (such as computer-readable instructions, data structures, program modules, or other data). Computer storage media includes, but is not limited to, RAM, ROM, EEPROM, flash memory or other memory technologies, CD-ROM, digital versatile disc (DVD) or other optical disc storage, magnetic cartridges, magnetic tape, disk storage or other magnetic storage devices, or any other medium that can be used to store desired information and is accessible to a computer. Furthermore, as is known to those skilled in the art, communication media typically include computer-readable instructions, data structures, program modules, or other data in modulated data signals such as carrier waves or other transmission mechanisms, and may include any information delivery medium.

[0141] The above provides a detailed description of the preferred embodiments of the present invention. However, the present invention is not limited to the above embodiments. Those skilled in the art can make various equivalent modifications or substitutions without departing from the spirit of the present invention. All such equivalent modifications or substitutions are included within the scope defined by the claims of the present invention.

Claims

1. A time synchronization method, characterized by, The application is applied to a time synchronization system, the time synchronization system comprises a local clock source, a photon integrated circuit (PIC) and an FPGA chip, the local clock source is respectively connected with the PIC and the FPGA chip, and the method comprises the following steps: Simultaneously receiving time signals of multiple sources, wherein the time signals at least comprise original time signals and ground reference signals; Fusing all the time signals based on a weighted Kalman filtering algorithm to obtain a local time reference signal, and training an LSTM model based on the local time reference signal; Real-time calculating a frequency compensation amount of the local clock source by using the trained LSTM model; Detecting whether the time signals are available to obtain a detection result, and determining to switch an atomic clock taming mode or a time keeping mode of the local clock source based on the detection result, wherein the time keeping mode is associated with the frequency compensation amount; Inserting a femtosecond-level precision timestamp into an initial data packet by the PIC to obtain a target data packet; Sending time synchronization information and the target data packet to a 6G network node by the FPGA chip preset precision time protocol; Fusing the time signals based on a weighted Kalman filtering algorithm to obtain a local time reference signal, comprising: Calculating corresponding confidence weight based on the carrier-to-noise ratio, satellite elevation angle and multipath error index corresponding to each of the time signals; Measuring a first time difference of each of the time signals based on the local clock source, wherein the first time difference is used to indicate the time difference between the rising edge of any valid time signal and the corresponding edge of the local clock source; Constructing a first observation vector based on all the first time differences; Constructing a first observation noise covariance matrix based on a preset empirical value and all the confidence weights; Determining the local time reference signal by using the first observation vector and the first observation noise covariance matrix for recursive calculation by the Kalman filter in the FPGA chip.

2. The time synchronization method of claim 1, wherein, Calculating corresponding confidence weight based on the carrier-to-noise ratio, satellite elevation angle and multipath error index corresponding to each of the original time signals and the ground reference signals, according to the following formula: W i = (C / N0) i * sin(Elevation i ) / (1 + MP i ); wherein W i is the confidence weight corresponding to the time signal corresponding to the i-th signal source, (C / N0) i is the carrier-to-noise ratio of the corresponding time signal, Elevation i is the satellite elevation angle of the corresponding time signal, MP i is the multipath error index of the corresponding time signal.

3. The time synchronization method of claim 1, wherein, Determining the local time reference signal by using the first observation vector and the first observation noise covariance matrix for recursive calculation by the Kalman filter in the FPGA chip, comprising: The Kalman filter predicts a second reference signal at the current time based on the first reference signal output at the last time and a clock model; Weighted fusing the second reference signal and the first observation vector at the current time to obtain a third reference signal, wherein the number of the third reference signal is multiple, and each of the third reference signal uniquely corresponds to one of the first time differences; Based on any of the third reference signal, calculating a residual value with the corresponding first time difference, and determining the local time reference signal based on whether the residual value exceeds a preset threshold.

4. The time synchronization method of claim 3, wherein, Determining the local time reference signal based on whether the residual value exceeds a preset threshold, comprising: When the residual value exceeds the preset threshold, it is determined that an abnormality occurs in a signal source of a time signal corresponding to the residual value exceeding the preset threshold, the confidence weight of the time signal corresponding to the abnormal signal source is set to zero, data associated with the abnormal signal source in the current first observation vector and the first observation noise covariance matrix is eliminated, a second observation vector and a second observation noise covariance matrix are obtained, the Kalman filter predicts a fifth reference signal at the current time based on a fourth reference signal at the last time associated with a target signal source and the clock model, fuses the fifth reference signal with the second observation vector at the current time by weighting, obtains a sixth reference signal, and determines the sixth reference signal as the local time reference signal, wherein the target signal source is a signal source remaining except the abnormal signal source among all signal sources corresponding to the time signals. When the residual value does not exceed the preset threshold, the third reference signal is determined as the local time reference signal.

5. The time synchronization method of claim 1, wherein, The local clock source includes a chip-level atomic clock and a constant-temperature crystal oscillator, and the switching of the atomic clock training mode or the time-keeping mode is determined based on the detection result, including: When the detection result indicates that the time signal is available, the atomic clock training mode is switched, and the reference signal output by the chip-level atomic clock is used to train the constant-temperature crystal oscillator; When the detection result indicates that the time signal is unavailable, the time-keeping mode is switched, and the constant-temperature crystal oscillator is corrected in real time based on the frequency compensation amount.

6. The time synchronization method of claim 1, wherein, The PIC includes an optical frequency comb generation unit, a linear optical sampling interference structure, and a balanced photodetector. The linear optical sampling interference structure includes a beam splitter and a beam combiner. The PIC inserts a femtosecond-level precision timestamp into an initial data packet to obtain a target data packet, including: An optical pulse sequence output by the optical frequency comb generation unit in the PIC is obtained, and the optical pulse sequence includes a first signal pulse. When the initial data packet arrives, an electrical signal of the initial data packet triggers a high-speed electro-optical modulator, and the high-speed electro-optical modulator outputs a second signal pulse corresponding to an arrival event of the initial data packet. The first signal pulse and the second signal pulse pass through the beam splitter and the beam combiner in sequence for beam splitting and beam combining processing, and an interference optical intensity signal is output. The interference optical intensity signal is converted into an interference electrical signal by the balanced photodetector. A second time difference between the first signal pulse and the second signal pulse is determined based on the phase of the interference electrical signal. An absolute time of the first signal pulse is determined, and the absolute time and the second time difference are summed to obtain the timestamp. The timestamp is inserted into the initial data packet to obtain the target data packet.

7. A time synchronization system, characterized by comprising at least one control processor and a memory communicatively connected to the at least one control processor; the memory storing instructions executable by the at least one control processor, the instructions being executed by the at least one control processor to enable the at least one control processor to perform the time synchronization method according to any one of claims 1 to 6.

8. A computer-readable storage medium, characterized in that, The computer readable storage medium stores computer executable instructions for causing a computer to perform the time synchronization method according to any one of claims 1 to 6.

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