Circuit board with copper columns with different heights, preparation method of circuit board and circuit board assembly

Abstract

The invention provides a circuit board with copper columns with different heights, a preparation method of the circuit board and a circuit board assembly. The first copper column and the second copper column which are different in height are formed by tearing off the separable copper foil layer and the base material layer, and certain base material layer and copper foil layer are reserved on the surface of the copper column, so that the uniformity (smoothness) of the height of the copper column can be improved, the heat dissipation performance can be improved, and the pollution problem caused by using a dry film is avoided. According to the circuit board, three-dimensional wiring can be achieved on a two-dimensional plane, coupling between adjacent signal lines is reduced, crosstalk between signals can be reduced, the mechanical strength balance of connecting points is ensured through the smooth copper column thickness, and therefore the reliability of a printed part can be improved.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of circuit board, in particular to a circuit board with copper pillars of different heights, a preparation method thereof and a circuit board assembly. BACKGROUND

[0002] In the prior art, the manufacturing method of the copper pillar generally includes the steps of film pressing, exposure, development, copper plating and film removing. The thickness of the copper pillar is related to the dry film thickness. When the dry film thickness reaches a certain degree, the dry film has a risk of analytical adhesion, and the dry film has a certain pollution. The uniformity of the thickness of the copper pillar is affected by the copper plating capacity. If the thickness of the copper pillar of the same specification is not uniform, the uniformity of the piece will be affected. In addition, when a high-thickness copper pillar needs to be manufactured, the steps of multiple film pressing, exposure and development may cause alignment problems, and multiple copper plating may also cause the uniformity problem of the copper thickness to be superimposed. SUMMARY

[0003] Therefore, the present application provides a preparation method of a circuit board with a copper pillar to improve the uniformity of the thickness of the copper pillar.

[0004] An embodiment of the present application provides a preparation method of a circuit board with copper pillars of different heights, which comprises the following steps:

[0005] A substrate is provided, which comprises a first copper-clad plate, a second copper-clad plate and first and second conductive holes electrically connecting the first and second copper-clad plates; the first copper-clad plate comprises a first substrate layer and first and second copper foil layers respectively arranged on opposite surfaces of the first substrate layer; the first copper foil layer comprises first and second layers; and the second copper foil layer comprises third and fourth layers;

[0006] Cutting is performed around the first and second conductive holes respectively to form a first opening around the first conductive hole and a second opening around the second conductive hole; wherein the first conductive hole and the first opening have a first covering layer, the first covering layer covers the first conductive hole, and the first conductive hole and the first covering layer form a first copper pillar; and the second conductive hole and the second opening have a second covering layer, the second covering layer covers the second conductive hole;

[0007] The first layer and the second copper-clad plate on the first layer are torn off, the remaining part of the second covering layer and the second conductive hole form a second copper pillar, and the height of the first copper pillar is greater than the height of the second copper pillar;

[0008] The third layer, the first substrate layer on the third layer and the second layer are torn off;

[0009] The fourth layer is made into a circuit layer to obtain the circuit board.

[0010] In one embodiment, along the extension direction of the circuit board, the width of the first conductive hole is W1, and the width of the first covering layer is W2, W2 / W1≤10%. Along the extension direction of the circuit board, the width of the second conductive hole is W3, and the width of the second covering layer is W4, W4 / W3≤10%.

[0011] In one embodiment, the preparation method of the substrate comprises the following steps: pressing the second copper-clad plate on the surface of the first copper-clad plate, the second copper-clad plate comprising a first adhesive layer, a second substrate layer and a third copper foil layer arranged in sequence, the first adhesive layer being between the second substrate layer and the first layer; forming a first blind hole and a second blind hole on the first copper-clad plate and the second copper-clad plate, the first blind hole penetrating through the first copper-clad plate, the first adhesive layer and the second substrate layer, and the second blind hole penetrating through the second copper foil layer and the first substrate layer; arranging conductive materials in the first blind hole and the second blind hole respectively to form a first conductive hole and a second conductive hole, thereby obtaining the substrate.

[0012] In one embodiment, in the step of arranging conductive materials in the first blind hole and the second blind hole respectively, the conductive materials are also arranged on the surface of the fourth layer away from the third layer, thereby forming a conductor layer.

[0013] In one embodiment, the preparation method of the substrate further comprises: pressing a third copper-clad plate on the surface of the conductor layer away from the fourth layer, the third copper-clad plate comprising a second adhesive layer, a third substrate layer and a fourth copper foil layer arranged in sequence. The second adhesive layer is between the conductor layer and the third substrate layer.

[0014] In one embodiment, after the step of "tearing off the third layer and the substrate layer on the third layer and the second layer", the preparation method further comprises: arranging a third conductive hole on the third copper-clad plate to electrically connect the conductor layer and the fourth copper foil layer.

[0015] In one embodiment, after the step of "making the fourth layer into a circuit layer", the preparation method further comprises: making the fourth copper foil layer into a circuit layer.

[0016] In one embodiment, the preparation method further comprises: arranging a protective layer on the surface of the circuit layer, and arranging a gold layer on the surface of the first copper column and the second copper column respectively.

[0017] The embodiment of the present application provides a circuit board with copper pillars of different heights, which comprises a dielectric layer, a circuit layer formed on the surface of the dielectric layer, a first copper pillar and a second copper pillar. The first copper pillar and the second copper pillar are in contact with the circuit layer and are electrically connected, and the height of the first copper pillar is greater than the height of the second copper pillar.

[0018] The first copper pillar comprises a first conductive hole and a first covering layer covering the first conductive hole. Along the thickness direction of the circuit board, the first covering layer comprises copper foil layers and substrate layers arranged alternately, and the copper foil layer covers the top of the first conductive hole. The surface of the first covering layer is provided with a gold layer.

[0019] The second copper pillar comprises a second conductive hole and a second covering layer covering the second conductive hole. Along the thickness direction of the circuit board, the second covering layer comprises copper foil layers and substrate layers arranged alternately, and the copper foil layer covers the top of the second conductive hole. The surface of the second covering layer is provided with a gold layer.

[0020] The embodiment of the present application provides a circuit board assembly, which comprises a first electronic component, a second electronic component and the circuit board as described above. The first electronic component is electrically connected to the circuit board through the first copper pillar, and the second electronic component is electrically connected to the circuit board through the second copper pillar.

[0021] The preparation method of the present application forms the first copper pillar and the second copper pillar with different heights by tearing off the separable copper foil layer, and a certain substrate layer and copper foil layer are reserved on the surface of the copper pillar, which not only improves the uniformity (flatness) of the height of the copper pillar, but also improves the heat dissipation performance, and avoids the pollution problem caused by the use of dry film. The circuit board of the present application can realize three-dimensional wiring on a two-dimensional plane, reduce the coupling between adjacent signal lines, thereby reducing the crosstalk between signals, and the flat copper pillar thickness ensures the mechanical strength balance of the connection point, thereby improving the reliability of the product. BRIEF DESCRIPTION OF DRAWINGS

[0022] Figures 1 to 12 It is a sectional view of the circuit board with copper pillars of different heights according to an embodiment of the present application.

[0023] Figure 13 It is a schematic view of the circuit board assembly according to an embodiment of the present application.

[0024] Explanation of main element symbols

[0025] Circuit board 100

[0026] Substrate 101

[0027] First copper-clad plate 10

[0028] Second copper clad board 20

[0029] First substrate layer 11

[0030] First copper foil layer 12

[0031] First layer 121

[0032] Second layer 122

[0033] Second copper foil layer 13

[0034] Third layer 131

[0035] Fourth layer 132

[0036] First adhesive layer 21

[0037] Second substrate layer 22

[0038] Third copper foil layer 23

[0039] First blind hole 30

[0040] Second blind hole 40

[0041] First conductive hole 31

[0042] First opening 32

[0043] First cover layer 33

[0044] Second conductive hole 41

[0045] Second opening 42

[0046] Second cover layer 43

[0047] Conductor layer 133

[0048] Third copper clad board 50

[0049] Second adhesive layer 51

[0050] Third substrate layer 52

[0051] Fourth copper foil layer 53

[0052] Third conductive hole 54

[0053] First copper pillar 61

[0054] Second copper pillar 62

[0055] Circuit layer 14, 55

[0056] Protective layer 70

[0057] AD layer 71

[0058] PI layer 72

[0059] Au layer 80

[0060] Dielectric layer 90

[0061] Circuit board assembly 1000

[0062] First electronic component 200

[0063] Second electronic component 300

[0064] Solder paste 400

[0065] The following detailed description will further describe the embodiments of the present application with reference to the above drawings. DETAILED DESCRIPTION

[0066] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which embodiments of the application belong. The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of embodiments of the application. Unless otherwise defined, technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which embodiments of the application belong. The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of embodiments of the application. In this detailed description, unless other wise clear from context, all numbers are approximate. Like numbers in different figures indicate the same or similar elements.

[0067] It should be noted that all directional references (e.g., upper, lower, left, right, front, rear, etc.) used herein are in connection with the exemplary orientation shown in the drawings and are for purposes of illustration only and are not intended to limit the application, unless otherwise specifically noted. In addition, terms such as "first" and "second" are used herein only to describe one entity from another, irrespective of age, origin, or any other possible meaning, unless otherwise specifically noted.

[0068] It will be understood that when a layer is referred to as being "on" another layer, it can be directly on the other layer or intervening layers can also be present. In contrast, when an layer is referred to as being "directly on" another layer, there are no intervening layers present. When an element is referred to as being "fixed", "attached", "connected" or "engaged" to another element, it can be directly on the other element or intervening elements can also be present. As used herein, including the claims, the term "and / or" includes any and all combinations of one or more of the associated listed items.

[0069] Embodiments of the present application are described herein with reference to cross-sectional illustrations that are schematic illustrations of idealized embodiments (and intermediate structures) of the present application. As such, variations from the shapes of the illustrations as a result, for example, of manufacturing techniques and / or tolerances, are to be expected. Thus, embodiments of the present application should not be construed as limited to the particular shapes of regions illustrated herein but are to include deviations in shapes that result, for example, from manufacturing. The regions illustrated in the figures are schematic in nature and their shapes are not intended to illustrate the actual shape of a region of a device and are not intended to limit the scope of the present application.

[0070] Some embodiments of the present application will be described in detail with reference to the drawings. The following embodiments and features can be combined with each other, without conflict.

[0071] Referring to Figures 1 to 10 , the first aspect of the present application provides a method for manufacturing a circuit board 100 with different height copper pillars, which can include steps S10-S70.

[0072] Step S10, a substrate 101 is provided. The substrate 101 includes a first copper clad plate 10, a second copper clad plate 20, and a first conductive hole 31 and a second conductive hole 41 electrically connecting the first copper clad plate 10 and the second copper clad plate 20. In some embodiments, referring to Figures 1 to 3 , the method for manufacturing the substrate 101 can include steps S11-S14.

[0073] As shown in Figure 1 , step S11, the second copper clad plate 20 is laminated on the surface of the first copper clad plate 10. The first copper clad plate 10 includes a first base material layer 11 and a first copper foil layer 12 and a second copper foil layer 13 respectively arranged on the opposite surfaces of the first base material layer 11. The first copper foil layer 12 includes a first layer 121 and a second layer 122 arranged in a stack, the second layer 122 is located between the first layer 121 and the first base material layer 11, and the first layer 121 can be separated from the second layer 122. The second copper foil layer 13 includes a third layer 131 and a fourth layer 132 arranged in a stack, the third layer 131 is located between the first base material layer 11 and the fourth layer 132, and the third layer 131 can be separated from the fourth layer 132. In some embodiments, the first copper clad plate 10 can be referred to as a carrier copper material, and in the first copper foil layer 12 (the second copper foil layer 13), the first layer 121 (the fourth layer 132) can be arranged on the surface of the second layer 122 (the third layer 131) away from the first base material layer 11 by electroplating or adhesive, and the first layer 121 (the fourth layer 132) can be separated from the second layer 122 (the third layer 131) by tearing.

[0074] It can be understood that Figure 1 the black line between the first layer 121 and the second layer 122 is only a schematic pattern drawn to distinguish the first layer 121 and the second layer 122, and does not represent that the black line exists in the actual object. Similarly, the black line between the third layer 131 and the fourth layer 132 is also a schematic pattern drawn to distinguish the third layer 131 and the fourth layer 132, and does not represent that the black line exists in the actual object.

[0075] As shown in Figure 1As shown, the second copper-clad laminate 20 is located on the surface of the first copper foil layer 12 opposite to the first substrate layer 11. In some embodiments, the second copper-clad laminate 20 includes a first adhesive layer 21, a second substrate layer 22, and a third copper foil layer 23 disposed sequentially, with the first adhesive layer 21 located between the second substrate layer 22 and the first layer 121. The first adhesive layer 21 may be formed of acrylic hot melt adhesive (AD). The second copper-clad laminate 20 is also referred to as flexible coated copper foil (FRCC).

[0076] In some embodiments, the first substrate layer 11 and the second substrate layer 22 may be made of the same or different materials. The first substrate layer 11 and the second substrate layer 22 may each be independently selected from, but not limited to, polyimide (PI), polyethylene terephthalate (PET), polyethylene naphthalate (PEN), polydimethylsiloxane (PDMS), liquid crystal polymer (LCP), etc. In this embodiment, the first substrate layer 11 and the second substrate layer 22 are made of PI.

[0077] like Figure 2 As shown, in step S12, a first blind via 30 and a second blind via 40 can be formed on the first copper-clad laminate 10 and the second copper-clad laminate 20 by means of laser (but not limited to).

[0078] The first blind via 30 penetrates the first copper-clad laminate 10, the first adhesive layer 21, and the second substrate layer 22 along the thickness direction of the first copper-clad laminate 10. A portion of the surface of the third copper foil layer 23 can be exposed through the first blind via 30. That is, the sidewalls of the first blind via 30 are the first copper-clad laminate 10, the first adhesive layer 21, and the second substrate layer 22, and the bottom wall of the first blind via 30 is the third copper foil layer 23. There can be multiple first blind vias 30.

[0079] The second blind via 40 penetrates the second copper foil layer 13 and the first substrate layer 11 along the thickness direction of the first copper-clad laminate 10, and a portion of the surface of the second layer 122 can be exposed through the second blind via 40. That is, the sidewalls of the second blind via 40 are the second copper foil layer 13 and the first substrate layer 11, and the bottom wall of the second blind via 40 is the second layer 122. There can be multiple second blind vias 40, and the depth of the second blind via 40 is less than the depth of the first blind via 30.

[0080] like Figure 3 As shown, in step S13, conductive materials are respectively disposed in the first blind hole 30 and the second blind hole 40 to form the first conductive hole 31 and the second conductive hole 41, thereby obtaining the substrate 101.

[0081] In some embodiments, conductive material can be deposited in the first blind via 30 and the second blind via 40 by electroplating. The conductive material can be, but is not limited to, copper. During electroplating, the conductive material is also deposited on the surface of the fourth layer 132 facing away from the third layer 131 to form a conductor layer 133. The thickness of the conductive material in the first blind via 30 and the second blind via 40 can be 12.5 ± 5 μm, and the thickness of the conductor layer 133 can be 11.25 ± 3.75 μm.

[0082] like Figure 4 As shown, in step S14, a third copper-clad laminate 50 can be laminated onto the surface of the conductor layer 133 facing away from the fourth layer 132 to obtain a substrate 101 containing the third copper-clad laminate 50. The third copper-clad laminate 50 has a similar structure to the second copper-clad laminate 20. The third copper-clad laminate 50 includes a second adhesive layer 51, a third substrate layer 52, and a fourth copper foil layer 53 arranged sequentially. The second adhesive layer 51 is located between the conductor layer 133 and the third substrate layer 52. The second adhesive layer 51 can be an AD adhesive, and the third substrate layer 52 can be a PI adhesive.

[0083] For step S20, please refer to... Figure 5 Cutting is performed around the first conductive hole 31 and the second conductive hole 41 respectively to form a first opening 32 around the first conductive hole 31 and a second opening 42 around the second conductive hole 41. The cutting method can be, but is not limited to, laser cutting. The first opening 32 penetrates the second copper-clad laminate 20, the first copper foil layer 12, the first substrate layer 11 and the third layer 131 along the thickness direction of the substrate 101, and a portion of the surface of the fourth layer 132 can be exposed through the first opening 32. The second opening 42 is the same depth as the first opening 32, and also penetrates the second copper-clad laminate 20, the first copper foil layer 12, the first substrate layer 11 and the third layer 131 along the thickness direction of the substrate 101, and a portion of the surface of the fourth layer 132 can be exposed through the second opening 42.

[0084] like Figure 5 As shown, during cutting, a portion of the material around the outer periphery of the first conductive hole 31 is retained. That is, a first covering layer 33 exists between the first conductive hole 31 and the first opening 32, covering the first conductive hole 31 (i.e., covering the top and side surfaces of the first conductive hole 31). Figure 6 As shown, along the thickness direction of the substrate 101, the first cover layer 33 includes a second copper foil layer 13, a first substrate layer 11, a first copper foil layer 12, a first adhesive layer 21, a second substrate layer 22, and a third copper foil layer 23. The third copper foil layer 23 covers the top surface of the first conductive hole 31, and the remainder covers the sides of the first conductive hole 31. The first conductive hole 31 and the first cover layer 33 form a first copper pillar 61.

[0085] In the first copper pillar 61, the substrate layer (e.g., PI) in the first cover layer 33 provides good reinforcement, reducing the probability of deformation or breakage of the first copper pillar 61 under pressure during subsequent pattern etching. The copper foil layer in the first cover layer 33 also improves heat dissipation performance. The height of the first copper pillar 61 (distance along the thickness direction of the substrate 101) is determined by the number of layers in the first cover layer 33, so the height can be freely designed and is flexible. Among multiple first copper pillars 61, the uniformity (or flatness) of their height depends on the flatness of the raw materials, the first copper-clad laminate 10 and the second copper-clad laminate 20. That is, the uniformity of the height of the first copper pillar 61 can be equivalent to the uniformity of the raw material thickness, and the uniformity can reach within the median ±1μm, which is much higher than the uniformity of conventionally plated copper pillars of the dry film method (approximately median ±10μm).

[0086] In some embodiments, such as Figure 6 As shown, along the extension direction of the first copper-clad laminate 10 (which can be either the length direction or the width direction), the width of the first conductive hole 31 is W1, and the width of the first cover layer 33 is W2, where W2 / W1 ≤ 10%. For example, if the first conductive hole 31 is cylindrical, and its width is its diameter (50 μm), then the width of the first cover layer 33 (its thickness along the radial direction of the first conductive hole 31) can be less than 5 μm. It is understood that in actual production, the shapes of the first conductive hole 31 and the first cover layer 33 may be non-uniform cylindrical. In this case, the width W1 of the first conductive hole 31 refers to the width of the first conductive hole 31 at its widest point along its radial direction, and the width W2 of the first cover layer 33 refers to the thickness of the first cover layer 33 at its widest point along the radial direction of the first conductive hole 31.

[0087] The width of the first covering layer 33 is also related to the precision of the laser equipment.

[0088] like Figure 5 As shown, during cutting, a portion of the material around the outer periphery of the second conductive hole 41 is also retained. That is, a second covering layer 43 exists between the second conductive hole 41 and the second opening 42, covering the second conductive hole 41 (i.e., covering the top and side surfaces of the second conductive hole 41). Figure 7 As shown, along the thickness direction of the substrate 101, the second cover layer 43 includes a second copper foil layer 13, a first substrate layer 11, a first copper foil layer 12, a first adhesive layer 21, a second substrate layer 22, and a third copper foil layer 23. The first copper foil layer 12 directly covers the top surface of the second conductive hole 41, and the first substrate layer 11 and the second copper foil layer 13 cover the side surface of the first conductive hole 31.

[0089] In some embodiments, such as Figure 7As shown, along the extending direction of the first copper clad plate 10 (which can be the length direction or the width direction), the width of the second conductive hole 41 is W3, and the width of the second covering layer 43 is W4, and W4 / W3≤10%. For example, the second conductive hole 41 is a circular hole, and the width of the second conductive hole 41 is the diameter, which is 50 μm, and then the width of the second covering layer 43 (the thickness along the radial direction of the second conductive hole 41) can be 5 μm or less. It can be understood that in the actual production process, the shape of the second conductive hole 41 and the second covering layer 43 can be a non-uniform cylinder, at this time, the width W3 of the second conductive hole 41 refers to the width of the second conductive hole 41 at the widest along the radial direction thereof, and the width W4 of the second covering layer 43 refers to the thickness of the second covering layer 43 at the widest along the radial direction of the second conductive hole 41.

[0090] The width of the second covering layer 43 is also related to the accuracy of the laser equipment.

[0091] Step S30, please refer to Figure 8 , the first layer 121 and the second copper clad plate 20 on the first layer 121 are torn off, and the first layer 121 and the structure thereon in the first copper pillar 61 are reserved. The first layer 121 and the structure thereon on the second conductive hole 41 are also torn off, and the remaining part of the second covering layer 43 and the second conductive hole 41 form the second copper pillar 62, and the height (along the thickness direction of the substrate 101) of the first copper pillar 61 is greater than the height (along the thickness direction of the substrate 101) of the second copper pillar 62. The copper pillars of different heights can electrically connect different electronic components, thereby improving the surface utilization rate of the circuit board 100.

[0092] By forming copper pillars of different heights, the circuit board 100 can realize three-dimensional wiring in a two-dimensional plane, which can effectively utilize limited space resources, is particularly suitable for complex and precise electronic equipment, and can also reduce the coupling between adjacent signal lines through three-dimensional wiring, thereby reducing the crosstalk between signals.

[0093] It can be understood that the copper pillar is a commonly used name, but it does not mean that the first copper pillar 61 and the second copper pillar 62 described in the present application are only composed of copper.

[0094] Step S40, please refer to Figure 9 , the third layer 131, the first substrate layer 11 and the second layer 122 on the third layer 131 are torn off. The third layer 131, the first substrate layer 11 and the second layer 122 on the first copper pillar 61 and the second copper pillar 62 are reserved, and the third layer 131, the first substrate layer 11 and the second layer 122 at the remaining positions are torn off.

[0095] In some embodiments, as Figure 9As shown, when the substrate 101 also includes a third copper-clad laminate 50, a third conductive hole 54 can be provided on the third copper-clad laminate 50 to electrically connect the conductor layer 133 and the fourth copper foil layer 53.

[0096] For step S50, please refer to... Figure 10 The fourth layer 132 and the conductor layer 133 are fabricated to form the circuit layer 14, resulting in the circuit board 100. When the circuit layer 14 is also formed, the fourth copper foil layer 53 is also fabricated to form the circuit layer 55. The circuit layers 14 and 55 can be formed by pattern etching, which is a conventional technique in the art and will not be described in detail here. The circuit layers 14 and 55 may include signal lines and power / ground lines, etc. Different signal lines or power / ground lines can be arranged using first copper pillars 61 and second copper pillars 62 of different heights to reduce electromagnetic interference between lines and improve signal integrity and power integrity.

[0097] For step S60, please refer to... Figure 11 In some embodiments, a protective layer 70 may be provided on the surface of the circuit layers 14 and 55 respectively, with the first copper pillar 61 and the second copper pillar 62 exposed from the protective layer 70. In this embodiment, the protective layer 70 is a cover film layer (CVL), which may be formed by two layers: an AD layer 71 and a PI layer 72. The AD layer 71 is located between the circuit layers 14 and 55 and the PI layer 72.

[0098] For step S70, please refer to... Figure 12 In some embodiments, a gold plating layer 80 may also be provided on the surfaces of the first copper pillar 61 and the second copper pillar 62, respectively.

[0099] Please see Figures 9 to 12 A second aspect of this application also provides a circuit board 100 with copper pillars of different heights, including a dielectric layer 90 (i.e., the third substrate layer 52 mentioned above), circuit layers 14 and 55 formed on the surface of the dielectric layer 90, and a first copper pillar 61 and a second copper pillar 62. Both the first copper pillar 61 and the second copper pillar 62 are in contact with the circuit layer 14 and are electrically connected. Along the thickness direction of the circuit board 100, the height of the first copper pillar 61 is greater than the height of the second copper pillar 62.

[0100] The first copper pillar 61 includes a first conductive hole 31 and a first cover layer 33 covering the first conductive hole 31. Along the thickness direction of the circuit board 100, the first cover layer 33 includes alternating copper foil layers (13, 12, 23) and substrate layers (11, 22), with the copper foil layer (23) covering the top of the first conductive hole 31. A gold plating layer 80 is provided on the surface of the first cover layer 33.

[0101] The second copper pillar 62 includes a second conductive hole 41 and a second cover layer 43 covering the second conductive hole 41. Along the thickness direction of the circuit board 100, the second cover layer 43 includes alternating copper foil layers (13, 122) and a substrate layer 11, with the copper foil layer 122 covering the top of the second conductive hole 41. A gold plating layer 80 is provided on the surface of the second cover layer 43.

[0102] Please see Figure 13 A third aspect of this application also provides a circuit board assembly 1000, including a first electronic component 200, a second electronic component 300, and such as Figure 10 The circuit board 100 is shown. A first electronic component 200 can be connected to a first copper pillar 61 via solder paste 400, thereby electrically connecting to the circuit board 100. A second electronic component 300 can be connected to a second copper pillar 62 via solder paste 400, thereby electrically connecting to the circuit board 100. The types of the first electronic component 200 and the second electronic component 300 are not limited in this application.

[0103] Since the first copper pillar 61 and the second copper pillar 62 also include a cover layer, the substrate layer (e.g., PI) in the cover layer provides good reinforcement, thereby ensuring the stable mounting of electronic components. For electronic components that generate high heat, they can be connected to the taller first copper pillar 61, where the copper foil layer increases the heat dissipation area and enhances the heat dissipation effect. The high flatness and uniformity of the copper pillar height facilitate smoother component assembly, and the flat thickness of the copper pillar ensures balanced mechanical strength at the connection point, which is important for withstanding component insertion and extraction forces, resisting vibration and shock, and preventing deformation that may occur under temperature cycling.

[0104] The fabrication method of this application forms first copper pillars 61 and second copper pillars 62 with different heights by peeling off separable copper foil layers and substrate layers, while retaining a certain amount of substrate and copper foil layers on the surface of the copper pillars. This not only improves the uniformity (flatness) of the copper pillar height but also enhances heat dissipation performance and avoids the contamination problems caused by using dry film. The circuit board 100 of this application can achieve three-dimensional wiring on a two-dimensional plane, reducing the coupling between adjacent signal lines and thus reducing crosstalk between signals. Furthermore, the flat thickness of the copper pillars ensures balanced mechanical strength at the connection points, thereby improving the reliability of the assembly.

[0105] The above description describes some specific embodiments of this application, but in actual applications, the application should not be limited to these embodiments. For those skilled in the art, other modifications and alterations made based on the technical concept of this application should fall within the protection scope of this application.

Claims

1. A method for manufacturing a circuit board with copper pillars of different heights, characterized in that, The preparation method includes the following steps: A substrate is provided, the substrate including a first copper-clad laminate, a second copper-clad laminate, and a first conductive hole and a second conductive hole electrically connecting the first copper-clad laminate and the second copper-clad laminate; the first copper-clad laminate includes a first substrate layer and a first copper foil layer and a second copper foil layer respectively disposed on two opposite surfaces of the first substrate layer; the first copper foil layer includes a first layer and a second layer; the second copper foil layer includes a third layer and a fourth layer. Cuttings are made around the first conductive hole and the second conductive hole respectively to form a first opening around the first conductive hole and a second opening around the second conductive hole; wherein, a first covering layer is provided between the first conductive hole and the first opening, the first covering layer covers the first conductive hole, and the first conductive hole and the first covering layer form a first copper pillar; a second covering layer is provided between the second conductive hole and the second opening, and the second covering layer covers the second conductive hole; The first layer and the second copper-clad laminate on the first layer are removed. The remaining part of the second cover layer and the second conductive hole form a second copper pillar. The height of the first copper pillar is greater than the height of the second copper pillar. Remove the third layer and the first substrate layer and the second layer on the third layer; The fourth layer is fabricated to form a circuit layer, thus obtaining the circuit board.

2. The preparation method according to claim 1, characterized in that, Along the extension direction of the circuit board, the width of the first conductive hole is W1, the width of the first cover layer is W2, and W2 / W1≤10%; along the extension direction of the circuit board, the width of the second conductive hole is W3, the width of the second cover layer is W4, and W4 / W3≤10%.

3. The preparation method according to claim 1, characterized in that, The method for preparing the substrate includes the following steps: A second copper-clad laminate is laminated onto the surface of the first copper-clad laminate. The second copper-clad laminate includes a first adhesive layer, a second substrate layer, and a third copper foil layer disposed sequentially. The first adhesive layer is located between the second substrate layer and the first layer. A first blind via and a second blind via are formed on the first copper-clad laminate and the second copper-clad laminate. The first blind via penetrates the first copper-clad laminate, the first adhesive layer and the second substrate layer. The second blind via penetrates the second copper foil layer and the first substrate layer. Conductive materials are respectively disposed in the first blind hole and the second blind hole to form a first conductive hole and a second conductive hole, thereby obtaining the substrate.

4. The preparation method according to claim 3, characterized in that, In the step of setting conductive material in the first blind hole and the second blind hole respectively, the conductive material is also set on the surface of the fourth layer away from the third layer, thereby forming a conductor layer.

5. The preparation method according to claim 4, characterized in that, The method for preparing the substrate further includes: laminating a third copper-clad laminate onto the surface of the conductor layer opposite to the fourth layer, wherein the third copper-clad laminate includes a second adhesive layer, a third substrate layer and a fourth copper foil layer disposed sequentially, and the second adhesive layer is located between the conductor layer and the third substrate layer.

6. The preparation method according to claim 5, characterized in that, After the step of "removing the third layer and the substrate layer and the second layer on the third layer", the preparation method further includes: providing a third conductive hole on the third copper-clad laminate to electrically connect the conductor layer and the fourth copper foil layer.

7. The preparation method according to claim 5, characterized in that, After the step of "forming the fourth layer into a circuit layer", the preparation method further includes: forming the fourth copper foil layer into a circuit layer.

8. The preparation method according to claim 1, characterized in that, The preparation method further includes: setting a protective layer on the surface of the circuit layer, and setting a gold plating layer on the surface of the first copper pillar and the second copper pillar respectively.

9. A circuit board with copper pillars of different heights, characterized in that, It includes a dielectric layer, a circuit layer formed on the surface of the dielectric layer, a first copper pillar and a second copper pillar, both of which are in contact with the circuit layer and are conductive, and the height of the first copper pillar is greater than the height of the second copper pillar; The first copper pillar includes a first conductive hole and a first cover layer covering the first conductive hole. Along the thickness direction of the circuit board, the first cover layer includes alternating copper foil layers and substrate layers, with the copper foil layer covering the top of the first conductive hole. A gold plating layer is provided on the surface of the first cover layer. The second copper pillar includes a second conductive hole and a second cover layer covering the second conductive hole. Along the thickness direction of the circuit board, the second cover layer includes alternating copper foil layers and substrate layers, with the copper foil layer covering the top of the second conductive hole; the surface of the second cover layer is provided with a gold plating layer.

10. A circuit board assembly, characterized in that, It includes a first electronic component, a second electronic component, and a circuit board as described in claim 9, wherein the first electronic component is electrically connected to the circuit board via the first copper pillar, and the second electronic component is electrically connected to the circuit board via the second copper pillar.

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