A chip system

Abstract

This invention relates to the field of semiconductor technology, specifically to a chip system. A chip system includes: at least two overlapping optical chips, each optical chip comprising: a light-transmitting substrate layer on which a waveguide layer is disposed; at least one optical chip has a first coupler at its optical output end, and an adjacent optical chip has a second coupler at its optical input end; wherein the first coupler deflects first incident light passing through a traveling waveguide by a first angle to convert it into second incident light, and the second coupler receives the second incident light, deflects the second incident light by a second angle to convert it into third incident light, and inputs the third incident light into a corresponding traveling waveguide; wherein the second angle is greater than or equal to the first angle, and the first angle is less than or equal to 90°. This invention provides a chip system suitable for vertical stacking, thereby facilitating larger-scale integration in a smaller form factor.

Description

Technical Field

[0001] This invention relates to the field of semiconductor technology, and more specifically to a chip system. Background Technology

[0002] Artificial intelligence (AI) technology is a key driving force for the new round of technological revolution and industrial transformation. Its foundation is intelligent computing power, namely the computing system capabilities for training and running AI algorithm models. Currently, the scale of computing power and energy consumption are key challenges.

[0003] The specifications and performance of computing chips are crucial to the scale of computing power. For example, although different chip packaging solutions have been tried in existing technologies, the extent to which computing power can be expanded is still very limited.

[0004] The applicant noted that existing technologies for multiple optical chips employ a horizontal splicing and packaging approach. However, this limitation of horizontal splicing and packaging technology may result in excessively large chip package sizes and very low vertical space utilization.

[0005] For example, patent application CN120239833A discloses a method for manufacturing optical structures on a photonic glass layer substrate, wherein one or more optical silicon photonic elements can be used in combination with one or more optoelectronic integrated circuits (optoelectronic chips) on a single packaging substrate to form co-packaged optical and electrical components.

[0006] For example, patent application CN116931167A discloses an adapter board, optical chip packaging, computing accelerator, and manufacturing method thereof. The adapter board includes: a glass substrate, which includes one or more conductive vias, the conductive vias including through-holes penetrating the glass substrate and conductive material filling the through-holes; and an optical waveguide structure disposed on a first surface of the glass substrate, wherein the optical waveguide structure includes one or more optical waveguides and a cladding layer covering one or more optical waveguides, the one or more optical waveguides being used for optical interconnection of multiple optical chips packaged on the adapter board, and the refractive index of the one or more optical waveguides being greater than the refractive index of the cladding layer and the glass substrate, and the optical waveguide structure also includes one or more first conductive structures penetrating the optical waveguide structure, which are electrically connected to one or more conductive vias respectively.

[0007] For example, patent application CN119667858A discloses a packaging structure, packaging test method and system for large-scale photonic chips, which includes: a substrate; a chip layer connected to the upper surface of the substrate through a first bonding structure, which includes: multiple optical chips, wherein the first and second sides of adjacent optical chips are relatively parallel to the sides corresponding to two other adjacent optical chips, and the two sides opposite to each other are filled with adhesive material to form a first bonding area; the side of the photonic chip facing outward is bonded with adhesive material extending to form a second bonding area; a silicon adapter plate is disposed corresponding to the first connection area of ​​the optical chip; and a first wiring layer is disposed between the lower surface of the silicon adapter plate and the adhesive layer.

[0008] In summary, the applicant noted that traditional chip packaging solutions have always faced challenges in application, such as high cost and large size. Summary of the Invention

[0009] The purpose of this invention is to provide a chip system that partially solves or alleviates the above-mentioned shortcomings of the prior art, enabling larger-scale optical computing within a limited product size.

[0010] To solve the aforementioned technical problems, the present invention specifically adopts the following technical solution:

[0011] A first aspect of the present invention is to provide a chip system comprising:

[0012] At least two overlapping optical chips, wherein each optical chip includes: a light-transmitting substrate layer, a waveguide layer disposed on the light-transmitting substrate layer, and the light-transmitting substrate layer and the waveguide layer of two adjacent optical chips are disposed opposite to each other;

[0013] The waveguide layer is provided with m row waveguides, and multiple computing units are respectively extended on the row waveguides. At least one row waveguide has an optical input end and an optical output end on both sides. At least one optical chip has a first coupler at its optical output end, and a second coupler at its adjacent optical input end.

[0014] Wherein, the first coupler causes the first incident light passing through the traveling waveguide to be deflected by a first angle and converted into the second incident light, and the second coupler is used to receive the second incident light, and cause the second incident light to be deflected by a second angle and converted into the third incident light, and input the third incident light into the corresponding traveling waveguide; wherein, the second angle is greater than or equal to the first angle, and the first angle is less than or equal to 90°;

[0015] The chip system also includes:

[0016] A first modulator is configured to connect to a first external light source and modulate the first external light source to form a first incident light for input to the optical chip.

[0017] At least one second modulator is provided for providing a second external light source to the computing unit, and the second external light source is used to modulate the state of the phase change material layer in the computing unit.

[0018] In some embodiments, the first angle is greater than 70°.

[0019] In some embodiments, the first angle is greater than 75°.

[0020] In some embodiments, the first angle is greater than 80°.

[0021] In some embodiments, at least two overlapping chips include: a first optical chip, a second optical chip, and a third optical chip;

[0022] The first optical chip has a first coupler on its optical output end, the second optical chip has a second coupler on its optical input end and a first coupler on its optical output end, and the third optical chip has a second coupler on its optical input end. The first, second and third optical chips are arranged overlappingly so that the first coupler and the second coupler are connected in sequence to form an S-shaped optical signal transmission path.

[0023] In some embodiments, the second coupler is provided with a diffraction direction enhancement structure, the type of which includes: a blazed grating, a metallic reflective layer, and / or a microlens.

[0024] In some embodiments, the second coupler includes:

[0025] The light-transparent substrate layer has a lower cladding layer disposed thereon, and a waveguide core layer is sequentially disposed thereon. The waveguide core layer includes an input / output terminal, a beam expanding region, and a diffraction region sequentially disposed thereon.

[0026] The diffraction region and the beam expansion region are used to receive the second incident light, deflect the second incident light by a second angle to convert it into a third incident light, and transmit the third incident light to the traveling waveguide through the input / output terminal.

[0027] In some embodiments, the type of the diffraction direction enhancement structure provided in the diffraction region includes at least one of the following: linear, fan-shaped, and lattice line combination type; and / or, the type of the blazed grating provided in the diffraction region includes at least one of the following: second-order step and third-order step; and / or, the diffraction direction enhancement structure includes: a metal reflective layer provided on the outer surface of the upper cladding;

[0028] And / or, the diffraction direction enhancement structure includes a microlens disposed on the outer surface of the light-transmitting substrate.

[0029] In some embodiments, the type of the first coupler includes: a single-stage diffraction grating coupler, a bidirectional grating coupler, and / or a symmetrical grating coupler.

[0030] In some embodiments, the thickness of the phase change material layer is greater than or equal to 100 nm.

[0031] In some embodiments, the width of the phase change material layer ranges from 2 μm to 30 μm.

[0032] Beneficial technical effects:

[0033] It is worth noting that traditional optical chip packaging architectures, involving the connection of multiple optical chips, often only allow for horizontal packaging, and each optical chip has a high degree of independence during computation (requiring independent light sources for signal input). For example, the large-scale photonic chip packaging structure disclosed in patent application CN119667858A uses a horizontally spliced ​​packaging scheme. After splicing four optical chips, the planar area is relatively large, and each of the four optical chips requires an independent fiber array to be connected to a light source, which may lead to difficulties in precise signal synchronization.

[0034] Therefore, this horizontally spliced ​​multi-chip packaging solution will rapidly increase in size as computing scale expands; on the other hand, the operation of multiple chips remains relatively independent, requiring reliance on multiple independent light sources, which not only makes it difficult to achieve signal synchronization, but also significantly increases the difficulty of device connection.

[0035] In contrast to traditional horizontal splicing schemes, this invention provides a vertical multi-chip stacking scheme. Specifically, this invention provides a chip system for vertically stacking multiple light-transmitting chips based on differentiated coupler components.

[0036] In particular, the present invention uses a glass substrate to fabricate large-scale light-transmitting chips. At the same time, the local reinforcement design achieved by the first and second couplers in terms of deflection angle and reinforcement structure can perform local reinforcement of the coupler components at a lower cost (i.e., focus the function on the second coupler). This can greatly reduce the overall configuration difficulty and cost of couplers in multi-chip systems.

[0037] By leveraging the crucial role of the coupler component in optical signal transmission efficiency, this invention enables signal transmission to multiple vertically stacked optical chips based on a shared light source, thereby reducing the difficulty of supplying light sources in multi-chip systems.

[0038] Furthermore, for this vertically stacked chip system, the present invention also provides a spatial light-based signal modulation mode. Specifically, by coordinating the modulation threshold and array arrangement (such as spacing) of the computing units, the present invention enables precise single modulation of the computing units within the chip system using a confocal modulation method. Moreover, this external spatial light signal modulation mode significantly alleviates the pressure on integrating active devices (such as modulators) on the glass substrate chip. Attached Figure Description

[0039] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. In all the drawings, similar elements or parts are generally identified by similar reference numerals. The elements or parts in the drawings are not necessarily drawn to scale. Obviously, the drawings described below are some embodiments of the present invention, and those skilled in the art can obtain other drawings based on these drawings without any creative effort.

[0040] Figure 1 This is a schematic diagram of a planar optical chip computing structure in an exemplary embodiment of the present invention;

[0041] Figure 2 This is a schematic diagram of the modulator architecture of an optical chip in an exemplary embodiment of the present invention;

[0042] Figure 3 This is a schematic diagram of a chip system stacking scheme in an exemplary embodiment of the present invention;

[0043] Figure 4 This is a schematic diagram of a chip system stacking scheme in another exemplary embodiment of the present invention;

[0044] Figure 5 This is a schematic diagram of the modulator architecture of a chip system in another exemplary embodiment of the present invention;

[0045] Figure 6This is a schematic diagram of the structure of the second coupler in an exemplary embodiment of the present invention;

[0046] Figure 7 This is a schematic diagram of different planar architectures of the second coupler in an exemplary embodiment of the present invention;

[0047] Figure 8 This is a schematic diagram of a different cross-sectional architecture of the second coupler in another exemplary embodiment of the present invention.

[0048] Summary of attached labeling and identification:

[0049] 1001, Optical chip; 1001a, First optical chip; 1001b, Second optical chip; 1001c, Third optical chip; 10011, Translucent substrate layer; 10012, Waveguide layer; 1002, First coupler; 1003, Second coupler; 1003a, Waveguide core layer; 100122, Lower cladding layer; 100121, Upper cladding layer; 10031, Input / output terminal; 10032, Beam expander region; 10033, Diffraction region; 10034, Microlens; 10035, Metal reflective layer; 1004, Transmission path; 1005, Computational unit; 1006, First modulator; 1007, Second modulator; 1007a, First laser; 1007b, Second laser; 1008, Row waveguide; 1009, Column waveguide; 1011, First external light source; 1012, Beam splitter; 1010, PD array. Detailed Implementation

[0050] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of the present invention. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without creative effort are within the scope of protection of the present invention.

[0051] In this document, suffixes such as "module," "part," or "unit" used to denote elements are used only for the purpose of illustrative purposes and have no specific meaning in themselves. Therefore, "module," "part," or "unit" may be used interchangeably.

[0052] In this document, the terms "upper," "lower," "inner," "outer," "front," "rear," "one end," and "the other end," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are used only for the convenience of describing the present invention and for simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on the present invention. Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance.

[0053] In this document, unless otherwise explicitly specified and limited, the terms "installed," "equipped with," "connected," etc., should be interpreted broadly. For example, "connection" can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection, a direct connection, or an indirect connection through an intermediate medium; it can be a connection within two components. Those skilled in the art can understand the specific meaning of the above terms in this invention based on the specific circumstances.

[0054] In this document, "and / or" includes any and all combinations of one or more of the listed related items.

[0055] In this article, "multiple" means two or more, that is, it includes two, three, four, five, etc.

[0056] As used in this specification, the term "about" typically means + / -5% of the value, more typically + / -4% of the value, more typically + / -3% of the value, more typically + / -2% of the value, even more typically + / -1% of the value, and even more typically + / -0.5% of the value.

[0057] In this specification, certain embodiments may be disclosed in a range-bound format. It should be understood that this "range-bound" description is merely for convenience and brevity and should not be construed as a rigid limitation on the disclosed range. Therefore, the description of a range should be considered as having specifically disclosed all possible subranges and the individual numerical values ​​within those ranges. For example, a description of the range 1-6 should be considered as having specifically disclosed subranges such as from 1 to 3, from 1 to 4, from 1 to 5, from 2 to 4, from 2 to 6, from 3 to 6, etc., and the individual numbers within those ranges, such as 1, 2, 3, 4, 5, and 6. This rule applies regardless of the breadth of the range.

[0058] Optical chips (or photonic chips, referred to simply as chips in this article): A photonic chip is an integrated circuit chip based on photonics principles. It achieves optoelectronic integration by integrating photonic devices onto the chip. Photonic chips realize various complex functions through the generation, transmission, processing, modulation, and detection of light waves. The "scale" of an optical chip refers to the size of the photonic computing array on a mask within a conventional wafer area (such as an 8-inch or 12-inch wafer), typically expressed in the form X1*X2, where X1 represents the number of rows in the photonic computing array, and X2 represents the number of columns. X1 and X2 are primarily limited by: 1) the size of the computing unit, and 2) the area of ​​a single mask exposure plate on an 8-inch or 12-inch wafer.

[0059] Coupler: A coupler in an optical chip is a key passive component used to achieve optical power redistribution and mode conversion. Its core function is to efficiently and controllably transmit optical signals between different optical waveguides on the chip through specific structures (such as waveguide proximity effect, grating, etc.). It can distribute input optical energy to one or more output ports according to a predetermined ratio and predetermined deflection angle.

[0060] Translucent substrate layer: refers to a substrate (substrate) made of a material with high light transmittance. Specifically, a translucent substrate layer / translucent substrate refers to the chip's supporting substrate material exhibiting excellent optical transmittance properties with low absorption and low scattering within the target operating wavelength range (such as visible light and near-infrared). In particular, the translucent substrate layer in this invention can be a glass substrate, and the corresponding chip can be referred to as a glass substrate chip.

[0061] Transparent substrate waveguide chip: refers to an integrated photonic chip that uses a material with high light transmittance as a substrate, on which or inside an optical waveguide structure is built to guide and manipulate optical signals.

[0062] A blazed grating is a diffraction grating that uses a specially shaped groove (usually a sawtooth profile) to concentrate the energy of incident light onto a specific, predetermined order. Unlike ordinary gratings that disperse energy across multiple orders, it utilizes the "blaze effect." By controlling the tilt angle of the grooves, the specular reflection direction is aligned with the diffraction direction of the desired order, thereby maximizing the intensity of diffracted light at that order. This design significantly improves the diffraction efficiency of the grating in a specific wavelength band (i.e., the blaze wavelength).

[0063] Example 1

[0064] See Figures 1-8 As shown, this invention provides a large-scale chip system capable of multi-layer stacking. This large-scale chip system facilitates larger-scale matrix multiplication operations and improves computing power.

[0065] like Figure 4As shown, the present invention provides a chip system, comprising:

[0066] At least two overlapping optical chips 1001 are provided, wherein each optical chip 1001 includes a light-transmitting substrate layer 10011 (therefore, the optical chip in this embodiment can also be referred to as a light-transmitting chip), a waveguide layer 10012 is provided on the light-transmitting substrate layer 10011, and the light-transmitting substrate layer 10011 and the waveguide layer 10012 of two adjacent optical chips 1001 are arranged opposite to each other; for example, the light-transmitting substrate layer of one optical chip is arranged opposite to the waveguide layer of another optical chip.

[0067] The waveguide layer has m row waveguides, and multiple computing units 1005 extend from each row waveguide. At least one row waveguide has an optical input end and an optical output end on both sides. At least one optical chip has a first coupler 1002 at its optical output end, and a second coupler 1003 at its adjacent optical input end. That is, the first coupler and the second coupler are used for light transmission and reception, respectively.

[0068] The first coupler causes the first incident light passing through the traveling waveguide to deflect at a first angle and be converted into the second incident light, while the second coupler is used to receive the second incident light and cause the second incident light to deflect at a second angle and be converted into the third incident light, and input the third incident light into the corresponding traveling waveguide; wherein the second angle is greater than or equal to the first angle, and the first angle is less than or equal to 90°.

[0069] Furthermore, the chip system also includes:

[0070] A first modulator 1006 is used to connect to a first external light source 1011 and modulate the first external light source to form a first incident light for input to the optical chip.

[0071] At least one second modulator 1007 is provided to the computing unit 1005 to provide a second external light source, which is used to modulate the state of the phase change material layer in the computing unit.

[0072] It should be noted that, in stark contrast to the traditional horizontal splicing method, the multiple optical chips in this embodiment are stacked vertically. This vertical stacking effectively improves the utilization of vertical space and limits the volume of the packaging system in the horizontal direction.

[0073] Specifically, adjacent optical chips are staggered on the coupler to create a certain distance between the adjacent first and second couplers in the horizontal direction (i.e., the direction where the chip surface is located), thereby achieving a difference in the deflection angle of the first and second couplers. Thus, the oppositely positioned first and second couplers effectively form a coupler assembly. Simultaneously, the light-transmitting substrate layer can further reduce potential light loss during transmission.

[0074] The deflection angle refers to the angle between the original direction of light propagation and the direction of light propagation after deflection.

[0075] See Figure 4 , Figure 5 As shown, light has a transmission path 1004 set along the direction of the waveguide in the chip.

[0076] See Figure 4 , Figure 5 As shown, in this embodiment, the first coupler is used as the optical signal output end, that is, it is configured to carry the deflection function of light; the second coupler is used as the optical signal transmission end, that is, it is configured to have the functions of receiving, deflecting and transmitting (specifically, it needs to capture and collect the optical signal after it is deflected by the first optical chip, deflect the captured signal, and then transmit the deflected signal (i.e. the third incident light) to the traveling waveguide in the second optical chip).

[0077] Preferably, in this embodiment, the first coupler, which serves as the optical signal output terminal, is designed with a small deflection angle of less than 90°, thereby greatly reducing the design difficulty of the first coupler's deflection. It should be noted that because the deflection angle is small, the first coupler faces relatively less pressure in its deflection function, making it easier to complete the deflection task with relatively low loss. In other words, the deflection difficulty of the first coupler is low, thus resulting in only a small amount of signal loss. Simultaneously, assigning the task of performing large-angle deflection to the second coupler allows for the transmission of light between different chips (i.e., inter-chip transmission) with relatively limited structural reinforcement.

[0078] In other words, this combination of large and small deflection angles reduces the overall design burden on the first and second couplers. Specifically, the first coupler uses a small deflection angle design to ensure that the light maintains high transmission efficiency during deflection (i.e., reducing potential losses during deflection); at the same time, a localized reinforcement structure (such as a diffraction direction reinforcement structure) is designed for the receiving function of the second coupler to enhance the light capture efficiency and redirection efficiency, further reducing light loss.

[0079] The local reinforcement design achieved by the first and second couplers in coordination with the deflection angle and reinforcement structure can locally reinforce the coupler components at a lower cost (i.e., focus the function on the second coupler), thereby greatly reducing the overall configuration difficulty and cost of couplers in multi-chip systems.

[0080] Furthermore, the applicant noted that during inter-chip transmission, since the second coupler has integrated receiving, deflection, and transmission functions, only a relatively simple structural reinforcement design is needed on the above structure (the structural reinforcement design will be exemplarily described in Embodiment 2) to achieve more efficient capture and transmission of light, thus achieving twice the result with half the effort.

[0081] Specifically, taking the multi-chip system provided in this embodiment as an example, considering one X1*X2 optical chip, to achieve optical communication connections with the upper and lower optical chips, at least X1 first couplers and X1 second couplers are required. Therefore, for large-scale optical chips, such as 128*128 or even 1024*1024 chips, the design and fabrication difficulties of the couplers pose extremely high challenges to the implementation of multi-chip systems.

[0082] The coupler component based on local reinforcement design provided in this application can simplify half of the coupler (i.e., the first coupler) into a basic structure, while only local reinforcement is performed on the second coupler, thereby greatly reducing the difficulty of coupler design and configuration.

[0083] Furthermore, in some embodiments, the first angle is greater than 70°.

[0084] Furthermore, in some embodiments, the first angle is greater than 75°.

[0085] Furthermore, in some embodiments, the first angle is greater than 80°.

[0086] Preferably, the light-transmitting substrate layer in this embodiment is a glass substrate layer (correspondingly, the optical chip is a glass substrate chip). By combining the glass substrate layer with the optical waveguide, a computing matrix scale of ultra-large area can be achieved (such as a computing scale of 5000×5000 on a 12-inch wafer; or even beyond a 12-inch wafer, a larger matrix scale can be achieved).

[0087] Preferably, the optical chips in this embodiment can all be glass substrate chips, thereby realizing a large-scale multi-chip overlapping system. Such a large-scale multi-chip overlapping system will also significantly increase the difficulty of inter-chip transmission.

[0088] This embodiment provides a scheme for differentiating the deflection angle at the output and input ports of optical signals. This differentiated design is beneficial to improving the transmission efficiency of optical signals between chips, and can also reduce the design difficulty of couplers to a certain extent.

[0089] Preferably, a transition layer (not shown in the figure) is provided between two adjacent optical chips, that is, a transition layer is provided between the waveguide layer of one optical chip and the light-transmitting substrate layer of another waveguide.

[0090] Preferably, the transition layer material can be silicon oxynitride (Si-ON), and the specific silicon-nitrogen-oxygen ratio is usually around 4:2:4. The specific ratio can be adjusted according to process requirements. The thickness of the transition layer can usually be less than 100 nm, such as preferably 50 nm.

[0091] In this embodiment, a transition layer is used as a connection between adjacent chips, which is beneficial to achieve stable connection between large-scale optical chips, such as reducing defects and faults that may exist between adjacent chips due to stress problems (such as reducing cracks).

[0092] Figure 1 , Figure 2 A schematic diagram of the architecture of one of the optical chips is shown. See also Figure 1 As shown, the optical chip includes multiple row waveguides 1008 and multiple column waveguides 1009 corresponding to and intersecting the row waveguides 1008. A computing unit 1005 is provided at the intersection of the row waveguides 1008 and the column waveguides 1009. The row waveguides 1008 are connected to the PD array 1010 to input the calculation results into the PD array for aggregation.

[0093] Example 2

[0094] In some embodiments, see Figure 4 As shown, the present invention provides a chip stacking system, which includes at least two overlapping chips, specifically including: a first optical chip 1001a, a second optical chip 1001b and a third optical chip 1001c;

[0095] The first optical chip has a first coupler on its optical output end, the second optical chip has a second coupler on its optical input end and a first coupler on its optical output end, and the third optical chip has a second coupler on its optical input end. The first, second and third optical chips are arranged overlappingly so that the first coupler and the second coupler are connected in sequence to form an S-shaped optical signal transmission path.

[0096] In some embodiments, at least one optical chip is connected to an external light source.

[0097] Preferably, the optical chip is a glass substrate chip.

[0098] The configuration of the first coupler and the second coupler can be found in Embodiment 1, and will not be repeated here.

[0099] This embodiment actually provides a method for supplying optical signals to a large-scale chip system based on a limited light source, that is, the optical signal can be transmitted between chips through the cooperation of the first and second couplers.

[0100] Specifically, optical chips rely on external optical signal input to perform optical computation. Typically, optical chips need to be directly connected to a light source to receive the optical signal. Therefore, in large-scale multi-chip systems, extremely high demands are placed on the number of light sources, and the connection between multiple light sources and multiple optical chips also presents significant challenges to structural design. (See also...) Figure 1 For example, taking an optical chip with m traveling waveguides as an example, the entry of an external light source into the optical chip requires the cooperation of multiple optical devices. First, a light source (such as the first external light source 1011) needs to be set up. The light source is split into m beams of signal light by a beam splitter 1012. The m beams of signal light are modulated by m modulators respectively, and then output to the m traveling waveguides. Therefore, when optical operations are required on n optical chips, at least n light sources and n*m modulators are needed.

[0101] Conversely, the light source sharing mode in this embodiment can achieve optical operations of n optical chips with only one light source and m modulators. This reduces the number of external devices required, thereby reducing the design or application complexity of multi-chip systems.

[0102] In this embodiment, the staggered S-shaped optical signal transmission path enables light source sharing, allowing multiple chips to receive signals based on a single light source. This light source sharing mode can significantly reduce the overall architectural complexity of the chip system.

[0103] Furthermore, this light source sharing mode avoids or reduces the signal delay problem associated with multiple light sources, that is, it achieves synchronous operation based on the synchronous transmission of signals.

[0104] In summary, for chip systems with multiple optical chips, this invention proposes a computational scheme that can directly use a single light source (or a small number of light sources) as input.

[0105] For example, in some embodiments, at least two optical chips use the same light source.

[0106] Specifically, this application introduces a coupler assembly that can transmit optical signals between optical chips. The deflection angle difference design of the coupler assembly can improve the signal transmission efficiency, that is, reduce the transmission loss between chips, so as to make long-distance signal transmission between chips possible.

[0107] Specifically, the coupler assembly implements a local reinforcement design based on the difference in deflection angle. For example, the first coupler preferably adopts a conventional coupler, while the second coupler is provided with a local reinforcement structure, such as a diffraction direction reinforcement structure.

[0108] In some embodiments, the second coupler is provided with a diffraction direction enhancement structure, the type of which includes: a blazed grating, a metallic reflective layer, and / or a microlens.

[0109] Preferably, in some embodiments, the second coupler includes:

[0110] The light-transmitting substrate layer 10011 has a lower cladding layer 100122 disposed thereon. A waveguide core layer 1003a is sequentially disposed on the lower cladding layer 100122. The waveguide core layer 1003a includes an input / output terminal 10031, a beam expanding region 10032, and a diffraction region 10033 (e.g., ...) sequentially disposed thereon. Figure 7 As shown); an upper cladding layer 100121 is further provided on the waveguide core layer 1003a; wherein, the diffraction region and the beam expanding region are used to receive the second incident light, and to deflect the second incident light by a second angle to convert it into a third incident light, and to transmit the third incident light to the row waveguide through the input / output terminal 10031.

[0111] In some embodiments, the waveguide core layer 1003a may be made of silicon or silicon nitride, the lower cladding may be made of silicon dioxide, and the upper cladding may be made of silicon dioxide, polymer / polyimide, or silicon nitride.

[0112] Preferably, the diffraction region can employ a blazed grating structure. In some embodiments, the type of the diffraction region includes at least one of the following: linear, fan-shaped, or a combination of dot-line and dot-line shapes.

[0113] For example, in some embodiments, the type of the diffraction region includes at least one of the following: second-order step, third-order step. Figure 6 A side view of a two-stage stepped blazed grating structure is shown.

[0114] For example, in some embodiments, the second coupler further includes a metal reflective layer 10035 disposed on the outer surface of the upper cladding, such as... Figure 8 As shown.

[0115] For example, in some embodiments, the diffraction direction enhancement structure is a microlens 10034 disposed on the outer surface of the light-transmitting substrate, such as... Figure 8 As shown.

[0116] In some embodiments, the type of the first coupler includes: a single-stage diffraction grating coupler, a bidirectional grating coupler, and / or a symmetrical grating coupler.

[0117] In other words, in this embodiment, the first coupler preferably adopts a more conventional grating coupler to achieve local simplification of the coupler.

[0118] For example, a single-order diffraction grating coupler is a basic grating structure in optical chips. Its design goal is usually to concentrate light energy into a single diffraction order (such as the -1st order of vertical incident / outgoing light) to achieve efficient coupling between the chip and the optical fiber. Therefore, it can also be called a standard grating coupler. If its structure allows light energy to radiate symmetrically in both directions of the substrate, it is called a bidirectional grating coupler.

[0119] For example, a symmetrical grating coupler is a special grating structure designed to produce symmetrical or approximately symmetrical diffraction of incident light energy in directions perpendicular to the grating plane (i.e., upward and downward).

[0120] In other embodiments, the first coupler may be a directional grating, meaning that within a 360° range, the grating can receive light signals from a specific direction and output them from that specific direction. Light from directions other than the two specific directions will be attenuated to a greater extent possible through designs such as asymmetric designs or reflectors (mirrors).

[0121] Example 3

[0122] As mentioned above, this invention, on the one hand, designs small and large deflection angles to address the functional differences between the first and second couplers; on the other hand, it adapts the first and second couplers in terms of structure and function to different deflection angles. Thus, this coupler component with different deflection angles, structures, and functions can not only improve the optical signal transmission efficiency between chips (i.e., reduce energy consumption), but also reduce the overall design and manufacturing difficulty of the coupler through local functional enhancement, making the large-scale chip system easier to implement.

[0123] Furthermore, based on this locally reinforced coupler assembly, the present invention can provide a multi-chip system that may include at least two optical chips stacked vertically.

[0124] In some embodiments, at least two optical chips may use the same light-transmitting substrate layer.

[0125] Furthermore, the multi-chip system may also include at least three optical chips stacked vertically.

[0126] In this embodiment, the signal transmission between optical chips can use the coupler component described in any of the above embodiments, which will not be repeated here.

[0127] In some embodiments, the computing unit includes a phase change material layer.

[0128] In some embodiments, the thickness of the phase change material layer is greater than or equal to 100 nm.

[0129] In some embodiments, the width of the phase change material layer ranges from 2 μm to 30 μm.

[0130] In some embodiments, the spacing between adjacent computing units is typically greater than 50 μm, and preferably in the range of 100 to 200 μm.

[0131] In some embodiments, the phase change material layer is made of a superlattice material.

[0132] In some embodiments, the phase change material layer is formed of a chalcogenide compound containing antimony or selenium, or the phase change material layer contains the chalcogenide compound, wherein the chalcogenide compound includes Sb2Se3 or SbSe, Sb2S3 or SbS, Ge2Sb2Se4Te.

[0133] In some embodiments, the phase change material of the phase change material layer includes a compound or alloy containing an elemental combination of germanium, antimony, selenium, and vanadium oxide, or a mixture of said compounds; said compounds include: NbOx, GeTe, GeSb, GaSb, AgInSbTe, InSb, InSbTe, InSe, SbTe, TeGeSbS, AgSbSe, SbSe, GeSbMnSn, AgSbTe, AuSbTe, and AlSb.

[0134] In some embodiments, the chip system further includes:

[0135] The first modulator 1006 is used to connect to the first external light source 1011 (e.g., Figure 1 (as shown), and modulates the first external light source to form the first incident light for input to the optical chip;

[0136] At least one second modulator 1007, the second modulator 1007 being used to provide a second external light source (such as...) to the computing unit 1005 Figure 2 As shown), the second external light source is used to modulate the state of the phase change material layer.

[0137] In some embodiments, the first modulator is a modulation chip, which is bonded to at least one optical chip. The modulation chip is provided with m modulation units corresponding to m traveling waveguides. The modulation units are used to modulate the first external light source into first incident light with a set power according to a set specification.

[0138] The second modulator includes a first laser 1007a and a second laser 1007b disposed outside the optical chip. When the first laser is used to provide a first sub-light source and the second laser is used to provide a second sub-light source, a focal point light source is formed at the intersection of the first sub-light source and the second sub-light source. When the focal point light source is located in the computing unit, the focal point light source can modulate the state of the phase change material layer.

[0139] It should be noted that in this embodiment, two modulation modes are used for the input and transmission stages of the light source: direct chip transmission and spatial light modulation, respectively. Specifically, a first external light source is used as the signal light input, and a modulation chip is connected to the glass substrate chip to achieve synchronous input of the optical signal. On the other hand, dual modulators are used in combination, and spatial light modulation (i.e., the beams of two lasers are confocalized in space) is used to perform weighted modulation on individual computing units in the multilayer chip.

[0140] In this embodiment, the external configuration of the first modulator and the second modulator can actually place the main active devices outside the chip structure, thereby reducing the difficulty of integrating active devices on the glass substrate chip.

[0141] In other words, the signal modulation mode that combines chip transmission and spatial light modulation enables the integration of relatively pure passive devices in the multi-chip structure within the chip system, which also makes glass substrate chips easier to implement.

[0142] In some embodiments, the modulation threshold value of the computing unit is 100 pJ. When the power of the focal point light source is greater than the modulation threshold value, the phase change material layer will undergo a state change.

[0143] In this embodiment, on the one hand, the critical value of weight modulation of the computing unit is increased by designing the size of the phase change material of the computing unit. On the other hand, the spacing data is set to ensure that adjacent computing units maintain a large spacing. Thus, through the design of the space and the modulation critical value, it can be ensured that when the two lasers of the two lasers are confocal, only one material point is modulated, avoiding interference to other schemes in the spatial light modulation mode.

[0144] In other words, because the distance between the weighting units is on the order of 100 micrometers, this threshold ensures that when two laser beams are confocal, only one material point is modulated.

[0145] It should be noted that integrating active devices on light-transmitting substrates, especially glass substrates, is extremely difficult (the non-conductive nature of glass substrates significantly increases the difficulty of transmitting electrical signals).

[0146] To address this, this embodiment provides an optical signal modulation mode based on the coordinated use of chip transmission and spatial light modulation. This coordinated mode facilitates the unified external configuration of active devices, thereby avoiding or alleviating the difficulty of large-scale integration of active devices on a glass substrate. Furthermore, this application coordinates the design of the computing units in terms of modulation threshold and spacing to provide a high-power modulation mode for the computing units. This high-power modulation mode can reduce or avoid mismodulation of adjacent computing units due to local light diffusion under spatial light modulation.

[0147] In some embodiments, it also includes:

[0148] An external light source, which provides an external light source;

[0149] A beam splitter connected to the external light source is used to divide the external light source into m beams of the first external light source; the beam splitter is connected to the modulation chip.

[0150] In some embodiments, the type of the light-transmitting substrate includes at least one of the following: glass substrate, sapphire substrate, aluminum nitride substrate, polymer substrate, magnesium oxide substrate, yttrium-stabilized zirconium oxide, and flexible transparent substrate.

[0151] In some embodiments, the glass substrate is either a silicate glass substrate or a microcrystalline glass substrate. It is understood that the specific material type of the glass substrate can be flexibly selected according to different chip specifications and process conditions, as long as it meets the requirement of light transmittance; this invention does not impose any limitations on this.

[0152] The chip system of the present invention is particularly suitable for large-scale inference scenarios. During the inference stage, the frequency of weight switching is relatively low, which can reduce the modulation pressure of vertically stacked multi-chip systems.

[0153] It should be noted that, in this document, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Unless otherwise specified, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes that element.

[0154] Through the above description of the embodiments, those skilled in the art can clearly understand that the methods of the above embodiments can be implemented by means of software plus necessary general-purpose hardware platforms. Of course, they can also be implemented by hardware, but in many cases the former is a better implementation method. Based on this understanding, the technical solution of the present invention, or the part that contributes to the prior art, can be embodied in the form of a software product. This computer software product is stored in a storage medium (such as ROM / RAM, magnetic disk, optical disk) and includes several instructions to cause a computer terminal (which may be a mobile phone, computer, server, or network device, etc.) to execute the methods described in the various embodiments of the present invention.

[0155] The embodiments of the present invention have been described above with reference to the accompanying drawings. However, the present invention is not limited to the specific embodiments described above. The specific embodiments described above are merely illustrative and not restrictive. Those skilled in the art can make many other forms under the guidance of the present invention without departing from the spirit and scope of the claims. All of these forms are within the protection scope of the present invention.

Claims

1. A chip system, characterized by Comprise: At least two overlapping light chips (1001) are provided, wherein the light chip (1001) comprises: a light-transmissive substrate layer (10011), a waveguide layer (10012) is arranged on the light-transmissive substrate layer (10011), and the light-transmissive substrate layer (10011) and the waveguide layer (10012) of adjacent two light chips (1001) are arranged oppositely; Wherein, the waveguide layer is provided with m row waveguides, and a plurality of computing units (1005) are respectively arranged on the row waveguides, and at least one of the row waveguides has a light input end and a light output end on both sides; The light output end of at least one of the light chips is provided with a first coupler (1002), and the light input end of the light chip adjacent thereto is provided with a second coupler (1003); Wherein, the first coupler deflects the first incident light through the row waveguide by a first angle to convert it into the second incident light, and the second coupler is used to receive the second incident light and deflect it by a second angle to convert it into the third incident light, and input the third incident light into the corresponding row waveguide; wherein, the first coupler serves as the light output end, the second coupler serves as the light transmission end, the second angle is greater than the first angle, and the first angle is less than 90°; The type of the first coupler includes: single-stage diffraction grating coupler, bidirectional grating coupler, and / or symmetric grating coupler, and the second coupler is provided with a diffraction direction reinforcing structure; The chip system further comprises: A first modulator (1006) is used to connect with a first external light source (1011) and modulate the first external light source to form the first incident light for inputting into the light chip; At least one second modulator (1007) is used to provide a second external light source for the computing unit (1005), and the second external light source is used to modulate the state of the phase change material layer in the computing unit.

2. The chip system according to claim 1, characterized by The first angle is greater than 70°.

3. The chip system according to claim 1, characterized by The first angle is greater than 75°.

4. The chip system according to claim 1, characterized by The first angle is greater than 80°.

5. The chip system according to claim 1, characterized by At least two overlapping chips include: a first light chip (1001a), a second light chip (1001b) and a third light chip (1001c); Wherein, the light output end of the first light chip is provided with a first coupler, the light input end and the light output end of the second light chip are respectively provided with a second coupler and a first coupler, and the light input end of the third light chip is provided with a second coupler; The first light chip, the second light chip and the third light chip are arranged in an overlapping manner to sequentially connect the first coupler and the second coupler to form an S-shaped optical signal transmission path.

6. The chip system according to claim 5, characterized by The type of the diffraction direction reinforcing structure includes: blazed grating, metal reflection layer and / or microlens.

7. The chip system according to claim 6, characterized by The second coupler comprises: The light-transmissible substrate layer (10011) is provided with a lower cladding layer (100122), the lower cladding layer (100122) is sequentially provided with a waveguide core layer (1003a), the waveguide core layer (1003a) comprises an input / output end (10031), a beam expanding area (10032) and a diffraction area (10033) which are sequentially arranged; wherein, The diffraction area and the beam expanding area are used for receiving the second incident light, deflecting the second incident light by a second angle to convert the second incident light into third incident light, and transmitting the third incident light into the line waveguide through the input / output end (10031).

8. The chip system according to claim 7, characterized by The type of the diffraction direction reinforcing structure arranged in the diffraction area includes at least one of the following: straight line, fan shape, dot array line combination; and / or, the type of the blazed grating arranged in the diffraction area includes at least one of the following: two-step, three-step; And / or, the diffraction direction reinforcing structure includes a metal reflection layer arranged on the outer surface of the upper cladding layer of the waveguide core layer; And / or, the diffraction direction reinforcing structure includes a microlens arranged on the outer surface of the light-transmissible substrate layer.

9. The chip system according to claim 1, characterized by The thickness of the phase change material layer is greater than or equal to 100 nm.

10. The chip system according to claim 1, characterized by The width of the phase change material layer ranges from 2 μm to 30 μm.

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