Resource sharing methods, systems and electronic devices

Abstract

This application discloses a resource sharing method, system, and electronic device, relating to the field of cloud platform resource pooling technology. The method includes an interconnected device receiving a request from a target tenant and writing the data and instruction information from the request into a data cache and an instruction cache in an extended memory device, respectively, so that the target device can read the request through the data cache and instruction cache. This application achieves resource sharing with the target device by setting up instruction and data caches in the extended memory device and establishing mapping relationships between the instruction and data caches and each tenant and device, enabling the target tenant to access the instruction and data caches through the interconnected device. This alleviates the overhead caused by relying on additional software protocols in related technologies, achieves consistent access to shared resources, improves access efficiency, and reduces data synchronization complexity.

Description

Technical Field

[0001] This application relates to the field of cloud platform resource pooling technology, and in particular to a resource sharing method, system and electronic device. Background Technology

[0002] With the widespread adoption of cloud services and large-scale AI training / inference services, the deployment scale of PCIe devices in data centers continues to grow, but the average utilization rate under long-term workloads remains extremely low. In situations of low resource utilization, device pooling can significantly improve resource utilization, reduce redundant deployment costs, and enhance the elasticity of device maintenance. Related technologies employ PCIe switches (or dedicated external switches) to achieve PCIe device pooling, connecting hosts and devices to the same switching domain, allowing any host to access any device in the pool. However, when multiple hosts need to collaboratively access the same memory region, this solution requires additional software protocols, leading to low access efficiency and complex data synchronization. Summary of the Invention

[0003] This application provides a resource sharing method, system, and electronic device to at least solve the problem of low access efficiency in cross-host shared memory in related technologies.

[0004] This application provides a resource sharing method, comprising: an interconnect device receiving a first request from a target tenant to a target device; the first request including instruction information and data information; wherein a first host corresponding to the target tenant and a second host corresponding to the target device are connected; the interconnect device writing the data information into a data cache mapped to the target tenant, and writing the instruction information into an instruction cache mapped to the target tenant, so that the target device accesses the instruction information through the instruction cache, accesses the data information through the data cache, and responds to the first request; wherein the instruction cache and the data cache are disposed in an extended memory device; the interconnect device receiving the response result of the target device to the first request, and writing the response result into the instruction cache or the data cache. This application, by setting up instruction and data caches in an extended memory device and establishing mapping relationships between the instruction and data caches and each tenant, can alleviate the overhead caused by relying on additional software protocols in related technologies, achieve consistent access to resource sharing, and improve access efficiency.

[0005] This application also provides a resource sharing system, including: an interconnect device, a first host, a second host, and an extended memory device; the first host and the second host are connected so that a target tenant corresponding to the first host can access a target device corresponding to the second host through a first request; the extended memory device includes an instruction cache and a data cache, both of which are mapped to the target tenant; the interconnect device is used to receive the first request, and based on the mapping relationship, write the data information into the data cache and the instruction information into the instruction cache, so that the target device can access the instruction information through the instruction cache, access the data information through the data cache, and respond to the first request; receive the response result of the target device to the first request, and write the response result into the instruction cache or the data cache.

[0006] This application also provides an electronic device, including: a memory for storing a computer program; and a processor for implementing the steps of any of the above-described resource sharing methods when executing the computer program.

[0007] This application also provides a computer-readable storage medium storing a computer program, wherein the computer program, when executed by a processor, implements the steps of any of the above-described resource sharing methods.

[0008] This application also provides a computer program product, including a computer program that, when executed by a processor, implements the steps of any of the above-described resource sharing methods.

[0009] This application sets up instruction cache and data cache in the extended memory device and establishes a mapping relationship between the instruction cache and data cache and each tenant and each device, so that the target tenant can access the instruction cache and data cache through the interconnect device, thereby realizing resource sharing with the target device. This can alleviate the overhead caused by relying on additional software protocols in related technologies, realize consistent access to resource sharing, and help improve access efficiency and reduce data synchronization complexity. Attached Figure Description

[0010] To more clearly illustrate the embodiments of this application, the accompanying drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0011] Figure 1 This is a structural schematic diagram of a device pooling scheme provided in related technologies;

[0012] Figure 2A flowchart illustrating a resource sharing method provided in an embodiment of this application;

[0013] Figure 3 This is a schematic diagram of the structure of a resource sharing system provided in an embodiment of this application;

[0014] Figure 4 A flowchart illustrating a cross-host access process provided in an embodiment of this application;

[0015] Figure 5 A flowchart illustrating a system-level load balancing process provided in an embodiment of this application;

[0016] Figure 6 This is a flowchart illustrating a device fault handling process provided in an embodiment of this application. Detailed Implementation

[0017] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the protection scope of this application.

[0018] It should be noted that, in the description of this application, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. The terms "first," "second," etc., in this application are used to distinguish similar objects and are not used to describe a specific order or sequence.

[0019] First, the terms and concepts used in this application will be explained:

[0020] Compute Express Link (CXL);

[0021] Remote Direct Memory Access (RDMA).

[0022] With the widespread adoption of cloud services and large-scale AI training / inference services, the deployment scale of PCIe devices such as GPUs, SSDs, and NICs in data centers continues to grow, but their average utilization rate under long-term workloads remains extremely low. In situations of low resource utilization, device pooling can significantly improve resource utilization, reduce redundant deployment costs, and enhance the resilience of device maintenance. The traditional mainstream approach to PCIe device pooling is to use PCIe switches (or dedicated external switches) to connect hosts and devices to the same switching domain, allowing any host to access any device in the pool. However, the hardware cost, deployment complexity, and vendor compatibility limitations of PCIe switches present significant obstacles to large-scale commercial deployments: high overall cost of devices and switches, redundant switches further increasing CAPEX, and poor deployment flexibility due to differences in topology / device support among different vendors.

[0023] In recent years, CXL, as a new generation of open high-speed interconnect standard, has provided support for memory consistency and cache consistency, enabling the establishment of shared memory semantics between hosts and devices. Through a CXL switch, multiple hosts can simultaneously access the CXL Memory Box and shared PCIe devices, thus providing a hardware-level foundation for device pooling and dynamic resource scheduling. However, existing CXL-based multi-host sharing technologies still have the following unresolved issues: how to achieve direct data sharing and exchange between PCIe devices under the CXL architecture; how to achieve multi-tenant isolation under the CXL architecture and support flexible security and performance mode selection; how to provide an efficient load balancing mechanism in a multi-host sharing environment, capable of quickly responding to burst loads while maintaining long-term system resource utilization; and how to utilize backup hosts for rapid switching and context recovery in case of device failure, avoiding service interruptions. Therefore, it is necessary to propose a rack-level PCIe device pooling and scheduling system and method based on a CXL switch to achieve efficient scheduling and management of multi-host shared PCIe devices under the CXL architecture, addressing the shortcomings of existing technologies in resource utilization, load balancing, and fault recovery.

[0024] Currently, in data centers and high-performance computing systems, to improve the resource utilization of PCIe devices such as GPUs, NICs, and SSDs, the industry has proposed device pooling technology based on PCIe switches. (See attached image) Figure 1As shown, existing systems typically interconnect multiple hosts with shared PCIe devices through multi-level PCIe switches. Specifically, host 1, host 2 to host n are connected to multiple high-speed interconnect devices (high-speed interconnect device PCIe Switch 1, high-speed interconnect device 2 to high-speed interconnect device n) through multi-level high-speed interconnect switches. The first-level high-speed interconnect switches include high-speed interconnect switches 11 to 1n, and the second-level high-speed interconnect switches include high-speed interconnect switches 21 to 28. This architecture can achieve device pooling to a certain extent, allowing different hosts to access pooled devices on demand, thereby improving device utilization.

[0025] In this type of solution, the PCIe switch serves as the core interconnect component, providing a forwarding path from host to device and supporting certain virtualization functions (such as SR-IOV), enabling multiple hosts to share the functionality of the same physical device. By increasing the number of PCIe switches, the system can be expanded to support more hosts and devices, achieving centralized resource management and dynamic allocation.

[0026] This type of device pooling technology based on PCIe switches belongs to the prior art related to this invention. It can solve the device silo problem and provide preliminary hardware architecture support for multiple hosts to share PCIe devices. However, due to the limitations of the PCIe protocol itself, this solution still has shortcomings in multi-tenant isolation, cross-host shared memory consistency, load balancing, and fault recovery. These shortcomings are the key problems that this invention aims to solve.

[0027] Although device pooling systems based on PCIe switches can enable multiple hosts to share PCIe devices to some extent, this type of solution still has the following shortcomings:

[0028] 1. Insufficient multi-tenant isolation capabilities;

[0029] The existing PCIe Switch architecture mainly relies on SR-IOV or software agents to achieve virtualization, but its isolation granularity is relatively coarse. Different tenants' access to shared devices is prone to conflicts, making it difficult to guarantee security and data independence.

[0030] 2. Lack of a consistency mechanism for shared memory across hosts;

[0031] The PCIe protocol itself does not support memory consistency. When multiple hosts need to access the same memory area in a coordinated manner, an additional software protocol is required, resulting in low access efficiency and complex data synchronization.

[0032] 3. Limited load balancing capabilities;

[0033] Existing solutions typically employ static allocation or simple polling scheduling methods, which make it difficult to dynamically schedule resources based on indicators such as device latency, bandwidth, and instantaneous load, and are even less able to effectively cope with sudden pulse loads and continuous overload scenarios.

[0034] 4. The fault recovery mechanism is inadequate;

[0035] When a PCIe device fails, the existing architecture typically requires a host-level restart or manual switchover, lacking automated and rapid failover and context recovery mechanisms, making it difficult to meet high availability requirements.

[0036] In view of the shortcomings of the existing technology, the present invention aims to solve the following technical problems:

[0037] 1. Provide a multi-tenant isolation mechanism that balances security and performance;

[0038] The design incorporates a CXL-based multi-tenant isolation scheme that supports both security and performance modes. This ensures the independence of different tenants accessing shared resources while also enabling efficient utilization of all controller and memory resources in high-performance scenarios.

[0039] 2. Achieve consistent access to shared memory across hosts;

[0040] By designing IO Buffers (instruction buffers) and Shared Data Buffers (data buffers) in the CXL Switch and CXL Memory Box, consistent access to shared memory by multiple hosts is achieved, simplifying cross-host data interaction and device DMA operations, and improving access efficiency.

[0041] 3. Establish a multi-level load balancing mechanism;

[0042] Load balancing algorithms are introduced within tenants and at the system level to dynamically schedule device resources based on metrics such as latency, bandwidth, and I / O resource credit. A mechanism that distinguishes between pulse overload and continuous overload is used to enable and release standby devices on demand.

[0043] 4. Provides rapid failover and context recovery capabilities;

[0044] When a device fails, the IO Buffer and Shared Data Buffer still store instructions and data. The fault handling module maps the IO Buffer and Shared Data Buffer to a backup device to achieve rapid context replication and recovery, thereby ensuring the continuity of tenant services and the high availability of the system.

[0045] To enable those skilled in the art to better understand the present application, the present application will be further described in detail below with reference to the accompanying drawings and specific embodiments.

[0046] The specific application environment architecture or specific hardware architecture on which the execution of the resource sharing method depends is described here.

[0047] Reference Figure 2 As shown, one embodiment of this application provides a resource sharing method, including:

[0048] In step S100, the interconnected device receives a first request from the target tenant to the target device; the first request includes instruction information and data information; wherein, the first host corresponding to the target tenant and the second host corresponding to the target device are connected.

[0049] In step S200, the interconnect device writes data information into a data cache mapped to the target tenant and writes instruction information into an instruction cache mapped to the target tenant, so that the target device can access instruction information through the instruction cache, access data information through the data cache, and respond to the first request; wherein, the instruction cache and the data cache are set in an extended memory device;

[0050] In step S300, the interconnected device receives the response result of the target device to the first request and writes the response result into the instruction cache or data cache.

[0051] In this application, the interconnect device connects multiple hosts. The first host and the second host can be any two of the multiple hosts. A mapping relationship exists between the target tenant and the first host, the target device, and the shared memory in the interconnect device. The shared memory in this application includes a data cache and an instruction cache. The instruction cache and data cache are located in an extended memory device, which is connected to the interconnect device. More specifically, the extended memory device is connected to the downlink port of the interconnect device. This application uses the data cache and instruction cache in the extended memory device to receive and transmit the data and instructions of the first request, thereby enabling the target tenant to call the target device and achieve data sharing. The instruction cache and data cache in this application are used for the target tenant's direct access to the target device. It is understood that PCIe SW does not have data sharing, so data acquisition between devices requires CPU and RDMA. Although CXL SW can utilize memory semantics to achieve data exchange between devices, CXL SW does not support interaction between PCIe devices; therefore, software or firmware is needed to achieve data sharing and exchange between PCIe devices. This application enables direct access by the target tenant to the target device through the setup of interconnected devices, data cache, and instruction cache. This alleviates the inefficiency caused by accessing through third-party software in related technologies, and helps to improve access efficiency and reduce data synchronization complexity.

[0052] In some embodiments, the target device in this application determines the instruction cache and data cache through a mapping relationship with the target tenant, obtains instruction information through the instruction cache, obtains data information through the data cache, and responds to the first request; thus completing the target tenant's access to the target device and realizing resource sharing. It is understood that the first host in this application can be any host connected to the interconnected device, and tenants on any host can issue requests to the device and access the device through the resource sharing method provided in this application. In some embodiments, the device in this application can be a PCIe device; specifically, it can be a PCIe device with any function, and the target tenant achieves efficient access to the PCIe device through the method provided in this application.

[0053] Optionally, before the interconnected device receives the first request from the target tenant to the target device, the method further includes:

[0054] Obtain basic information about the target tenant;

[0055] Based on the basic information, determine the isolation mode of the target tenant, and allocate shared memory to the target tenant according to the isolation mode; wherein, the isolation mode is used to characterize the access level of the data cache or instruction cache mapped to the target tenant.

[0056] The basic information in this application includes the domain information of the target tenant. The access level of the target tenant is determined based on this domain information, and the access level, to a certain extent, indicates the security priority of the information belonging to the target tenant. For example, if the target tenant belongs to a hospital, bank, or other domain with high information security requirements, the isolation mode for the target tenant is set to secure mode. If the target tenant is a general enterprise accessing the cloud platform, the isolation mode for the target tenant is set to shared mode. The isolation mode determines whether the data cache or instruction cache corresponding to the target tenant is exclusive; in other words, the isolation mode in this application is used to characterize whether the data cache or instruction cache mapped to the target tenant is exclusively accessed. Shared memory includes the instruction cache and data cache allocated to the target tenant. Based on the nature of the target tenant, this application sets different isolation schemes for the target tenant, ensuring the independence of different tenants' access to shared resources while also utilizing shared resources in high-performance scenarios, achieving a balance between security and access efficiency.

[0057] Optionally, the method further includes:

[0058] When the target device is fully loaded, the instruction cache and data cache are mapped to the second device through a tenant-level load balancing strategy; wherein, the second device is an available device of the same type as the target tenant.

[0059] When the target device is fully loaded and there is no second device, the instruction cache and data cache are mapped to the third device through a system-level load balancing strategy. The third host and the first host are connected to the same interconnect device, the idle rate of the third device is greater than or equal to the first preset idle rate, and the third host is a host connected to the third device.

[0060] In this application, the interconnecting device can remap the instruction cache and data cache using a tenant-level load balancing strategy or a system-level load balancing strategy when the target device is fully loaded, thereby alleviating the low access efficiency caused by the target device's full load. The target device in this application can be any device connected to the interconnecting device that has a mapping relationship with the target tenant. During the target tenant's access process, the interconnecting device monitors each device. If a device is detected to be fully loaded, the load balancing strategy provided in this application can be used to remap the data cache and instruction cache, achieving efficient access for the target tenant. This application establishes different levels of load balancing strategies through tenant-level or system-level load balancing strategies to quickly respond to the target device's full load situation, enabling rapid activation of backup devices and further improving access efficiency.

[0061] In this application, the tenant-level load balancing strategy is used to characterize load balancing among the devices mapped to the target device, while the system-level load balancing strategy is used to characterize load balancing across the entire system architecture. It is understood that when there is an idle or available second device among the devices mapped to the target tenant, the data cache and instruction cache are scheduled to the second device to achieve fast cache scheduling and improve scheduling efficiency. In this application, the second device has a mapping relationship with the target tenant, and the second device and the target device have the same or similar functions and types; that is, "same type" in this application is used to characterize devices with similar types or functions to the target device. If there is no second device when the target device is fully loaded, this application maps the instruction cache and data cache to a third device, which is an idle device connected to the same interconnect device as the first host. In this application, the first preset idle rate is the lower limit of the idle rate of the device that allows for increased scheduling.

[0062] Optionally, the instruction cache and data cache are mapped to a second device using a tenant-level load balancing strategy, including:

[0063] In the presence of multiple second devices, determine the device information for each second device; wherein the device information includes at least one of device latency, device bandwidth, and device resources;

[0064] Based on the equipment information, determine the equipment priority of each second device;

[0065] The devices are prioritized and then a balancing device is selected from multiple secondary devices based on the prioritization results. The instruction cache and data cache are then mapped to the balancing device.

[0066] In this application, if there are multiple second devices of the same type as the target device and mapped to the target tenant, the device priority of each second device is determined based on at least one of the following: device latency, device bandwidth, and device resources. The load balancing device is then selected based on the ranking of these device priorities. It can be understood that the load balancing device in this application is the second device. Device latency, device bandwidth, and device resources are all used to characterize the performance of the second device. By calculating the device priority using multiple parameters, the accuracy of the device priority calculation is improved, thereby improving the accuracy of load balancing scheduling and increasing scheduling efficiency.

[0067] Optionally, based on the device information, the device priority of each second device is determined, including:

[0068] The equipment information is normalized to obtain normalized information;

[0069] The parameter information is determined based on the variance and normalization information of the equipment information;

[0070] Based on parameter information and normalization information, determine the device priority.

[0071] Parameter information is used to characterize the device's performance in terms of latency or bandwidth. This application normalizes device latency information using the device latency of all second devices, device bandwidth information using the device bandwidth of all second devices, and device resource information using the total device resources of the current second device. Normalized device information better mitigates the impact of excessively high or low device information on the calculation result during priority calculation. Furthermore, this application mitigates the reduction in performance caused by normalization in certain aspects by using variance, reflecting the unique performance of a device in a particular area of ​​device information. Finally, this application determines device priority using parameter information or normalized information.

[0072] Optionally, based on the device information, the device priority of each second device is determined, including:

[0073] Calculate the latency variance of all devices and the bandwidth variance of all devices; where the latency of all devices is the device latency of all second devices and the bandwidth of all devices is the device bandwidth of all second devices.

[0074] A first value is determined based on the quotient of the current device's delay and the first delay; wherein the first delay is the maximum delay among all device delays; and wherein the current device is the second device in the calculation of device priority.

[0075] The second value is determined based on the quotient of the current device bandwidth and the first bandwidth; where the first bandwidth is the maximum bandwidth among all device bandwidths.

[0076] The delay value is determined by the quotient of the delay variance and the first value; the bandwidth value is determined by the product of the second value and the bandwidth variance.

[0077] The resource value is determined based on the quotient of the available resources of the current equipment and the first resource; where the first resource is the total resources of the current equipment.

[0078] The device priority of the current device is determined based on the sum of the latency value, bandwidth value, and resource value.

[0079] In this application, "device latency" refers to the latency of all devices corresponding to all second devices. Similarly, "device bandwidth" refers to the bandwidth of all devices corresponding to all second devices. Determining the latency variance of all device latencies and the bandwidth variance of all device bandwidths facilitates further highlighting the performance of normalized data. In this application, "current device" refers to the second device currently calculating its device priority. This application can calculate the device priority of each second device sequentially. The device latency is normalized by the quotient of the current device's latency and the first latency to obtain a first value. The device bandwidth is normalized using the same method to obtain a second value. The first and second values ​​are then calculated with their corresponding variances to obtain the corresponding bandwidth or latency values. This application normalizes the device resources of the current device by combining its available resources with its total resources to obtain a resource value. Finally, this application determines the device priority of the current device by summing the latency value, bandwidth value, and resource value. In another embodiment, this application determines the device priority of the current device by weighted summing the latency value, bandwidth value, and resource value. In this example, device resources reflect device credit to some extent. The credit in this application considers resources within a single device, normalizing them by dividing the device's remaining resources by its original total resources. The normalized result does not require further calculation with variance. Latency and bandwidth are normalized across all devices of the same type. If there are significant performance differences between devices, multiplying by the variance can reflect the unique latency and bandwidth performance of a particular device. It should be noted that device resources in this application can be I / O resources, or the resource type can be determined based on the access type of the target device in the first request; this application does not impose specific limitations. This application uses different processing methods for different types of device information to calculate device priorities, which improves the accuracy of device prioritization and thus improves the accuracy of load balancing.

[0080] Optionally, the instruction cache and data cache can be mapped to a third device using a system-level load balancing strategy, including:

[0081] Obtain the load characteristics of the target device;

[0082] Based on the load characteristics, the overload type is determined, and based on the overload type, the recovery strategy for the third device is determined.

[0083] In this application, the load characteristic refers to the load status of the target device, which can be the load occupancy over a period of time or the load occupancy at a single moment. Those skilled in the art can set this characteristic according to actual needs. In some embodiments, the overload types in this application can include pulse overload and continuous overload, and different recovery strategies are implemented for different types of overload. The recovery strategy in this application is used to determine the timing of resource recovery for the device. By designing different recovery strategies for different overload types, this application can more effectively cope with different load types, better handle resource rescheduling during overload occurrence and resource recovery after overload, and improve the efficiency and accuracy of resource scheduling.

[0084] Optionally, the overload type can be determined based on load characteristics, including:

[0085] If, within a first duration, the duration for which the first instantaneous load of the target device is greater than the preset instantaneous load is less than the preset duration, the first instantaneous load is determined to be a load pulse; wherein, the preset instantaneous load is a multiple of the average load;

[0086] If the number of load pulses detected within the second time period is greater than or equal to the preset number, the overload type is determined to be pulse overload; wherein the second time period is longer than the first time period;

[0087] If no load pulse is detected or the number of detected load pulses is less than the preset number, the overload type is determined to be continuous overload.

[0088] In this application, the first and second durations refer to any time period, not a fixed time period. Timing can begin at any point and generate a time period. It is understood that after determining that the target device is overloaded, if a first instantaneous load is detected to be greater than a preset instantaneous load at a certain moment, timing begins until the first instantaneous load is less than or equal to the preset instantaneous load, obtaining the duration. If the duration is less than the preset duration, the first instantaneous load is determined to be a load pulse. The preset instantaneous load in this application is related to the moving average load of the target device. The average load is the average load of the target device. In some embodiments, the average load can be the moving average load of the target device within the first duration. The preset instantaneous load is an unacceptable lower limit of overload. Those skilled in the art can set the specific value of the preset instantaneous load according to the application scenario and application field of the cloud platform. This application does not limit the specific value of the preset instantaneous load. Of course, the preset duration can also be set according to actual needs. The second duration is a duration greater than the first duration, and the preset number of times can also be set according to actual needs. This application statistically analyzes the load on the target device to determine the specific type of current overload. Based on the overload type, the specific execution method of load balancing can be determined. Furthermore, the determination of the overload type can be adjusted according to the actual situation, which not only meets the diverse needs of customers but also realizes the classified execution of load balancing, achieving efficient system balancing.

[0089] Optionally, based on the overload type, a recycling strategy for the third device is determined, including:

[0090] For pulse overload, if the load subsides and the number of load pulses detected within the second time period is less than or equal to 1, the third device is recovered;

[0091] In the event of continuous overload, if the resource idle rate of the target device is greater than or equal to the second preset idle rate, the third device will be reclaimed.

[0092] In this application, load fading occurs when the target device is no longer at full load, and the number of load pulses detected within the second time period is less than or equal to 1. The data cache and instruction cache are then remapped to the target device, and resources from the third device are reclaimed. For continuous overload, if the resource idle rate of the target device is greater than a second preset idle rate, the third device is reclaimed. In this application, the second preset idle rate is the lower limit of the acceptable resource callback idle rate; those skilled in the art can set the specific value of the second preset idle rate according to actual needs. This application performs adaptive load balancing for different overloads by executing different load reclamation timings for different load types. This enables rapid migration during overload and rapid resource release when the overload is relieved, thus maintaining the resource balance of the entire system.

[0093] In one embodiment, recycling a third device includes:

[0094] Remap the data cache and instruction cache to the target device;

[0095] If the data sharing space corresponding to the third device has been cleared, the third device will be recycled.

[0096] This application remaps data cache and instruction cache, reclaims resources from third-party devices, and frees up more resources for the system, facilitating the execution of other requests and achieving efficient operation of the entire system.

[0097] Optionally, based on the isolation mode, shared memory is allocated to the target tenant, including:

[0098] When the isolation mode is in secure mode, the target tenant is assigned to an independent shared memory under the first interconnect controller;

[0099] When the isolation mode is performance mode, the shared memory under the second interconnect controller is allocated to all first tenants to obtain the shared memory allocated to the target tenant; wherein, the second interconnect controller is all interconnect controllers except the first interconnect controller, and the first tenant is the tenant in the isolation mode of performance mode.

[0100] In this application, when the isolation mode is secure mode, the interconnect device allocates the target tenant to an independent shared memory under the first interconnect controller. Both the first interconnect controller and the shared memory are exclusive to protect the security performance of the corresponding resources. It is understood that if the system contains multiple tenants requiring a secure mode, tenants in secure mode are allocated to different first interconnect controllers and their exclusive shared memory. The remaining controllers (i.e., the second interconnect controllers) are allocated to first tenants in performance mode to balance resources among them for efficient resource utilization. The allocation method of the shared memory of the second interconnect controller to first tenants can be equal, proportional according to the needs of each first tenant, or according to the request priority of each first tenant. This application does not limit the specific form of allocation. This application, through different tenant isolation schemes, meets the needs of different tenants, protecting data security while achieving efficient resource utilization.

[0101] Optionally, before the interconnected device receives the first request from the target tenant to the target device, the method further includes:

[0102] Obtain basic information about the target tenant and collect device information about multiple first devices connected to the interconnected device;

[0103] Based on the basic information and device information, the mapping relationship between the first device, shared memory and tenant is determined through address space mapping; wherein, shared memory includes instruction cache and data cache.

[0104] In this application, the interconnecting device obtains basic information about the target tenant and collects device information from multiple connected first devices or host information from multiple connected hosts. The basic information includes the target tenant's requirements. Based on these requirements, the application filters accessible devices from multiple devices for the target tenant. Specifically, based on the requirements and the device information of each device, a first device is mapped to the target tenant. The device information of the first device (i.e., the sum of the device resources of all first devices) is sufficient to meet the requirements of the first device; that is, the first device is a device allocated to the target tenant based on its requirements and accessible to the target tenant. Naturally, the first host corresponding to the target tenant and the host corresponding to the first device are connected to the same interconnecting device. By mapping devices, shared memory, and tenants, this application facilitates access to shared memory by the target tenant based on the mapping relationship, and also facilitates access to memory by the device based on the mapping relationship. This enables access between the target tenant and the device, achieving cross-host memory consistency access and improving access efficiency.

[0105] Optionally, the method further includes:

[0106] When the first host is started, the mapping relationship is recorded through the first host so that the target tenant can access the first device through the mapping relationship.

[0107] In this application, when a mapping relationship is set up on interconnected devices, the mapping relationship is received and recorded when each host starts up. At the same time, each host has a device proxy function, which enables the mapped tenant to access the proxyed device through shared memory. Through the mapping and device proxy functions, data exchange and access are realized through shared memory, which alleviates the problem of low access efficiency caused by relying on software for data transmission in related technologies.

[0108] Optionally, the interconnected device writes data information into a data cache mapped to the target tenant, including;

[0109] If the first request is sent through the first host, the data information is written to the data cache through the controller and interconnection devices of the first host;

[0110] Alternatively, if the first request is issued by the fourth device through the direct memory access controller, the data information is written to the data cache through the direct memory access controller and the interconnect device.

[0111] The requests from the target tenant in this application can be sent through the corresponding host or through the corresponding device. Specifically, the controller of the first host transmits data information to the interconnect device, and the interconnect device writes the data information into the data cache. The fourth device transmits data information to the interconnect device through the direct memory access controller, and the interconnect device writes the data information into the data cache. This application provides diverse data transmission paths, offering multiple path options for the target tenant, enabling multi-faceted direct data access, and improving the diversity and efficiency of data access.

[0112] Optionally, the target device accesses instruction information through an instruction cache, accesses data information through a data cache, and responds to the first request, including:

[0113] If the second host starts, it polls the instruction cache corresponding to the target tenant and reads the instruction information.

[0114] Based on the instruction information, data information is read through direct memory access.

[0115] In this application, each host has device proxy functionality. Simultaneously, a second host is mapped to a target tenant. After the second host starts, it polls the target tenant's instruction cache to obtain instruction information, and based on this information, retrieves and processes the data to obtain a response, thus enabling access to the target device. Of course, the first and third hosts in this application also have device proxy functionality. Upon startup, they poll the target tenant's cache to read data or instructions. This application uses a polling cache method corresponding to the host of the target device to read the data or instructions to be transmitted, achieving device access and resource sharing without requiring third-party software, which improves access efficiency.

[0116] Optionally, the method further includes:

[0117] If a fault is detected in the target device, the instruction cache and data cache will be mapped to a third device;

[0118] If the target device recovers, the instruction cache and data cache will be mapped to the target device, and the resources of the third device will be released.

[0119] In this application, the third device is a usable device connected to the same interconnected device as the target device. The idle rate of the third device must be greater than or equal to the first preset idle rate. The third device can be considered as a backup device for the target device, and any device in the system that meets the conditions can be considered as a backup device for the target device. This application achieves rapid fault handling, rapid context replication and recovery through the third device, ensuring the continuity of system services.

[0120] The resource sharing method provided in this application will be described in detail with reference to specific embodiments.

[0121] As attached Figure 3 This paper provides a detailed description of the specific implementation scheme of the rack-level PCIe device pooling and scheduling system based on CXL Switch of the present invention.

[0122] This system consists of a CXL Switch (CXL SW, or Interconnect Switch), multiple hosts, PCIe devices connected to the local hosts (such as GPUs, NICs, SSDs, FPGAs, etc.), and extended memory devices (CXL Memory Boxes) connected to the downlink ports of the CXL SW. Each CXL Memory Box contains multiple Interconnect Controllers (CXL Controllers) and corresponding DRAM memory resources, serving as a shared storage medium across hosts.

[0123] certainly, Figure 3 The devices connected to each host are configured according to actual needs. Figure 3 The device labels are only used as examples of connection relationships and do not limit the type of PCIe device connected to each host in this application. The specific type of PCIe device connected can be adjusted according to actual needs. Figure 3 The medium-length extended memory device includes n interconnect controllers (CXL controllers), n data caches, and n instruction caches. DRAM is the memory within CXL memory. One CXL controller corresponds to one or more RAMs, and divides the RAM into data caches and instruction caches.

[0124] This solution can be used on cloud platforms to replace the original PCIe switch architecture. The host expands the PCIe device by accessing the extended memory of the downlink port of the CXL switch for instruction / data.

[0125] It should be noted that the "host" in this application can be considered as a server or a virtual machine host on a cloud platform. If considered as a physical server, each tenant can be one host or multiple hosts. If considered as a virtual host, each tenant can be a virtual host with multiple CPUs.

[0126] The CXL SW is internally divided into four main functional modules: the link module, the multi-tenant module, the load balancing module, and the fault handling module. The link module implements CXL protocol transmission and reception, flow control, and error handling; the multi-tenant module provides tenant isolation and shared memory management; the load balancing module implements intra-tenant and system-level scheduling; and the fault handling module ensures service continuity in the event of device failure.

[0127] The multi-tenant module manages host MMIO and achieves data isolation between tenants by allocating independent instruction IO buffers and shared data buffers to different tenants. After system power-on, CXLSW collects host PCIe device information and performs MMIO mapping for each PCIe device. Subsequently, CXLSW returns the mapped addresses to each host. The host has CXL IOMMU configuration driver functionality: during the BIOS boot phase, the IOMMU maps the DMA address space of the local PCIe device to the corresponding CXL shared memory, enabling the device to directly perform read and write operations on the shared data buffer.

[0128] When the same tenant accesses the device from different hosts, a unified IO Buffer and Shared Data Buffer are used to ensure the consistency of MMIO mapping in a multi-host environment. Tenants are mapped one-to-one with the IO Buffer and Shared Data Buffer during a single access. This invention provides two isolation modes: in security mode, different tenants are allocated to independent shared memory areas under different CXL Controllers (i.e., the first interconnect controller) by the CXLSW; in performance mode, each tenant is evenly allocated shared memory under all CXL Controllers (i.e., the second interconnect controller) by the CXLSW to improve bandwidth utilization. The IO Buffer is mainly used to carry command queues, doorbells, completion queues (CQ), interrupt events, and heartbeat detection; the Shared Data Buffer is used for data exchange between hosts and the data access area for device DMA. That is, in this application, the instruction cache is used to store command queues, doorbells, and interrupt events, and the data cache is used to store exchanged data and access data.

[0129] The different modes in this application are set according to user requirements. If the user application has high data security requirements, such as banking or medical data, a security mode is used, in which the user exclusively uses a portion of the CXL controller to physically prevent other tenants from accessing the user's data. If the user requires higher performance and has lower data security requirements, a performance mode is used to fully utilize the bandwidth of the CXL extended memory.

[0130] The host has device agent functionality. After the host boots up and enters the operating system, its agent program continuously polls the tenant's IO buffer, reads the register data and commands, executes the corresponding MMIO operations, and coordinates DMA access to the Shared Data Buffer for the local host's PCIe devices. After the task is completed, the device agent is responsible for writing the results back to the IO buffer. The host, whose tenant uses the main CPU, also has device agent functionality.

[0131] When host W or a PCIe device Z needs to access PCIe device S on host X, the cross-host access process is as follows: Figure 4 First, device Z transmits data to the DMA controller via the PCIe link. The DMA controller or the CPU of host W writes the data into the Shared Data Buffer of the CXL Memory Box, i.e., data is written to the data cache. Second, device Z sends instructions to the DMA controller via the PCIe link. The DMA controller or the CPU of host W sends the instructions to the IO buffer of shared memory via the data bus, i.e., instructions are written to the instruction cache, and the doorbell register is triggered. The device agent on host X continuously polls the IOBuffer, i.e., the target device polls the instruction cache. After detecting a new instruction, the corresponding MMIO operation is executed, i.e., after the register is triggered, the address space mapping instruction is executed. Device S then performs DMA access on the Shared Data Buffer to complete the task, i.e., direct memory access read and write data operation. After the task is completed, device X writes the result back to the IO Buffer via DMA and triggers an event or interrupt, i.e., writes the result and triggers an event or interrupt. Finally, the agent of host W or device Z polls the IO Buffer to know the task completion status. In this example, the Shared Data Buffer and IO Buffer are the data cache and instruction cache corresponding to this tenant. Different hosts use the same tenant and access the same cache space. For different hosts, accessing the same physical address of CXLSW is equivalent to accessing the same device.

[0132] The load balancing module supports two levels of scheduling. The first level is intra-tenant load balancing. When a certain type of device on a host is fully loaded, the system prioritizes scheduling other devices of the same type within the same host, based on the occupancy of their IO buffer and SharedData buffer. If multiple available devices exist, the priority is calculated using the following formula:

[0133] Device priority = (1 / delay) (Delay variance) + (Bandwidth) (Bandwidth variance) + (1 / credit);

[0134] Latency, bandwidth, and credit have all been normalized. Latency is normalized to "device latency / maximum latency of all similar available devices in the tenant", bandwidth is normalized to "device bandwidth / maximum bandwidth of all similar available devices in the tenant", and credit is normalized to "device available IO resources / total device IO resources".

[0135] The second level of scheduling is system-level load balancing. (See attached image) Figure 5When all of a tenant's PCIe devices of that type are fully loaded, i.e., when the tenant's devices are at full capacity, the backup device allocation system determines the overload type based on the load characteristics within a time window: if the instantaneous load exceeds β times the moving average (i.e., the preset instantaneous load) within time window T (i.e., the first duration) and the duration is less than Δ (i.e., the preset duration), it is determined to be a load pulse; if the number of pulses exceeds 3 (i.e., the preset number) within time window T2 (i.e., the second duration), it is a pulse overload; otherwise, it is a continuous overload. The system reserves a backup host and its PCIe devices, and allocates independent IO buffers and shared data buffers. When an overload occurs, the CXL SW connects the backup device to the tenant host via PCIe hot-plugging and opens its shared memory. If the overload is determined to be a pulse, the backup device will be reclaimed via hot-swapping when the load subsides and the number of pulses within the time window T2 is less than one. If the overload is determined to be a continuous overload, the system will migrate the task's IOBuffer instructions and Shared Data Buffer data back to the local host device after the local device resources recover from being less than fully loaded (resource availability greater than or equal to the second preset idle rate). Hot-swapping will then be performed after the backup device's data cache is cleared. Figure 5 The method for removing backup equipment is determined based on the type of overload.

[0136] Fault handling module, as attached Figure 6 When the host detects a device failure, it immediately sends the device failure information to the CXLSwitch. The CXLSwitch then switches the mapping of the failed device's IO buffer and Shared Data Buffer to the standby device. Figure 6 When the host detects a fault in the target device, it suspends the tasks on the faulty device, sends fault information to the target device, and switches the host mapping to the backup device to continue the task; this allows for rapid replacement of the faulty device and continued processing of tenant requests. Once the original host is repaired or the device is replaced, the system can quickly remap the tenant to the local host device and release the backup device resources; that is... Figure 6 Repairing or replacing faulty equipment and remapping it to the local host device frees up backup equipment resources, thereby achieving seamless business switching and high availability assurance.

[0137] In summary, this embodiment, by introducing multi-tenant isolation management, cross-host shared memory access, hierarchical load balancing scheduling, and rapid device failure switching mechanisms under the CXL architecture, achieves PCIe device pooling and dynamic resource scheduling, significantly improving resource utilization and system reliability.

[0138] This invention effectively solves the problems of coarse tenant isolation granularity and difficulty in balancing security and performance in existing PCIe device pooling systems by introducing a multi-tenant module and differentiated isolation strategies into the CXL Switch. Specific beneficial effects are as follows:

[0139] 1. Separate IO buffers and shared data buffers are configured for different tenants, providing two isolation modes: "Security Mode" and "Performance Mode." In Security Mode, different tenants use independent CXL Controllers and their memory resources, ensuring data security and complete isolation between tenants. In Performance Mode, tenants can utilize the memory resources of all CXL Controllers evenly, thereby improving overall resource utilization and performance throughput. This solution allows the system to flexibly switch between security and performance, significantly enhancing isolation capabilities and flexibility in a resource pooling environment.

[0140] 2. Regarding the consistency issue of cross-host shared memory, this invention designs IOBuffer and Shared Data Buffer within the CXL Memory Box and uniformly manages the MMIO mapping of each host. This enables different hosts to directly complete data exchange and device DMA access based on shared memory when performing device proxy functions. This solution avoids the overhead of software consistency reliance in traditional PCIe solutions, achieves consistent access to cross-host shared memory, significantly improves the efficiency of multi-host collaborative task execution, and reduces additional synchronization latency.

[0141] 3. To address the issue of insufficient load balancing, this invention proposes a dynamic scheduling method based on multi-dimensional indicators such as device latency, bandwidth, and creditworthiness, and introduces a load balancing module into the CXL Switch. This module can not only achieve dynamic scheduling of device resources within a single tenant but also perform system-level balancing in multi-tenant scenarios. Simultaneously, this invention introduces a mechanism for determining pulse overload and sustained overload, and combines this with a hot-swappable access and release strategy for backup host devices, enabling rapid elastic scaling in pulse overload scenarios and smooth resource migration in sustained overload scenarios. Through this solution, the system can dynamically adapt to different load modes, ensuring fairness in task allocation and continuity of business operations.

[0142] 4. Regarding equipment failure handling, this invention implements rapid replication and context recovery of the IO Buffer and Shared Data Buffer of the failed device through a failure handling module. When a host device fails, the system can quickly switch the tenant's mapping to the backup device, achieving immediate service recovery. After the original host device is repaired or replaced, the system can also restore the task mapping to the local host device by modifying the mapping policy.

[0143] In summary, this invention, through key technical solutions such as multi-tenant isolation, shared memory consistency, hierarchical load balancing, and rapid failover, not only comprehensively solves the core problems in existing technologies, but also achieves overall improvement in security, performance, and reliability, thus providing an efficient and feasible solution for device pooling and resource management in large-scale multi-tenant environments.

[0144] This application provides a design for a multi-tenant isolation mechanism. A multi-tenant module is set up inside the CXL Switch, and logical isolation is provided for different tenants through independent IO buffers and shared data buffers. Two differentiated isolation schemes are proposed: a "safety mode" and a "performance mode." In safe mode, physical isolation is achieved by binding different tenants to different CXLControllers and their corresponding memory. In performance mode, resource utilization is maximized by evenly distributing shared memory among all CXL Controllers.

[0145] This application provides cross-host shared memory consistency handling. By setting up IOBuffer and Shared Data Buffer in the CXL Memory Box and combining them with a unified MMIO mapping management mechanism, different hosts can achieve direct and consistent access to shared memory without relying on traditional software synchronization. This hardware-level shared memory management method, unlike the existing PCIe Switch's reliance on virtualization mechanisms such as SR-IOV, supports more efficient cross-host collaboration and data exchange.

[0146] This application provides a load balancing and overload determination mechanism. By integrating a load balancing module within the CXL Switch, it not only enables scheduling of multiple devices within a single tenant but also proposes a system-level load balancing strategy. Furthermore, this invention introduces for the first time criteria for determining pulse overload and sustained overload, and, in conjunction with the hot-swappable access and release of PCIe devices on the backup host, achieves differentiated scheduling and resource migration under different load scenarios. This mechanism, combining instantaneous load characteristics with long-term resource scheduling, overcomes the limitations of prior art's single bandwidth or latency-based scheduling, enhancing the system's dynamic adaptability.

[0147] This application provides a rapid switchover and recovery mechanism for faulty devices. Through a fault handling module, tenant mappings are immediately switched upon fault detection, quickly resuming task processing. Once the original device is repaired, resource mappings are restored by modifying the mapping policy. This solution ensures uninterrupted task processing after a fault occurs, avoiding the long delays caused by traditional methods that rely on driver restarts or software initialization.

[0148] In summary, the key technical points of this invention mainly include: differentiated multi-tenant isolation mode, consistent cross-host access mechanism based on shared memory, layered and dynamic load balancing and overload judgment strategy, and fast recovery fault device switching scheme.

[0149] Through the above description of the embodiments, those skilled in the art can clearly understand that the methods according to the above embodiments can be implemented by means of software plus necessary general-purpose hardware platforms. Of course, they can also be implemented by hardware, but in many cases the former is a better implementation method.

[0150] Embodiments of this application also provide a resource sharing system, including:

[0151] Interconnect devices, primary host, secondary host, and extended memory devices;

[0152] The first host and the second host are connected so that the target tenant corresponding to the first host can access the target device corresponding to the second host through a first request;

[0153] The extended memory device includes an instruction cache and a data cache, both of which are mapped to the target tenant.

[0154] The interconnected device is configured to receive the first request, write the data information into the data cache based on the mapping relationship, write the instruction information into the instruction cache, so that the target device can access the instruction information through the instruction cache, access the data information through the data cache, and respond to the first request; receive the response result of the target device to the first request, and write the response result into the instruction cache or the data cache.

[0155] In this application, the first host and the second host are connected via an interconnect device. In one specific embodiment, the interconnect device can be a consistent interconnect device, and the downlink port of the consistent interconnect device is connected to an extended memory device. In this application, a mapping relationship is established between the target tenant, the instruction cache, the data cache, and the target device, so that the target tenant's request data is stored in the instruction cache and the data cache. The host corresponding to the target device polls the target tenant's instruction cache and data cache through a device proxy, and data or information transmission is achieved through the hardware resources of the interconnect device. This alleviates the problems of complexity and inefficiency in data retrieval via third-party software in related technologies, and improves data retrieval efficiency and accuracy.

[0156] Optionally, the system further includes:

[0157] An interconnect controller, located within the extended memory device and connected to the downlink port of the interconnect device, determines the target tenant's shared memory usage pattern based on the target tenant's isolation mode.

[0158] In this application, the interconnect controller connects interconnect devices and data and instruction caches. The memory area of ​​the interconnect device is divided into instruction and data caches to store and retrieve the instruction and data information requested in the first request. Each instruction and data cache is connected to its corresponding interconnect controller, enabling different target tenants to utilize shared memory in different ways. This application implements a multi-tenant isolation mechanism through the interconnect controller, providing tenants with customized data access and data security mechanisms, thereby improving tenant satisfaction and the system's versatility.

[0159] Optionally, the system further includes:

[0160] A third host, which is communicatively connected to the interconnected device, includes multiple third devices to provide backup device resources for the target tenant in the event that the target device is fully loaded or malfunctions.

[0161] Optionally, the interconnecting device includes:

[0162] The multi-tenant module is used to determine the isolation mode of the target tenant based on the target tenant's basic information;

[0163] The load balancing module is used to provide tenant-level load balancing strategies or system-level load balancing strategies if the target device is fully loaded.

[0164] The fault handling module is used to provide backup equipment resources to the target tenant if the target device fails.

[0165] For a description of the features in the corresponding embodiments of the resource sharing system, please refer to the relevant descriptions in the corresponding embodiments of the resource sharing method, which will not be repeated here.

[0166] Embodiments of this application also provide an electronic device, including a memory and a processor, wherein the memory stores a computer program and the processor is configured to run the computer program to perform the steps in any of the resource sharing method embodiments described above.

[0167] Embodiments of this application also provide a computer-readable storage medium storing a computer program, wherein the computer program is configured to execute the steps in any of the above-described resource sharing method embodiments when it is run.

[0168] In one exemplary embodiment, the aforementioned computer-readable storage medium may include, but is not limited to, various media capable of storing computer programs, such as a USB flash drive, read-only memory (ROM), random access memory (RAM), portable hard disk, magnetic disk, or optical disk.

[0169] Embodiments of this application also provide a computer program product, which includes a computer program that, when executed by a processor, implements the steps in any of the above-described resource method embodiments.

[0170] Embodiments of this application also provide another computer program product, including a non-volatile computer-readable storage medium storing a computer program, which, when executed by a processor, implements the steps in any of the above-described resource sharing method embodiments.

[0171] Those skilled in the art will further recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of both. To clearly illustrate the interchangeability of hardware and software, the components and steps of the various examples have been generally described in terms of functionality in the foregoing description. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0172] The resource sharing method, system, and electronic device provided in this application have been described in detail above. Specific examples have been used to illustrate the principles and implementation methods of this application. The descriptions of the embodiments above are only for the purpose of helping to understand the method and its core ideas. It should be noted that those skilled in the art can make various improvements and modifications to this application without departing from its principles, and these improvements and modifications also fall within the protection scope of the claims of this application.

Claims

1. A resource sharing method characterized by, The method comprises: The interconnection device receives a first request of a target tenant to a target device; the first request comprises instruction information and data information; wherein a first host corresponding to the target tenant and a second host corresponding to the target device are connected; The interconnection device writes the data information into a data cache mapped with the target tenant, and writes the instruction information into an instruction cache mapped with the target tenant, so that the target device accesses the instruction information through the instruction cache, accesses the data information through the data cache, and replies to the first request; wherein the instruction cache and the data cache are arranged in an extended memory device; The interconnection device receives a reply result of the target device to the first request, and writes the reply result into the instruction cache or the data cache; Before the interconnection device receives the first request of the target tenant to the target device, the method further comprises: Obtaining basic information of the target tenant; According to the basic information, determining an isolation mode of the target tenant, and allocating a shared memory for the target tenant according to the isolation mode; wherein the isolation mode is used to represent the access level of the data cache or the instruction cache mapped with the target tenant.

2. The resource sharing method of claim 1, wherein, The method further comprises: In the case that the target device is full, mapping the instruction cache and the data cache to a second device through a tenant-level load balancing strategy; wherein the second device is an available device corresponding to the target tenant and of the same type as the target device; In the case that the target device is full and the second device does not exist, mapping the instruction cache and the data cache to a third device through a system-level load balancing strategy; wherein the third host and the first host are connected to the same interconnection device, the idle rate of the third device is greater than or equal to a first preset idle rate, and the third host is a host connected to the third device.

3. The resource sharing method of claim 2, wherein, The method of mapping the instruction cache and the data cache to the second device through the tenant-level load balancing strategy comprises: In the case that there are a plurality of second devices, determining device information of each second device; wherein the device information comprises at least one of device latency, device bandwidth and device resources; According to the device information, determining a device priority of each second device; Sorting the device priorities, and according to the sorting result, screening a balanced device from the plurality of second devices, and mapping the instruction cache and the data cache to the balanced device.

4. The resource sharing method of claim 3, wherein, The method of determining the device priority of each second device according to the device information comprises: Normalizing the device information to obtain normalized information; According to the variance of the device information and the normalized information, determining parameter information; According to the parameter information and the normalized information, determining the device priority.

5. The resource sharing method of claim 3, wherein, The method of determining the device priority of each second device according to the device information comprises: calculating a delay variance of all device delays and a bandwidth variance of all device bandwidths, wherein the all device delays are device delays of all the second devices, and the all device bandwidths are device bandwidths of all the second devices; determining a first value according to a quotient of a device delay of a current device and a first delay, wherein the first delay is a maximum delay in the all device delays, and the current device is a second device in the device priority; determining a second value according to a quotient of a device bandwidth of the current device and a first bandwidth, wherein the first bandwidth is a maximum bandwidth in the all device bandwidths; determining a delay value according to a quotient of the delay variance and the first value, and determining a bandwidth value according to a product of the second value and the bandwidth variance; determining a resource value according to a quotient of available resources of the current device and a first resource, wherein the first resource is total resources of the current device; determining the device priority of the current device according to a sum of the delay value, the bandwidth value and the resource value.

6. The resource sharing method of claim 2, wherein, mapping the instruction cache and the data cache to a third device through the system-level load balancing strategy, comprising: obtaining a load characteristic of a target device; determining an overload type according to the load characteristic, and determining a recycling strategy of the third device based on the overload type.

7. The resource sharing method of claim 6, wherein, The determining of the overload type according to the load characteristic comprises: if a first instantaneous load of the target device is greater than a preset instantaneous load for a duration less than a preset duration, determining that the first instantaneous load is a load pulse, wherein the preset instantaneous load is a multiple of an average load; if a number of times of detecting the load pulse in a second duration is greater than or equal to a preset number of times, determining that the overload type is a pulse overload, wherein the second duration is greater than the first duration; if the load pulse is not detected or the number of times of detecting the load pulse is less than the preset number of times, determining that the overload type is a continuous overload.

8. The resource sharing method of claim 6, wherein, The determining of the recycling strategy of the third device based on the overload type comprises: for the pulse overload, recycling the third device if the load subsides and the number of times of detecting the load pulse in the second duration is less than or equal to 1; for the continuous overload, recycling the third device if a resource idle rate of the target device is greater than or equal to a second preset idle rate.

9. The resource sharing method of claim 1, wherein, The allocating of the shared memory to the target tenant according to the isolation mode comprises: in a case where the isolation mode is a security mode, allocating the target tenant to an independent shared memory under a first interconnection controller; in a case where the isolation mode is a performance mode, allocating shared memories under a second interconnection controller to all first tenants to obtain the shared memory allocated to the target tenant, wherein the second interconnection controller is all interconnection controllers except the first interconnection controller, and the first tenant is a tenant with the performance mode as the isolation mode.

10. The resource sharing method of claim 1, wherein, Before the interconnection device receives a first request of a target tenant to a target device, the method further comprises: obtaining basic information of the target tenant, and collecting device information of a plurality of first devices connected to the interconnection device; According to the basic information and the device information of the first device, a mapping relationship between the first device, a shared memory and a tenant is determined through address space mapping, wherein the shared memory comprises an instruction cache and a data cache.

11. The resource sharing method of claim 10, wherein, The method further comprises: In the case that the first host is started, the mapping relationship is recorded by the first host, so that the target tenant accesses the first device through the mapping relationship.

12. The resource sharing method of claim 1, wherein, The interconnection device writes the data information into the data cache mapped with the target tenant, comprising: If the first request is sent through the first host, the data information is written into the data cache through the controller of the first host and the interconnection device; Or, if the first request is sent by the fourth device through a direct memory access controller, the data information is written into the data cache through the direct memory access controller and the interconnection device.

13. The resource sharing method of claim 1, wherein, The target device accesses the instruction information through the instruction cache, accesses the data information through the data cache, and answers the first request, comprising: If the second host is started, the instruction cache corresponding to the target tenant is polled to read the instruction information; According to the instruction information, the data information is read through direct memory access.

14. The resource sharing method of claim 1, wherein, The method further comprises: If the target device is detected to be faulty, the instruction cache and the data cache are mapped to a third device; If the target device is restored to normal, the instruction cache and the data cache are mapped to the target device, and the resources of the third device are released.

15. A resource sharing system, characterized by, The resource sharing system comprises: An interconnection device, a first host, a second host and an extended memory device; The first host and the second host are connected, so that a target tenant corresponding to the first host accesses a target device corresponding to the second host through a first request; The extended memory device comprises an instruction cache and a data cache, and the instruction cache and the data cache both have a mapping relationship with the target tenant; The interconnection device is used for receiving the first request, writing data information of the first request into the data cache and writing instruction information of the first request into the instruction cache based on the mapping relationship, so that the target device accesses the instruction information through the instruction cache, accesses the data information through the data cache, and answers the first request; receiving the response result of the target device to the first request, and writing the response result into the instruction cache or the data cache; The interconnection device comprises a multi-tenant module, which is used for determining an isolation mode of the target tenant according to basic information of the target tenant; wherein the isolation mode is used to represent an access level of the data cache or the instruction cache mapped with the target tenant.

16. The resource sharing system of claim 15, wherein, The system further comprises: An interconnection controller is arranged in the extended memory device and connected with a downstream port of the interconnection device, so as to determine an occupation mode of the target tenant to the shared memory based on the isolation mode of the target tenant.

17. The resource sharing system of claim 15, wherein, The system further comprises: A third host connected with the interconnection device in communication, comprising a plurality of third devices, to provide backup device resources for the target tenant in the case of full load or failure of the target device.

18. The resource sharing system of claim 15, wherein, The interconnection device comprises: A load balancing module for providing a tenant-level load balancing strategy or a system-level load balancing strategy if the target device is full; A failure handling module for providing backup device resources for the target tenant if the target device fails.

19. An electronic device, comprising: The electronic device comprises a memory and a processor; The memory has stored a computer program, and the processor is configured to run the computer program to perform the method of any one of claims 1 to 14.

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