Hard mask structure and semiconductor process method
By setting a low-stress bottom TiN film and a high-density middle TiN film in the hard mask structure, and combining a top low-stress TiN film and a diffusion barrier layer, the problem of pattern transfer distortion caused by compressive stress is solved while meeting the requirements of etching selectivity and diffusion barrier in TiN hard masks, thus achieving high-precision patterning and improved process efficiency.
Patent Information
- Application Number
- CN202511737962.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-11-24
- Publication Date
- 2025-12-30
AI Technical Summary
While existing TiN hard masks meet the requirements for etch selectivity and diffusion blocking, compressive stress causes pattern transfer distortion. Furthermore, existing PVD platforms struggle to balance high density and low stress, leading to photoresist pattern distortion and increased process complexity.
A hard mask structure design is adopted, consisting of a low-stress TiN film at the bottom and a high-density TiN film in the middle. Combined with a low-stress TiN film at the top and a diffusion barrier layer, stress gradients and density gradients are formed to optimize etching selectivity and diffusion barrier effect.
It reduces the compressive stress effect of hard mask structure on photolithography patterns, improves patterning accuracy, simplifies the process flow, reduces process cost and complexity, and improves pattern transfer effect.
Smart Images
Figure CN121237643A_ABST
Abstract
Description
Technical Field
[0001] This invention belongs to the field of semiconductor integrated circuit manufacturing technology, and in particular relates to a hard mask structure and semiconductor process method. Background Technology
[0002] As the feature size of Ultra-Large-Scale Integration (ULSI) continues to shrink to technology nodes of 28 nm and below, traditional pattern transfer schemes using organic photoresist (PR) as the sole mask material are approaching their physical limits. In fine-structure etching with aspect ratios greater than 5:1, photoresist masks are prone to pattern collapse or linewidth roughness degradation due to insufficient mechanical strength, leading to loss of control over critical dimension uniformity (CDU). Furthermore, in multilayer metallized stacked structures integrating copper interconnects with ultra-low-k (ULK) dielectrics, precise etching of the dielectric layer using hard masks is required to achieve high selectivity etching and obtain high-density wiring. This is to avoid the increase in dielectric constant and decrease in mechanical strength of ULK materials due to ion bombardment and ultraviolet radiation during multi-step plasma etching.
[0003] Titanium nitride (TiN) is widely used as a hard mask material in the industry due to its high hardness, high melting point, excellent resistance to fluorine-based plasma etchants, and excellent selectivity to oxides and polysilicon, ensuring etching precision and adapting to harsh etching environments. In addition to its mechanical and chemical stability, TiN also possesses electrical conductivity, allowing it to act as an anti-reflective coating (ARC) during photolithography, effectively suppressing standing wave effects and improving lithography resolution. In back-end processes, it can also serve as a copper diffusion barrier layer, simplifying the integration process and reducing the overall stack thickness.
[0004] Currently, the industry mainly uses physical vapor deposition (PVD) technology to prepare TiN hard masks. However, TiN films prepared by PVD generally have high intrinsic compressive stress, which leads to uneven mask morphology, distortion of photolithography pattern transfer, and even peeling and cracking during subsequent etching processes.
[0005] On the other hand, to obtain sufficient etching selectivity and suppress the diffusion of active nitrogen elements from TiN grain boundaries into the photoresist layer, thus avoiding chemical degradation of the photoresist in a nitrogen-containing environment that could lead to problems such as pattern distortion, linewidth loss, bottom missing photoresist, or top collapse during subsequent development, etching, or ion implantation, high-density hard mask films are required. However, on existing mainstream PVD platforms, such as the hard mask process equipment of Applied Materials (AMAT), low-stress and high-density TiN films exhibit a strong negative correlation. When the process window is adjusted to a lower compressive stress, the film density is generally also lower, failing to meet the requirements for high selectivity and diffusion barrier; conversely, when the density is increased to meet the requirements for etching selectivity and diffusion barrier, the compressive stress is often higher, leading to pattern distortion and reliability risks. Therefore, the industry is forced to make a trade-off between "high density" and "low stress," and there is currently no single solution that can simultaneously achieve both.
[0006] Therefore, there is an urgent need for a new material design or process architecture that can meet the etching selectivity and diffusion blocking requirements of TiN hard masks while avoiding pattern transfer distortion caused by compressive stress.
[0007] It should be noted that the above introduction to the technical background is only for the purpose of providing a clear and complete explanation of the technical solutions of this application and facilitating the understanding of those skilled in the art. It should not be assumed that the above technical solutions are known to those skilled in the art simply because these solutions have been described in the background section of this application. Summary of the Invention
[0008] In view of the shortcomings of the prior art, the purpose of this invention is to provide a hard mask structure and semiconductor process method to solve the problem that in the prior art, TiN hard masks are difficult to avoid pattern transmission distortion caused by compressive stress while meeting the requirements of etching selectivity and diffusion barrier.
[0009] To achieve the above objectives, the present invention provides a hard mask structure, which comprises, from bottom to top, a bottom TiN film and a middle TiN film;
[0010] The bottom TiN film is a low-stress TiN film, and the middle TiN film is a high-density TiN film;
[0011] The hard mask structure is a mask used for photoresist pattern transfer.
[0012] Optionally, the thickness of the middle TiN film is 20%-30% of the total thickness of the hard mask structure, and the thickness of the bottom TiN film is 70%-80% of the total thickness of the hard mask structure.
[0013] Optionally, the hard mask structure further includes a top TiN film located on the middle TiN film; the top TiN film is a low-stress TiN film.
[0014] Optionally, the thickness of the top TiN film is less than the thickness of the bottom TiN film.
[0015] Optionally, the thickness of the top TiN film is 5%-10% of the total thickness of the hard mask structure, the thickness of the middle TiN film is 20%-30% of the total thickness of the hard mask structure, and the thickness of the bottom TiN film is 65%-70% of the total thickness of the hard mask structure.
[0016] Optionally, the thickness of the central TiN film is greater than 60 angstroms.
[0017] Optionally, the compressive stress of the bottom TiN film is less than 800 MPa; when the hard mask structure includes a top TiN film, the compressive stress of the top TiN film is less than 800 MPa.
[0018] Optionally, the density of the central TiN film is greater than 4.4 g / cm³. 3 or greater than 4.4 g / cm 3 And less than or equal to 4.8 g / cm³ 3 .
[0019] The present invention also provides a semiconductor process method, wherein the semiconductor process method uses any one of the above-described hard mask structures as a hard mask for pattern transfer of photoresist, and the semiconductor process method includes:
[0020] Provides the semiconductor structure to be patterned;
[0021] A bottom TiN film and a middle TiN film are sequentially disposed on the upper surface of the semiconductor structure to form the hard mask structure;
[0022] Photoresist is applied to the upper surface of the hard mask structure;
[0023] The photoresist is exposed and developed to obtain a patterned photoresist.
[0024] Using patterned photoresist as a mask, the hard mask structure is etched downwards to obtain a patterned hard mask structure;
[0025] Remove any remaining photoresist;
[0026] Using a patterned hard mask structure as a mask, the semiconductor structure is etched downwards to obtain a patterned semiconductor structure.
[0027] Optionally, after a middle TiN film is formed on the upper surface of the semiconductor structure, a top TiN film is formed on the middle TiN film, and the bottom TiN film, the middle TiN film and the top TiN film together constitute the hard mask structure; after a diffusion barrier layer is formed on the obtained hard mask structure, the photoresist is formed.
[0028] As described above, the hard mask structure and semiconductor process method of the present invention have the following beneficial effects:
[0029] This invention creates a stress gradient by setting the bottom surface of the hard mask structure to a low-stress TiN thin film, thereby reducing the compressive stress on the contact surface of the hard mask structure to the patterned semiconductor structure, thus reducing the risk of distortion in the transmission of photolithographic patterns. Simultaneously, by setting the middle TiN film on the top surface of the hard mask structure to a high-density TiN film, the etching selectivity when the hard mask structure is used as a mask for downward etching is ensured, and defects such as pattern deformation and distortion caused by the diffusion of a large amount of nitrogen from TiN into the photoresist are effectively prevented. This optimizes the overall effect of the compromise between low-stress and high-density TiN hard masks. Furthermore, the high-density middle TiN film effectively blocks nitrogen from TiN, reducing the need for a diffusion barrier layer between the photoresist and the hard mask structure. This reduces process costs and improves process efficiency while maintaining pattern accuracy. Moreover, the stacked hard mask structure of this invention can be formed in the same chamber of the same machine by adjusting the formulation without increasing process complexity, making the improvement simple and facilitating large-scale application of the solution.
[0030] This invention optimizes the transmission effect of the hard mask structure on the photoresist pattern by setting the thickness ratio range of the middle TiN film and the bottom TiN film in the hard mask structure. This allows the high-density middle TiN film to block the diffusion of nitrogen elements into the photoresist while ensuring sufficient thickness to transfer the photoresist pattern. At the same time, it forms a suitable stress gradient, which reduces the compressive stress on the semiconductor structure by the low-stress bottom TiN film. This minimizes the influence of the bottom TiN film on the etching selectivity while minimizing the compressive stress on the photoresist by the middle TiN film. This improves the patterning accuracy of the semiconductor structure after patterning.
[0031] This invention ensures that the central TiN film effectively blocks nitrogen diffusion by setting a minimum thickness, and also provides sufficient thickness for the transfer of photolithographic patterns.
[0032] The bottom TiN film of this invention minimizes the impact of compressive stress on the semiconductor structure by setting a range of compressive stress, while the middle TiN film minimizes the diffusion of nitrogen into the photoresist by setting a range of density, thereby ensuring etching selectivity. Since the middle TiN film is the main area etched in the hard mask structure, it must have a sufficiently high density to provide enough buffer for pattern transfer during etching. Furthermore, this high-density area can consider only density, resulting in a higher final density than the compromised density of current processes. This improves the diffusion barrier effect against nitrogen, making it possible to omit the diffusion barrier layer process and save costs.
[0033] This invention, by setting a hard mask structure, enables the high-density central TiN film to effectively block the diffusion of nitrogen elements into the photoresist, thereby avoiding the problem of diffused nitrogen elements chemically modifying the photoresist and affecting the patterning and pattern transfer accuracy of the photoresist. As a result, the diffusion barrier layer commonly used in the prior art to block the diffusion of nitrogen elements between the photoresist and the hard mask structure is not required, thereby reducing the complexity of the process, improving the process efficiency, and reducing the process cost.
[0034] This invention reduces the compressive stress on both the top and bottom contact surfaces of the hard mask structure by also setting a top TiN film on the top of the hard mask structure, thereby further reducing the risk of pattern transfer distortion caused by the compressive stress of the hard mask structure. However, since the top TiN film is also a low-stress TiN film, it cannot achieve a good blocking effect on nitrogen diffusion. Therefore, a diffusion blocking layer needs to be set between the hard mask structure and the photoresist to further prevent nitrogen diffusion into the photoresist and obtain a better pattern transfer effect.
[0035] By setting the top TiN film to be thinner than the bottom TiN film, the present invention can shorten the time for the top TiN film to be removed, thereby reducing the risk of pattern distortion caused by the removal of the top TiN film and improving the pattern transfer effect.
[0036] This invention optimizes the photoresist pattern transfer effect of the hard mask structure by setting the thickness ratio range of the top, middle, and bottom TiN films. This allows the high-density middle TiN film to have sufficient thickness to transfer the photoresist pattern while forming a suitable stress gradient. The low-stress top and bottom TiN films reduce the compressive stress on the semiconductor structure and photoresist, minimizing the impact on the etching selectivity. This also minimizes the compressive stress on the photoresist from the hard mask structure and the impact on the photoresist pattern transfer effect, thereby improving the patterning accuracy of the semiconductor structure after patterning.
[0037] The top TiN thin film of the present invention minimizes the impact of compressive stress on the semiconductor structure by setting the range of compressive stress.
[0038] This invention achieves a dual optimization of reducing compressive stress and preventing nitrogen poisoning of the photoresist by setting a diffusion barrier layer between the hard mask structure and the photoresist, thereby reducing the compressive stress of the top TiN film and blocking the diffusion of nitrogen from the top TiN film into the photoresist. Attached Figure Description
[0039] Figure 1 The diagram shown is a structural schematic of the hard mask structure according to Embodiment 1 of the present invention.
[0040] Figure 2 This is a schematic diagram of the structure of a TiN hard mask used in photolithography in the prior art.
[0041] Figure 3 The graph shows the effect of PVD working pressure changes on the stress and density of the obtained TiN film.
[0042] Figure 4 The graph shows the effect of PVD DC sputtering power variation on the stress and density of the obtained TiN film.
[0043] Figure 5 The diagram shown is a schematic representation of the semiconductor structure provided in step 1 of the semiconductor process method according to Embodiment 1 of the present invention.
[0044] Figure 6 The diagram shown is a schematic representation of the structure formed in step 2 of the semiconductor process method according to Embodiment 1 of the present invention, which is a hard mask structure.
[0045] Figure 7 The diagram shows the structure of the photoresist in step 3 of the semiconductor process method according to Embodiment 1 of the present invention.
[0046] Figure 8 The diagram shown is a schematic representation of the structure after patterning the photoresist in step 4 of the semiconductor process method according to Embodiment 1 of the present invention.
[0047] Figure 9 The diagram shown is a schematic representation of the structure after the patterned hard mask structure is generated in step 5 of the semiconductor process method according to Embodiment 1 of the present invention.
[0048] Figure 10 The diagram shows the structure after removing photoresist in step 6 of the semiconductor process method according to Embodiment 1 of the present invention.
[0049] Figure 11 The diagram shown is a schematic representation of the patterned semiconductor structure in step 7 of the semiconductor process method according to Embodiment 1 of the present invention.
[0050] Figure 12 The diagram shown is a structural schematic of the hard mask structure according to Embodiment 2 of the present invention.
[0051] Figure 13 The diagram shows the structure after a central TiN thin film is formed in the semiconductor process of Embodiment 2 of the present invention.
[0052] Figure 14 The diagram shows the structure after the top TiN thin film is set in the semiconductor process of Embodiment 2 of the present invention.
[0053] Figure 15 The diagram shows the structure after a diffusion barrier layer is set in the semiconductor process method of Embodiment 2 of the present invention.
[0054] Figure 16 The diagram shown is a schematic representation of the structure formed by photoresist in the semiconductor process of Embodiment 2 of the present invention.
[0055] Figure 17 The diagram shown is a schematic representation of the structure after patterning the photoresist in the semiconductor process of Embodiment 2 of the present invention.
[0056] Figure 18 The diagram shown is a schematic representation of the structure after patterning the diffusion barrier layer and hard mask structure in the semiconductor process method of Embodiment 2 of the present invention.
[0057] Figure 19 The diagram shows the structure after removing the photoresist and diffusion barrier layer in the semiconductor process of Embodiment 2 of the present invention.
[0058] Figure 20 The diagram shown is a schematic representation of the semiconductor structure after patterning in the semiconductor process method of Embodiment 2 of the present invention.
[0059] Explanation of icon numbers
[0060] 10. Hard mask structure; 11. Bottom TiN film; 12. Middle TiN film; 13. Top TiN film;
[0061] 20; Semiconductor structure; 21; Existing TiN hard mask;
[0062] 30. Photoresist; 31. Diffusion barrier layer. Detailed Implementation
[0063] The following specific examples illustrate the implementation of the present invention. Those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention.
[0064] In the detailed description of embodiments of the present invention, for ease of explanation, the schematic diagrams illustrating the device structure may be partially enlarged without adhering to the general scale, and the schematic diagrams are merely examples and should not limit the scope of protection of the present invention. Furthermore, in actual manufacturing, the three-dimensional spatial dimensions of length, width, and depth should be included.
[0065] For ease of description, spatial relation terms such as “below,” “under,” “lower than,” “below,” “above,” and “upper” may be used herein to describe the relationship between one element or feature shown in the accompanying drawings and other elements or features. It will be understood that these spatial relation terms are intended to include directions other than those depicted in the accompanying drawings for devices in use or operation.
[0066] In the context of this application, the structure described above the first feature may include embodiments in which the first and second features are in direct contact, or embodiments in which additional features are formed between the first and second features, such that the first and second features may not be in direct contact.
[0067] It should be noted that the illustrations provided in this embodiment are only schematic representations of the basic concept of the present invention. Therefore, the illustrations only show the components related to the present invention and are not drawn according to the actual number, shape and size of the components in the actual implementation. In the actual implementation, the form, quantity and proportion of each component can be arbitrarily changed, and the layout of the components may also be more complex. The quantity range given in the present invention includes the two boundary values of the quantity range by default unless otherwise specified.
[0068] As integrated circuit technology advances to below 28nm, traditional photoresist mask solutions face physical limitations. In high aspect ratio etching, photoresist masks are prone to pattern collapse, affecting the uniformity of critical dimensions. In multilayer metallized stacked structures, hard masks are used to achieve high selectivity etching. Titanium nitride (TiN) is widely used as a hard mask material due to its high hardness, corrosion resistance, and high resistance to fluorine-based etchants; simultaneously, TiN is conductive and can serve as an anti-reflection layer and copper diffusion barrier layer, improving lithography resolution, simplifying the integration process, and reducing stack thickness. Currently, the industry mainly uses physical vapor deposition (PVD) technology to prepare TiN hard masks. However, PVD-prepared TiN films exhibit high intrinsic compressive stress, leading to mask warping and lithography pattern transfer distortion, potentially causing peeling and cracking during subsequent etching processes. Furthermore, to obtain sufficient etching selectivity and prevent the diffusion of active nitrogen elements from TiN grain boundaries into the photoresist layer to ensure effective photoresist pattern transfer, the hard mask film needs to have high density. However, in existing PVD platforms, the characteristics of low-stress and high-density TiN thin films are negatively correlated. The industry must make a trade-off between "high density" and "low stress," and currently no single PVD solution can achieve both simultaneously. This results in the inability to further improve the pattern transfer effect of photoresist to achieve higher patterning accuracy. To solve the above problems, this invention provides the following solution:
[0069] Example 1
[0070] This embodiment provides a hard mask structure 10, such as Figure 1 As shown, the hard mask structure 10 includes, from bottom to top: a bottom TiN film 11 and a middle TiN film 12;
[0071] The bottom TiN film 11 is a low-stress TiN film, and the middle TiN film 12 is a high-density TiN film;
[0072] The hard mask structure 10 is a mask used for pattern transfer of the photoresist 30.
[0073] This invention reduces the compressive stress on the contact surface of the hard mask structure 10 to the patterned semiconductor structure 20 by setting the bottom surface of the hard mask structure 10 to a low-stress TiN thin film, thereby creating a stress gradient and reducing the risk of photolithographic pattern transmission distortion caused by the hard mask structure 10. Simultaneously, by setting the middle TiN thin film 12 of the top surface of the hard mask structure 10 to a high-density TiN thin film, the etching selectivity when the hard mask structure 10 is used as a mask for downward etching is ensured, and defects such as pattern deformation and distortion caused by the diffusion of a large amount of nitrogen from TiN into the photoresist 30 are effectively prevented. This optimizes the overall effect after the trade-off between low-stress and high-density TiN hard masks. Furthermore, compared with... Figure 2Compared to the existing TiN hard mask 21 in the prior art, the high-density central TiN film 12 effectively blocks nitrogen elements in TiN, reducing the need to subsequently set a diffusion barrier layer 31 between the photoresist 30 and the hard mask structure 10. This reduces process costs and improves process efficiency while ensuring pattern accuracy. Furthermore, the stacked hard mask structure 10 of this invention can be formed in the same chamber of the same machine by adjusting the recipe body without increasing process complexity. This improvement is simple and facilitates the large-scale promotion and use of the solution.
[0074] In one embodiment, the thickness of the middle TiN film 12 is 20%-30% of the total thickness of the hard mask structure 10, and the thickness of the bottom TiN film 11 is 70%-80% of the total thickness of the hard mask structure 10.
[0075] This invention optimizes the transfer effect of the hard mask structure 10 on the photoresist 30 pattern by setting the thickness ratio range of the middle TiN film 12 and the bottom TiN film 11 within the hard mask structure 10. This allows the high-density middle TiN film 12 to block nitrogen diffusion into the photoresist 30 while ensuring sufficient thickness for pattern transfer, while simultaneously creating a suitable stress gradient. This reduces the compressive stress on the semiconductor structure 20 by the low-stress bottom TiN film 11, minimizing the influence of the bottom TiN film 11 on the etching selectivity, and minimizing the compressive stress on the photoresist 30 by the middle TiN film 12. This improves the pattern transfer accuracy of the semiconductor structure 20 after patterning. Specifically, the thickness ratio range of the middle TiN film 12 and the bottom TiN film 11 within the hard mask structure 10 can also be flexibly adjusted according to process requirements, resulting in high process adaptability.
[0076] In one embodiment, the thickness of the central TiN film 12 is greater than 60 angstroms.
[0077] This invention ensures that the central TiN film 12 has the effect of blocking nitrogen diffusion by setting a minimum thickness, and has sufficient thickness to transfer the photolithographic pattern, thus avoiding complete etching and loss of mask function.
[0078] In one embodiment, the thickness of the bottom TiN film 11 is 330 angstroms.
[0079] In one embodiment, the compressive stress of the bottom TiN film 11 is less than 800 MPa.
[0080] In one embodiment, the density of the central TiN film 12 is greater than 4.8 g / cm³. 3 .
[0081] In one embodiment, the density of the central TiN film 12 is greater than 4.4 g / cm³. 3 And less than or equal to 4.8 g / cm³ 3 .
[0082] The bottom TiN film 11 of this invention minimizes the compressive stress effect on the semiconductor structure 20 by setting a range of compressive stress, while the middle TiN film 12 minimizes the diffusion of nitrogen into the photoresist 30 by setting a density range, thereby ensuring etching selectivity. Since the middle TiN film 12 is the main area etched by the hard mask structure 10, this area must have a sufficiently high density to provide enough buffer for pattern transfer. Furthermore, this high-density area can consider only density, resulting in a higher final density than the compromised density of current processes. This improves the nitrogen diffusion barrier effect, making it possible to omit the diffusion barrier layer 31 process, thus saving costs. Specifically, the stress range of the low-stress TiN film and the density range of the high-density TiN film can be designed according to actual application requirements, both of which are within the scope of protection of this invention.
[0083] Specifically, such as Figures 3-4 As shown, where Figure 3 The graph shows the effect of PVD working pressure changes on the stress and density of the obtained TiN film. Figure 4 The graphs showing the effect of PVD DC sputtering power variation on the stress and density of the obtained TiN film show that a lower DC sputtering power applied to the Ti target during the PVD process results in a higher total process pressure of the working gas in the sputtering chamber, leading to lower compressive stress in the TiN film and thus obtaining a low-stress TiN film. Conversely, a higher DC sputtering power applied to the Ti target during the PVD process results in a lower total process pressure of the working gas in the sputtering chamber, leading to a higher density TiN film and thus obtaining a high-density TiN film.
[0084] This embodiment also provides a semiconductor process method, wherein the semiconductor process method uses any of the above-described hard mask structures 10 as a hard mask for pattern transfer of photoresist 30, and the semiconductor process method includes:
[0085] Step 1: Provide the semiconductor structure 20 to be patterned;
[0086] Step 2: A bottom TiN thin film 11 and a middle TiN thin film 12 are sequentially deposited on the upper surface of the semiconductor structure 20 to form the hard mask structure 10;
[0087] Step 3: Apply photoresist 30 to the upper surface of the hard mask structure 10;
[0088] Step 4: Expose and develop the photoresist 30 to obtain a patterned photoresist 30;
[0089] Step 5: Using the patterned photoresist 30 as a mask, continue etching the hard mask structure 10 downwards to obtain the patterned hard mask structure 10;
[0090] Step 6: Remove the remaining photoresist 30;
[0091] Step 7: Using the patterned hard mask structure 10 as a mask, continue etching the semiconductor structure 20 downwards to obtain the patterned semiconductor structure 20.
[0092] The semiconductor process method of the present invention will now be described in detail with reference to the accompanying drawings. It should be noted that the above order does not strictly represent the order of the semiconductor process method protected by the present invention, and those skilled in the art can make changes according to the actual process steps.
[0093] First, such as Figure 5 As shown, step 1 is performed, providing a semiconductor structure 20 to be patterned.
[0094] In one embodiment, the semiconductor structure 20 is a substrate film stack. Specifically, the semiconductor structure 20 can also be any other semiconductor structure 20 that requires patterning, all of which are within the scope of protection of this invention.
[0095] Then, as Figure 6 As shown, in step 2, a bottom TiN thin film 11 and a middle TiN thin film 12 are sequentially disposed on the upper surface of the semiconductor structure 20 to form the hard mask structure 10.
[0096] Preferably, the bottom TiN film 11 and the middle TiN film 12 are formed by physical vapor deposition.
[0097] Specifically, since only TiN films obtained by physical vapor deposition can meet the material density requirements of hard masks, the industry generally uses physical vapor deposition to obtain TiN films as hard masks. However, other suitable methods can also be selected to obtain TiN films, all of which are within the scope of protection of this invention.
[0098] Next, as Figure 7As shown, step 3 is performed, where photoresist 30 is applied to the upper surface of the hard mask structure 10.
[0099] Then, as Figure 8 As shown, step 4 is performed to expose and develop the photoresist 30 to obtain a patterned photoresist 30.
[0100] Next, as Figure 9 As shown, in step 5, the hard mask structure 10 is etched downwards using the patterned photoresist 30 as a mask to obtain the patterned hard mask structure 10.
[0101] Then, as Figure 10 As shown, proceed to step 6 to remove the remaining photoresist 30.
[0102] Finally, as Figure 11 As shown, in step 7, the semiconductor structure 20 is etched downwards using the patterned hard mask structure 10 as a mask to obtain the patterned semiconductor structure 20.
[0103] This invention, by setting a hard mask structure 10, enables the high-density central TiN film 12 to effectively block the diffusion of nitrogen elements into the photoresist 30. This avoids the problem of diffused nitrogen elements chemically modifying the photoresist 30 and affecting the patterning and pattern transfer accuracy of the photoresist 30. As a result, the diffusion barrier layer 31, which is usually set between the photoresist 30 and the hard mask structure 10 in the prior art, is not needed to block the diffusion of nitrogen elements. This reduces the complexity of the process, improves the process efficiency, and reduces the process cost.
[0104] Specifically, the patterning of the semiconductor structure 20 can be performed only on the surface, or it can be performed throughout the semiconductor structure 20 from the surface to the bottom. The thickness range of the patterning can be set as needed, and all of these are within the protection scope of this invention.
[0105] In one embodiment, after the semiconductor structure 20 is patterned, the hard mask structure 10 is removed.
[0106] In another embodiment, after the semiconductor structure 20 is patterned, the hard mask structure 10 is retained, which functions as another functional structural layer in the device.
[0107] Example 2
[0108] This embodiment provides a hard mask structure 10, the other features of which are basically the same as those of the hard mask structure 10 in Embodiment 1, except that:
[0109] In this embodiment, as Figure 12As shown, the hard mask structure 10 also includes a top TiN film 13, which is located on the middle TiN film 12; the top TiN film 13 is a low-stress TiN film.
[0110] This invention reduces the compressive stress on both the top and bottom contact surfaces of the hard mask structure 10 by also providing a top TiN film 13 on top of the hard mask structure 10, thereby further reducing the risk of pattern transfer distortion caused by the compressive stress of the hard mask structure 10. However, since the top TiN film 13 is also a low-stress TiN film, it cannot effectively block nitrogen diffusion. Therefore, a diffusion barrier layer 31 needs to be provided between the hard mask structure 10 and the photoresist 30 to further prevent nitrogen diffusion into the photoresist 30, thereby achieving better pattern transfer. Specifically, the solution in this embodiment requires the addition of a top TiN film 13 and a diffusion barrier layer 31 to achieve pattern transfer of the photoresist 30, but achieves lower compressive stress impact. Those skilled in the art can choose the solution of this embodiment or Embodiment 1 according to the actual application requirements.
[0111] In one embodiment, such as Figure 12 As shown, the thickness of the top TiN film 13 is less than the thickness of the bottom TiN film 11.
[0112] Due to the low stress and low density of the top TiN film 13, it is gradually removed during the pattern transfer process of the patterned photoresist 30 onto the hard mask structure 10. Therefore, by setting the top TiN film 13 to be thinner than the bottom TiN film 11, the fast etching rate of the top TiN film 13 with its low density can shorten the removal time of the top TiN film 13, thereby reducing the risk of pattern distortion caused by the removal of the top TiN film 13 and improving the pattern transfer effect.
[0113] In one embodiment, the thickness of the top TiN film 13 is 5%-10% of the total thickness of the hard mask structure 10, the thickness of the middle TiN film 12 is 20%-30% of the total thickness of the hard mask structure 10, and the thickness of the bottom TiN film 11 is 65%-70% of the total thickness of the hard mask structure 10.
[0114] This invention optimizes the transfer effect of the hard mask structure 10 on the photoresist 30 by setting the thickness ratio range of the top TiN film 13, the middle TiN film 12, and the bottom TiN film 11 within the hard mask structure 10. This allows the high-density middle TiN film 12 to have sufficient thickness to transfer the photoresist 30 pattern while forming a suitable stress gradient. This reduces the compressive stress on the semiconductor structure 20 and the photoresist 30 by the low-stress top TiN film 13 and bottom TiN film 11, minimizing the impact on the etching selectivity and the compressive stress on the photoresist 30 by the hard mask structure 10, as well as the impact on the photoresist 30 pattern transfer effect. This improves the patterning accuracy of the semiconductor structure 20 after patterning.
[0115] In one embodiment, the compressive stress of the top TiN film 13 is less than 800 MPa.
[0116] The top TiN film 13 of the present invention minimizes the impact of compressive stress on the semiconductor structure 20 by setting a range of compressive stress. Specifically, the stress range of the top TiN film 13 with appropriate low stress can be designed according to actual application requirements, all of which are within the protection scope of the present invention.
[0117] This embodiment also provides a semiconductor process method, wherein the semiconductor process method uses any of the above-described hard mask structures 10 as a hard mask for pattern transfer of photoresist 30. The other steps included in the semiconductor process method are basically the same as those in Embodiment 1, except that:
[0118] In this embodiment, as Figure 13 As shown, after the central TiN thin film 12 is formed on the upper surface of the semiconductor structure 20 in step 2, as... Figure 14 As shown, a top TiN film 13 is then deposited on the middle TiN film 12. The bottom TiN film 11, the middle TiN film 12, and the top TiN film 13 together constitute the hard mask structure 10. After step 2 is completed, as shown... Figure 15 As shown, after setting a diffusion barrier layer 31 on the obtained hard mask structure 10, then as... Figure 16 As shown, step 3 is performed to set the photoresist 30; then as shown... Figure 17 As shown, patterned photoresist 30; as Figure 18 As shown, the patterned diffusion barrier layer 31 and the hard mask structure 10; as Figure 19 As shown, the photoresist 30 and diffusion barrier layer 31 are removed; Figure 20 As shown, a patterned semiconductor structure 20.
[0119] The present invention provides a diffusion barrier layer 31 between the hard mask structure 10 and the photoresist 30, which reduces the compressive stress of the top TiN film 13 while blocking the diffusion of nitrogen from the top TiN film 13 into the photoresist 30, thereby achieving a dual optimization of reducing compressive stress and avoiding nitrogen poisoning of the photoresist 30.
[0120] In summary, the hard mask structure and semiconductor process method of the present invention can reduce the compressive stress on the contact surface of the hard mask structure to be patterned semiconductor structure by setting the bottom of the hard mask structure to a low-stress TiN thin film, thereby reducing the risk of photolithographic pattern transfer distortion caused by the hard mask structure. At the same time, by setting the top of the hard mask structure to a high-density TiN thin film, the etching selectivity when the hard mask structure is used as a mask for downward etching is guaranteed, and defects such as pattern deformation and distortion caused by the diffusion of a large amount of nitrogen elements in TiN into the photoresist are effectively prevented, thus optimizing the overall effect after the trade-off between low-stress and high-density TiN hard mask. In addition, by effectively blocking nitrogen elements in TiN, the need for a diffusion barrier layer between the photoresist and the hard mask structure is reduced, thereby reducing process costs and improving process efficiency while ensuring pattern accuracy. Finally, by setting the top TiN thin film, the influence of the compressive stress of the hard mask structure on the photolithographic pattern transfer of the patterned semiconductor structure is further reduced.
[0121] Therefore, this invention effectively overcomes the various shortcomings of the prior art and has high industrial application value.
[0122] The above embodiments are merely illustrative of the principles and effects of the present invention and are not intended to limit the invention. Any person skilled in the art can modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by those skilled in the art without departing from the spirit and technical concept disclosed in the present invention should still be covered by the claims of the present invention.
Claims
1. A hard mask structure, characterized by, The hard mask structure comprises, from bottom to top, a bottom TiN film and a middle TiN film. The bottom TiN film is a low-stress TiN film, and the middle TiN film is a high-density TiN film. The hard mask structure is a mask used for pattern transfer of photoresist.
2. The hardmask structure of claim 1, wherein, The thickness of the middle TiN film is 20%-30% of the total thickness of the hard mask structure, and the thickness of the bottom TiN film is 70%-80% of the total thickness of the hard mask structure.
3. The hardmask structure of claim 1, wherein, The hard mask structure further comprises a top TiN film on the middle TiN film, and the top TiN film is a low-stress TiN film.
4. The hardmask structure of claim 3, wherein, The thickness of the top TiN film is less than the thickness of the bottom TiN film.
5. The hardmask structure of claim 3, wherein, The thickness of the top TiN film is 5%-10% of the total thickness of the hard mask structure, the thickness of the middle TiN film is 20%-30% of the total thickness of the hard mask structure, and the thickness of the bottom TiN film is 65%-70% of the total thickness of the hard mask structure.
6. The hardmask structure of any of claims 1-5, wherein, The thickness of the middle TiN film is greater than 60 angstroms.
7. The hardmask structure of any of claims 1-5, wherein, The compressive stress of the bottom TiN film is less than 800 Mpa, and when the hard mask structure comprises a top TiN film, the compressive stress of the top TiN film is less than 800 Mpa.
8. The hard mask structure of any of claims 1-5, wherein, The density of the middle TiN film is greater than 4.4 g / cm 3 or greater than 4.4 g / cm 3 and less than or equal to 4.8 g / cm 3 .
9. A semiconductor process method, characterized by, The semiconductor process method uses the hard mask structure of any one of claims 1-8 as a hard mask for pattern transfer of photoresist, and the semiconductor process method comprises: providing a semiconductor structure to be patterned; sequentially arranging a bottom TiN film and a middle TiN film on the upper surface of the semiconductor structure to form the hard mask structure; arranging photoresist on the upper surface of the hard mask structure; exposing and developing the photoresist to obtain patterned photoresist; continuing to etch the hard mask structure downward using the patterned photoresist as a mask to obtain a patterned hard mask structure; removing the remaining photoresist; continuing to etch the semiconductor structure downward using the patterned hard mask structure as a mask to obtain a patterned semiconductor structure.
10. The semiconductor process method of claim 9, wherein, After arranging the middle TiN film on the upper surface of the semiconductor structure, a top TiN film is arranged on the middle TiN film, and the bottom TiN film, the middle TiN film and the top TiN film together form the hard mask structure; a diffusion barrier layer is arranged on the obtained hard mask structure before the photoresist is arranged.