High-speed pulse counting method, device, equipment and storage medium based on device net protocol

Abstract

The application relates to a high-speed pulse counting method, device, equipment and storage medium based on a DeviceNet protocol, the method comprising the following steps: configuring a timer peripheral of a master control chip as an encoder interface mode, enabling a timer input channel TI1 and TI2, and respectively capturing pulse signals A and B; judging the phase relationship of the pulse signals A and B, and updating a counting value according to the phase relationship; when a DeviceNet sending task is executed, filling the counting value into a DeviceNet sending frame, and sending the counting value to an external device through the DeviceNet protocol. The application has the effect of improving the high-speed pulse counting accuracy.

Description

Technical Field

[0001] This application relates to the technical field of pulse signal processing, and in particular to a high-speed pulse counting method, apparatus, device, and storage medium based on the DeviceNet protocol. Background Technology

[0002] Currently, in industrial automation, robot control, and precision manufacturing, it is often necessary to accurately count high-speed pulse signals to obtain displacement or velocity information of moving parts. These pulse signals typically come from rotary encoders or linear sensors, requiring stable, real-time acquisition and processing under high-frequency conditions.

[0003] Existing high-speed pulse counting typically relies on dedicated pulse counting modules or is used in conjunction with DeviceNet couplers. While these solutions can count pulse signals, they are prone to introducing additional time delays during transmission and can easily cause misjudgment of direction and counting errors when there is noise interference or pulse glitches.

[0004] The existing technical solutions mentioned above have the following drawbacks: the existing technology has the drawback of poor accuracy in high-speed pulse counting. Summary of the Invention

[0005] To improve the accuracy of high-speed pulse counting, this application provides a high-speed pulse counting method, apparatus, device, and storage medium based on the DeviceNet protocol.

[0006] The above-mentioned objective of this application is achieved through the following technical solution:

[0007] A high-speed pulse counting method based on the DeviceNet protocol, the high-speed pulse counting method based on the DeviceNet protocol includes:

[0008] Configure the timer peripheral of the main control chip to encoder interface mode, enable timer input channels TI1 and TI2, and capture pulse signal A and pulse signal B respectively;

[0009] Determine the phase relationship between the pulse signal A and the pulse signal B, and update the count value based on the phase relationship;

[0010] When the DeviceNet send task is executed, the count value is filled into the DeviceNet send frame and sent to the external device via the DeviceNet protocol.

[0011] By adopting the above technical solution, configuring the timer peripheral of the main control chip to encoder interface mode and enabling the timer input channel to capture pulse signals, real-time acquisition of pulse signals A and B can be achieved, avoiding dependence on external dedicated modules and thus reducing the hardware complexity and cost of the system. By judging the phase relationship between pulse signals A and B and updating the count value, the counting process can be kept consistent with the actual mechanical motion direction, thereby improving the accuracy of the counting results. By filling the real-time count value into the transmission frame and sending it through the DeviceNet protocol when the DeviceNet transmission task is executed, the delay caused by traditional couplers can be reduced, thereby improving the real-time performance and communication efficiency of the system.

[0012] In a preferred embodiment, this application can be further configured such that: determining the phase relationship between the pulse signal A and the pulse signal B, and updating the count value according to the phase relationship, specifically includes:

[0013] The signal quality of pulse signal A and pulse signal B is evaluated and calculated to obtain the noise metric E.

[0014] The phase difference tolerance δθ is adjusted according to the noise metric E. tol ;

[0015] Based on the phase relationship between the pulse signal A and the pulse signal B, combined with the phase difference tolerance δθ tol The count value is updated according to a preset count update rule.

[0016] By employing the above technical solution, the noise metric E is obtained by evaluating and calculating the signal quality of pulse signal A and pulse signal B. This allows for the quantification of signal stability even in the presence of glitches or jitter in high-speed pulses, thus providing a reliable basis for subsequent judgments. Furthermore, the phase difference tolerance δθ is adjusted based on the noise metric E. tol This enables the system to maintain robustness in noisy environments and high sensitivity in stable environments, thus balancing accuracy and anti-interference capabilities. By updating the count based on phase relationships and dynamic tolerance, it can ensure accurate direction determination while avoiding false counts caused by glitches, thereby improving the accuracy of high-speed pulse counting.

[0017] In a preferred embodiment, this application can be further configured such that: the evaluation and calculation of the signal quality of the pulse signal A and the pulse signal B to obtain the noise metric E specifically includes:

[0018] Record the timestamps of the consecutive edges of the pulse signal A and the pulse signal B, and generate a sequence {δt} with intervals between adjacent edges. i}, where i is the timestamp number;

[0019] According to the sequence {δt i Calculate the median(δt) and standard deviation σ of the interval between adjacent edges within a sliding window of length N. δt Based on the median (δt) and the standard deviation σ δt Through formula σ norm =σ δt The dispersion index σ is calculated using / median(δt). norm ;

[0020] Count the number of illegal transitions M within the sliding window;

[0021] The illegal transition ratio r is calculated based on the length N of the sliding window and the number of illegal transitions M.

[0022] According to the dispersion index σ norm The illegal transition ratio r is expressed by the formula E=α*σ. norm The noise metric E is calculated using +β*r, where α and β are preset weights.

[0023] By employing the above technical solution, and recording the consecutive edge timestamps of pulse signal A and pulse signal B to generate adjacent interval sequences, the temporal variation characteristics of the pulse signals can be obtained, thus providing data support for subsequent stability analysis; by calculating the median and standard deviation, a dispersion exponent σ is formed. norm It can quantitatively reflect the consistency of pulse intervals, thereby identifying periodic jitter caused by interference; by counting the number of illegal transitions and calculating the illegal transition ratio r, it can identify non-adjacent state jumps and pulse width anomalies, thus effectively detecting distortion and glitches. norm Combined with r, it forms the noise metric E, which reduces the interference of noise on high-speed pulse counting and improves the accuracy of high-speed pulse counting.

[0024] In a preferred embodiment, this application can be further configured such that: the phase difference tolerance δθ is adjusted according to the noise metric E. tol Specifically, it includes:

[0025] Obtain the baseline tolerance δθ base Signal-to-noise gain k, maximum tolerance limit δθ max and the minimum tolerance limit δθ min ;

[0026] According to the formula δθ tol =clip(δθ base +k*E,δθ min ,δθ max The phase difference tolerance δθ was calculated. tol .

[0027] By adopting the above technical solution, and by obtaining the reference tolerance, signal-to-noise gain, and upper and lower bounds of the tolerance, dynamic adjustment boundary conditions can be set for phase difference determination, thereby ensuring that the tolerance adjustment process does not get out of control; based on the formula δθ tol =clip(δθ base +k*E,δθ min ,δθ max The phase difference tolerance is calculated and the threshold can be adaptively adjusted according to the magnitude of the noise metric E. This allows for a looser tolerance under high noise conditions to avoid false counting, and a tighter tolerance under low noise conditions to ensure high-precision judgment, thereby improving the system's adaptability to different working environments.

[0028] In a preferred embodiment, this application may be further configured such that: the phase difference tolerance δθ is calculated... tol Following that, it also includes:

[0029] Retrieve the phase difference tolerance δθ from the last update prev And obtain the tolerance update threshold ε;

[0030] When |δθ tol −δθ prev When |<ε, then the δθ tol= δθ prev ;

[0031] When |δθ tol −δθ prev When |≥ε, then the δθ tol Update to the new phase difference tolerance value.

[0032] By adopting the above technical solution, by retrieving the phase difference tolerance from the last update and introducing an update threshold ε, the phase difference tolerance can remain unchanged when the change is small, thus avoiding frequent adjustments due to small fluctuations; by updating only when the change exceeds the threshold, the stability of the judgment can be maintained in a noisy environment, thereby reducing the risk of misjudgment caused by counting threshold jitter; thus, the counting process can be made smoother and more reliable, thereby significantly improving the accuracy of high-speed pulse counting.

[0033] In a preferred embodiment, this application can be further configured such that the count update rule specifically includes:

[0034] When the phase difference δθ between pulse signal A and pulse signal B is greater than δθ tol When the count value is incremented by 1;

[0035] When the phase difference δθ between pulse signal A and pulse signal B is less than -δθ tol When the count value is reached, the count value is decremented by 1.

[0036] By adopting the above technical solution, and by ensuring that the phase difference is greater than the phase difference tolerance δθ tol The counter value is incremented by 1 at regular intervals, accurately capturing the positive motion of the machine, thus ensuring that the accumulated count matches the actual direction of motion; this is achieved by using a phase difference less than −δθ. tol The counter value is decremented by 1 each time to avoid frequent updates to the phase difference tolerance δθ due to minor noise fluctuations. tol This improves the accuracy of high-speed pulse counting while saving computing resources.

[0037] The second objective of this invention is achieved through the following technical solution:

[0038] A high-speed pulse counting device based on the DeviceNet protocol, specifically comprising:

[0039] The timer configuration module is used to configure the timer peripheral of the main control chip to encoder interface mode, and enable timer input channels TI1 and TI2 to capture pulse signal A and pulse signal B respectively.

[0040] The phase determination module is used to determine the phase relationship between the pulse signal A and the pulse signal B, and update the count value according to the phase relationship;

[0041] The data transmission module is used to fill the count value into the DeviceNet transmission frame when the DeviceNet transmission task is executed, and send the count value to an external device through the DeviceNet protocol.

[0042] By adopting the above technical solution, configuring the timer peripheral of the main control chip to encoder interface mode and enabling the timer input channel to capture pulse signals, real-time acquisition of pulse signals A and B can be achieved, avoiding dependence on external dedicated modules and thus reducing the hardware complexity and cost of the system. By judging the phase relationship between pulse signals A and B and updating the count value, the counting process can be kept consistent with the actual mechanical motion direction, thereby improving the accuracy of the counting results. By filling the real-time count value into the transmission frame and sending it through the DeviceNet protocol when the DeviceNet transmission task is executed, the delay caused by traditional couplers can be reduced, thereby improving the real-time performance and communication efficiency of the system.

[0043] The above-mentioned objective three of this application is achieved through the following technical solution:

[0044] A computer device includes a memory, a processor, and a computer program stored in the memory and executable on the processor. When the processor executes the computer program, it implements the steps of the high-speed pulse counting method based on the DeviceNet protocol described above.

[0045] The fourth objective of this application is achieved through the following technical solution:

[0046] A computer-readable storage medium storing a computer program that, when executed by a processor, implements the steps of the high-speed pulse counting method based on the DeviceNet protocol described above.

[0047] In summary, this application includes at least one of the following beneficial technical effects:

[0048] 1. By evaluating the signal quality of pulse signal A and pulse signal B, a noise metric E is calculated. This metric quantifies the stability of the signal even in the presence of glitches or jitter in high-speed pulses, thus providing a reliable basis for subsequent judgments. The phase difference tolerance δθ is adjusted based on the noise metric E. tol This approach enables the system to maintain robustness in noisy environments and high sensitivity in stable environments, thus balancing accuracy and anti-interference capabilities. By updating counts based on phase relationships and dynamic tolerance, it ensures accurate direction determination while avoiding miscounting caused by glitches. By recording the continuous edge timestamps of pulse signals A and B and generating adjacent interval sequences, it can obtain the temporal variation characteristics of the pulse signals, providing data support for subsequent stability analysis. Furthermore, by calculating the median and standard deviation and forming the dispersion exponent σ... norm It can quantitatively reflect the consistency of pulse intervals, thereby identifying periodic jitter caused by interference; by counting the number of illegal transitions and calculating the illegal transition ratio r, it can identify non-adjacent state jumps and pulse width anomalies, thus effectively detecting distortion and glitches. norm Combined with r, it forms a noise metric E, which reduces the interference of noise on high-speed pulse counting. By retrieving the phase difference tolerance from the last update and introducing an update threshold ε, it can remain unchanged when the phase difference tolerance changes small, thus avoiding frequent adjustments due to small fluctuations. By updating only when the change exceeds the threshold, it can maintain the stability of the judgment in a noisy environment, thereby reducing the risk of misjudgment caused by counting threshold jitter. This makes the counting process smoother and more reliable, improving the accuracy of high-speed pulse counting.

[0049] 2. By obtaining the reference tolerance, signal-to-noise gain, and upper and lower bounds of the tolerance, dynamic adjustment boundary conditions can be set for phase difference determination, thereby ensuring that the tolerance adjustment process does not go out of control; based on the formula δθ tol =clip(δθ base+k*E,δθ min ,δθ max The phase difference tolerance is calculated and the threshold can be adaptively adjusted according to the magnitude of the noise metric E. This allows the tolerance to be relaxed under high noise conditions to avoid false counting, and the tolerance to be tightened under low noise conditions to ensure high-precision judgment, thereby improving the system's adaptability to different working environments.

[0050] 3. By ensuring the phase difference is greater than the phase difference tolerance δθ tol The counter value is incremented by 1 at regular intervals, accurately capturing the positive motion of the machine, thus ensuring that the accumulated count matches the actual direction of motion; this is achieved by using a phase difference less than −δθ. tol The counter value is decremented by 1 each time to avoid frequent updates to the phase difference tolerance δθ due to minor noise fluctuations. tol This improves the accuracy of high-speed pulse counting while saving computing resources. Attached Figure Description

[0051] Figure 1 This is a flowchart of a high-speed pulse counting method based on the DeviceNet protocol in one embodiment of this application.

[0052] Figure 2 This is a flowchart illustrating the implementation of step S20 in a high-speed pulse counting method based on the DeviceNet protocol in one embodiment of this application.

[0053] Figure 3 This is a flowchart illustrating the implementation of step S21 in a high-speed pulse counting method based on the DeviceNet protocol in one embodiment of this application.

[0054] Figure 4 This is a flowchart illustrating the implementation of step S22 in a high-speed pulse counting method based on the DeviceNet protocol in one embodiment of this application.

[0055] Figure 5 This is another implementation flowchart of step S22 in the high-speed pulse counting method based on the DeviceNet protocol in one embodiment of this application.

[0056] Figure 6 This is a flowchart illustrating the implementation of step S23 in a high-speed pulse counting method based on the DeviceNet protocol in one embodiment of this application.

[0057] Figure 7 This is a schematic diagram of a high-speed pulse counting device based on the DeviceNet protocol in one embodiment of this application.

[0058] Figure 8 This is a schematic diagram of a device according to one embodiment of this application. Detailed Implementation

[0059] The present application will be further described in detail below with reference to the accompanying drawings.

[0060] In one embodiment, such as Figure 1 As shown, this application discloses a high-speed pulse counting method based on the DeviceNet protocol, which specifically includes the following steps:

[0061] S10: Configure the timer peripheral of the main control chip to encoder interface mode, enable timer input channels TI1 and TI2, and capture pulse signal A and pulse signal B respectively.

[0062] Specifically, the timer is set to encoder interface mode so that the counter accumulates and subtracts the two quadrature signals A and B. The pin multiplexing function of A to TI1 and B to TI2 is mapped. The input capture is set to be triggered on both rising and falling edges to improve resolution. The counter bit width and auto-reload register are set and the initial value is cleared. Input filtering is enabled to suppress short glitches. For example, encoder A can be connected to PA0 as TI1 and encoder B can be connected to PA1 as TI2. After initialization, pulse signals are continuously acquired without the need for an external counting card or coupler, thereby obtaining real-time A and B pulse data and reducing hardware complexity and cost.

[0063] S20: Determine the phase relationship between pulse signal A and pulse signal B, and update the count value based on the phase relationship.

[0064] Specifically, when the timer updates or an input capture event occurs, the current levels of A and B are read and compared with the two-bit state formed by the previous levels. The direction is determined by a standard orthogonal sequence. If the current state progresses sequentially relative to the previous state, it is recorded as positive and the count variable is incremented by one. If it progresses in reverse, it is recorded as negative and the count variable is decremented by one. For example, the common convention of 00→01→11→10→00 being positive and 00→10→11→01→00 being negative is used for comparison. This ensures that the count change is consistent with the movement direction of the measured component and improves the counting accuracy.

[0065] S30: When the DeviceNet send task is executed, the count value is filled into the DeviceNet send frame and sent to the external device through the DeviceNet protocol.

[0066] Specifically, when the DeviceNet send task is triggered, the latest count value is read from the shared memory, written into the data field of the send buffer according to the agreed byte order, and the necessary identification and length fields are filled in. After the protocol stack completes the verification and encapsulation, the send interface is called to send the data.

[0067] In one embodiment, such as Figure 2As shown, in step S20, the phase relationship between pulse signal A and pulse signal B is determined, and the count value is updated according to the phase relationship. This specifically includes:

[0068] S21: Evaluate and calculate the signal quality of pulse signal A and pulse signal B to obtain the noise metric E.

[0069] Specifically, pulse edge data of pulse signal A and pulse signal B are collected over a period of time, and their time distribution and transition characteristics are statistically analyzed to obtain a noise metric. For example, when measuring the pulse signal of a motor, the noise metric is close to zero when the motor is at a constant speed, indicating that the signal is stable. When glitches or jitters occur, the noise metric increases, indicating that the signal quality has deteriorated. This provides a basis for subsequent threshold adjustment and count update.

[0070] S22: Adjust the phase difference tolerance δθ according to the noise metric E. tol .

[0071] Specifically, the phase difference tolerance is adaptively adjusted based on the current noise metric. A smaller tolerance is used when the noise is low to improve sensitivity, and a larger tolerance is used when the noise is high to enhance anti-interference capability. For example, the phase difference tolerance δθ can be adjusted during low-noise phases. tol Maintain the phase difference tolerance within a small range close to the reference tolerance, and moderately increase the phase difference tolerance δθ during high-noise phases. tol Avoid accidental triggering of the counter.

[0072] S23: Based on the phase relationship between pulse signal A and pulse signal B, combined with the phase difference tolerance δθ tol The count value is updated according to the preset count update rules.

[0073] Specifically, the current phase difference between A and B is calculated and compared with the phase difference tolerance. If the phase difference exceeds the positive tolerance, the value is incremented by one; if it exceeds the negative tolerance, the value is decremented by one. If the phase difference is within the threshold range, no update is performed to filter out minor disturbances. For example, when A is 1 / 4 cycle ahead of B, the direction of motion of the tested motor is considered positive, and the count value is incremented. When A is 1 / 4 cycle behind B, the direction of motion of the tested motor is considered negative, and the count value is decremented, thereby avoiding false counts caused by slight noise.

[0074] In one embodiment, such as Figure 3 As shown, in step S21, the signal quality of pulse signal A and pulse signal B is evaluated and calculated to obtain the noise metric E, which specifically includes:

[0075] S211: Record the timestamps of consecutive edges of pulse signal A and pulse signal B, and generate a sequence {δt} of adjacent edge intervals. i}, where i is the timestamp number.

[0076] Specifically, the timer count value is read as a timestamp and written into the circular buffer according to the arrival order of pulse signal A and pulse signal B. The edge interval sequence is obtained by subtracting adjacent timestamps. For example, pulse signal A is recorded, and the timestamps of the arrival time of the edge of pulse signal A are recorded sequentially as t1, t2, ... , and δt1=t2−t1, δt2=t3−t2 are calculated to form the interval time data δt for subsequent statistical analysis. i The sequence {δt} i}

[0077] S212: Based on the sequence {δt} i Calculate the median(δt) and standard deviation σ of the interval between adjacent edges within a sliding window of length N. δt Based on the median (δt) and standard deviation σ δt Through formula σ norm =σ δt The dispersion index σ is calculated using / median(δt). norm .

[0078] Specifically, select the sequence {δt} i N adjacent time intervals δt in} i Statistical analysis was performed, and the median (median(δt)) was obtained using the fast selection algorithm. The standard deviation σ was then calculated based on the mean and the sum of squares. δt Then use the standard deviation σ δt Dividing by the median (median(δt)) yields the dimensionless divergence index σ. norm When the intervals are basically uniform, σnorm approaches zero; when the intervals are inconsistent in length, σnorm increases significantly, which is used to quantify the degree of jitter in the time interval.

[0079] S213: Count the number of illegal jumps M within the sliding window.

[0080] Specifically, the A and B level signals are encoded into four states: 00, 01, 11, and 10. A valid state sequence should be one of the forward motion cycle sequence {00, 01, 11, 10, 00...} or the reverse motion cycle sequence 10, 11, 01, 00, 10...}. The level combination of pulse signal A and pulse signal B is continuously monitored and encoded to obtain the actual state sequence. When the actual state sequence is not a valid state sequence, or when the duration of a high or low level is less than the preset minimum pulse width T_min, the transition is determined to be an illegal transition, and the number of illegal transitions is counted as the number of illegal transitions M.

[0081] S214: The illegal transition ratio r is calculated based on the length N of the sliding window and the number of illegal transitions M.

[0082] Specifically, the proportion of illegal transitions within the window is calculated as r=M / N. For example, if 5 illegal transitions are detected in a window with N=100, then r is 0.05. The illegal transition ratio r is used to measure the frequency of abnormal transitions.

[0083] S215: Based on the dispersion index σ norm The illegal transition ratio r is obtained through the formula E=α*σ norm The noise metric E is calculated using +β*r, where α and β are preset weights.

[0084] Specifically, the dispersion index σ norm The noise metric E is obtained by linearly combining the illegal transition ratio r with a preset weight, and the result is truncated to an upper limit when necessary to maintain range stability, for example, when σ norm When the noise level is low and r increases, E increases with r. When both r and r increase, E increases significantly. This gives us the noise metric E that reflects the strength of the noise.

[0085] In one embodiment, such as Figure 4 As shown, in step S22, the phase difference tolerance δθ is adjusted according to the noise metric E. tol Specifically, it includes:

[0086] S221: Obtain the baseline tolerance δθ base Signal-to-noise gain k, maximum tolerance limit δθ max and the minimum tolerance limit δθ min .

[0087] Specifically, during the initialization phase, the above four parameters are read from the configuration area and their range validity is verified, including the baseline tolerance δθ. base This refers to the phase difference between pulse signal A and pulse signal B at their initial input. In this embodiment, the initial phase difference is selected as 90°, i.e., the reference tolerance δθ. base =1 / 4 cycle, if there is no relevant configuration in the configuration area, the default safety value will be used, with a maximum tolerance limit of δθ. max and the minimum tolerance limit δθ min The gain k is used to constrain subsequent calculation results from exceeding the limit. The gain k is set based on experience or experimentation and is used to adjust the intensity of the influence of noise measurement on the threshold.

[0088] S222: According to the formula δθ tol =clip(δθ base +k*E,δθ min ,δθ max The phase difference tolerance δθ was calculated. tol .

[0089] Specifically, the original phase difference tolerance is first obtained by weighting the baseline tolerance with the noise metric, and then the final phase difference tolerance δθ is obtained by truncation of the upper and lower limits. tol For example, when E is zero, the phase difference tolerance δθ tol Near reference phase difference tolerance δθ base When E increases, the phase difference tolerance δθ tol It increases accordingly but will not exceed the maximum limit δθ max This allows for maintaining appropriate decision boundaries under different noise conditions.

[0090] In one embodiment, such as Figure 5 As shown, in step S22, after step S222, the phase difference tolerance δθ is calculated. tol Following that, it also includes:

[0091] S223: Retrieve the previously updated phase difference tolerance δθ prev , obtain the tolerance update threshold ε.

[0092] Specifically, the phase difference tolerance δθ from the last effective value is read from memory. prev As a current benchmark, the tolerance update threshold ε used to suppress jitter in this round is also read. For example, ε can be a fixed small amount or adjusted appropriately with the running phase to avoid excessively frequent threshold refreshes and save computing resources.

[0093] S224: When |δθ tol −δθ prev When |<ε, then δθ tol= δθ prev .

[0094] Specifically, upon detecting the newly calculated phase difference tolerance δθ tol Phase difference tolerance δθ calculated previously prev When the difference is less than the update threshold ε, the previously calculated phase difference tolerance δθ is maintained. prev The time stamp remains unchanged, and only the timestamp is updated to record. For example, when slight fluctuations in noise cause the threshold to change by only a tiny amount, the phase difference tolerance is not triggered to maintain the smoothness of the counting decision.

[0095] S225: When |δθ tol −δθ prev When |≥ε, then δθ tol Update to the new phase difference tolerance value.

[0096] Specifically, when the phase difference tolerance δθ is detected tol When the change reaches or exceeds the update threshold ε, write the new phase difference tolerance δθ. tolIt takes effect in this round, and the phase difference tolerance δθ is recorded simultaneously. tol Used for subsequent updates to the phase difference tolerance; for example, when a sudden increase in noise necessitates a significant increase in the phase difference tolerance, the newly calculated phase difference tolerance δθ is immediately applied. tol To enhance anti-interference capabilities.

[0097] In one embodiment, such as Figure 6 As shown, in step S23, the count update rule specifically includes:

[0098] S231: When the phase difference δθ between pulse signal A and pulse signal B is greater than δθ tol When the counter is reached, the count is incremented by 1.

[0099] Specifically, the phase difference δθ at the current moment is calculated based on the time difference between the edges of the most recent pulse signal A and pulse signal B. The phase difference δθ is then compared with the phase difference tolerance δθ. tol After comparison, if the phase difference δθ is greater than the phase difference tolerance threshold for positive motion + δθ tol Then increment the count value by one. For example, when the signal is stable and the signal-to-noise ratio is extremely low, i.e., E=0, the phase difference tolerance δθ tol =δθ base =1 / 4 cycle, then when the effective edge of pulse signal A continuously leads pulse signal B and exceeds the phase difference tolerance threshold of 1 / 4 cycle, the motor under test is determined to be moving in the positive direction and the cumulative count is executed.

[0100] S232: When the phase difference δθ between pulse signal A and pulse signal B is less than -δθ tol When the counter is decremented, the count value is reduced by 1.

[0101] Specifically, if the phase difference δθ is less than the phase difference tolerance threshold for positive motion -δθ tol Then increment the count value by one. For example, when the signal is stable and the signal-to-noise ratio is extremely low, i.e., E=0, the phase difference tolerance δθ tol =δθ base =1 / 4 cycle, then when the effective edge of pulse signal A continuously lags behind pulse signal B and exceeds the phase difference tolerance threshold of 1 / 4 cycle, the motor under test is determined to be moving in reverse and the cumulative count is executed.

[0102] This enables accurate counting of both forward and reverse motions and avoids incorrect subtraction or addition caused by small perturbations within the threshold range.

[0103] It should be understood that the sequence number of each step in the above embodiments does not imply the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of this application.

[0104] In one embodiment, a high-speed pulse counting device based on the DeviceNet protocol is provided, which corresponds one-to-one with the high-speed pulse counting method based on the DeviceNet protocol in the above embodiments. For example... Figure 7 As shown, this high-speed pulse counting device based on the DeviceNet protocol includes a timer configuration module, a phase determination module, and a data transmission module. Detailed descriptions of each functional module are as follows:

[0105] The timer configuration module is used to configure the timer peripheral of the main control chip to encoder interface mode, and enable timer input channels TI1 and TI2 to capture pulse signals A and B respectively;

[0106] The phase determination module is used to determine the phase relationship between pulse signal A and pulse signal B, and update the count value according to the phase relationship;

[0107] The data transmission module is used to fill the count value into the DeviceNet transmission frame when the DeviceNet transmission task is executed, and send the count value to the external device through the DeviceNet protocol.

[0108] Optionally, the phase determination module includes:

[0109] The signal evaluation submodule is used to evaluate and calculate the signal quality of pulse signal A and pulse signal B, and obtain the noise metric E.

[0110] The tolerance adjustment submodule is used to adjust the phase difference tolerance δθ according to the noise metric E. tol ;

[0111] The counting update submodule is used to combine the phase difference tolerance δθ with the phase relationship between pulse signal A and pulse signal B. tol The count value is updated according to the preset count update rules.

[0112] Optionally, the signal evaluation submodule includes:

[0113] The time interval extraction unit is used to record the timestamps of consecutive edges of pulse signal A and pulse signal B, generating a sequence {δt} of adjacent edge intervals. i}, where i is the timestamp number;

[0114] Discreteness calculation unit, used to calculate the discreteness based on the sequence {δt} i Calculate the median(δt) and standard deviation σ of the interval between adjacent edges within a sliding window of length N. δt And according to the formula σ norm =σ δt The dispersion index σ is calculated using / median(δt).norm ;

[0115] The illegal transition statistics unit is used to count the number of illegal transitions M within the sliding window, and to calculate the illegal transition ratio r based on the length N of the sliding window and the number of illegal transitions M.

[0116] Noise measurement calculation unit, used to calculate based on the dispersion index σ norm The illegal transition ratio r is obtained through the formula E=ασ. norm +βr is used to calculate the noise metric E, where α and β are preset weights.

[0117] Optional, the tolerance adjustment submodule includes:

[0118] The parameter acquisition unit is used to obtain the baseline tolerance δθ. base Signal-to-noise gain k, maximum tolerance limit δθ max and the minimum tolerance limit δθ min ;

[0119] Tolerance calculation unit, used to calculate according to formula δθ tol =clip(δθ base +k*E,δθ min ,δθ max The phase difference tolerance δθ was calculated. tol .

[0120] Optionally, the tolerance adjustment submodule may include the following after the tolerance calculation unit:

[0121] The updated threshold acquisition unit is used to retrieve the previously updated phase difference tolerance δθ. prev Obtain the tolerance update threshold ε;

[0122] The tolerance update judgment unit is used to update |δθ tol −δθ prev When |<ε, keep δθ tol =δθ prev ;

[0123] The tolerance does not update the judgment unit, which is used in |δθ tol −δθ prev When |≥ε, δθ tol Updated to the new phase difference tolerance value.

[0124] Optionally, the count update submodule includes:

[0125] A forward counting unit is used when the phase difference δθ between pulse signal A and pulse signal B is greater than δθ. tol When the counter expires, increment the counter by 1.

[0126] Inverting counting unit, used when phase difference δθ < -δθ tol When the counter is reached, the count value is decremented by 1.

[0127] Specific limitations regarding the high-speed pulse counting device based on the DeviceNet protocol can be found in the limitations of the high-speed pulse counting method based on the DeviceNet protocol above, and will not be repeated here. Each module in the aforementioned high-speed pulse counting device based on the DeviceNet protocol can be implemented entirely or partially through software, hardware, or a combination thereof. These modules can be embedded in hardware or independently of the processor in the computer device, or stored in software in the memory of the computer device, so that the processor can call and execute the operations corresponding to each module.

[0128] In one embodiment, a computer device is provided, which may be a server, and its internal structure diagram may be as follows: Figure 8 As shown, the computer device includes a processor, memory, network interface, and database connected via a system bus. The processor provides computing and control capabilities. The memory includes non-volatile storage media and internal memory. The non-volatile storage media stores the operating system, computer programs, and database. The internal memory provides an environment for the operation of the operating system and computer programs stored in the non-volatile storage media. The network interface is used for communication with external terminals via a network connection. When executed by the processor, the computer program implements a high-speed pulse counting method based on the DeviceNet protocol.

[0129] In one embodiment, a computer device is provided, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the computer program to perform the following steps:

[0130] Configure the timer peripheral of the main control chip to encoder interface mode, enable timer input channels TI1 and TI2, and capture pulse signals A and B respectively;

[0131] Determine the phase relationship between pulse signal A and pulse signal B, and update the count value based on the phase relationship;

[0132] When the DeviceNet send task is executed, the count value is filled into the DeviceNet send frame and sent to the external device via the DeviceNet protocol.

[0133] In one embodiment, a computer-readable storage medium is provided having a computer program stored thereon, the computer program performing the following steps when executed by a processor:

[0134] Configure the timer peripheral of the main control chip to encoder interface mode, enable timer input channels TI1 and TI2, and capture pulse signals A and B respectively;

[0135] Determine the phase relationship between pulse signal A and pulse signal B, and update the count value based on the phase relationship;

[0136] When the DeviceNet send task is executed, the count value is filled into the DeviceNet send frame and sent to the external device via the DeviceNet protocol.

[0137] Those skilled in the art will understand that all or part of the processes in the methods of the above embodiments can be implemented by a computer program instructing related hardware. The computer program can be stored in a non-volatile computer-readable storage medium. When executed, the computer program can include the processes of the embodiments of the above methods. Any references to memory, storage, databases, or other media used in the embodiments provided in this application can include non-volatile and / or volatile memory. Non-volatile memory can include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM), or flash memory. Volatile memory can include random access memory (RAM) or external cache memory. By way of illustration and not limitation, RAM is available in various forms, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), dual data rate SDRAM (DDRSDRAM), enhanced SDRAM (ESDRAM), synchronous link DRAM (SLDRAM), Rambus direct RAM (RDRAM), direct memory bus dynamic RAM (DRDRAM), and memory bus dynamic RAM (RDRAM), etc.

[0138] Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the above-described division of functional units and modules is used as an example. In practical applications, the above functions can be assigned to different functional units and modules as needed, that is, the internal structure of the device can be divided into different functional units or modules to complete all or part of the functions described above.

[0139] The above embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this application, and should all be included within the protection scope of this application.

Claims

1. A high speed pulse counting method based on DeviceNet protocol, characterized in that, The high-speed pulse counting method based on the DeviceNet protocol comprises the following steps: a timer peripheral of a master control chip is configured as an encoder interface mode, and timer input channels TI1 and TI2 are enabled to capture pulse signals A and B, respectively; a phase relationship of the pulse signals A and B is determined, and a count value is updated according to the phase relationship; when a DeviceNet sending task is executed, the count value is filled into a DeviceNet sending frame, and the count value is sent to an external device through the DeviceNet protocol; the determination of the phase relationship of the pulse signals A and B and the updating of the count value according to the phase relationship specifically comprise the following steps: signal quality of the pulse signals A and B is evaluated and calculated to obtain a noise metric E; adjusting the phase difference tolerance δθ according to the noise metric E tol ; According to the phase relationship of the pulse signal A and the pulse signal B in combination with the phase difference tolerance δθ tol , the count value is updated by a preset count update rule.

2. The method of claim 1, wherein the DeviceNet protocol based high speed pulse counting method is characterized by, the evaluation and calculation of the signal quality of the pulse signals A and B to obtain the noise metric E specifically comprise the following steps: recording timestamps of successive edges of the pulse signal A and the pulse signal B, generating a sequence of adjacent edge intervals {δt i} where i is the sequence number of the timestamps; According to the sequence {δt i} the median median(δt) and the standard deviation σ of the adjacent edge intervals within a sliding window of length N are calculated δt According to the median median(δt) and the standard deviation σ δt The dispersion index σ norm is calculated by the formula σ δt = σ norm / median(δt) an illegal transition number M in the sliding window is counted; an illegal transition ratio r is calculated according to a length N of the sliding window and the illegal transition number M; According to the dispersion index σ norm and the illegal transition ratio r, a noise metric E is calculated by the formula E = α * σ norm + β * r, where α and β are preset weights.

3. The method of claim 1, wherein the method is based on a DeviceNet protocol. adjusting the phase difference tolerance δθ according to the noise metric E tol , specifically comprising: Acquisition reference tolerance δθ base , signal-to-noise gain k, tolerance maximum limit δθ max and tolerance minimum limit δθ min ; The phase difference tolerance δθ tol is calculated according to the formula δθ base = clip(δθ min , δθ max +k*E, δθ tol ).

4. The method of claim 3, wherein the DeviceNet protocol based high speed pulse counting method is characterized by, In said calculating the phase difference tolerance δθ tol Further comprising, after: retrieve the phase difference tolerance δθ of the last update prev and obtain a tolerance update threshold ε; when | δθ tol − δθ prev | < ε, then the δθ tol= δθ prev ; when | δθ tol − δθ prev | ≥ ε, then the δθ tol is updated to the value of the new phase difference tolerance.

5. The DeviceNet protocol based high speed pulse counting method as claimed in claim 1, wherein, the count updating rule specifically comprises the following steps: when the phase difference δθ of the pulse signal A and the pulse signal B is δθ > δθ tol the count value is incremented by 1; When the phase difference δθ of the pulse signal A and the pulse signal B is δθ < -δθ tol the count value is decreased by 1.

6. A high speed pulse counting device based on the DeviceNet protocol, characterized in that the high-speed pulse counting device based on the DeviceNet protocol specifically comprises the following modules: a timer configuration module, configured to configure a timer peripheral of a master control chip as an encoder interface mode, and enable timer input channels TI1 and TI2 to capture pulse signals A and B, respectively; a phase determination module, configured to determine a phase relationship of the pulse signals A and B, and update a count value according to the phase relationship; a data transmission module, configured to, when a DeviceNet sending task is executed, fill the count value into a DeviceNet sending frame, and send the count value to an external device through the DeviceNet protocol; the phase determination module specifically comprises the following modules: a signal evaluation submodule, configured to evaluate and calculate signal quality of the pulse signals A and B to obtain a noise metric E; a tolerance adjustment submodule configured to adjust a phase difference tolerance δθ according to the noise metric E tol ; a count updating submodule configured to update the count value according to a phase relationship between the pulse signal A and the pulse signal B in combination with the phase difference tolerance δθ tol by a preset count updating rule.

7. A computer device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that, the processor executes the computer program to implement the steps of the high-speed pulse counting method based on the DeviceNet protocol according to any one of claims 1 to 5.

8. A computer-readable storage medium storing a computer program, the computer-readable storage medium comprising: the computer program is executed by the processor to implement the steps of the high-speed pulse counting method based on the DeviceNet protocol according to any one of claims 1 to 5.

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