Global shutter sensor, method of operating same, and imaging system

Abstract

The invention relates to a global shutter image sensor, an imaging system, and a method for operating a global shutter image sensor. The global shutter image sensor includes a pixel array and a controller. The pixel array includes a correction pixel and a plurality of image pixels positioned around the correction pixel. The correction pixel and each of the plurality of image pixels include a photodetector, a storage diode, and a frame transfer transistor. The photodetector is configured to accumulate charge in response to incident light. The frame transfer transistor is coupled between the photodetector and the storage diode. A first row driver is coupled to the frame transfer transistor in each of the plurality of image pixels. A second row driver is coupled to the frame transfer transistor in the correction pixel.

Description

Technical Field

[0001] This application relates generally to image sensors, and more particularly to global shutter sensors, imaging systems, and methods for operating global shutter image sensors. Background Technology

[0002] Image sensors are used in electronic devices such as cell phones, cameras, and computers to capture images. Specifically, the electronic device has an array of pixels arranged in a grid pattern. Each pixel receives incident photons, such as light, and converts these photons into electrical signals. Column circuitry is coupled to each column of the array to read out the sensor signal from each pixel. Summary of the Invention

[0003] In a global shutter image sensor, all pixels capture an image simultaneously to avoid motion artifacts. However, pixels are read out line by line. Therefore, while a pixel is waiting to be read out, unwanted charges may accumulate in the pixel's storage diodes due to light leakage. Ghosting or motion artifacts may be observed in the global shutter image due to light leakage in the storage diodes. Therefore, this disclosure provides an image sensor, imaging system, and method in which local storage diode light leakage is identified to correct parasitic leakage in global shutter imaging.

[0004] This disclosure provides a global shutter image sensor, which in one embodiment includes a pixel array and a controller. The pixel array includes a correction pixel and a plurality of image pixels positioned around the correction pixel. Each of the correction pixel and the plurality of image pixels includes a photodetector, a storage diode, and a frame transfer transistor. The photodetector is configured to accumulate charge in response to incident light. The frame transfer transistor is coupled between the photodetector and the storage diode. A first row driver is coupled to the frame transfer transistor in each of the plurality of image pixels. A second row driver is coupled to the frame transfer transistor in the correction pixel.

[0005] This disclosure also provides an imaging system, in one embodiment of which includes a lens system, a global shutter image sensor, and an imaging controller. The global shutter image sensor is operatively coupled to the lens system. The global shutter image sensor includes a pixel array having a correction pixel and a plurality of image pixels. Each of the correction pixel and the plurality of image pixels includes a photodetector, a storage diode, and a frame transfer transistor coupled between the photodetector and the storage diode. The frame transfer transistor in each of the plurality of image pixels conducts when a first frame transfer control signal is asserted. The frame transfer transistor in the correction pixel conducts when a second frame transfer control signal is asserted. The imaging controller is configured to reset the pixel array. The imaging controller is also configured to arrange the pixel array to be sensitive to incident light during an integration time, resulting in the generation of charge at each pixel of the pixel array. The imaging controller is further configured to generate the first frame transfer control signal after the integration time so that the generated charge is stored in the plurality of image pixels. The imaging controller is also configured to read out the noise signal from the corrected pixel after the pixel array is reset, while keeping the second frame transfer control signal unasserted. Assertion of the second frame transfer control signal causes the generated charge to be stored in the corrected pixel. The imaging controller is also configured to read out an image signal from each of the plurality of image pixels. The imaging controller is further configured to determine a pixel value for each of the plurality of image pixels based on these image signals and the noise signal.

[0006] This disclosure also provides a method for operating a global shutter image sensor. The global shutter image sensor includes a correction pixel in a pixel array and a plurality of image pixels positioned around the correction pixel. Each of the correction pixel and the plurality of image pixels includes a photodetector, a storage diode, and a frame transfer transistor coupled between the photodetector and the storage diode. The frame transfer transistor in each of the plurality of image pixels conducts when a first frame transfer control signal is asserted. The frame transfer transistor in the correction pixel conducts when a second frame transfer control signal is asserted. The method includes resetting the pixel array. The method further includes arranging the pixel array to be sensitive to incident light during an integration time, causing charge to be generated at each pixel of the pixel array; the method further includes asserting the first frame transfer control signal after the integration time to store the generated charge in the plurality of image pixels. The method further includes reading out a noise signal from the correction pixel after the pixel array is reset, while maintaining the second frame transfer control signal. The assertion of the second frame transfer control signal causes the generated charge to be stored in the correction pixel. The method further includes reading an image signal from each of the plurality of image pixels; the method further includes determining a pixel value for each of the plurality of image pixels based on the image signals and the noise signal. Attached Figure Description

[0007] To describe the exemplary specific implementation in detail, reference will now be made to the accompanying drawings, in which:

[0008] Figure 1A It is a block diagram based on some specific implementation examples of imaging systems;

[0009] Figure 1B These are illustrations of examples of imaging systems integrated into vehicles based on specific implementations;

[0010] Figure 2 These are partial schematic diagrams and partial block diagrams based on examples of specific implementations of global shutter image sensors;

[0011] Figure 3 It is based on some specific implementations. Figure 2 A schematic diagram illustrating an example of the circuitry within the pixels of a global shutter image sensor;

[0012] Figure 4 It is based on some specific implementation methods Figure 2 A timing diagram of an example of imaging performed by a global shutter image sensor;

[0013] Figure 5 This is a top view based on an example of pixel groups in a global shutter image sensor based on some specific implementations;

[0014] Figure 6 It is based on some specific implementations. Figure 2 A signal timing diagram of an example of frame transition time for a global shutter image sensor;

[0015] Figure 7 This is a flowchart illustrating examples of global shutter imaging methods with parasitic leakage correction implemented in specific ways; and

[0016] Figure 8 It is a top view of an example of a pixel array divided into multiple pixel groups, based on some specific implementations.

[0017] definition

[0018] Various terms are used to refer to specific system components. Different companies may use different names to refer to a component—this document is not intended to distinguish between components with different names but the same function. In the following discussion and in the claims, the terms "comprising" and "including" are used in an open form, and therefore, these terms should be interpreted as meaning "including, but not limited to...". Additionally, the terms "couple" or "couples" are intended to mean either indirect or direct connections. Thus, if a first device is coupled to a second device, the connection can be made either directly or indirectly via other devices and connections.

[0019] Terms defining height (such as "above", "below", "upper", and "lower") should be positional terms relating to the direction of light incident on the pixel array and / or image pixels. Light entering should be considered to interact with or pass through objects and / or structures "above" and "upper" before interacting with or passing through them. Therefore, positional terms may have no relation to the direction of gravity.

[0020] In the context of electrical equipment, whether standalone or as part of an integrated circuit, the terms "input" and "output" refer to the electrical connection to the electrical equipment and should not be considered as verbs requiring operation. For example, a differential amplifier such as an operational amplifier may have a first differential input and a second differential input, and these "inputs" define the electrical connection to the operational amplifier and should not be understood as signal inputs required by the operational amplifier.

[0021] "Active" should be understood as changing the state of a Boolean signal. A Boolean signal can be asserted as high or having a higher voltage, and it can also be asserted as low or having a lower voltage, depending on the circuit designer's judgment. Similarly, "deactivate" should be understood as changing the state of a Boolean signal to the opposite voltage level to its active state.

[0022] With regard to "frame transfer control signal", the terms "first" and "second" are used herein only to distinguish between one control signal and another. The terms "first" and "second", when used herein with regard to "frame transfer control signal", do not imply the need for two frames.

[0023] "Controller" should be used individually or in combination to mean a single circuit component configured to read inputs and drive outputs in response to those inputs, an application-specific integrated circuit (ASIC), one or more microcontrollers with control software, a reduced instruction set computer (RISC) with control software, a digital signal processor (DSP), one or more processors with control software, a programmable logic device (PLD), a field-programmable gate array (FPGA), or a programmable system-on-a-chip (PSOC). Detailed Implementation

[0024] The following discussion relates to various specific embodiments of the invention. While one or more of these embodiments may be preferred, the disclosed embodiments should not be construed as or otherwise used to limit the scope of this disclosure, including the claims. Furthermore, those skilled in the art will understand that the following description has broad application, and the discussion of any specific embodiment is intended only as an example of that embodiment and is not intended to imply that the scope of this disclosure, including the claims, is limited to that specific embodiment.

[0025] Various examples relate to systems and methods for correcting parasitic leakage of storage diodes in global shutter imaging. More specifically, various examples relate to global shutter image sensors having correction pixels for determining local storage diode leakage to correct parasitic leakage. Still more specifically, various examples relate to global shutter imaging systems and associated controllers that prevent frame shifting in the correction pixels, such that the correction pixels read out local values ​​of storage diode leakage. The specification now turns to exemplary systems to guide the reader.

[0026] Figure 1A An example of an imaging system 100 is shown. Specifically, the imaging system 100 can be a portable electronic device with imaging capabilities, such as a camera, cellular phone, tablet computer, webcam, camcorder, video surveillance system, or video game system. In other cases, the imaging system 100 can be an automotive imaging system. Figure 1AThe imaging system 100 shown includes a camera module 102, which can be used to convert incoming light into digital image data. The camera module 102 may include one or more lenses 104 and one or more corresponding global shutter image sensors 106. Lenses 104 may include fixed and / or adjustable lenses. During image capture operations, light from the scene can be focused onto the global shutter image sensor 106 through the lens 104. The global shutter image sensor 106 may include circuitry for converting analog pixel data into corresponding digital image data, which is then provided to the imaging controller 108. If desired, the camera module 102 may be configured with an array of lenses 104 and an array of corresponding global shutter image sensors 106.

[0027] Imaging controller 108 may include one or more integrated circuits. Imaging circuitry may include image processing circuitry, a microprocessor, and storage devices such as random access memory and non-volatile memory. Imaging controller 108 may be implemented using components separate from camera module 102 and / or components forming part of camera module 102 (e.g., circuitry forming part of global shutter image sensor 106). Imaging controller 108 may be used to process and store digital image data captured by camera module 102. Processed image data may be provided to external devices such as computers, external displays, or other devices as needed using wired and / or wireless communication paths coupled to imaging controller 108.

[0028] Figure 1B Another example of the imaging system 100 is shown. Figure 1B The imaging system 100 shown includes a car or vehicle 110. Vehicle 110 is illustrated as a passenger vehicle, but the imaging system 100 can be other types of vehicles, including commercial vehicles, on-road vehicles, and off-road vehicles. Commercial vehicles can include buses and tractor-trailer vehicles. Off-road vehicles can include tractors and crop harvesting equipment. Figure 1BIn the example, vehicle 110 includes a forward-view camera module 102 arranged to capture images of the scene in front of vehicle 110. This forward-view camera module 102 can be used for any suitable purpose, such as lane keeping assist, collision warning systems, cruise control systems, autonomous driving systems, and proximity detection. The exemplary vehicle 110 also includes a rear-view camera module 102 arranged to capture images of the scene behind vehicle 110. This rear-view camera module 102 can be used for any suitable purpose, such as collision warning systems, reverse video, autonomous driving systems, proximity detection, monitoring the position of overtaking vehicles, and reversing. Vehicle 110 also includes a side-view camera module 102 arranged to capture images of the scene beside vehicle 110. This side-view camera module 102 can be used for any suitable purpose, such as blind spot monitoring, collision warning systems, autonomous driving systems, monitoring the position of overtaking vehicles, lane change detection, and proximity detection. In the case where imaging system 100 is a vehicle, imaging controller 108 can be a controller for vehicle 110. The global shutter image sensor 106 of camera module 102 will now be discussed in more detail.

[0029] Figure 2 An example of a global shutter image sensor 106 is shown. Specifically, Figure 2 The global shutter image sensor 106 shown may include a substrate 200 of a semiconductor material, such as silicon, encapsulated within a package to produce a packaged semiconductor device or packaged semiconductor product. Bonding pads or other connection points of the substrate 200 are coupled to terminals of the global shutter image sensor 106, such as a serial communication channel 202 coupled to a first terminal 204 and a capture input 206 coupled to a second terminal 208. Additional terminals, such as ground terminals, common terminals, or power terminals, will be present, but these additional terminals are omitted to avoid excessive complexity in the drawings. Although a single example of the substrate 200 is shown, in other specific embodiments, multiple substrates may be combined to form the global shutter image sensor 106 as a multi-chip module.

[0030] Figure 2 The global shutter image sensor 106 shown includes a pixel array 210 having a plurality of pixels 212 arranged in rows and columns. A pixel array 210, as an example of a “pixel array,” may include, for example, hundreds or thousands of rows and hundreds or thousands of columns of pixels 212. Control and readout of the pixel array 210 may be implemented by an image sensor controller 214 coupled to a row controller 216 and a column controller 218. The row controller 216 may receive row addresses from the image sensor controller 214 and provide corresponding row control signals to the pixels 212, such as reset, frame shift, readout shift, row selection, and anti-glare control signals. The row control signals may be transmitted via one or more conductors, such as a row control path 220.

[0031] Column controller 218 may be coupled to pixel array 210 via one or more conductors (such as column lines 222). Column controller may sometimes be referred to as column control circuitry, readout circuitry, or column decoder. Column lines 222 may be used to read pixel signals from pixels 212 and to provide bias current and / or bias voltage to pixels 212. If desired, during pixel readout operation, row controller 216 may be used to select a pixel row in pixel array 210, and the pixel signal generated by the pixel 212 in that pixel row may be read along column lines 222. Column controller 218 may include sample-and-hold circuitry for sampling and temporarily storing the pixel signals read from pixel array 210, amplifier circuitry, analog-to-digital converter (ADC) circuitry, bias circuitry, column memory, latching circuitry for selectively enabling or disabling column circuitry, or other circuitry coupled to one or more columns of pixels 212 in pixel array 210 for operating pixels 212 and for reading pixel signals from pixels 212. The ADC circuitry in column controller 218 converts analog pixel values ​​received from pixel array 210 into corresponding digital image data. Column controller 218 can provide the digital image data to image sensor controller 214 and / or imaging controller 108 via, for example, serial communication channel 202. Figure 1A ).

[0032] Figure 3 An example of circuitry in one pixel of pixel 212 in pixel array 210 is shown. Specifically, Figure 3 Each pixel in pixel 212 shown may include a positive power supply terminal 302, a ground terminal 304, a photodetector 306 in the exemplary form of a photodiode, a corona-resistant transistor 308, a frame transfer transistor 310, a storage diode 312, a readout transfer transistor 314, a floating diffuser (FD) 316, a reset transistor 318, a source follower transistor 320, and a row select transistor 322. Each pixel in pixel 212 in pixel array 210 may include... Figure 3 The image sensor pixels shown have different configurations with fewer components, additional components, or different components. A pixel positive power supply voltage, such as the supply voltage Vdd, can be provided at the positive power supply terminal 302. A ground power supply voltage, such as the reference voltage Vss, can be provided at the ground terminal 304. In some cases, after light passes through a color filter structure (not shown), the incoming light is collected by a photodetector 306. The photodetector 306 converts this light into electrical charge. The storage diode 312 exhibits capacitance that can be used to store the charge transferred from the photodetector 306. Figure 3In this embodiment, anti-corona transistor 308 selectively connects photodetector 306 to positive power supply terminal 302. In other embodiments, anti-corona transistor 308 may selectively connect photodetector 306 to different power supply terminals (not shown). Frame transfer transistor 310 selectively connects photodetector 306 to storage diode 312. Readout transfer transistor 314 selectively connects storage diode 312 to floating diffuser 316. Reset transistor 318 selectively connects floating diffuser 316 to positive power supply terminal 302. The signal associated with the charge stored in floating diffuser 316 is buffered by source follower transistor 320. Row select transistor 322 selectively connects source follower transistor 320 to one of the column lines 222.

[0033] Figure 4 This is a timing diagram of the imaging performed by the global shutter image sensor 106. For simplicity, the timing diagram is shown in... Figure 4 The diagram is depicted in the figure, and a specific implementation of a pixel array 210 comprising six rows is described below. However, the timing diagram can be adjusted to depict the operation of other specific implementations comprising pixel arrays 210 with more or fewer than six rows. During the reset time, the anti-dizziness control signal AB is asserted. Figure 3 As shown, an anti-corona control signal AB is applied to the gate terminal of the anti-corona transistor 308. When the anti-corona control signal AB is asserted, the anti-corona transistor 308 conducts to reset the photodetector 306 to a voltage equal to or close to the supply voltage Vdd. The anti-corona control signal AB is then deactivated, causing the anti-corona transistor 308 to turn off. During the integration time, the photodetector 306 generates charge in response to incoming light. During the frame transfer time, the charge collected in the photodetector 306 is transferred to the storage diode 312. During the readout time, the readout transfer control signal RTX is asserted. Figure 3 As shown, the read transfer control signal RTX is applied to the gate terminal of the read transfer transistor 314. When the read transfer control signal RTX is asserted, the read transfer transistor 314 conducts, and the charge stored in the storage diode 312 is transferred to the floating diffuser 316. Then, the read transfer control signal RTX is deactivated, turning off the read transfer transistor 314. Next, the line selection control signal RS is asserted during the readout time. Figure 3 As shown, a row selection control signal RS is applied to the gate terminal of row selection transistor 322. When the row selection control signal RS is asserted, row selection transistor 322 conducts and outputs an output signal Vout representing the magnitude of the charge stored in the floating diffuser 316. The output signal Vout is an example of a "pixel signal". When the row selection control signal RS is asserted, one of the column lines 222 can be used to route the output signal Vout to the readout circuit, such as... Figure 2 The column controller 218 in the middle.

[0034] like Figure 4 As shown, each pixel in pixel 212 of pixel array 210 simultaneously captures the image during the integration time. Also as... Figure 4 As shown, frame transfer occurs simultaneously in each pixel of pixel 212 in pixel array 210. However, because pixel array 210 is read out row by row, some pixels in pixel array 210 are read out later than others. Therefore, while a pixel is waiting to be read out, the storage diode 312 in that pixel can collect unwanted charge from light leakage. For example, light from a moving scene can affect the global shutter image sensor 106 at a steep angle of incidence and can leak into the storage diode 312. Due to light leakage in the storage diode 312 (sometimes referred to as parasitic leakage), ghosting or motion artifacts can be observed in the resulting image.

[0035] The effects of parasitic leakage can be addressed by determining the amount of parasitic leakage in pixel array 210. To this end, some pixels in pixel array 212 of pixel array 210 can be configured to determine the amount of parasitic leakage in storage diode 312. Figure 5 A top view shows an example of a pixel group 500 that includes pixels in pixel array 210. Figure 5 The pixel group 500 shown includes a correction pixel 502 and a plurality of image pixels 504A to 504H positioned around the correction pixel 502. Figure 5 Each point shown in the plurality of image pixels 504A to 504H represents a connection to the gate terminal of the frame transfer transistor 310 in each of the plurality of image pixels 504A to 504H. Therefore, as Figure 5 As shown, the frame transfer transistor 310 in each of the plurality of image pixels 504A to 504H is coupled to receive the first frame transfer control signal FTXA. Furthermore, Figure 5 The dots shown in the correction pixel 502 represent connections to the gate terminals of the frame transfer transistor 310 in the correction pixel 502. Therefore, as... Figure 5 As shown, the frame transfer transistor 310 in the correction pixel 502 is coupled to receive the second frame transfer control signal FTXB.

[0036] Figure 6 This is a signal timing diagram illustrating an example of the frame transition time of the global shutter image sensor 106. In some specific implementations, such as... Figure 6 As shown, the readout transfer control signal RTX and the reset control signal RST are asserted at the start of the frame transfer time. As described above, when the readout transfer control signal RTX is asserted, the readout transfer transistor 314 conducts. Figure 3As shown, the reset control signal RST is applied to the gate terminal of the reset transistor 318. Therefore, when the reset control signal RST is asserted, the reset transistor 318 conducts. Simultaneous conduction of the readout transfer transistor 314 and the reset transistor 318 resets the storage diode 312 and the floating diffuser 316 to a voltage equal to or close to the supply voltage Vdd. Return to Figure 6 Then, the readout transfer control signal RTX and the reset control signal RST are deactivated, thereby turning off the readout transfer transistor 314 and the reset transistor 318, respectively. In some specific implementations, the readout transfer control signal RTX and the reset control signal RST are asserted not during the frame transfer time, but during the readout time after the pixel signal has been read out.

[0037] Next, the first frame transfer control signal FTXA is asserted. As described above, the first frame transfer control signal FTXA is applied to the gate terminal of the frame transfer transistor 310 in each of the plurality of image pixels 504A to 504H. When the first frame transfer control signal FTXA is asserted, the frame transfer transistor 310 in each of the plurality of image pixels 504A to 504H becomes conductive to transfer the charge generated by the photodetector 306 in response to incoming light to the storage diode 312. Then the first frame transfer control signal FTXA is deactivated, causing the frame transfer transistor 310 in each of the plurality of image pixels 504A to 504H to turn off. Figure 6 As shown, the second frame transfer control signal FTXB is not asserted during the frame transfer time. Therefore, the charge generated by the photodetector 306 in response to incoming light is not transferred to the storage diode 312 in the correction pixel 502.

[0038] Next, in some specific implementations, such as Figure 6 As shown, the anti-halation control signal AB is asserted to set the photodetector 306 to an anti-halation state to reduce halos. Figure 3 As shown, an anti-corona control signal AB is applied to the gate terminal of the anti-corona transistor 308. When the anti-corona control signal AB is asserted, the anti-corona transistor 308 conducts to set the photodetector 306 to a voltage equal to or close to the supply voltage Vdd. Then the anti-corona control signal AB is deactivated, causing the anti-corona transistor 308 to turn off.

[0039] As described above, readouts from pixel array 210 are performed line by line. Therefore, readouts from the plurality of image pixels 504A to 504H may include charges generated in photodetector 306 in response to incident light and charges generated by parasitic leakage in storage diode 312. However, as described above, the charges generated by photodetector 306 in response to incoming light are not transferred to storage diode 312 in correction pixel 502. Therefore, readouts from correction pixel 502 only represent the amount of parasitic leakage occurring in storage diode 312. As described in more detail below, readouts from correction pixel 502 can be used to adjust readouts from the plurality of image pixels 504A to 504H to address parasitic leakage in storage diode 312.

[0040] Figure 7 This is a flowchart illustrating an example of a global shutter imaging method 700 with parasitic leakage correction, implemented according to some specific methods. For simplicity, method 700 is described in... Figure 7 The process is described in detail and hereinafter referred to as a series of operations. However, these operations may be performed in various orders and / or simultaneously, and / or together with other actions not presented and described herein. Furthermore, for ease of interpretation, method 700... Figure 7 The description, and about Figure 5 The pixel group 500 shown is described. However, the operation of method 700 can be performed simultaneously or concurrently in multiple instances of the pixel group across pixel array 210. At block 702, pixel array 210 is reset. For example, an anti-halo control signal AB can be asserted to set photodetector 306 to an anti-halo state. As described above, when the anti-halo control signal AB is asserted, the anti-halo transistor 308 in each of the correction pixel 502 and the plurality of image pixels 504A to 504H is conductive to set the photodetector 306 in each of the correction pixel 502 and the plurality of image pixels 504A to 504H to a voltage equal to or close to the supply voltage Vdd.

[0041] At block 704, the pixel array 210 is arranged to be sensitive to incident light during the integration time, resulting in the generation of charge at each pixel of the pixel array 210. During the integration time, photodetectors 306 in the correction pixel 502 and each of the plurality of image pixels 504A to 504H generate charge in response to incident light. In some specific embodiments, the pixel array 210 can be arranged to be sensitive to incident light by opening the mechanical shutter of the imaging system 100 to allow the pixel array 210 to receive incident light. Alternatively or additionally, the pixel array 210 can be arranged to be sensitive to incident light by turning off the anti-halo transistor 308 in the correction pixel 502 and each of the plurality of image pixels 504A to 504H.

[0042] At block 706, the first frame transfer control signal FTXA is asserted after the integration time to cause the generated charge to be stored in multiple image pixels. As described above, when the first frame transfer control signal FTXA is asserted, the frame transfer transistor 310 in each of the multiple image pixels 504A to 504H becomes conductive to transfer the charge generated by the photodetector 306 in response to incoming light to the storage diode 312.

[0043] At box 708, after pixel array 210 is reset, the noise signal is read from correction pixel 502 while the second frame transfer control signal FTXB remains unasserted. Because the second frame transfer control signal FTXB is not asserted after pixel array 210 is reset, the charge generated by photodetector 306 in correction pixel 502 is not transferred to storage diode 312 in correction pixel 502. Therefore, the noise signal read from correction pixel 502 only represents the amount of parasitic leakage that occurred in storage diode 312 of correction pixel 502 while correction pixel 502 was waiting to be read.

[0044] At block 710, an image signal is read from each of the plurality of image pixels 504A to 504H. Each image signal represents the amount of charge generated by photodetector 306 in one of the plurality of image pixels 504A to 504H during the integration time, as well as the amount of parasitic leakage in storage diode 312. For example, the image signal read from image pixel 504F represents the amount of charge generated by photodetector 306 in image pixel 504F during the integration time, as well as the amount of parasitic leakage in storage diode 312 of image pixel 504F while image pixel 504F is waiting to be read. In some embodiments, blocks 708 and 710 are performed simultaneously.

[0045] At box 712, the pixel value of each of the plurality of image pixels 504A to 504H is determined based on the image signal and the noise signal. Because the plurality of image pixels 504A to 504H are located around the correction pixel 502, the amount of parasitic leakage occurring in the correction pixel 502 is equal to or substantially close to the amount of parasitic leakage occurring in each of the plurality of image pixels 504A to 504H. Therefore, the pixel value of the plurality of image pixels 504A to 504H can be determined by subtracting the noise signal read from the correction pixel 502 from the image signal read from the plurality of image pixels 504A to 504H. Each of the determined pixel values ​​substantially represents only the amount of charge generated by the photodetector 306 in one of the plurality of image pixels 504A to 504H during the integration time. For example, the pixel value of image pixel 504A can be determined using Equation 1 shown below:

[0046] P V (1) = P S (1)-P S (c) Equation 1

[0047] in:

[0048] P V (1) = the pixel value of image pixel 504A,

[0049] P S (1) = The image signal read from image pixel 504A, and

[0050] P C (c) = Noise signal read from correction pixel 502.

[0051] The pixel value of the correction pixel 502 can be determined based on the pixel signals of all eight image pixels in the plurality of image pixels 504A to 504H. In some specific embodiments, the pixel value of the correction pixel 502 can be determined as the average or median of the pixel values ​​of all eight image pixels in the plurality of image pixels 504A to 504H. For example, the pixel value of the correction pixel 502 can be determined as the average of the pixel values ​​of all eight image pixels in the plurality of image pixels 504A to 504H using Equation 2 shown below:

[0052]

[0053] in:

[0054] P V (c) = Correction pixel value 502

[0055] P V (1) = the pixel value of image pixel 504A,

[0056] P V (2) = the pixel value of image pixel 504B,

[0057] P V (3) = the pixel value of image pixel 504C,

[0058] P V (4) = the pixel value of image pixel 504D,

[0059] P V (5) = the pixel value of image pixel 504E,

[0060] P V (6) = the pixel value of image pixel 504F,

[0061] P V (7) = the pixel value of image pixel 504G, and

[0062] P V (8) = The pixel value of image pixel 504H.

[0063] The pixel value of the correction pixel 502 can also be determined based on the pixel signals of a subset of the multiple image pixels 504A to 504H in order to preserve edges in the image. For example, in some scenarios, determining the pixel value of the correction pixel 502 by averaging the pixel values ​​of each of the multiple image pixels 504A to 504H may result in blurred lines in the image. Therefore, the image sensor controller 214 (or imaging controller 108) can detect edges in the image based on the pixel values ​​of each of the multiple image pixels 504A to 504H. Furthermore, the image sensor controller 214 (or imaging controller 108) can selectively use the pixel values ​​of two image pixels from the multiple image pixels 504A to 504H to preserve detected edges. In some specific implementations, in order to preserve horizontal lines, the pixel value of the correction pixel 502 can be determined based on the pixel values ​​of pixels located immediately adjacent to the correction pixel 502 in the same row. For example, the pixel value of correction pixel 502 can be determined as the median of the pixel values ​​of image pixels 504D and 504E using Equation 3 shown below:

[0064] P V (c)= (P V (4)+P V (5)) / 2 Equation 3

[0065] in:

[0066] P V (c) = Correction pixel value 502

[0067] P V (4) = the pixel value of image pixel 504D, and

[0068] P V (5) = The pixel value of image pixel 504E.

[0069] Alternatively or additionally, in order to preserve vertical lines, the pixel value of correction pixel 502 may be determined based on the pixel values ​​of the two pixels immediately adjacent to correction pixel 502 in the rows above and below correction pixel 502. For example, the pixel value of correction pixel 502 may be determined as the median of the pixel values ​​of image pixels 504B and 504G using Equation 4 shown below:

[0070] P V (c)= (P V (2)+P V (7)) / 2 Equation 4

[0071] in:

[0072] P V (c) = Correction pixel value 502

[0073] P V (2) = the pixel value of image pixel 504B, and

[0074] P V (7) = The pixel value of image pixel 504G.

[0075] Alternatively, or further, to preserve the diagonal, the pixel value of the correction pixel 502 can be determined using the pixel values ​​of the two pixels diagonally adjacent to the correction pixel 502. For example, the pixel value of the correction pixel 502 can be determined as the median of the pixel values ​​of image pixels 504A and 504H using Equation 5 shown below:

[0076] P V (c)= (P V (1)+P V (8)) / 2 Equation 5

[0077] in:

[0078] P V (c) = Correction pixel value 502

[0079] P V (1) = the pixel value of image pixel 504A, and

[0080] P V (8) = The pixel value of image pixel 504H.

[0081] As another example, the pixel value of correction pixel 502 can be determined as the median of the pixel values ​​of image pixels 504C and 504F using Equation 6 shown below:

[0082] P V (c)= (P V (3)+P V (6)) / 2 Equation 6

[0083] in:

[0084] P V (c) = Correction pixel value 502

[0085] P V (1) = the pixel value of image pixel 504C, and

[0086] P V (6) = The pixel value of image pixel 504F.

[0087] In addition to the methods described above for preserving horizontal, vertical, and diagonal lines, any edge detection function can be used to determine the pixel value of the correction pixel 502.

[0088] Figure 8 A top view of an example pixel array 210 divided into 3×3 pixel groups is shown. For simplicity, pixel array 210 is... Figure 8 The image is depicted as comprising six rows. However, pixel array 210 may include more than six rows or fewer than six rows. Similar to... Figure 5 , Figure 8 Each pixel group in the image includes a correction pixel 802 and multiple image pixels 804 positioned around the correction pixel 804. Furthermore, Figure 8 Each point in each image pixel 804 represents a connection to the gate terminal of the frame transfer transistor 310 in each image pixel 804. Furthermore, Figure 8 Each point shown in each correction pixel of correction pixel 802 represents a connection to the gate terminal of the frame transfer transistor 310 in each correction pixel of correction pixel 802. For example... Figure 8 As shown, two different row drivers are used to control the frame transfer transistor 310 in each row of pixels. In some specific implementations, the row driver for the correction pixel 802 in the row can be selectively configured to operate similarly to the row driver for the image pixel 804. For example, the second frame transfer control signal FTXB can be temporarily switched to match the first frame transfer control signal FTXA. In this way, the correction pixel 802 can operate as the image pixel 804 when parasitic leakage correction is not required or desired. Furthermore, no additional circuitry is required in the pixel array 210 to operate the correction pixel 802 and the image pixel 804.

[0089] Many electrical connections in the accompanying drawings are shown as direct couplings without intermediate devices, but this is not explicitly stated in the description above. However, for electrical connections without intermediate devices shown in the drawings, this paragraph should serve as a preliminary basis for the claims to refer to any electrical connection as a “direct coupling.”

[0090] The foregoing discussion is intended to illustrate the principles and various specific embodiments of the invention. Once the foregoing disclosure is fully understood, many variations and modifications will become apparent to those skilled in the art. The following claims are intended to encompass all such variations and modifications.

Claims

1. A global shutter image sensor, characterized by, The global shutter image sensor comprises: a pixel array comprising a correction pixel and a plurality of image pixels positioned around the correction pixel, wherein each of the correction pixel and the plurality of image pixels comprises: a photodetector configured to accumulate charge in response to incident light, a storage diode, and a frame transfer transistor coupled between the photodetector and the storage diode; a first row driver coupled to the frame transfer transistor in each of the plurality of image pixels; and a second row driver coupled to the frame transfer transistor in the correction pixel.

2. The global shutter image sensor of claim 1, wherein, The global shutter image sensor further comprises a controller configured to: reset the pixel array, arrange the pixel array to be sensitive to the incident light for an integration time, after the integration time, cause the first row driver to output a first frame transfer control signal to a gate terminal of the frame transfer transistor in each of the plurality of image pixels, after the pixel array is reset, read out a noise signal from the correction pixel while preventing the second row driver from outputting a second frame transfer control signal to the gate terminal of the frame transfer transistor in the correction pixel, read out an image signal from each of the plurality of image pixels, and determine a pixel value for each of the plurality of image pixels based on the image signal and the noise signal.

3. The global shutter image sensor of claim 2, wherein each of the correction pixel and the plurality of image pixels further comprises a blooming resistor transistor coupled between the photodetector and a positive supply terminal, wherein the blooming resistor transistor conducts when a blooming control signal is asserted, and wherein to reset the pixel array, the controller is further configured to assert the blooming control signal.

4. The global shutter image sensor of claim 2, wherein each of the correction pixel and the plurality of image pixels further comprises: a floating diffusion, a readout transfer transistor coupled between the storage diode and the floating diffusion, wherein the readout transfer transistor conducts when a readout transfer control signal is asserted, and a reset transistor coupled between the floating diffusion and a positive supply terminal, wherein the reset transistor conducts when a reset control signal is asserted, wherein the controller is further configured to assert the readout transfer control signal and the reset control signal after the integration time and before generating the first frame transfer control signal.

5. The global shutter image sensor of claim 2, wherein the controller is further configured to determine an image signal for the correction pixel based on the image signal for each of the plurality of image pixels.

6. The global shutter image sensor of claim 2, wherein the controller is further configured to: detecting edges based on the pixel values of each of the plurality of image pixels, selecting two of the plurality of image pixels based on the edges, and determining a pixel value of the correction pixel based on the pixel values of the two of the plurality of image pixels.

7. The global shutter image sensor of claim 6, wherein the two of the plurality of image pixels are positioned in at least one selected from the group consisting of: horizontally adjacent to the correction pixel, vertically adjacent to the correction pixel, and diagonally adjacent to the correction pixel.

8. An imaging system characterized by, The imaging system comprises: a lens system; a global shutter image sensor in operable relation with the lens system, wherein the global shutter image sensor comprises a pixel array including a correction pixel and a plurality of image pixels; and an imaging controller configured to: reset the pixel array, arrange the pixel array to be sensitive to incident light for an integration time resulting in generation of charge at each pixel of the pixel array, generate a first frame transfer control signal after the integration time to cause the generated charge to be stored in the plurality of image pixels, after the pixel array is reset, read out a noise signal from the correction pixel while a second frame transfer control signal remains unasserted, wherein assertion of the second frame transfer control signal causes the generated charge to be stored in the correction pixel, read out an image signal from each of the plurality of image pixels, and determine a pixel value of each of the plurality of image pixels based on the image signal and the noise signal.

9. The imaging system of claim 8, wherein each of the correction pixel and the plurality of image pixels comprises an anti-blooming transistor that conducts when an anti-blooming control signal is asserted, and wherein to reset the pixel array, the imaging controller is further configured to assert the anti-blooming control signal.

10. The imaging system of claim 9, wherein the imaging controller is further configured to assert the anti-blooming control signal after generating the first frame transfer control signal and before reading out the image signal from each of the plurality of image pixels.

11. The imaging system of claim 8, wherein each of the correction pixel and the plurality of image pixels further comprises: a floating diffusion, a readout transfer transistor coupled between the storage diode and the floating diffusion, wherein the readout transfer transistor conducts when a readout transfer control signal is asserted, and a reset transistor coupled between the floating diffusion and a positive power supply terminal, wherein the reset transistor conducts when a reset control signal is asserted, wherein the imaging controller is further configured to assert the readout transfer control signal and the reset control signal after the integration time and before generating the first frame transfer control signal.

12. The imaging system of claim 8, wherein the imaging controller is further configured to determine an image signal for the correction pixel based on the image signal for each of the plurality of image pixels.

13. The imaging system of claim 8, wherein the imaging controller is further configured to: detect an edge based on the pixel values for each of the plurality of image pixels, select two of the plurality of image pixels based on the edge, and determine a pixel value for the correction pixel based on the pixel values for the two of the plurality of image pixels.

14. The imaging system of claim 13, wherein the two of the plurality of image pixels are positioned in at least one selected from the group consisting of: horizontally adjacent to the correction pixel, vertically adjacent to the correction pixel, and diagonally adjacent to the correction pixel.

15. The imaging system of claim 8, wherein the imaging system is included in at least one selected from the group consisting of: an automobile, a vehicle, a camera, a cellular phone, a tablet, a webcam, a video camera, a video surveillance system, and a video game system.

16. A method for operating a global shutter image sensor comprising a correction pixel in a pixel array and a plurality of image pixels positioned around the correction pixel, characterized in that, the method comprising: resetting the pixel array; arranging the pixel array to be sensitive to incident light for an integration time, resulting in generation of charge at each pixel of the pixel array; asserting a first frame transfer control signal after the integration time to cause the generated charge to be stored in the plurality of image pixels; after the pixel array is reset, reading out a noise signal from the correction pixel while a second frame transfer control signal remains unasserted, wherein assertion of the second frame transfer control signal causes the generated charge to be stored in the correction pixel; reading out an image signal from each of the plurality of image pixels; and determining a pixel value for each of the plurality of image pixels based on the image signal and the noise signal.

17. The method of claim 16, wherein resetting the pixel array further comprises asserting an anti-blooming control signal to reset each photodetector in the pixel array.

18. The method of claim 17, wherein, the method further comprising: asserting the anti-blooming control signal after the first frame transfer control signal is generated and before the image signal is read out from each of the plurality of image pixels.

19. The method of claim 16, wherein, the method further comprising: determining an image signal for the correction pixel based on the image signal for each of the plurality of image pixels.

20. The method of claim 16, wherein, the method further comprising: detecting an edge based on the pixel values for each of the plurality of image pixels; selecting two of the plurality of image pixels based on the edge; and determining a pixel value for the correction pixel based on the pixel values for the two of the plurality of image pixels.

Images