Device including metal wire and method of manufacturing the device

Abstract

The invention relates to a device including a metal line and a method of manufacturing the device. A device includes a first layer, a trench extending from a first face and running partially through the first layer and filled with a conductive etch stop layer, a conductive barrier layer covering the conductive etch stop layer, a track of a first metallic material in the trench in contact with the barrier layer, an opening in the first layer extending from a second face of the dielectric layer or semiconductor layer opposite the first face as long as traveling through the first layer to the etch stop layer, and a first layer of a second metal material covering a wall of the opening.

Description

[0001] Cross-references to related applications

[0002] This application claims priority to French patent application number FR2406910, filed on June 27, 2024, entitled “Dispositif comprenant une piste métallique et procédéde fabrication du dispositif”, which is incorporated herein by reference to the fullest extent permitted by law. Technical Field

[0003] This disclosure generally relates to electronic devices and methods of manufacturing the same. Background Technology

[0004] In microelectronics, devices may include conductive tracks connected to bonding pads. Certain metallic materials (e.g., copper) are susceptible to electromigration when subjected to large currents and to corrosion when exposed to humid environments. To mitigate these risks, it is known to place diffusion barrier layers at the points of contact with these metallic materials to limit electromigration.

[0005] However, existing solutions for forming such devices risk that the bonding pads cannot adequately prevent electromigration and corrosion.

[0006] Improvements are needed in devices and their manufacturing methods that include one or more metal tracks connected to connection pads. Summary of the Invention

[0007] One embodiment provides a device comprising, on a substrate: a dielectric layer or a semiconductor layer; a trench in the dielectric layer or semiconductor layer extending from a first surface of the dielectric layer or semiconductor layer, the trench partially extending through the dielectric layer or semiconductor layer and being filled with: a conductive etch stop layer covering the walls of the trench and in contact with the dielectric layer or semiconductor layer; a conductive barrier layer covering the conductive etch stop layer; and a track of a first metallic material in the trench in contact with the barrier layer. The device also includes an opening in the dielectric layer or semiconductor layer extending from a second surface of the dielectric layer or semiconductor layer opposite to the first surface through the dielectric layer or semiconductor layer to the etch stop layer; and a first layer of a second metallic material covering the walls of the opening.

[0008] According to one embodiment, the first layer of the second metal material forms a bonding pad.

[0009] According to one embodiment, the device includes a second layer of a third metallic material covering the first layer, such as gold, titanium, or titanium-tungsten.

[0010] According to one embodiment, the track is a safety track configured to break in the event of tearing or breaking of the optical diffuser.

[0011] Another embodiment provides a manufacturing method comprising: etching a trench in a dielectric or semiconductor layer on a substrate, the trench extending from a first side of the dielectric or semiconductor layer and partially traveling through the dielectric or semiconductor layer; depositing a conductive etch stop layer covering the walls of the trench and contacting the dielectric or semiconductor layer; depositing a conductive barrier layer covering the conductive etch stop layer; depositing a track made of a first metallic material in contact with the barrier layer into the trench; etching an opening in the dielectric or semiconductor layer extending from a second side of the dielectric or semiconductor layer opposite to the first side and traveling through the dielectric or semiconductor layer until a portion of the conductive etch stop layer is exposed; and depositing a first layer of a second metallic material covering the walls of the opening.

[0012] According to one embodiment, the method further includes a step of depositing particles of a first metallic material on the surface of a barrier layer prior to the orbit deposition step, the particles serving as seed crystals for orbit deposition.

[0013] According to one embodiment, the orbital deposition is performed by electroplating.

[0014] According to one embodiment, the method further includes a thinning step prior to etching the opening to expose a dielectric or semiconductor layer outside the trench.

[0015] According to one embodiment, the opening is formed by plasma etching.

[0016] According to one embodiment, the method further includes: thinning the substrate to expose a second side of the dielectric or semiconductor layer before etching the opening.

[0017] According to one embodiment, the conductive etch stop layer is made of titanium nitride and has, for example, a maximum thickness in the range of 30 nm to 100 nm.

[0018] According to one embodiment, the barrier layer is made of tantalum nitride or tantalum.

[0019] According to one embodiment, the first metallic material is copper.

[0020] According to one embodiment, the second metallic material is gold, titanium, or tungsten-titanium.

[0021] According to one embodiment, the use of the above-described device includes applying current to a track and detecting an open circuit that prevents the conduction of the current. Attached Figure Description

[0022] The foregoing features and advantages, as well as other features and advantages, will be described in detail in the remainder of the disclosure, which is illustrative rather than limiting and refers to the accompanying drawings, in which:

[0023] Figure 1A and Figure 1B This is a cross-sectional view of a device including a metal track according to an embodiment of the present disclosure;

[0024] Figure 2A , Figure 2B , Figure 2C , Figure 2D , Figure 2E , Figure 2F and Figure 2G It is a perspective view and a cross-sectional view, and Figure 2H , Figure 2I and Figure 2J It is for manufacturing according to embodiments of the present disclosure Figure 1A and Figure 1B A cross-sectional view of the sequential steps of the method for the device;

[0025] Figure 3 This is a partial cross-sectional view of another device including a metal track according to an embodiment of the present disclosure, obtained by transmission electron microscopy and energy-dispersive X-ray spectroscopy.

[0026] Figure 4A It shows Figure 3 The device includes titanium atoms; and

[0027] Figure 4B It shows Figure 3 The device contains tantalum atoms. Detailed Implementation

[0028] In the various figures, the same features are indicated by the same reference numerals. In particular, common structural and / or functional features in various embodiments may have the same reference numerals, and may be provided with the same structure, dimensions, and material properties.

[0029] For clarity, only steps and elements useful for understanding the described embodiments are shown and described in detail. In particular, those skilled in the art are familiar with manufacturing methods involved in the production of electronic devices, such as photolithography, various types of etching, and deposition processes.

[0030] Unless otherwise stated, when referring to two elements connected together, it means that there is no direct connection between them except for the conductor; when referring to two elements coupled together, it means that the two elements can be connected or coupled via one or more other elements.

[0031] In the following description, when referring to absolute position qualifiers (such as "front", "back", "top", "bottom", "left", "right", etc.), or relative position qualifiers (such as "top", "bottom", "up", "down", etc.), or orientation qualifiers (such as "horizontal" and "vertical", etc.), reference should be made to the orientation of the accompanying drawings unless otherwise stated.

[0032] Unless otherwise stated, “approximately,” “roughly,” “basically,” and “about” mean plus or minus 10%, preferably plus or minus 5%.

[0033] Figure 1A and Figure 1B This is a cross-sectional view of a device 100 including a metal track 110 according to an embodiment of the present disclosure. Figure 1B Corresponding to Figure 1A A cross-sectional view of device 100 along axis A1.

[0034] Device 100 includes, for example, a substrate 120. Substrate 120 is, for example, a silicon or glass wafer.

[0035] Metal tracks 110 are formed on substrate 120, for example, in direct contact with its surface. Metal tracks 110 are conductive tracks configured to conduct current. Metal tracks 110 are made of a first metallic material (e.g., copper, aluminum, etc.). For example, the thickness of metal tracks 110 is in the range of 100 nm to 250 nm, for example, in the range of 160 nm to 200 nm.

[0036] A diffusion barrier layer 130 covers the metal orbital 110. For example, layer 130 covers the top and sides of the metal orbital 110. Layer 130 is made of a first conductive material, such as tantalum nitride and / or tantalum, aluminum, etc. In other embodiments, layer 130 is made of another conductive material capable of forming a diffusion barrier layer. For example, layer 130 is configured to protect the metal orbital 110. For example, layer 130 is configured to prevent or reduce the electromigration of atoms from the metal orbital 110 to the surrounding layer. Layer 130 is conductive and electrically connected to the metal orbital 110. For example, the thickness of layer 130 is in the range of 5 nm to 25 nm, for example, in the range of 10 nm to 15 nm.

[0037] An etch stop layer 140 covers, for example, the top and sides of layer 130. Layer 140 is made of a second conductive material (e.g., titanium nitride, tantalum nitride, etc.). Layer 140 is configured, for example, to protect layer 130. During an etching step configured to expose etch stop layer 140, layer 140 is configured, for example, such that layer 130 is not etched and damaged. For example, during the etching step, layer 140 is at least partially sacrificed, while layer 130 remains intact, for example. For example, layer 140 includes portions that remain intact during the etching step and retain an initial thickness corresponding to the maximum thickness of layer 140 after the etching step. For example, the maximum thickness of layer 140 is in the range of 30 nm to 100 nm, for example, in the range of 40 nm to 60 nm. According to one embodiment, layer 140 has a maximum thickness, for example, greater than 2% of the total thickness of all layers to be etched, and has a maximum thickness, for example, in the range of 2% to 4% of the total thickness of all layers to be etched. Layer 140 is conductive and electrically connected to layer 130. Titanium nitride has high resistivity and is not currently used to form etch stop layers. However, it is a material resistant to etching processes, such as plasma etching, and the choice of a layer thickness of 140 allows it to overcome its high resistivity.

[0038] A dielectric, insulating, or semiconductor layer 150 is formed on a substrate 120. Metal tracks 110 and layers 130 and 140 are located, for example, in trenches or recesses O1 of layer 150, such that layer 150 contacts layer 140. For example, the thickness E1 of layer 150 is greater than the depth P1 of trench O1. Trench O1 extends from a first face F1 of layer 150, partially penetrating layer 150. Layer 150 includes an opening O2 extending from a second face F2 of layer 150 opposite face F1. Opening O2 travels partially through the thickness of layer 150 and extends to layer 140. Layer 150 is, for example, silicon, silicon oxide, tetraethyl orthosilicate, etc. According to one embodiment, layer 150 includes an assembly of dielectric and / or semiconductor layers. For example, the thickness of layer 150 is in the range of 1 μm to 2.5 μm, for example, in the range of 1.5 μm to 2 μm.

[0039] A first metallized or conductive layer 170, made of a second metallic material, contacts layers 150 and 140. Layer 170 is formed on the second surface F2 of layer 150 and covers the side surface of layer 150 in the opening O2. Layer 170 covers a portion of layer 140 exposed through the opening O2. According to one embodiment, layer 140 is not continuous: for example, it is partially damaged during the formation of the opening O2. Layer 170 is made of, for example, gold, titanium, titanium-tungsten, titanium nitride, etc. Layer 170 is electrically connected to layers 140, layer 130, and metal track 110. Layer 170 is located, for example, on the surface of device 100 and is in contact with the external environment.

[0040] Layer 170 is, for example, a connection pad 180 of device 100, which is configured, for example, to connect device 100 to an external electronic circuit not shown.

[0041] In a stack including an etch stop layer 140 and a diffusion barrier layer 130, the presence of layer 140 has the advantage of protecting the diffusion barrier layer 130 during the etching stage, preventing atomic electromigration of the metal orbitals 110 to the first metallization layer 170, and preventing corrosion of the metal orbitals 110.

[0042] Figures 2A to 2G It is a perspective view and a cross-sectional view, and Figures 2H to 2J It is for manufacturing according to embodiments of the present disclosure Figure 1A and Figure 1B A cross-sectional view of the continuous steps of the method for the device 100.

[0043] Figures 2A to 2J Some elements in Figure 1A and Figure 1B The elements in the figures are the same, and these elements are represented by the same reference numerals, and will not be described in detail again.

[0044] Figure 2A An example of device 200 is shown, which is used for manufacturing Figure 1A and Figure 1B The method of device 100 provides a starting point.

[0045] Figure 2A The device 200 includes a temporary substrate 210. Figure 1A and Figure 1B The dielectric or semiconductor layer 150. In Figure 2A In the example, layer 150 includes a stack of dielectric and / or semiconductor layers and includes an optical diffuser, which includes, for example, a polycrystalline silicon diffraction structure 220.

[0046] The layer stacking of layer 150 is obtained, for example, according to manufacturing steps known to those skilled in the art, and will not be described in detail thereafter.

[0047] For example, an optional first photolithography step is performed to generate a first mask 230 on the first surface F1 of layer 150, which is used to form a first opening corresponding to trench O1. The first mask 230 is, for example, a photoresist. For example, trench O1 represents a... Figure 1A and Figure 1B The pattern corresponds to the trajectory of the metal track 110. The width L1 of the groove O1 is, for example, greater than the width of the metal track 110.

[0048] For example, a first etching step is performed after the photolithography step to etch layer 150 at the location of trench O1.

[0049] After the first etching step, the first mask 230 is removed, for example, by grinding and polishing.

[0050] Figure 2B This shows the step after depositing the etch stop layer 140. Figure 2A Device 200. Layer 140 at least partially covers the surface of layer 150, and particularly covers the walls of trench O1.

[0051] Deposition steps can be performed, for example, by physical vapor deposition or chemical vapor deposition.

[0052] Layer 140 is made of, for example, titanium nitride or tantalum nitride. An advantage of using one of these materials is that they have been used in other microelectronic applications, making the deposition process easy to implement. The deposition process described in this disclosure, the interaction of these materials with other materials of device 100, and the risk of contamination are known and controlled by those skilled in the art. Furthermore, titanium nitride and tantalum nitride are capable of withstanding plasma etching processes. In other embodiments, layer 140 is made of another material capable of forming an etch stop layer, particularly for plasma etching.

[0053] Figure 2C This shows the step after depositing the diffusion barrier layer 130. Figure 2B The device. Layer 130 at least partially covers the surface of layer 140, and particularly covers the walls of layer 140 in trench O1.

[0054] Deposition steps can be performed, for example, by physical vapor deposition or chemical vapor deposition.

[0055] Figure 2D This shows the process after the deposition of the metal layer 110′. Figure 2C The device. According to one embodiment, prior to the step of depositing the metal layer 110′, particles of a first metal material are deposited, for example, on the surface of layer 140, and serve as seed crystals for the electrolytic deposition process of layer 110′. According to another embodiment, the metal layer 110′ is deposited, for example, by chemical vapor deposition.

[0056] The metal layer 110′ at least partially covers the surface of the layer 130 and specifically fills the trench O1.

[0057] Figure 2E It shows what happens after the thinning step. Figure 2D The device. For example, the device is thinned so that the first surface F1 of layer 150 is exposed outside the trench O1. For example, thinning is performed by grinding and polishing.

[0058] Following step 2E, the device includes a metal track 110. The metal track 110 corresponds to a thinned metal layer 110′ and is in contact with a layer stack including layers 130 and 140 on its underside and sides.

[0059] Figure 2F This illustrates the process following one or more optional steps in deposition layer 240. Figure 2E The device. Layer 240 covers the surface of metal track 110 and is, for example, a dielectric, conductive, and / or semiconductor layer. For example, metal track 110 is in contact with a dielectric or semiconductor layer of layer stack 240.

[0060] According to one embodiment, Figure 1A The substrate 120 of the device 100 is bonded to the surface of the layer 240.

[0061] According to another embodiment, without layer 240, substrate 120 is bonded to the surface of the first side F1 of layer 150 and covers the surface of layer 140.

[0062] Figure 2G It shows Figure 2F The device has been inverted to expose the temporary substrate 210.

[0063] Figure 2H This shows the process after thinning and photolithography steps. Figure 2G The device is thinned, for example, by chemical etching and / or polishing, to remove the temporary substrate 210. Furthermore, a second mask 245 is deposited on the surface of the second side F2 of layer 150. The second mask 245 is, for example, a photoresist. The second mask includes openings aligned with the locations of openings O2 to be formed in layer 150.

[0064] Figure 2I This is shown after an etching step (e.g., plasma etching). Figure 2H The device. The etching process is configured to form an opening O2 and at least partially expose layer 140.

[0065] Opening O2 extends from the second face F2 and travels through layer 150 to expose layer 140.

[0066] According to an embodiment, layer 140 is partially etched. During this etching step, layer 140 protects layer 130, particularly at corner 250.

[0067] The width L2 of the opening O2 is, for example, less than or equal to the width L1 of the groove O1.

[0068] For example, at the end of the etching step, the second mask 245 is removed by, for example, an aqueous chemical cleaning step. In this cleaning step, layer 140 protects layers 130 and 110 from corrosion.

[0069] Figure 2J This shows the process after depositing the first metallization layer 170. Figure 2I The device. Layer 170 is deposited on Figure 2H The surface of the device, and the surface covering the opening O2. Layer 170 is in contact with layer 150 and / or layer 140.

[0070] The metallization layer 170 is made of a second metallic material, such as gold, titanium, titanium-tungsten, titanium nitride, etc., which may be the same as or different from the first metallic material. The thickness of the metallization layer 170 is in the range of 30 nm to 350 nm, for example, in the range of 250 nm to 350 nm.

[0071] According to one embodiment, step 2J is repeated multiple times, and layer 170 is covered by one or more sequentially deposited metal layers 270. For example, layer 170 is made of titanium, with a thickness in the range of 30 nm to 75 nm. Then, a second layer made of titanium-tungsten (e.g., 10% by weight of tungsten) is deposited on the surface of layer 170, with a thickness in the range of 80 nm to 120 nm. Then, a third layer made of gold is deposited on the surface of the second layer, with a thickness in the range of 250 nm to 350 nm.

[0072] The corrosion potential of the second metallic material is higher than that of the first metallic material. Therefore, the second metallic material is less susceptible to corrosion than the first metallic material. For example, the corrosion potential of gold is lower than that of copper. In particular, galvanic corrosion may occur if the metal orbital 110 or atoms of the first metallic material come into contact with the second metallic material.

[0073] The assembly formed by layer 170 and (if present) metal layers 270 forms, for example, connection pads 180. In an optional etching step following step 2J, the connection pads 180 are obtained with the final shape and size.

[0074] At the end of step 2J, obtain and Figure 1A and Figure 1B Device 100 is similar to device 100'. In Figure 2J In the example, layer 150 includes a stack of layers, and metal layer 270 is formed on the surface of layer 170.

[0075] According to one embodiment, the materials of layers 110, 130, 140 and 170 are different from each other.

[0076] Device 100' (which includes an optical diffuser) is a passive device configured to alter the propagation of a light beam (not shown). For example, device 100' is configured to attenuate the intensity of an incident laser beam, such as a laser with a power in the range of 1W to 2W. A metal track 110 is located, for example, in the optical path of the laser beam and is configured to detect a fault in the optical diffuser of device 100'.

[0077] For example, layer 150 includes a polycrystalline silicon diffraction structure 220 and is configured, for example, to be partially transparent within a given wavelength range and attenuate the intensity of the laser beam passing through it. The metal track 110 is, for example, a safety track configured to break in the event of tearing or breakage of the optical diffuser. For example, the metal track 110 is connected to a closed-loop laser power supply. For example, if the metal track 110 is damaged, the laser will automatically shut down.

[0078] Figure 3 It includes an embodiment according to this disclosure. Figures 1A to 2J A partial cross-sectional view of the device 300 with metal orbital 110, obtained by transmission electron microscopy and energy-dispersive X-ray spectroscopy.

[0079] Figure 3 Some elements and Figure 1A and Figure 1B The elements are the same, and these elements are represented by the same reference numerals, and will not be described in detail again.

[0080] exist Figure 3 In the example, three metal layers 270 cover layer 170 of device 300.

[0081] Figure 4A It shows Figure 3 The device contains tantalum atoms.

[0082] exist Figure 3 and Figure 4A In the example, layer 130 includes tantalum, such as tantalum or tantalum nitride. Figure 4A As shown, after the etching process in step 2I, layer 130 is intact. The metal track 110 is still completely covered by layer 130.

[0083] Figure 4B It shows Figure 3 The device contains titanium atoms.

[0084] exist Figure 3 and Figure 4B In the example, layer 140 comprises titanium, for example, made of titanium or titanium nitride. Layer 140 covers layer 130 to protect it during the etching process in step 2I. Layer 170 is made of titanium, for example. Figure 4BAs shown, layer 140 is intact after the etching process in step 2I. During the etching process in step 2I, layer 130 is effectively protected by layer 140.

[0085] For example, device 100 is a connection interface between a component or electronic chip and its external environment.

[0086] For example, device 100 is a one-time programmable memory cell.

[0087] For example, device 100 is an electronic and / or optical system including metal wires, which is configured, for example, as an indicator for information routing, power supply, or device tampering.

[0088] For example, Figure 1A and Figure 1B Device 100 Figure 2J Device 100', and Figure 3 , Figure 4A and Figure 4B Device 300 has many applications in many industrial fields. For example, devices 100, 100', and 300 are integrated into systems that include one or more other components.

[0089] In the various embodiments described above, layer 140 of devices 100, 100', and 300 is, for example, continuous. Continuity should be understood as layer 140 not having openings or holes. For example, layer 140 is continuous between barrier layer 130 and layer 170, such that barrier layer 130 does not directly contact layer 170. Layer 140, for example, completely covers layer 130 within opening O2. Layer 140, for example, has its initial thickness, or is, for example, partially etched. The minimum thickness of layer 140 within opening O2 is, for example, greater than or equal to 20 nanometers.

[0090] This system is intended for implementation in electronic systems for personal use, such as connected systems, for example, through the use of 5G or radio frequency connections. The system is, for example, part of a mobile phone or a network forming a connected object. For example, the system communicates with 5G, Wi-Fi, or ultra-wideband. The system includes, for example, a high-speed interface with advanced filtering and electromagnetic discharge protection. For example, the system is used in facial recognition systems in personal electronic products, such as mobile phones or laptops, or in telemetry systems, such as telemetry systems included in tablets or depth sensors.

[0091] This system is designed for implementation, for example, in communication equipment or computers and peripherals. For instance, it is used in 5G infrastructure and dedicated data centers. For example, the system includes silicon carbide diodes, Schottky transistors, electromagnetic discharge protection diodes, and transient voltage suppression diodes. The system is also used, for example, in satellites, and may include integrated passive systems for radio frequency applications.

[0092] For example, the system incorporates three-dimensional (3D) technology during its manufacturing process, achieved through the stacking of multiple silicon layers. This system could be a reprogrammable non-volatile memory cell or a stacked image sensor attached to its back, such as a backlight sensor formed using 3D technology.

[0093] The advantage of having an etched stop layer 140 on the surface of the diffusion barrier layer 130 is that it better protects the metal track 110 to reduce the risk of electromigration and corrosion.

[0094] exist Figure 2I It is also advantageous to avoid or reduce etching of the diffusion barrier layer 130 in the process, since the barrier layer 130 is made of materials such as tantalum, which can generate polymer residues that are difficult to remove. However, the etch stop layer 140 can be formed with a material that generates less contaminating residues.

[0095] Another advantage of the disclosed embodiments is that the strength of the layer stack formed by layers 110, 130, 140 and 170 is hardly changed by the presence of layer 140.

[0096] Various embodiments and variations have been described. Those skilled in the art will understand that certain features of these various embodiments and variations can be combined, and other variations will become apparent to them. In particular, although embodiments in which metal tracks are electrically connected to connection pads have been described, in other embodiments, the metal tracks may be connected to other structures.

[0097] Finally, based on the functional indications given above, the actual implementation of the above embodiments and variations is within the capabilities of those skilled in the art.

[0098] A device (100, 100') is generally defined as comprising: on a substrate: a dielectric or semiconductor layer (150); a trench (O1) in the dielectric or semiconductor layer (150) extending from a first surface (F1) of the dielectric or semiconductor layer (150), the trench partially extending through the dielectric or semiconductor layer (150) and being filled with: a conductive etch stop layer (140) covering the walls of the trench (O1) and contacting the dielectric or semiconductor layer (150); and covering the conductive etch stop layer (140). The conductive barrier layer (130) of the 0); and the track (110) of the first metal material in the trench (O1) in contact with the barrier layer (130); the opening (O2) in the dielectric or semiconductor layer (150) extending from the second side (F2) of the dielectric or semiconductor layer (150) opposite to the first side (F1) all the way through the dielectric or semiconductor layer (150) to the etch stop layer (140); and the first layer (170) of the second metal material covering the wall of the opening (O2).

[0099] The first layer (170) of the second metallic material forms the connecting pad (180).

[0100] A device (100, 100') is generally defined as including a second layer (270) of a third metallic material covering a first layer, such as gold, titanium, or titanium-tungsten.

[0101] The track (110) is a safety track configured to break in the event of tearing or breaking of the optical diffuser.

[0102] A manufacturing method is summarized as including: on a substrate: etching a trench (O1) in a dielectric or semiconductor layer (150), the trench extending from a first side (F1) of the dielectric or semiconductor layer (150) and partially traveling through the dielectric or semiconductor layer (150); depositing a conductive etch stop layer (140) covering the walls of the trench (O1) and contacting the dielectric or semiconductor layer (150); depositing a conductive barrier layer (130) covering the conductive etch stop layer (140); and then... A track (110) made of a first metallic material in contact with a barrier layer (130) is deposited into a trench (O1); an opening (O2) is etched in a dielectric or semiconductor layer (150) extending from a second side (F2) of the dielectric or semiconductor layer (150) opposite to the first side (F1), the opening traveling through the dielectric or semiconductor layer (150) until a portion of a conductive etch stop layer (140) is exposed; and a first layer (170) of a second metallic material covering the walls of the opening (O2) is deposited.

[0103] The method further includes a step of depositing particles of a first metallic material on the surface of a barrier layer (130) prior to the step of depositing the orbit (110), the particles serving as seed crystals for the deposition of the orbit (110).

[0104] The deposition of the orbital (110) is carried out by electroplating.

[0105] The method also includes a thinning step prior to etching the opening (O2) to expose the dielectric or semiconductor layer (150) outside the trench (O1).

[0106] The opening (O2) is formed by plasma etching.

[0107] The method also includes thinning the substrate to expose the second side (F2) of the dielectric or semiconductor layer (150) before etching the opening (O2).

[0108] The conductive etch stop layer (140) is made of titanium nitride and has, for example, a maximum thickness in the range of 30 nm to 100 nm.

[0109] The barrier layer (130) is made of tantalum nitride or tantalum.

[0110] The first metallic material is copper.

[0111] The second metallic material is gold, titanium, or titanium-tungsten.

[0112] The use of a device (100, 100') is summarized as including applying current to a rail (110) and detecting an open circuit that prevents the conduction of the current.

[0113] The various embodiments described above can be combined to provide other embodiments. If desired, aspects of the embodiments can be modified to incorporate concepts from various patents, applications, and publications to provide other embodiments.

[0114] Based on the detailed description above, these and other changes can be made to the embodiments. Generally, the terminology used in the following claims should not be construed as limiting the claims to the specific embodiments disclosed in the specification and claims, but should be understood to include all possible embodiments and the full scope of equivalents enjoyed by such claims. Therefore, the claims are not limited to this disclosure.

Claims

1. A device comprising: a substrate; a dielectric or semiconductor layer on the substrate, the dielectric or semiconductor layer having a trench extending from a first surface of the dielectric or semiconductor layer, the trench extending partially through the dielectric or semiconductor layer; a conductive etch stop layer covering walls of the trench and in contact with the dielectric or semiconductor layer and the substrate; a conductive barrier layer covering the conductive etch stop layer and in contact with the substrate; a track of a first metallic material in the trench and in contact with the barrier layer and the substrate; an opening in the dielectric or semiconductor layer extending from a second surface of the dielectric or semiconductor layer opposite the first surface, the opening extending through the dielectric or semiconductor layer to the etch stop layer; and a first layer of a second metallic material covering walls of the opening.

2. The device of claim 1, wherein the first layer of the second metallic material is a connection pad.

3. The device of claim 1, comprising a second layer of a third metallic material covering the first layer, the third metallic material being gold, titanium, or titanium tungsten.

4. An optical diffuser comprising the device of claim 1, wherein the track is a safety track configured to break in the event of a tear or break in the optical diffuser.

5. A method of manufacture comprising: etching a trench in a dielectric or semiconductor layer on a substrate, the trench extending from a first surface of the dielectric or semiconductor layer, the trench extending partially through the dielectric or semiconductor layer; depositing a conductive etch stop layer covering walls of the trench and in contact with the dielectric or semiconductor layer; depositing a conductive barrier layer covering the conductive etch stop layer; depositing a track of a first metallic material in contact with the barrier layer into the trench; etching an opening in the dielectric or semiconductor layer, the opening extending from a second surface of the dielectric or semiconductor layer opposite the first surface, the opening extending through the dielectric or semiconductor layer until a portion of the conductive etch stop layer is exposed; and depositing a first layer of a second metallic material, the first layer covering walls of the opening. Prior to depositing the track, depositing particles of the first metallic material on the barrier layer, the particles serving as seeds for depositing the track.

7. The method of claim 5, wherein depositing the track is performed by electroplating.

6. The method of claim 5, further comprising: Prior to etching the opening, thinning to expose the dielectric or semiconductor layer outside the trench.

9. The method of claim 5, wherein the opening is formed by plasma etching.

8. The method of claim 5, further comprising: Prior to etching the opening, thinning the substrate to expose the second surface of the dielectric or semiconductor layer.

11. The device of claim 1, wherein the conductive etch stop layer is made of titanium nitride and has a maximum thickness in a range of 30 nm to 100 nm.

10. The method of claim 5, further comprising: ​ ​ 12. The device of claim 1, wherein the barrier layer is made of tantalum nitride or tantalum.

13. The device of claim 1, wherein the first metallic material is copper.

14. The device of claim 1, wherein the second metallic material is gold, titanium, or titanium tungsten.

15. The device of claim 1, wherein the electrically conductive etch stop layer (140) is continuous between the electrically conductive barrier layer (130) and the first layer (170).

16. Use of the device of claim 1, comprising applying a current to the track and detecting an open circuit that prevents conduction of the current.

17. A device, comprising: a substrate having a first surface; an electrically conductive track on the first surface of the substrate; a first electrically conductive layer on the electrically conductive track and coupled with the first surface of the substrate; a second electrically conductive layer on the first electrically conductive layer and coupled with the first surface of the substrate; an insulating layer on portions of the second electrically conductive layer and coupled with the first surface of the substrate, the insulating layer having: a first surface in contact with the first surface of the substrate; a second surface opposite the first surface; and a trench in the second surface; and a third electrically conductive layer on the insulating layer, the third electrically conductive layer being in the trench and on the second electrically conductive layer.

18. The device of claim 17, wherein the first electrically conductive layer is made of tantalum nitride, tantalum, or aluminum.

19. The device of claim 17, wherein the second electrically conductive layer is made of titanium nitride or tantalum nitride.

20. The device of claim 17, wherein the third electrically conductive layer is made of gold, titanium, titanium tungsten, or titanium nitride.

21. The device of claim 17, wherein the first electrically conductive layer extends on a first surface and a side surface of the electrically conductive track, the first surface of the electrically conductive track being opposite the first surface of the substrate, the side surface of the electrically conductive track being transverse to the first surface of the electrically conductive track. ​ ​

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