Backside illuminated image sensor and method of making the same

Abstract

This application relates to a back-illuminated image sensor and its fabrication method, comprising: a substrate, the substrate including photodiodes and an isolation structure alternately arranged on a first surface along a first direction parallel to the first surface; the isolation structure including SiB layers and oxide layers alternately stacked along a second direction away from the substrate; the photodiodes including a bottom photosensitive region, a middle photosensitive region, and a top photosensitive region arranged along the second direction away from the substrate; the SiB layers extending along the first direction and penetrating the bottom and top photosensitive regions; the bottom and top photosensitive regions including SiAs layers spaced apart along the first direction and penetrating the SiB layers in the direction towards the substrate; and the middle photosensitive region including a SiP layer extending along the second direction to the top photosensitive region. This method avoids substrate damage caused by high-energy ion implantation and improves the quantum efficiency of the BSI.

Description

Technical Field

[0001] This application relates to the field of integrated circuit technology, and in particular to a back-illuminated image sensor and its fabrication method. Background Technology

[0002] Image sensors are photoelectric conversion devices widely used in consumer electronics, security monitoring, automotive electronics, machine vision, and many other fields. Back-illuminated (BSI) image sensors offer advantages such as higher sensitivity, better wiring layout, and the ability to record at high speeds, and are often used in fields where high pixel performance of image sensors is required.

[0003] However, in traditional BSI front-end fabrication processes, high-energy ion implantation (IMP) is required to fabricate diode structures to form pixel regions, which leads to substrate surface damage. Uneven ion implantation can also cause signal crosstalk between different pixels, hindering further improvements in the performance of BSI image sensors. Summary of the Invention

[0004] Therefore, it is necessary to provide a back-illuminated image sensor and its fabrication method to address the technical problems in related technologies, which can at least avoid signal crosstalk of BSI image sensors and unnecessary damage caused by IMP.

[0005] In a first aspect, this application provides a back-illuminated image sensor, comprising: a substrate, the substrate including photodiodes and an isolation structure arranged alternately on a first surface and along a first direction parallel to the first surface;

[0006] The isolation structure includes alternating layers of SiB and oxide layers stacked along a second direction away from the substrate;

[0007] The photodiode includes a bottom photosensitive region, a middle photosensitive region, and a top photosensitive region arranged along a second direction away from the substrate; the SiB layer extends along a first direction and penetrates the bottom photosensitive region and the top photosensitive region;

[0008] The bottom photosensitive region and the top photosensitive region include SiAs layers that are spaced apart along the first direction and penetrate the SiB layer along the direction toward the substrate, and the middle photosensitive region includes a SiP layer that extends along the second direction to the top photosensitive region.

[0009] In this context, the SiB layer represents silicon material doped with B, the SiAs layer represents silicon material doped with As, and the SiP layer represents silicon material doped with P.

[0010] In the back-illuminated image sensor described above, the SiB layer acts as a junction isolation in the isolation structure, and is connected together with the oxide layer and the trench isolation structure below it in the direction toward the substrate, forming a fully isolated structure between adjacent photodiodes. This completely isolates adjacent pixel structures in the back-illuminated image sensor, reducing crosstalk effects.

[0011] Meanwhile, the P-type doped SiB layer forms a PN junction with the N-type doped SiAs and SiP layers within the photodiode, effectively establishing a built-in electric field in the photosensitive region and increasing its charge collection capability. When incident light enters the photodiode, photons excite the silicon material to generate charge carriers, which are then separated by the built-in electric field. This suppresses the random and slow diffusion of charge carriers within the silicon, reducing their recombination rate and significantly improving the quantum efficiency of the sensor.

[0012] In some embodiments, the SiAs layer includes: a first SiAs layer and a second SiAs layer;

[0013] The top surface of the first SiAs layer is in contact with the bottom surface of the SiP layer;

[0014] The second SiAs layer extends through the top surface of the SiB layer, along the direction toward the substrate, and into the SiP layer.

[0015] In some embodiments, the isolation structure includes a plurality of isolation portions, each isolation portion including a SiB layer and an oxide layer arranged along a second direction;

[0016] Multiple isolation departments include a first isolation department, a second isolation department, and a third isolation department; among them,

[0017] The second isolation section is located on top of the first isolation section;

[0018] The second isolation section and the bottom photosensitive area are prepared simultaneously in the same process steps;

[0019] The third isolation section and the central photosensitive region are prepared simultaneously in the same process steps.

[0020] In some embodiments, the plane containing the top surface of the top photosensitive area is flush with the bottom surface of the oxide layer of the third isolation portion;

[0021] The top surface of the bottom photosensitive area is not higher than the top surface of the first isolation part.

[0022] In some embodiments, the back-illuminated image sensor further includes: a plurality of trench isolation structures extending into the substrate via a first surface and spaced apart along a first direction; the trench isolation structures are located directly below the one-to-one isolation structures.

[0023] The grille is located directly above the one-to-one isolation structure;

[0024] The filter is located on the top surface of the photodiode.

[0025] Secondly, this application also provides a method for fabricating a back-illuminated image sensor, used to fabricate a back-illuminated image sensor as described in any of the above embodiments, comprising:

[0026] A substrate is provided, the substrate including trench isolation structures extending into the substrate via a first surface and spaced apart along a first direction parallel to the first surface;

[0027] Photodiodes and an isolation structure are formed on a first surface in an alternating arrangement along a first direction;

[0028] The isolation structure includes alternating layers of SiB and oxide layers stacked along a second direction away from the substrate;

[0029] The photodiode includes a bottom photosensitive region, a middle photosensitive region, and a top photosensitive region arranged along a second direction away from the substrate; a SiB layer extends along a first direction and penetrates the bottom photosensitive region and the top photosensitive region; the bottom photosensitive region and the top photosensitive region include SiAs layers arranged at intervals along the first direction and penetrating the SiB layer in the direction toward the substrate; the middle photosensitive region includes a SiP layer extending along the second direction to the top photosensitive region.

[0030] In the above embodiments, compared to the method of directly forming photodiodes through ion implantation in related technologies, this application forms photodiodes with different layer structures within stacked SiB layers by rationally planning the process timing. While avoiding substrate damage caused by high-energy ion implantation, it reduces the recombination rate by forming a built-in electric field, achieving more efficient photoelectric conversion and improving quantum efficiency.

[0031] In some embodiments, the isolation structure includes a plurality of isolation portions, each isolation portion including a SiB layer and an oxide layer arranged along a second direction;

[0032] Multiple isolation sections, including the first isolation section;

[0033] The first isolation section is formed, including:

[0034] A first SiB layer and a first oxide layer are formed on the first surface;

[0035] A first trench is formed, which is spaced apart along a first direction and penetrates the first oxide layer and the first SiB layer along the direction toward the substrate.

[0036] A first SiAs layer is formed to at least fill the first trench; the remaining first SiB layer and first oxide layer located directly above the trench isolation structure are used to form the first isolation portion.

[0037] In some embodiments, the plurality of isolation sections include a second isolation section located on the top surface of the first isolation section;

[0038] The bottom photosensitive area is formed, including:

[0039] A second SiB layer and a second oxide layer are formed sequentially along the second direction on the top surface of the bottom photosensitive area and the first isolation part;

[0040] A second trench is formed that penetrates the second oxide layer and the second SiB layer along the direction toward the substrate; the remaining second SiB layer and the second oxide layer located directly above the first isolation portion are used to form the second isolation portion, and the remaining first SiAs layer is used to form the bottom photosensitive region.

[0041] In some embodiments, a central photosensitive region is formed, including:

[0042] A SiP material layer is formed that at least fills the second trench;

[0043] A third SiB layer and a third oxide layer arranged along the second direction are sequentially formed on the top surface of the SiP material layer and the second isolation portion.

[0044] A third trench is formed, which is spaced apart along the first direction and penetrates the third oxide layer and the third SiB layer in the direction toward the substrate and extends into the SiP material layer. The remaining SiP material layer is used to form the SiP layer of the central photosensitive region.

[0045] In some embodiments, a top photosensitive region is formed, including:

[0046] After forming the second SiAs layer in the third trench, a grid material layer is formed on the top surface of the photodiode and the isolation structure;

[0047] A grid trench is formed that runs through the grid material layer and the third oxide layer in the direction toward the substrate, and a grid is located on both sides of the grid trench. The remaining second SiAs layer is used to form the top photosensitive area.

[0048] In the above embodiments, the unexpected technical effect of this application is:

[0049] The fabrication method provided in this application simultaneously fabricates photodiodes and isolation structures using multiple epitaxial growth techniques on the top surface of the substrate. This effectively avoids unnecessary damage during high-energy ion implantation and reduces dark current caused by substrate damage. Furthermore, by coordinating the fabrication steps of different structures, the overall production process is optimized, making the entire production process more compact and efficient.

[0050] The back-illuminated image sensor includes photodiodes and an isolation structure arranged alternately along a first direction. In the photodiodes, SiB and SiAs layers are alternately arranged along the first direction in the bottom and top photosensitive regions to form a PN junction, establish a built-in electric field, regulate carrier transport, optimize carrier generation and separation processes, reduce recombination rate during conversion, and improve photoelectric response efficiency. The isolation structure includes a SiB layer for junction isolation and an insulating oxide layer, which, together with the trench isolation structure in the substrate, construct a highly efficient all-physical isolation barrier, ensuring that the pixel structures are independent of each other, effectively preventing free electron penetration and light scattering, and suppressing the negative impact of crosstalk on image clarity. Attached Figure Description

[0051] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0052] Figure 1 This is a cross-sectional schematic diagram of a back-illuminated image sensor structure provided in one embodiment;

[0053] Figure 2 This is a flowchart of a back-illuminated image sensor fabrication method provided in one embodiment;

[0054] Figure 3a This is a schematic cross-sectional view of the structure obtained after forming the trench isolation structure in step S202 of the back-illuminated image sensor fabrication method provided in one embodiment;

[0055] Figure 3b This is a schematic cross-sectional view of the structure obtained after substrate thinning in step S204 of the back-illuminated image sensor fabrication method provided in one embodiment;

[0056] Figure 4 This is a cross-sectional schematic diagram of the structure obtained after forming the first SiB layer and the first oxide layer in step S402 of the back-illuminated image sensor fabrication method provided in one embodiment.

[0057] Figure 5 This is a schematic cross-sectional view of the structure obtained after forming the first trench in step S404 of the back-illuminated image sensor fabrication method provided in one embodiment;

[0058] Figure 6 This is a schematic cross-sectional view of the structure obtained after removing the photoresist layer in step S406 of the back-illuminated image sensor fabrication method provided in one embodiment.

[0059] Figure 7This is a schematic cross-sectional view of the structure obtained after forming the second trench in step S408 of the back-illuminated image sensor fabrication method provided in one embodiment.

[0060] Figure 8 This is a cross-sectional schematic diagram of the structure obtained after forming a SiP material layer and removing the photoresist layer in step S410 of the back-illuminated image sensor fabrication method provided in one embodiment.

[0061] Figure 9 This is a cross-sectional schematic diagram of the structure obtained after forming a SiP material layer and removing the photoresist layer in step S412 of the back-illuminated image sensor fabrication method provided in one embodiment.

[0062] Figure 10 This is a cross-sectional schematic diagram of the structure obtained after forming a grid material layer and removing the photoresist layer in step S414 of the back-illuminated image sensor fabrication method provided in one embodiment.

[0063] Figure 11 This is a cross-sectional schematic diagram of the structure obtained after forming a grid trench and removing the photoresist layer in step S416 of the back-illuminated image sensor fabrication method provided in one embodiment.

[0064] Figure 12 for Figure 11 A cross-sectional schematic diagram of the structure after the filter is formed.

[0065] Explanation of reference numerals in the attached figures:

[0066] 1. Initial substrate; 10. Substrate; 11. Dielectric layer; 12. Interlayer dielectric layer; 20. Trench isolation structure; 301. First trench; 302. Second trench; 303. Third trench; 304. Grid trench; 41. Bottom photosensitive area; 411. First SiAs layer; 42. Middle photosensitive area; 421. SiP layer; 4211. SiP material layer; 43. Top photosensitive area; 431. Second SiAs layer; 50. Isolation structure; 51. First isolation portion; 511. First SiB layer; 512. First oxide layer; 52. Second isolation portion; 521. Second SiB layer; 522. Second oxide layer; 53. Third isolation portion; 531. Third SiB layer; 532. Third oxide layer; 60. Grid; 601. First grid material layer; 602. Second grid material layer; 603. Third grid material layer; 70. Filter. Detailed Implementation

[0067] To facilitate understanding of this application, a more complete description will be provided below with reference to the accompanying drawings, which illustrate preferred embodiments of the application. However, this application may be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided so that the disclosure of this application will be thorough and complete.

[0068] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of this application.

[0069] It should be understood that when an element or layer is referred to as "on," "adjacent to," "connected to," or "coupled to" other elements or layers, it may be directly on, adjacent to, connected to, or coupled to other elements or layers, or there may be intervening elements or layers. Conversely, when an element is referred to as "directly on," "directly adjacent to," "directly connected to," or "directly coupled to" other elements or layers, there are no intervening elements or layers. It should be understood that although the terms first, second, third, etc., may be used to describe various elements, parts, regions, layers, doping types, and / or portions, these elements, parts, regions, layers, doping types, and / or portions should not be limited by these terms. These terms are only used to distinguish one element, part, region, layer, doping type, or portion from another element, part, region, layer, doping type, or portion. Therefore, without departing from the teachings of this application, the first element, component, region, layer, doping type, or portion discussed below may be represented as a second element, component, region, layer, or portion; for example, the first doping type may be referred to as the second doping type, and similarly, the second doping type may be referred to as the first doping type; the first doping type and the second doping type are different doping types, for example, the first doping type may be P-type and the second doping type may be N-type, or the first doping type may be N-type and the second doping type may be P-type.

[0070] Spatial relation terms such as “below,” “under,” “below,” “under,” “above,” “above,” etc., are used herein to describe the relationship between one element or feature shown in the figure and other elements or features. It should be understood that, in addition to the orientation shown in the figure, spatial relation terms also include different orientations of the device in use and operation. For example, if the device in the figure is flipped, the element or feature described as “below,” “under,” or “below” will be oriented “above” the other element or feature. Therefore, the exemplary terms “below” and “under” can include both above and below orientations. Furthermore, the device may also include other orientations (e.g., rotated 90 degrees or other orientations), and the spatial descriptive terms used herein will be interpreted accordingly.

[0071] When used herein, the singular forms of “a,” “an,” and “the” may also include the plural forms unless the context clearly indicates otherwise. It should also be understood that when the terms “comprise” and / or “comprising” are used in this specification, the presence of the stated feature, integer, step, operation, element, and / or part is established, but the presence or addition of one or more other features, integers, steps, operations, elements, parts, and / or groups is not excluded. Meanwhile, when used herein, the term “and / or” includes any and all combinations of the associated listed items.

[0072] Embodiments of the invention are described herein with reference to cross-sectional views illustrating ideal embodiments (and intermediate structures) of this application, thus allowing for variations in the illustrated shapes due to, for example, manufacturing techniques and / or tolerances. Therefore, embodiments of this application should not be limited to the specific shapes of the regions shown herein, but rather include shape deviations due to, for example, manufacturing techniques. For instance, implantation regions shown as rectangular typically have rounded or curved features at their edges and / or implantation concentration gradients, rather than a binary change from implantation regions to non-implantation regions. Similarly, buried regions formed by implantation can result in some implantation in the region between the buried region and the surface traversed during implantation. Therefore, the regions shown in the figures are substantially schematic, and their shapes do not represent the actual shapes of regions of the device and do not limit the scope of this application.

[0073] In this embodiment, the substrate may include a first surface located on the front side and a back surface, i.e., a second surface, opposite to the front side. Ignoring the flatness of the first and second surfaces, a first direction parallel to the first surface is defined, and the direction toward the substrate includes a second direction perpendicular to the first surface of the substrate. Intersecting (e.g., perpendicular) first and third directions are defined on the top and bottom surfaces of the substrate (i.e., the plane in which the substrate lies). For example, the arrangement direction of the target isolation structure is the first direction, and the plane in which the substrate lies can be determined based on the first and third directions. The first, second, and third directions may be mutually perpendicular. In this embodiment, the first direction is defined as the Y-axis direction, the second direction as the Z-axis direction, and the third direction as the X-axis direction.

[0074] Please see Figure 1 This application provides a back-illuminated image sensor, including: a substrate 10, the substrate 10 including photodiodes and an isolation structure 50 arranged alternately along the OY direction on a first surface 10a;

[0075] The isolation structure 50 includes SiB layers and oxide layers alternately stacked along the OZ direction;

[0076] The photodiode includes a bottom photosensitive region 41, a middle photosensitive region 42, and a top photosensitive region 43 arranged along the OZ direction; the SiB layer extends along the first direction and penetrates the bottom photosensitive region 41 and the top photosensitive region 43.

[0077] The bottom photosensitive region 41 and the top photosensitive region 43 include SiAs layers that are spaced apart along the OY direction and penetrate the SiB layer along the ZO direction, and the middle photosensitive region 42 includes a SiP layer 421 that extends along the OZ direction to the top photosensitive region 43.

[0078] In this context, the SiB layer represents silicon material doped with B, the SiAs layer represents silicon material doped with As, and the SiP layer represents silicon material doped with P.

[0079] For example, the cross-sectional shape of the trench isolation structure 20 along the OY direction may include a regular trapezoid, an inverted trapezoid, a rectangle, etc., or a combination of regular trapezoids, inverted trapezoids, rectangles, etc. In this embodiment, the trench isolation structure only needs to be able to isolate electrons and light energy. Furthermore, this embodiment does not impose specific limitations on the distance between adjacent trench isolation structures, and it can be set according to actual needs.

[0080] For example, in this embodiment, the SiAs layer includes: a first SiAs layer 411 and a second SiAs layer 431;

[0081] The top surface of the first SiAs layer 411 is in contact with the bottom surface of the SiP layer 421.

[0082] The second SiAs layer 431 extends through the top surface of the SiB layer along the ZO direction, penetrating the SiB layer and extending into the SiP layer 421.

[0083] In the above embodiments, the first SiAs layer and the second SiAs and SiB layer arranged at intervals form PN junctions arranged at intervals in the bottom photosensitive region and the top photosensitive region. When incident light is incident, the silicon material is excited to generate electron-hole pairs. Through the built-in electric field separation, electrons flow to the N region and holes flow to the P region, which enhances the directional transport capability of photogenerated carriers in the photodiode and effectively reduces its recombination rate.

[0084] Furthermore, the isolation structure 50 includes multiple isolation sections, each isolation section including a SiB layer and an oxide layer arranged along the second direction;

[0085] Multiple isolation sections include a first isolation section 51, a second isolation section 52, and a third isolation section 53; among which,

[0086] The second isolation section 52 is located on the top surface of the first isolation section 51;

[0087] The second isolation section 52 and the bottom photosensitive area 41 are prepared simultaneously in the same process steps;

[0088] The third isolation section 53 and the central photosensitive region 42 are prepared simultaneously in the same process steps.

[0089] In the above embodiments, the isolation structure is composed of multiple isolation parts. By fabricating the isolation structure in segments, the overall isolation efficiency and stability of the isolation structure are improved. The physical insulation properties of the oxide layer and the electric field blocking effect of the junction isolation work synergistically, resulting in lower cost and better isolation effect compared to a single junction isolation structure.

[0090] Furthermore, in some embodiments, the plane containing the top surface of the top photosensitive area 43 is flush with the bottom surface of the oxide layer of the third isolation portion 53;

[0091] The top surface of the bottom photosensitive area 41 is not higher than the top surface of the first isolation part 51.

[0092] In the above embodiments, the overall height of the photodiode is lower than that of the isolation structure, resulting in better full isolation. Since the bottom photosensitive area is fabricated concurrently with the first isolation portion, its top surface is not higher than the top surface of the first isolation portion.

[0093] The following describes an embodiment of forming a back-illuminated image sensor; please refer to [link to relevant documentation]. Figures 2-12 The preparation method provided in this application includes:

[0094] Step S20: Provide a substrate 10, which includes trench isolation structures 20 extending into the substrate 10 via a first surface 10a and spaced apart along the OY direction.

[0095] Step S40: A photodiode and an isolation structure 50 are formed on the first surface 10a, which are alternately arranged along the OY direction. The isolation structure 50 includes SiB layers and oxide layers that are alternately stacked along the ZO direction. The photodiode includes a bottom photosensitive region 41, a middle photosensitive region 42, and a top photosensitive region 43 arranged along the OZ direction. The SiB layer extends along the OY direction and penetrates the bottom photosensitive region 41 and the top photosensitive region 43. The bottom photosensitive region 41 and the top photosensitive region 43 include SiAs layers that are spaced apart along the OY direction and penetrate the SiB layer along the ZO direction. The middle photosensitive region 42 includes a SiP layer that extends along the OZ direction to the top photosensitive region.

[0096] It should be understood that, although Figure 2 The steps in the flowchart are shown sequentially as indicated by the arrows, but these steps are not necessarily executed in the order indicated by the arrows. Unless otherwise specified in this document, there is no strict order in which these steps are executed; they can be performed in other orders. Furthermore, Figure 2 At least some of the steps in the process may include multiple steps or multiple stages. These steps or stages are not necessarily completed at the same time, but can be executed at different times. The execution order of these steps or stages is not necessarily sequential, but can be executed in turn or alternately with other steps or at least some of the steps or stages in other steps.

[0097] Figures 3a to 12 This is a schematic diagram illustrating the steps of an exemplary back-illuminated image sensor fabrication method provided in this application embodiment, wherein, Figure 12 This application provides an example of a pixel sensor fabricated using the method described herein. Other suitable examples of pixel sensors fabricated using this application are also possible, and no limitations are imposed herein. The following is a combination of... Figures 3a to 12 The preparation methods provided in the embodiments of this application will be described in detail.

[0098] Please see Figure 3a , Figure 3b The extension step of step S20 further includes:

[0099] Please see Figure 3a Step S202: In the front end of line (FEOL) process, a shallow trench isolation structure (STI) is formed in the initial substrate 1 by etching process and epitaxial growth, which is referred to as trench isolation structure 20.

[0100] For example, the initial substrate 1 can be constructed of semiconductor materials, insulating materials, conductive materials, or any combination thereof. The substrate can be a single-layer structure or a multi-layer structure. For example, the substrate can be such as a silicon (Si) substrate, a silicon-germanium (SiGe) substrate, a silicon-germanium-carbon (SiGeC) substrate, a silicon carbide (SiC) substrate, a gallium arsenide (GaAs) substrate, an indium arsenide (InAs) substrate, an indium phosphide (InP) substrate, or other III / V or II / VI semiconductor substrates. Alternatively, for example, the substrate can be a layered substrate comprising, for example, Si / SiGe, Si / SiC, silicon-on-insulator (SOI), or silicon-germanium-on-insulator. Therefore, the type of substrate should not limit the scope of this disclosure.

[0101] In this embodiment, a P-type silicon wafer is used as the initial substrate 1.

[0102] For example, the material of the trench isolation structure 20 may include, but is not limited to, silicon oxide, silicon nitride, silicon oxynitride, silicon carbide, or combinations thereof.

[0103] Please see Figure 3b Step S204: Any deposition process can be used, but not limited to, to form a dielectric layer 11 covering the trench isolation structure 20 on the initial substrate 1, and then to form an interlayer dielectric layer 12 covering the dielectric layer 11. Subsequently, the above structure is subjected to a thinning process.

[0104] For example, at least one of dry etching, wet etching, chemical mechanical polishing (CMP), and push-pull processes can be used to thin the initial substrate 1 located on the side of the trench isolation structure 20 away from the interlayer dielectric layer 12, so as to expose the top surface 20a of the trench isolation structure 20. In this case, the remaining initial substrate 1 is used to form the substrate 10.

[0105] The dielectric layer 11 can be a single layer or multiple layers. For example, the material of the dielectric layer 11 can be, but is not limited to, silicon oxide, silicon nitride, silicon oxynitride, silicon carbide, or combinations thereof. Metal can be deposited after forming the dielectric layer 11 to form a metal wiring structure, and an interlayer dielectric layer 12 can be formed on this basis. The interlayer dielectric layer 12 can be a silicon oxide layer or other low-dielectric material layer. Of course, this embodiment only illustrates one method; any method that ensures the reasonable formation of the metal wiring structure is acceptable.

[0106] Please see Figures 4-12 The extension step of step S40 includes:

[0107] Step S402: Epitaxial growth of the first SiB layer 511 and the first oxide layer 512 is sequentially completed on the first surface 10a, as shown in the specific structure. Figure 4 As shown.

[0108] For example, the thickness of the first SiB layer 511 ranges from 50nm to 60nm, such as 50nm, 55nm, or 60nm.

[0109] For example, the thickness of the first oxide layer 512 is in the range of 1 nm to 2 nm, such as 1 nm, 1.5 nm or 2 nm.

[0110] For example, the material of the first oxide layer 512 includes, but is not limited to, silicon dioxide (SiO2). It should be understood that other methods may also be used to form the first oxide layer, and no limitation is made herein.

[0111] Step S404: Photoresist is coated onto the first oxide layer 512 and patterned. Based on the photoresist layer, photolithography and etching are performed to obtain a first trench 301 penetrating the first oxide layer 512 and the first SiB layer 511 along the ZO direction. The specific structure is as follows: Figure 5 As shown. The first trench 301 is arranged at intervals along the OY direction above the adjacent trench isolation structure 20.

[0112] For example, at least three first trenches 301 can be formed above adjacent trench isolation structures 20. The number can be determined comprehensively based on the specific needs of actual application, combined with cost control and layout rationality. In this embodiment, four first trenches 301 are provided in the first SiB layer 511 above the adjacent trench isolation structures 20.

[0113] Specifically, the remaining first SiB layer 511 and first oxide layer 512 located directly above the trench isolation structure 20 are used to form the first isolation portion 51.

[0114] Step S406: After epitaxially extending the first SiAs layer 411 within the first trench 301, the patterned photoresist layer is removed. At this time, the top surface of the first SiAs layer 411 is higher than the first oxide layer 512, as shown in the specific structure. Figure 6 As shown.

[0115] Step S408: Based on the above structure, continue to epitaxially grow the second SiB layer 521 and the second oxide layer 522, and similarly combine photolithography and etching processes to form the second trench 302, as shown in the specific structure. Figure 7 As shown. The remaining first SiAs layer 411 is used to form the bottom photosensitive region 41, and the remaining second SiB layer 521 and second oxide layer 522 located directly above the first isolation part 51 are used to form the second isolation part 52 (that is, the bottom photosensitive region 41 and the second isolation part 52 are prepared simultaneously in the same process step).

[0116] Step S410: After forming a SiP material layer 4211 that at least fills the second trench 302, the patterned photoresist layer is removed. The top surface of the SiP material layer 4211 is higher than the second oxide layer 522. The specific structure is as follows: Figure 8 As shown.

[0117] Step S412: Continue to extend the third SiB layer 531 and the third oxide layer 532. Based on this structure, form a third trench 303 that is spaced apart along the OY direction, penetrates the third oxide layer 532 and the third SiB layer 531 along the ZO direction, and extends into the SiP material layer 4211. The specific structure is as follows: Figure 9 As shown. The remaining SiP material layer 4211 is used to form the SiP layer 421 of the central photosensitive region 42, and the remaining third SiB layer 531 and third oxide layer 532 located directly above the second isolation part 52 are used to form the third isolation part 53 (that is, the central photosensitive region 42 and the third isolation part 53 are prepared simultaneously in the same process steps).

[0118] For example, the widths of the third isolation section 53 and the second isolation section 52 are approximately equal to the width of the first isolation section 51.

[0119] For example, the doping concentration of the third SiB layer 531 and the second SiB layer 521 can be the same as or approximately the same as that of the first SiB layer 511, as long as heavy doping is ensured.

[0120] Step S414: After forming the second SiAs layer 431 in the third trench 303, the excess second SiAs layer 431 is planarized and removed. Then, a first grid material layer 601, a second grid material layer 602, and a third grid material layer 603 are formed on the top surface of the photodiode and isolation structure 50, as shown in the specific structure. Figure 10 .

[0121] For example, the material of the first grid material layer 601 may include, but is not limited to, materials with a high k dielectric constant, such as one or more of alumina (Al2O3), hafnium oxide (HfO2), hafnium oxynitride (HfON), zirconium oxide (ZrO2), tantalum oxide (Ta2O5), titanium oxide (TiO2), or strontium titanium oxide (SrTiO3).

[0122] For example, the material of the second grid material layer 602 may include titanium nitride (TiN).

[0123] For example, the material of the third grid material layer 603 may include, but is not limited to, metallic materials such as cobalt (Co), nickel (Ni), titanium (Ti), tungsten (W), copper (Cu), and aluminum (Al).

[0124] In this embodiment, the first grid material layer 601 is made of hafnium oxide (HfO2), the second grid material layer 602 is made of titanium nitride (TiN), and the third grid material layer 603 is made of aluminum (Al). The three grid materials can be set by deposition, and the thickness of each layer can be adjusted as needed without limitation.

[0125] Step S416: Form a grid groove 304 that penetrates the third grid material layer 603, the second grid material layer 602, the first grid material layer 601, and the third oxide layer 532 along the ZO direction, and a grid 60 located on both sides of the grid groove 304. The remaining second SiAs layer 431 is used to form the top photosensitive area 43, as shown in the specific structure. Figure 11 .

[0126] In the above embodiment, the grilles are arranged one-to-one directly above the isolation structure. The top surface of the third isolation part is higher than the top surface of the photodiode, so that the isolation structure and the grilles can fully cover the photodiode. The first SiAs layer, the second SiAs layer, and the SiP layer serve as the N-region photosensitive layers of the photodiode, and their specific doping concentrations are set according to the actual situation, which will not be elaborated here.

[0127] In some embodiments, after step S40, the method further includes: forming a filter 70 between the grid grooves 304, specifically as follows: Figure 12 As shown.

[0128] For example, the filter 70 includes, but is not limited to, a red filter, a yellow filter, a blue filter, etc., and the three filters are arranged adjacent to each other as a pixel group.

[0129] In the above embodiments, the color filters maintain high transmittance in specific wavelength bands. Specifically, the red filter transmits red light waves, the yellow filter transmits yellow light waves, and the blue filter transmits blue light waves. Furthermore, the top of the filter has a rounded arc shape, which is beneficial for light convergence. Other microlens structures can also be used to meet the light-gathering requirements; this application does not impose specific limitations.

[0130] In the above embodiments, the unexpected technical effect of this application is:

[0131] The fabrication method provided in this application simultaneously fabricates photodiodes and isolation structures using multiple epitaxial growth techniques on the top surface of the substrate. This effectively avoids unnecessary damage during high-energy ion implantation, reduces dark current caused by substrate damage, and thus improves image clarity. In the photodiode, SiB and SiAs layers are alternately arranged along the OY direction in the bottom and top photosensitive regions to form a PN junction, establish a built-in electric field, regulate carrier transport, and significantly improve photoelectric conversion efficiency.

[0132] The isolation structure includes a SiB layer for forming junction isolation and an oxide layer for insulating isolation. Together with the trench isolation structure in the substrate, it forms a highly efficient all-physical isolation barrier, ensuring that the pixel structures are independent of each other, effectively preventing free electron penetration and light scattering, and suppressing the negative impact of crosstalk on image clarity.

[0133] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features of the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0134] The embodiments described above are merely illustrative of several implementation methods of this application, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the patent application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this patent application should be determined by the appended claims.

Claims

1. A back-illuminated image sensor, characterized in that, Includes: a substrate, the substrate including photodiodes and isolation structures arranged alternately on a first surface and along a first direction parallel to the first surface; The isolation structure includes SiB layers and oxide layers alternately stacked along a second direction away from the substrate; The photodiode includes a bottom photosensitive region, a middle photosensitive region, and a top photosensitive region arranged along a second direction away from the substrate; the SiB layer extends along the first direction; The bottom photosensitive region and the top photosensitive region include SiAs layers arranged at intervals along the first direction and penetrating the SiB layer along the direction toward the substrate. In the photodiode region, the SiB layer and the SiAs layers of the bottom photosensitive region and the top photosensitive region are arranged alternately. The middle photosensitive region includes a SiP layer extending along the second direction to the top photosensitive region. Wherein, the SiB layer represents silicon material doped with B, the SiAs layer represents silicon material doped with As, and the SiP layer represents silicon material doped with P.

2. The back-illuminated image sensor according to claim 1, characterized in that, The SiAs layer includes: a first SiAs layer and a second SiAs layer; The top surface of the first SiAs layer is in contact with the bottom surface of the SiP layer; The second SiAs layer extends through the top surface of the SiB layer, along the direction toward the substrate, through the SiB layer, and into the SiP layer.

3. The back-illuminated image sensor according to claim 1, characterized in that, The isolation structure includes multiple isolation sections, each of which includes a SiB layer and an oxide layer arranged along the second direction; The plurality of isolation sections includes a first isolation section, a second isolation section, and a third isolation section; wherein... The second isolation section is located on the top surface of the first isolation section; The second isolation portion and the bottom photosensitive area are prepared simultaneously in the same process steps; The third isolation section and the central photosensitive region are prepared simultaneously in the same process steps.

4. The back-illuminated image sensor according to claim 3, characterized in that, The plane containing the top surface of the top photosensitive area is flush with the bottom surface of the oxide layer of the third isolation part; The top surface of the bottom photosensitive area is not higher than the top surface of the first isolation part.

5. The back-illuminated image sensor according to any one of claims 1-4, characterized in that, Also includes: Multiple trench isolation structures extend into the substrate via the first surface and are spaced apart along the first direction; The trench isolation structure is located directly below the isolation structure that is set up one-to-one; The grille is located directly above the isolation structure, which is set up one-to-one; A filter is located on the top surface of the photodiode.

6. A method for fabricating a back-illuminated image sensor, characterized in that, For fabricating a back-illuminated image sensor as described in any one of claims 1-5, comprising: A substrate is provided, the substrate including trench isolation structures extending into the substrate via a first surface and spaced apart along a first direction parallel to the first surface; Photodiodes and isolation structures are formed on the first surface in an alternating arrangement along the first direction; The isolation structure includes SiB layers and oxide layers alternately stacked along a second direction away from the substrate; The photodiode includes a bottom photosensitive region, a middle photosensitive region, and a top photosensitive region arranged along a second direction away from the substrate; the SiB layer extends along a first direction; the bottom photosensitive region and the top photosensitive region include SiAs layers arranged at intervals along the first direction and penetrating the SiB layer along the direction toward the substrate, and the SiB layer and the SiAs layers of the bottom photosensitive region and the top photosensitive region are alternately arranged in the photodiode region; the middle photosensitive region includes a SiP layer extending along the second direction to the top photosensitive region.

7. The preparation method according to claim 6, characterized in that, The isolation structure includes multiple isolation sections, each of which includes a SiB layer and an oxide layer arranged along the second direction; The plurality of isolation sections includes a first isolation section; The first isolation section includes: A first SiB layer and a first oxide layer are formed on the first surface; A first trench is formed, which is spaced apart along the first direction and penetrates the first oxide layer and the first SiB layer in the direction toward the substrate. A first SiAs layer is formed to at least fill the first trench; the remaining first SiB layer and the first oxide layer located directly above the trench isolation structure are used to form the first isolation portion.

8. The preparation method according to claim 7, characterized in that, The plurality of isolation sections includes a second isolation section, which is located on the top surface of the first isolation section; Forming the bottom photosensitive area includes: A second SiB layer and a second oxide layer are formed sequentially along the second direction on the top surface of the bottom photosensitive area and the first isolation portion; A second trench is formed that penetrates the second oxide layer and the second SiB layer along the direction toward the substrate; the remaining second SiB layer and the second oxide layer located directly above the first isolation portion are used to form the second isolation portion, and the remaining first SiAs layer is used to form the bottom photosensitive region.

9. The preparation method according to claim 8, characterized in that, The central photosensitive region is formed by: A SiP material layer is formed that at least fills the second trench; A third SiB layer and a third oxide layer arranged along the second direction are sequentially formed on the top surface of the SiP material layer and the second isolation portion. A third trench is formed, which is spaced apart along the first direction and extends through the third oxide layer and the third SiB layer in the direction toward the substrate, and extends into the SiP material layer. The remaining SiP material layer is used to form the SiP layer of the central photosensitive region.

10. The preparation method according to claim 9, characterized in that, Forming the top photosensitive area includes: After forming a second SiAs layer in the third trench, a grid material layer is formed on the top surface of the photodiode and the isolation structure; A grid trench is formed that extends through the grid material layer and the third oxide layer in a direction toward the substrate, and a grid is located on both sides of the grid trench. The remaining second SiAs layer is used to form the top photosensitive area.

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