A small area low temperature drift multiplier circuit

Abstract

This application provides a multiplier circuit with small area and low temperature drift. The multiplier circuit includes a first voltage module for receiving a first input current I1 and a second input current I2, and generating a first control voltage related to the first input current I1 and the second input current I2; a current module including a first resistor R1 and a first Zener diode D1 for generating a reference current IM1 in the circuit, the reference current IM1 being related to the first Zener diode D1 and the first resistor R1; a second voltage module connected to the first voltage module and the current module for generating a second control voltage related to the reference current IM1 and the output current IM2 driven by it, the second control voltage and the first control voltage satisfying a specific formula; and an output module including a second resistor R2 for converting the output current IM2 into an output voltage V. O And make the output voltage V O It satisfies a specific formula.

Description

Technical Field

[0001] This invention relates to the field of analog integrated circuit technology, and in particular to a multiplier circuit with small area and low temperature drift. Background Technology

[0002] Existing multiplier circuits typically consist of multiple operational amplifiers, transistors, and resistors. As is known in the art, operational amplifiers occupy a large area of ​​the control chip layout. Therefore, existing multiplier circuits generally have a large area.

[0003] Meanwhile, since control chips typically need to operate over a wide temperature range, multiplier circuits also require a relatively low temperature coefficient. Therefore, obtaining a multiplier circuit with a small area and low temperature drift is a pressing technical problem that needs to be solved in the current technology. Summary of the Invention

[0004] The purpose of this invention is to realize a multiplier circuit with small area and low temperature drift. By introducing a zero-temperature drift resistor, a low-temperature drift Zener diode, and a small number of components into the circuit structure, the circuit can significantly reduce temperature drift and chip area while realizing the multiplication function, thereby improving the overall calculation accuracy and integration.

[0005] According to the present invention, a multiplier circuit with small area and low temperature drift is provided, comprising:

[0006] A first voltage module is used to receive a first input current I1 and a second input current I2, and generate a first control voltage related to the first input current I1 and the second input current I2;

[0007] The current module, including a first resistor R1 and a first Zener diode D1, is used to generate a reference current IM1 in the circuit, wherein the reference current IM1 is equal to the reverse breakdown voltage V of the first Zener diode D1. D1 The ratio of the resistance of the first resistor R1 to the resistance of the first resistor R1;

[0008] The second voltage module, connected to the first voltage module and the current module, is used to generate a second control voltage related to the reference current IM1 and the output current IM2 driven by the reference current IM1;

[0009] The output module includes a second resistor R2 for converting the output current IM2 into an output voltage V. O .

[0010] In some embodiments, a voltage balance relationship satisfying the formula I1×I2=IM1×IM2 is established between the first control voltage and the second control voltage, and the output voltage V O Satisfy the following formula:

[0011] .

[0012] In some embodiments, in the current module, the power supply voltage V DD The power supply voltage V is connected to ground sequentially through the first switching transistor M1 and the third resistor R3. DD It is also grounded sequentially through the first resistor R1, the second switch M2, and the first current mirror structure, with a power supply voltage V. DD It is also grounded sequentially through the first Zener diode D1, the third switching transistor M3, and the first current mirror structure, with a power supply voltage V. DD It is also grounded sequentially through the fourth switch M4 and the first current mirror structure;

[0013] The control terminals of the first switch M1, the second switch M2, and the third switch M3 are all connected and are jointly connected to the current output terminal of the third switch M3.

[0014] The control terminal of the fourth switch M4 is connected to the current output terminal of the first switch M1.

[0015] In some embodiments, the first current mirror structure includes a fifth switch M5, a sixth switch M6, and a seventh switch M7.

[0016] The current input terminal of the fifth switch M5 is connected to the current output terminal of the second switch M2, the current input terminal of the sixth switch M6 is connected to the current output terminal of the third switch M3, the current input terminal of the seventh switch M7 is connected to the second voltage module, and the current output terminals of the fifth switch M5, the sixth switch M6 and the seventh switch M7 are all grounded.

[0017] The control terminals of the fifth switch M5, the sixth switch M6, and the seventh switch M7 are all connected and are jointly connected to the current input terminal of the fifth switch M5.

[0018] In some embodiments, in the first voltage module, the power supply voltage V DD Grounded sequentially through the eighth switch M8 and the ninth switch M9, the power supply voltage V DD It is also grounded sequentially through the tenth switch M10, the first transistor Q1, and the second transistor Q2. The first input current I1 is grounded through the eleventh switch M11, and the second input current I2 is grounded through the twelfth switch M12.

[0019] The control terminal of the eighth switch M8 is connected to the control terminal of the tenth switch M10, and they are both connected to the current output terminal of the eighth switch M8.

[0020] The control terminals of the ninth switch M9, the eleventh switch M11, and the twelfth switch M12 are all connected and are jointly connected to the current input terminal of the eleventh switch M11.

[0021] The collector of the first transistor Q1 is connected to the second voltage module, and the collector of the second transistor Q2 is connected to the second input current I2.

[0022] In some embodiments, both the first transistor Q1 and the second transistor Q2 are diode-connected.

[0023] In some embodiments, in the second voltage module, the power supply voltage V DD The thirteenth switch M13 is connected to the current input terminal of the seventh switch M7, and the power supply voltage V... DD It is also grounded sequentially through the fourteenth switch M14 and the fifteenth switch M15, with a power supply voltage V. DD It is also grounded sequentially through the sixteenth switch M16, the third transistor Q3, and the fourth transistor Q4;

[0024] The second voltage module also includes a seventeenth switching transistor M17, with a power supply voltage V. DD It is also grounded sequentially through the sixteenth switch M16, the third transistor Q3, and the seventeenth switch M17;

[0025] The control terminals of the thirteenth switch M13, the fourteenth switch M14, and the sixteenth switch M16 are all connected and together connected to the current output terminal of the thirteenth switch M13.

[0026] The control terminal of the fifteenth switch M15 is connected to the control terminal of the seventeenth switch M17, and they are both connected to the current input terminal of the fifteenth switch M15.

[0027] The base of the third transistor Q3 is connected to the collector of the first transistor Q1.

[0028] In some embodiments, the second voltage module further includes an eighteenth switching transistor M18, a nineteenth switching transistor M19, and a fifth transistor Q5;

[0029] The current input terminals of the eighteenth switch M18 and the nineteenth switch M19 are both connected to the power supply voltage V. DD The current output terminal of the eighteenth switch M18 is connected to the collector of the fourth transistor Q4, and the current output terminal of the nineteenth switch M19 is connected to the collector of the fifth transistor Q5.

[0030] The control terminal of the eighteenth switch M18 is connected to the control terminal of the nineteenth switch M19, and they are both connected to the current output terminal of the nineteenth switch M19.

[0031] The emitters of both the fourth transistor Q4 and the fifth transistor Q5 are grounded. The base of the fourth transistor Q4 is connected to the base of the fifth transistor Q5, and they are both connected to the collector of the fourth transistor Q4.

[0032] In some embodiments, in the output module, the power supply voltage V DD The circuit is grounded sequentially through the twentieth switch M20 and the second resistor R2;

[0033] The control terminal of the twentieth switch M20 is connected to the current output terminal of the nineteenth switch M19, and the current output terminal of the twentieth switch M20 outputs the output voltage V. O .

[0034] In some embodiments, the first resistor R1 and the second resistor R2 are zero temperature coefficient resistors.

[0035] According to the present invention, by establishing a voltage balance relationship between the first control voltage and the second control voltage in the circuit, an output voltage related to the first resistor R1, the second resistor R2, and the first Zener diode D1 is obtained. The temperature-dependent parameters of these devices can be selected according to the specific requirements of the circuit design, thereby ensuring that the output voltage remains relatively stable even under large changes in ambient temperature, significantly reducing the impact of temperature on the accuracy of multiplication operations.

[0036] Furthermore, by introducing a zero-temperature coefficient resistor and a low-temperature drift Zener diode, the multiplication coefficients of the multiplier circuit have low-temperature drift characteristics, thereby effectively reducing the impact of temperature changes on the output voltage. This allows the circuit to maintain higher stability and operational accuracy over a wide temperature range, while also enhancing the reliability and consistency of the circuit under actual operating conditions.

[0037] Furthermore, by employing a small number of components, a voltage module, a current module, and an output module composed of transistors and triodes are designed, thereby establishing a balanced relationship between the first control voltage and the second control voltage. This eliminates the need for operational amplifiers in the multiplier circuit of the present invention, significantly reducing the number of components in the circuit, reducing the chip layout area, and facilitating circuit integration and low-power design. Attached Figure Description

[0038] To more clearly illustrate the specific embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the specific embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present invention. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0039] Figure 1 A structural block diagram of a multiplier circuit with small-area low-temperature drift according to an embodiment of the present invention is shown;

[0040] Figure 2 A circuit topology diagram of a multiplier circuit with small area low temperature drift according to an embodiment of the present invention is shown.

[0041] In the diagram: 1-First voltage module, 2-Current module, 3-Second voltage module, 4-Output module. Detailed Implementation

[0042] The technical solution of the present invention will now be clearly and completely described with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0043] Figure 1 A block diagram of a small-area, low-temperature drift multiplier circuit according to an embodiment of the present invention is shown. Figure 1 As shown, the multiplier circuit includes a first voltage module 1, a current module 2, a second voltage module 3, and an output module 4. The first voltage module 1 receives a first input current I1 and a second input current I2, and generates a first control voltage related to the first input current I1 and the second input current I2. The current module 2 generates a mirror current to provide a stable drive for the subsequent voltage output. The second voltage module 3 is connected to the first voltage module 1 and the current module 2, and generates a second control voltage related to a reference current and the output current driven by the reference current. The output module 4 converts the output current into an output voltage, and makes the output voltage V... O It satisfies a specific formula related to the product of the first input current I1 and the second input current I2.

[0044] Figure 2 A circuit topology diagram of a small-area, low-temperature drift multiplier circuit according to an embodiment of the present invention is shown. Figure 2 As shown, the current module 2 includes a first resistor R1 and a first Zener diode D1, used to generate a reference current IM1 in the circuit, wherein the reference current IM1 is equal to the reverse breakdown voltage V of the first Zener diode D1.D1 The ratio of the resistance value of the first resistor R1 to the resistance value of the second voltage module 3. The second voltage module 3 is used to generate a second control voltage related to the reference current IM1 and the output current IM2 driven by the reference current IM1. The output module 4 includes a second resistor R2 for converting the output current IM2 into an output voltage V. O .

[0045] In some embodiments, a voltage balance relationship satisfying the formula I1×I2=IM1×IM2 is established between the first control voltage and the second control voltage, and the output voltage VO satisfies the following formula:

[0046] .

[0047] According to the above embodiment, by establishing a voltage balance relationship between the first control voltage and the second control voltage in the circuit, the output voltage related to the first resistor R1, the second resistor R2, and the first Zener diode D1 is obtained. The temperature-dependent parameters of these devices can be selected according to the specific requirements of the circuit design, so that the output voltage can remain relatively stable even when the ambient temperature changes significantly, thus significantly reducing the impact of temperature on the accuracy of multiplication operations.

[0048] In some embodiments, both the first resistor R1 and the second resistor R2 are zero-temperature coefficient resistors, and the first Zener diode D1 is a low-temperature drift Zener diode. Since both the first resistor R1 and the second resistor R2 are zero-temperature coefficient resistors, and the reverse breakdown voltage V of the first Zener diode D1... D1 The multiplier output voltage V is less affected by temperature. O Multiplication coefficients This is clearly a low temperature drift coefficient, which greatly reduces the temperature drift of the multiplier circuit.

[0049] According to the present invention, by introducing a zero-temperature coefficient resistor and a low-temperature drift Zener diode into the multiplier circuit structure, the multiplication coefficients of the multiplier circuit have low-temperature drift characteristics, thereby effectively reducing the influence of temperature changes on the output voltage, enabling the circuit to maintain higher stability and operational accuracy over a wide temperature range, while enhancing the reliability and consistency of the circuit under actual working conditions.

[0050] See Figure 2 In some embodiments, in this current module 2, the power supply voltage V DD The power supply voltage V is connected to ground sequentially through the first switching transistor M1 and the third resistor R3. DD It is also grounded sequentially through the first resistor R1, the second switch M2, and the first current mirror structure 21, with a power supply voltage V. DD It is also grounded sequentially through the first Zener diode D1, the third switching transistor M3, and the first current mirror structure 21, with a power supply voltage V. DDIt is also grounded sequentially through the fourth switch M4 and the first current mirror structure 21. The control terminals of the first switch M1, the second switch M2, and the third switch M3 are all connected and together connected to the current output terminal of the third switch M3. The control terminal of the fourth switch M4 is connected to the current output terminal of the first switch M1.

[0051] In some embodiments, the first current mirror structure 21 includes a fifth switch M5, a sixth switch M6, and a seventh switch M7. The current input terminal of the fifth switch M5 is connected to the current output terminal of the second switch M2, the current input terminal of the sixth switch M6 is connected to the current output terminal of the third switch M3, and the current input terminal of the seventh switch M7 is connected to the second voltage module 3. The current output terminals of the fifth switch M5, the sixth switch M6, and the seventh switch M7 are all grounded. The control terminals of the fifth switch M5, the sixth switch M6, and the seventh switch M7 are all connected and jointly connected to the current input terminal of the fifth switch M5. The current coefficient of this first current mirror structure 21 is 1.

[0052] By setting the fifth to seventh switches M5 in the first current mirror structure 21, the drain-source currents of the fifth switch M5 and the sixth switch M6 are kept consistent, forming a current replication relationship, thereby achieving a proportional mirror output of the reference branch current. This structure can ensure that the current ratio between the current mirror branches is constant at 1 under steady-state conditions, ensuring the current matching accuracy of each branch in the subsequent circuit, thereby maintaining the linearity and stability of the voltage and current relationship in the multiplier circuit.

[0053] By configuring current module 2, the multiplier circuit generates a reference current, which is then replicated and distributed through a multi-stage current mirror to provide a stable current input for the subsequent second voltage module. This achieves a voltage balance between the first and second control voltages, unaffected by temperature drift. Under this balance, the multiplier circuit can operate without an operational amplifier, while effectively suppressing the impact of temperature changes on circuit performance.

[0054] In some embodiments, in the first voltage module 1, the power supply voltage V DD Grounded sequentially through the eighth switch M8 and the ninth switch M9, the power supply voltage V DDThe transistors are grounded sequentially through the tenth switch M10, the first transistor Q1, and the second transistor Q2. The first input current I1 is grounded through the eleventh switch M11, and the second input current I2 is grounded through the twelfth switch M12. The control terminal of the eighth switch M8 is connected to the control terminal of the tenth switch M10, and they are both connected to the current output terminal of the eighth switch M8. The control terminals of the ninth switch M9, the eleventh switch M11, and the twelfth switch M12 are all connected, and they are all connected to the current input terminal of the eleventh switch M11. The collector of the first transistor Q1 is connected to the second voltage module 3, and the collector of the second transistor Q2 is connected to the second input current I2.

[0055] In this embodiment, the ninth switch M9, the eleventh switch M11, and the twelfth switch M12 constitute a second current mirror structure 11 with a current coefficient of 1, and the eighth switch M8 and the tenth switch M10 constitute a third current mirror structure 12 with a current coefficient of 1. By setting the current mirror structure, the reference current in the input branch can be proportionally replicated among multiple branches, thereby obtaining mirrored currents with equal amplitude and consistent direction at different nodes of the circuit. By setting the first voltage module 1, the multiplier circuit constructs a balanced relationship between the first control voltage and the second control voltage, thereby establishing a reference channel for the input current without relying on the operational amplifier, and generating a first control voltage related to the first input current I1 and the second input current I2.

[0056] In some embodiments, both the first transistor Q1 and the second transistor Q2 are connected in a diode configuration. The base of the first transistor Q1 is connected to its collector, and the base of the second transistor Q2 is connected to its collector.

[0057] In some embodiments, in the second voltage module 3, the power supply voltage V DD The thirteenth switch M13 is connected to the current input terminal of the seventh switch M7, and the power supply voltage V... DD It is also grounded sequentially through the fourteenth switch M14 and the fifteenth switch M15, with a power supply voltage V. DD It is also grounded sequentially through the sixteenth switch M16, the third transistor Q3, and the fourth transistor Q4. The second voltage module 3 also includes the seventeenth switch M17, with a power supply voltage V. DD The transistors are also grounded sequentially through the sixteenth switch M16, the third transistor Q3, and the seventeenth switch M17. The control terminals of the thirteenth switch M13, the fourteenth switch M14, and the sixteenth switch M16 are all connected and together connected to the current output terminal of the thirteenth switch M13. The control terminal of the fifteenth switch M15 is connected to the control terminal of the seventeenth switch M17 and together connected to the current input terminal of the fifteenth switch M15. The base of the third transistor Q3 is connected to the collector of the first transistor Q1.

[0058] In this embodiment, the thirteenth switch M13, the fourteenth switch M14, and the sixteenth switch M16 form a fourth current mirror structure 31 with a current coefficient of 1, and the fifteenth switch M15 and the seventeenth switch M17 form a fifth current mirror structure 32 with a current coefficient of 1. By setting the current mirror structure, the reference current from the preceding current module 2, after being sampled by the thirteenth switch M13, can be proportionally replicated in the subsequent branch through the fourteenth switch M14 and the sixteenth switch M16, thereby ensuring that the current in this branch maintains a constant proportional relationship with the preceding current. This structure can maintain the proportional consistency and temperature stability of the current mirror during current transmission, providing a stable current input for the subsequent voltage module, thereby ensuring the overall operational accuracy and low temperature drift characteristics of the multiplier circuit.

[0059] In some embodiments, the second voltage module 3 further includes an eighteenth switch M18, a nineteenth switch M19, and a fifth transistor Q5. The current input terminals of both the eighteenth switch M18 and the nineteenth switch M19 are connected to the power supply voltage V. DD The current output terminal of the eighteenth switching transistor M18 is connected to the collector of the fourth transistor Q4, and the current output terminal of the nineteenth switching transistor M19 is connected to the collector of the fifth transistor Q5. The control terminal of the eighteenth switching transistor M18 is connected to the control terminal of the nineteenth switching transistor M19, and they are both connected to the current output terminal of the nineteenth switching transistor M19. The emitters of both the fourth transistor Q4 and the fifth transistor Q5 are grounded, and the bases of the fourth transistor Q4 and the fifth transistor Q5 are connected to each other, and they are both connected to the collector of the fourth transistor Q4.

[0060] In some embodiments, in output module 4, the power supply voltage V DD The circuit is grounded sequentially through the twentieth switch M20 and the second resistor R2. The control terminal of the twentieth switch M20 is connected to the current output terminal of the nineteenth switch M19, and the current output terminal of the twentieth switch M20 outputs an output voltage V. O .

[0061] In the above embodiments, the eighteenth switch M18, the nineteenth switch M19, and the twentieth switch M20 constitute a sixth current mirror structure 33 with a current coefficient of 1. It should be noted that the current mirror structure used to achieve current replication and proportional maintenance in the circuit of the present invention is not limited to the switches shown in the circuit diagram of the present invention. It can also be other equivalent alternative structures capable of achieving the same current replication, proportional output, and stable control functions, such as a combination of MOSFETs or a combination of transistors. Furthermore, the current mirror structure can also be composed of multiple current mirror units or other equivalent circuit modules connected in series or parallel to meet different current output accuracy or temperature stability requirements.

[0062] Furthermore, in the multiplier circuit described above, the device types of the first switch transistor M1 to the twentieth switch transistor M20 are not limited to a specific form. MOSFETs or transistors can be selected according to process conditions and circuit requirements, or equivalent replacements can be made, so as to maintain normal operation and design compatibility of the circuit under different implementation methods.

[0063] The working principle of the multiplier circuit with small-area low-temperature drift of this application will be explained in detail below with reference to specific embodiments.

[0064] See Figure 2 The first switching transistor M1 to the twentieth switching transistor M20 are MOSFETs. The first transistor Q1 to the fifth transistor Q5 are NPN transistors. The first Zener diode D1 is a Zener diode. The first resistor R1 to the second resistor R2 are zero-temperature drift resistors. The connection point between the collector of the first transistor Q1 and the base of the third transistor Q3 is set as point A; the connection point between the emitter of the third transistor Q3 and the collector of the fourth transistor Q4 is set as point B; and the connection point between the emitter of the first transistor Q1 and the collector of the second transistor Q2 is set as point C.

[0065] The working principle of current module 2 is as follows:

[0066] When the power supply voltage V is applied DD Furthermore, when the first input current I1 and the second input current I2 are not input to the multiplier circuit, the third resistor R3 pulls down the control terminal voltage of the fourth switch M4, causing the fourth switch M4 to conduct. Because the fourth switch M4 is conducting, the power supply voltage V... DD The fourth switch M4, which is in operation, is connected to the control terminals of the fifth, sixth, and seventh switches M5 and M6, respectively. This pulls up the control terminal voltages of switches M5 through M7, turning them on. After the sixth switch M6 turns on, it pulls down the control terminal voltages of the first, third, and fourth switches M1 through M3, turning them on. At this time, the first switch M1 pulls up the control terminal voltage of the fourth switch M4, turning it off. Because the third resistor R3 is a megohm-level resistor, the current flowing through the first switch M1 and the third resistor R3 is extremely small. At this time, the power supply voltage V... DDWhen the first Zener diode D1 breaks down, current flows through the branch containing Zener diode D1, and current also flows through the branch containing the first resistor R1. Since the fifth to seventh switches M5 form a first current mirror structure 21 with a current coefficient of 1, the currents flowing through these switches are equal. Therefore, the currents flowing through the second and third switches M2 are also equal. Consequently, the current input voltages of the second and third switches M2 are also equal. Therefore, the voltage difference between the first resistor R1 and the first Zener diode D1 is also equal, and the current flowing through them is also equal. This current value is the ratio of the breakdown voltage of the first Zener diode D1 to the resistance of the first resistor R1, i.e., V. D1 / R1. Since the current flowing through the branch containing the sixth switch M6 is equal to the current flowing through the branch containing the seventh switch M7, both are V. D1 / R1, and since the seventh switch M7 and the thirteenth switch M13 are in the same branch, the reference current IM1 = V. D1 / R1.

[0067] The working principle of the first voltage module 1 is as follows:

[0068] When the first input current I1 and the second input current I2 are input to the multiplier circuit, the first input current I1 pulls up the control terminal voltages of the ninth switch M9, the eleventh switch M11, and the twelfth switch M12, turning them on. After the ninth switch M9 turns on, it pulls down the control terminal voltages of the eighth switch M8 and the tenth switch M10, turning them on. At this time, the voltages at points A and C are both pulled high. Since both the first transistor Q1 and the second transistor Q2 are diode-connected, as long as the power supply voltage V... DD If the sum of the turn-on voltages of transistors Q1 and Q2 is greater than the sum of their turn-on voltages, then transistors Q1 and Q2 will be turned on. The sum of their turn-on voltages is typically 1.4V, which is clearly less than the power supply voltage V. DDTherefore, the first transistor Q1 and the second transistor Q2 are turned on, and the voltage at point A is clamped to the sum of the on-state voltages. Since the ninth switch M9, the eleventh switch M11, and the twelfth switch M12 form a second current mirror structure 11 with a current coefficient of 1, the currents flowing through these three switches are equal, all being the first input current I1. Since the eighth switch M8 and the tenth switch M10 form a third current mirror structure 12 with a current coefficient of 1, the currents flowing through them are also equal, also being the first input current I1. At this time, since the base current of the first transistor Q1 is extremely small and can be ignored, the current flowing through the first transistor Q1 is the first input current I1, that is, the current flowing into point C is the first input current I1. Since the current flowing into the twelfth switch M12 through point C is also the first input current I1, it can be determined that the first input current I1 flows entirely into the twelfth switch M12 through point C, while the second input current I2 flows entirely into the second transistor Q2 through point C. From the above analysis, the voltage difference between the base and emitter of the first transistor Q1 is:

[0069] ;

[0070] The voltage difference between the base and emitter of the second transistor Q2 is:

[0071] ;

[0072] Therefore, the voltage at point A can be obtained from the first voltage module 1 as follows:

[0073] .

[0074] The working principle of the second voltage module 3 and the output module 4 is as follows:

[0075] Because the seventh switch M7 is turned on, it pulls down the control terminal voltages of the thirteenth, fourteenth, and sixteenth switches M13, M14, and M16, turning them on. Since these switches form a fourth current mirror structure 31 with a current coefficient of 1, the currents flowing through them are equal, all being the reference current IM1. Because the fourteenth switch M14 is turned on, it pulls up the control terminal voltages of the fifteenth and seventeenth switches M17, turning them on. After the seventeenth switch M17 turns on, it pulls down the voltage at point B, thus lowering the emitter voltage of the third transistor Q3. At this point, the emitter voltage of the third transistor Q3 is equal to the drain-source voltage difference V of the seventeenth switch M17.DS The voltage is typically 0.2V, so the third transistor Q3 is turned on. Because the sixteenth switch M16 and the third transistor Q3 are turned on, the base voltages of the fourth transistor Q4 and the fifth transistor Q5 are pulled high, causing them to turn on. This, in turn, pulls down the control terminal voltages of the eighteenth switch M18, the nineteenth switch M19, and the twentieth switch M20, turning on switches M18 through M20.

[0076] Since the fifteenth switch M15 and the seventeenth switch M17 form a fifth current mirror structure 32 with a current coefficient of 1, the currents flowing through the fifteenth switch M15 and the seventeenth switch M17 are equal, both being the reference current IM1. Furthermore, since the currents flowing through the sixteenth switch M16 and the third transistor Q3 are also the reference current IM1, the current flowing from the third transistor Q3 into point B is equal to the reference current IM1, and the current flowing from point B into the seventeenth switch M17 is also equal to the reference current IM1. Moreover, since the eighteenth switch M18 to the twentieth switch M20 form a sixth current mirror structure 33 with a current coefficient of 1, the currents flowing through the eighteenth switch M18 to the twentieth switch M20 are equal, denoted as the output current IM2. As can be seen from the above, the base currents of the fourth transistor Q4 and the fifth transistor Q5 are extremely small and can be ignored. Therefore, the output current IM2 flowing from the eighteenth switch M18 to point B flows entirely into the fourth transistor Q4.

[0077] From the above analysis, the voltage difference between the base and emitter of the third transistor Q3 is:

[0078] ;

[0079] The voltage difference between the base and emitter of the fourth transistor Q4 is:

[0080] ;

[0081] Therefore, the voltage at point A can be obtained from the second voltage module 3 as follows:

[0082] .

[0083] Therefore, after adjusting the first voltage module 1 and the second voltage module 3, the equation can be obtained by calculating the voltage at point A:

[0084] ;

[0085] At this point, all transistors Q1 through Q5 are designed to have the same parameters. Therefore, the parameters VT and IS of each transistor are the same, thus we can obtain:

[0086] ;

[0087] ;

[0088] At this time, the output current IM2 flowing through the twentieth switching transistor M20 of output module 4 flows into the second resistor R2, thus the output voltage of the multiplier can be obtained as follows:

[0089] .

[0090] Therefore, the multiplication coefficient of this multiplier circuit is R1×R2 / V. D1 Since the first resistor R1 and the second resistor R2 are zero-temperature coefficient resistors, and the reverse breakdown voltage V of the first Zener diode D1... D1 The multiplication factor is less affected by temperature; therefore, it is clearly a low-temperature drift factor, thus greatly reducing the temperature drift of the multiplier circuit. Furthermore, since the multiplier circuit of this invention does not require an operational amplifier and only a few components are needed, the chip layout area of ​​the multiplier circuit is significantly reduced.

[0091] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0092] The embodiments described above are merely illustrative of several implementations of the present invention, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the invention patent. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of the present invention, and these all fall within the protection scope of the present invention. Therefore, the protection scope of this invention patent should be determined by the appended claims.

Claims

1. A small area low temperature drift multiplier circuit, characterized by, The application relates to a current-mode control circuit, comprising: a first voltage module for receiving a first input current I1 and a second input current I2 and generating a first control voltage related to the first input current I1 and the second input current I2; The current module, including a first resistor R1 and a first Zener diode D1, is used to generate a reference current IM1 in the circuit, wherein the reference current IM1 is equal to the reverse breakdown voltage V of the first Zener diode D1. D1 The ratio of the resistance of the first resistor R1 to the resistance of the first resistor R1; a second voltage module connected to the first voltage module and the current module, for generating a second control voltage related to a reference current IM1 and an output current IM2 formed by the reference current IM1; an output module comprising a second resistor R2 for converting the output current IM2 into an output voltage V O ; A voltage balance relationship that satisfies the formula I1xI2=IM1xIM2 is established between the first control voltage and the second control voltage, and the output voltage V O satisfies the following formula: ； the first resistor R1 and the second resistor R2 are zero-temperature-coefficient resistors, and the first voltage regulator D1 is a low-temperature-drift voltage regulator.

2. The multiplier circuit of claim 1, wherein, In the current module, the power supply voltage V DD Through the first switch tube M1 and the third resistor R3 in turn, the power supply voltage V DD Also through the first resistor R1, the second switch tube M2 and the first current mirror structure in turn, the power supply voltage V DD Also through the first voltage stabilizing tube D1, the third switch tube M3 and the first current mirror structure in turn, the power supply voltage V DD Also through the fourth switch tube M4 and the first current mirror structure in turn; The control ends of the first switch tube M1, the second switch tube M2 and the third switch tube M3 are connected together and are commonly connected to the current output end of the third switch tube M3; the control end of the fourth switch tube M4 is connected to the current output end of the first switch tube M1.

3. The multiplier circuit of claim 2, wherein, The first current mirror structure comprises a fifth switch tube M5, a sixth switch tube M6 and a seventh switch tube M7; the current input end of the fifth switch tube M5 is connected to the current output end of the second switch tube M2, the current input end of the sixth switch tube M6 is connected to the current output end of the third switch tube M3, the current input end of the seventh switch tube M7 is connected to the second voltage module, and the current output ends of the fifth switch tube M5, the sixth switch tube M6 and the seventh switch tube M7 are grounded; the control ends of the fifth switch tube M5, the sixth switch tube M6 and the seventh switch tube M7 are connected together and are commonly connected to the current input end of the fifth switch tube M5.

4. The multiplier circuit of claim 3, wherein, In the first voltage module, the power voltage V DD The power voltage V is grounded through the eighth switch tube M8 and the ninth switch tube M9 in turn DD The first input current I1 is grounded through the eleventh switch tube M11, and the second input current I2 is grounded through the twelfth switch tube M12, further grounded through the tenth switch tube M10, the first triode Q1 and the second triode Q2 in turn the control end of the eighth switch tube M8 is connected to the control end of the tenth switch tube M10 and is commonly connected to the current output end of the eighth switch tube M8; the control ends of the ninth switch tube M9, the eleventh switch tube M11 and the twelfth switch tube M12 are connected together and are commonly connected to the current input end of the eleventh switch tube M11; the collector of the first triode Q1 is connected to the second voltage module, and the collector of the second triode Q2 is connected to the second input current I2.

5. The multiplier circuit of claim 4, wherein, The first triode Q1 and the second triode Q2 are both connected in diode mode.

6. The multiplier circuit of claim 5, wherein, In the second voltage module, the power supply voltage V DD The current input end connected to the seventh switch tube M7 through the thirteenth switch tube M13, the power supply voltage V DD The power supply voltage V is also grounded through the fourteenth switch tube M14 and the fifteenth switch tube M15 in turn; DD The power supply voltage V is also grounded through the sixteenth switch tube M16, the third triode Q3 and the fourth triode Q4 in turn; The second voltage module further comprises a seventeenth switch tube M17, and the power supply voltage V DD Also sequentially through the sixteenth switch tube M16, the third triode Q3 and the seventeenth switch tube M17 ground; the control ends of the thirteenth switch tube M13, the fourteenth switch tube M14 and the sixteenth switch tube M16 are connected together and are commonly connected to the current output end of the thirteenth switch tube M13; the control end of the fifteenth switch tube M15 is connected to the control end of the seventeenth switch tube M17 and is commonly connected to the current input end of the fifteenth switch tube M15; the base of the third triode Q3 is connected to the collector of the first triode Q1.

7. The multiplier circuit of claim 6, wherein, The second voltage module further comprises an eighteenth switch tube M18, a nineteenth switch tube M19 and a fifth triode Q5; The current input end of the eighteenth switch tube M18 and the nineteenth switch tube M19 is connected to the power supply voltage V DD The current output end of the eighteenth switch tube M18 is connected to the collector of the fourth triode Q4, and the current output end of the nineteenth switch tube M19 is connected to the collector of the fifth triode Q5. the control end of the eighteenth switch tube M18 is connected to the control end of the nineteenth switch tube M19 and is commonly connected to the current output end of the nineteenth switch tube M19; The emitter of the fourth transistor Q4 and the emitter of the fifth transistor Q5 are grounded, the base of the fourth transistor Q4 is connected with the base of the fifth transistor Q5, and the two bases are commonly connected to the collector of the fourth transistor Q4.

8. The multiplier circuit of claim 7, wherein, In the output module, the power voltage V DD In sequence through the twentieth switch tube M20 and the second resistance R2 ground; the control end of the twentieth switch tube M20 is connected to the current output end of the nineteenth switch tube M19, and the current output end of the twentieth switch tube M20 outputs the output voltage V O .

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