An over-temperature protection circuit for a power supply IC
By introducing a reference current source and a PTAT current source module into the power drive chip, and combining temperature decision and hysteresis comparator, temperature sensing and voltage comparison are performed only at the over-temperature protection point, which solves the problems of power consumption waste and misjudgment in the prior art and achieves low power consumption and high reliability over-temperature protection.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- HUNAN UNIV
- Filing Date
- 2024-01-10
- Publication Date
- 2026-07-10
AI Technical Summary
Existing power drive chips' over-temperature protection circuits continuously monitor the temperature across the entire temperature range, leading to unnecessary power consumption waste. Furthermore, near the over-temperature protection point, they are prone to misjudgment due to process fluctuations or noise, and the circuit area and cost are relatively large.
A reference current source module and a PTAT current source module are used to provide temperature-independent and temperature-dependent currents. Combined with a temperature decision module and a hysteresis comparator, temperature sensing and voltage comparison are performed only when the temperature exceeds the over-temperature protection point. The hysteresis comparator is used to solve the problem of repeated switching of power transistors caused by external disturbances.
It significantly reduces power loss, improves the reliability and stability of over-temperature protection circuits, avoids false triggering faults, and is suitable for power supply chips that require integrated over-temperature protection functions.
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Figure CN117878832B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of integrated circuit design, and in particular to an over-temperature protection circuit for power supply ICs. Background Technology
[0002] like Figure 1 As shown, a typical power driver chip integrates low-voltage devices, high-voltage power switching devices, and control circuits onto a single substrate using advanced high- and low-voltage compatible process and packaging technologies. This results in a chip with high integration and high reliability, finding wide application in home appliances, automotive electronics, industrial control, and other industrial fields. To ensure stable system operation, various protection circuits are also needed to promptly shut down the power transistors, preventing damage from abnormal operation. Among these, the over-temperature protection circuit monitors the temperature around the power transistor in real time and sends a feedback signal to the system to shut down the power transistor when the operating temperature exceeds a preset over-temperature protection point.
[0003] Such circuits typically convert temperature into an electrical signal, which is then used in conjunction with a comparator to detect the temperature. Traditional over-temperature protection circuits utilize a bandgap reference source in the power chip to generate a current proportional to absolute temperature (PTAT), which flows through a resistor, creating a voltage drop across the resistor that reflects the real-time temperature. This voltage drop is compared with a preset voltage representing the over-temperature protection point to generate a protection signal. The level of the protection signal determines whether to activate protection and shut down the power transistor.
[0004] However, in existing over-temperature protection circuits, when the power drive chip is working, the circuit performs temperature sensing and voltage signal comparison at any time across the entire temperature range, resulting in a large amount of unnecessary power consumption and very low energy utilization. Furthermore, using a smooth and continuous voltage signal to characterize temperature can easily lead to misjudgments near the over-temperature protection point due to factors such as process fluctuations or noise, resulting in low reliability. In addition, because the PTAT current differs greatly from the expected voltage, the resistance value of the resistor used to generate the PTAT voltage is extremely large, resulting in an excessively large circuit area.
[0005] In view of this, there is a need to provide an over-temperature protection circuit and method that, while retaining the advantages of simple structure, small area, and low production cost, also features low power consumption and high reliability. Summary of the Invention
[0006] The technical problem to be solved by the present invention is to provide an over-temperature protection circuit for power supply ICs, which, in view of the shortcomings of the prior art, performs temperature sensing and voltage comparison functions only when the temperature exceeds the over-temperature protection point, thereby significantly reducing power loss.
[0007] To solve the above-mentioned technical problems, the technical solution adopted by the present invention is: an over-temperature protection circuit for a power supply IC, comprising:
[0008] The reference current source module is used to provide a reference current that is approximately independent of temperature, i.e., the first output current;
[0009] The PTAT current source module is used to provide a PTAT current that is positively correlated with temperature, i.e., the second output current;
[0010] The temperature decision module is used to receive the first output current and the second output current, and to mirror and amplify the first output current and the second output current into the first input current and the second input current, respectively.
[0011] A temperature sensing module is used to receive the first output current and the output of the temperature decision module, i.e., the first signal, and output a second signal;
[0012] When the first input current is greater than the second input current, the first signal is at a low level;
[0013] When the first input current is less than the second input current, the first signal is at a high level;
[0014] When the first signal is low, the second signal is approximately shorted to ground;
[0015] When the first signal is high, the second signal is an analog voltage that is proportional to the absolute temperature.
[0016] This invention, while ensuring a wide operating temperature range, precisely senses temperature changes as voltage signals and performs voltage comparisons only when the junction temperature of the power device exceeds the over-temperature protection point. It does not perform this operation in the mid-to-low temperature range. Since the power chip operates normally at mid-to-low temperatures most of the time, this significantly reduces power loss. By designing the second signal characterizing temperature as an approximate step function with respect to temperature T at the over-temperature protection point, false triggering faults caused by process fluctuations or noise near the protection point can be effectively avoided.
[0017] Also includes:
[0018] A hysteresis comparator is used to receive the first signal and the second signal, and output a third signal;
[0019] The temperature sensing module is also used to mirror and amplify the first output current into a third input current.
[0020] When the first signal is low and the second signal is approximately shorted to ground, the third signal is low;
[0021] When the first signal is high and the second signal is proportional to the absolute temperature, the third signal is generated by a hysteresis comparator comparing the second signal with a preset voltage signal representing the over-temperature threshold. If the second signal is less than the preset voltage signal, the third signal is low; if the second signal is greater than the preset voltage signal, the third signal is high.
[0022] This invention uses a hysteresis comparator for comparison, which can solve the problem of repeated switching of power transistors caused by external disturbances. Therefore, it is suitable for use in power supply chips that require integrated over-temperature protection, thereby improving their lifespan and stability.
[0023] The reference current source module includes:
[0024] The first resistor has one end connected to the power supply.
[0025] The first PMOS transistor has its source connected to one end of the first resistor, its gate inputting a reference voltage signal, and its drain connected to the drain of the first NMOS transistor.
[0026] The first NMOS transistor has its gate and drain connected, and its source grounded.
[0027] The PTAT current source module includes:
[0028] The voltage clamping unit includes a second NMOS transistor, a third NMOS transistor, a second PMOS transistor, and a third PMOS transistor; the sources of the second PMOS transistor and the third PMOS transistor are connected to the power supply, the drain of the second PMOS transistor is connected to the drain of the second NMOS transistor, and the drain of the third PMOS transistor is connected to the drain of the third NMOS transistor; the gates of the second PMOS transistor and the third PMOS transistor are connected, and the gates of the second NMOS transistor and the third NMOS transistor are connected.
[0029] ΔV BE The generation unit includes a first transistor and a second transistor. The collector of the first transistor is connected to the source of the second NMOS transistor, and the collector of the second transistor is connected to the source of the third NMOS transistor. The base of the first transistor is connected to the collector of the second transistor, and the base of the second transistor is connected to the collector of the first transistor. The source of the first transistor is grounded, and the source of the second transistor is connected to one end of a second resistor. The other end of the second circuit is grounded. ΔV BE This is the voltage drop across the second resistor.
[0030] The current I of the second resistor out2 The calculation formula is: Among them, V Tis the thermal voltage, n is the ratio of the collector junction area of the first transistor to that of the second transistor, K is the Boltzmann constant, q is the electron charge, T is the thermodynamic temperature, and R2 is the resistance of the second resistor.
[0031] The temperature determination module includes:
[0032] The current amplification unit includes a fourth NMOS transistor and a fourth PMOS transistor. The gate of the fourth NMOS transistor is connected to the gate of the first NMOS transistor, and the source of the fourth NMOS transistor is grounded. The gate of the fourth PMOS transistor is connected to the gate of the third PMOS transistor, and the source of the fourth PMOS transistor is connected to the power supply.
[0033] The current comparison unit includes a fifth NMOS transistor, a sixth NMOS transistor, a seventh NMOS transistor, an eighth NMOS transistor, a fifth PMOS transistor, a sixth PMOS transistor, a seventh PMOS transistor, and an eighth PMOS transistor. The gate of the fifth NMOS transistor is connected to the gate of the sixth NMOS transistor, and the sources of both the fifth and sixth NMOS transistors are grounded. The drain of the fifth NMOS transistor is connected to the source of the seventh NMOS transistor, the drain of the sixth NMOS transistor is connected to the source of the eighth NMOS transistor, the gate of the seventh NMOS transistor is connected to the gate of the eighth NMOS transistor, and the gate and drain of the seventh NMOS transistor are connected. The drain of the eighth NMOS transistor is connected to the drain of the eighth PMOS transistor. The sources of the fifth and sixth PMOS transistors are connected to a power supply, the gates of the fifth and sixth PMOS transistors are connected, the drain of the fifth PMOS transistor is connected to the source of the seventh NMOS transistor, the drain of the sixth PMOS transistor is connected to the source of the eighth PMOS transistor, the gate of the seventh PMOS transistor is connected to the gate of the eighth PMOS transistor, and the gate and drain of the seventh PMOS transistor are connected.
[0034] First input current α is the ratio of the width-to-length ratio of the third PMOS transistor to that of the fourth PMOS transistor; the second input current. β is the ratio of the width-to-length ratio of the third NMOS transistor to that of the fourth NMOS transistor, K is the Boltzmann constant, and V IN External power supply voltage, V REF It is the reference voltage used in low-voltage CMOS circuits in power chips, V th It is the threshold voltage of the MOSFET, V thp It is the threshold voltage of the PMOS transistor.
[0035] The temperature sensing module includes:
[0036] An inverter includes a ninth NMOS transistor and a ninth PMOS transistor. The gate of the ninth NMOS transistor is connected to the gate of the ninth PMOS transistor, the drain of the ninth NMOS transistor and the drain of the ninth PMOS transistor are connected, the source of the ninth NMOS transistor is grounded, and the source of the ninth PMOS transistor is connected to a power supply.
[0037] The analog switching unit includes tenth to fourteenth NMOS transistors and tenth to fourteenth PMOS transistors; wherein the source of the tenth NMOS transistor and the source of the eleventh NMOS transistor are grounded, the gate of the tenth NMOS transistor receives the first signal, the drain of the tenth NMOS transistor is connected to the drain of the fourteenth NMOS transistor, the gate of the eleventh NMOS transistor is connected to the drain of the tenth NMOS transistor, the drain of the eleventh NMOS transistor is connected to the drain of the fourteenth PMOS transistor, the drain of the twelfth NMOS transistor is grounded, the gate of the twelfth NMOS transistor is connected to the drain of the ninth NMOS transistor, the source of the twelfth NMOS transistor is connected to the gate of the eleventh NMOS transistor, the gate of the fourteenth NMOS transistor is connected to the drain of the ninth NMOS transistor, the source of the fourteenth NMOS transistor is connected to the source of the thirteenth NMOS transistor, and the thirteenth NMOS transistor... The gate of the 11th PMOS transistor is connected to the drain of the 9th NMOS transistor, and the drain of the 13th NMOS transistor is connected to the drain of the 10th PMOS transistor. The sources of the 10th and 11th PMOS transistors are both connected to the power supply. The gate of the 10th PMOS transistor receives the first signal. The gate of the 11th PMOS transistor is connected to the drain of the 13th NMOS transistor, and the drain of the 11th PMOS transistor is connected to the drain of the 13th PMOS transistor. The drain of the 12th PMOS transistor is grounded. The gate of the 12th PMOS transistor receives the first signal, and the source of the 12th PMOS transistor is connected to the gate of the 11th PMOS transistor. The gate of the 14th PMOS transistor receives the first signal, and the drain of the 14th PMOS transistor is connected to the drain of the 13th PMOS transistor. The gate of the 13th PMOS transistor receives the first signal, and the drain of the 13th PMOS transistor is connected to the drain of the 14th PMOS transistor.
[0038] The temperature sensing unit includes a fifteenth NMOS transistor, the drain of which is connected to one end of a diode, the source of which is grounded, and the gate of which is connected to the gate of the fourth NMOS transistor.
[0039] Third input current I in3 The expression is: γ is the ratio of the width-to-length ratio of the fourth NMOS transistor to the width-to-length ratio of the fifteenth NMOS transistor.
[0040] The hysteresis comparator includes:
[0041] An operational amplifier with a preset voltage input at the non-inverting input terminal and the second signal input at the inverting input terminal;
[0042] The third resistor has one end connected to the power supply and the other end connected to one end of the fourth resistor and the non-inverting input terminal of the operational amplifier. The other end of the fourth resistor is connected to one end of the fifth resistor, and the other end of the fifth resistor is grounded.
[0043] The output terminal of the operational amplifier is connected to the gate of the sixteenth NMOS transistor, the source of the sixteenth NMOS transistor is grounded, and the drain is connected to the fifth resistor.
[0044] Compared with existing technologies, the beneficial effects of this invention are as follows: This invention adopts a temperature-segmented triggering mode and hysteresis comparator technology, which, while ensuring a wide operating temperature range, only performs temperature sensing and voltage comparison functions when the temperature exceeds the over-temperature protection point, significantly reducing power loss; by setting a large difference between the temperature signal before and after the over-temperature protection point, it can effectively avoid false triggering faults caused by process fluctuations or noise near the protection point; by using a hysteresis comparator for comparison, it can solve the problem of repeated switching of power transistors caused by external disturbances, thus making it suitable for application in power supply chips that require integrated over-temperature protection functions, improving their lifespan and stability. Attached Figure Description
[0045] Figure 1 This is a topology diagram of a typical power supply chip;
[0046] Figure 2 This is a functional block diagram of the over-temperature protection circuit according to an embodiment of the present invention;
[0047] Figure 3 This is a connection diagram of an over-temperature protection circuit in an embodiment of the present invention;
[0048] Figure 4 This is a waveform diagram of the over-temperature protection point in the embodiment of the present invention;
[0049] Figure 5 This is a waveform diagram of the first input current and the second input current in the embodiment of the present invention;
[0050] Figure 6 This is a waveform diagram of the second signal in the embodiment of the present invention;
[0051] Figure 7 This is a waveform diagram of the over-temperature protection point hysteresis window in the embodiment of the present invention. Detailed Implementation
[0052] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.
[0053] like Figure 2 and Figure 3 As shown, this embodiment of the invention provides an over-temperature protection circuit for a power supply IC.
[0054] like Figure 2 The over-temperature protection circuit of this invention includes a reference current source module, a temperature decision module, and a temperature sensing module connected in sequence. The output terminal of the reference current source module is connected to the temperature sensing module. The output terminals of the temperature sensing module and the temperature decision module are both connected to the hysteresis comparator module. The PTAT current source module is connected to the temperature decision module.
[0055] The over-temperature protection circuit includes: a reference current source module 110, a PTAT current source module 120, a temperature decision module 130, a temperature sensing module 140, and a hysteresis comparator module 150.
[0056] The reference current source module 110 is connected to the temperature decision module 130 and the temperature sensing module 140, and provides the temperature decision module 130 and the temperature sensing module 140 with a reference current that is approximately independent of temperature as the first output current.
[0057] The PTAT current source module 120 is connected to the temperature decision module 130 and provides the temperature decision module 130 with a PTAT current that is positively correlated with temperature as a second output current.
[0058] The temperature decision module 130 is connected to the reference current source module 110 and the PTAT current source module 120, and is used to receive the first output current and the second output current, and respectively mirror and amplify them into the first input current and the second input current; it is connected to the temperature sensing module 140 and the hysteresis comparator module 150, and determines whether the first input current is greater than the second input current, and provides a first signal as the first output voltage to the temperature sensing module 140 and the hysteresis comparator module 150 according to the decision result; if yes, the first signal is low level, and if no, the first signal is high level.
[0059] The temperature sensing module 140 is connected to the reference current source module 110 to receive the first output current and amplify it into a third input current; it is connected to the temperature decision module 130 to receive the first signal; and it is connected to the hysteresis comparator module 150 to generate a corresponding second signal as the second output voltage based on the value of the first signal and provide it to the hysteresis comparator module 150.
[0060] If the first signal is low, the second signal is approximately shorted to ground; if the first signal is high, the second signal is approximately open-circuited.
[0061] Hysteresis comparator module 150 is connected to temperature decision module 130 for receiving a first signal; it is also connected to temperature sensing module 140 for receiving a second signal and generating a third signal as the total output voltage based on the state of the second signal.
[0062] If the second signal is approximately shorted to ground, the third signal will be at a low level; if the second signal is approximately open-circuited, the fourth signal will be at a high level.
[0063] The structure and function of each module will be explained in detail below.
[0064] The reference current source module 110 includes: a first resistor R1, a PMOS transistor P1 (the first PMOS transistor, and the order of the PMOS transistors below follows the subscript of P, for example, P2 represents the second PMOS transistor, P3 represents the third PMOS transistor) and an NMOS transistor N1 (the first NMOS transistor, and the order of the NMOS transistors below follows the subscript of N, for example, N2 represents the second NMOS transistor, N3 represents the third NMOS transistor).
[0065] The first end of the first resistor R1 is connected to the power supply terminal of the over-temperature protection circuit, and the second end of the first resistor R1 is connected to the source of the PMOS transistor P1.
[0066] The gate of PMOS transistor P1 is connected to the first input terminal of the over-temperature protection circuit, and the drain of PMOS transistor P1 is connected to the drain of NMOS transistor N1.
[0067] The gate of NMOS transistor N1 is connected to the drain of NMOS transistor N1, and the source of NMOS transistor N1 is grounded.
[0068] The current reference module 110 provides a reference current I to the temperature decision module 130 and the hysteresis comparator module 150. out1 I out1 The over-temperature protection circuit supplies voltage V in Subtract the absolute value of the threshold voltage of P1 of the PMOS transistor, then subtract V. REF The voltage is obtained by dividing the first resistor R1, i.e.
[0069] PTAT current source module 120 includes: voltage clamping unit, ΔV BE The generating unit and resistor R2.
[0070] The voltage clamping unit includes NMOS transistors N2 and N3 and PMOS transistors P2 and P3. NMOS transistors N2 and N3 form a current mirror, and PMOS transistors P2 and P3 form another current mirror.
[0071] The sources of PMOS transistors P2 and P3 are connected to the power supply terminal of the over-temperature protection circuit. The drain of PMOS transistor P2 is connected to the drain of NMOS transistor N2, and the drain of PMOS transistor P3 is connected to the drain of NMOS transistor N3. The gates of PMOS transistors P2 and P3 are connected, and the gates of NMOS transistors N2 and N3 are connected.
[0072] The gate and drain of PMOS transistor P3 are shorted, and the gate and drain of NMOS transistor N2 are shorted. The two sets of current mirrors are mirror images of each other. Their purpose is to form a self-biased structure, so that NMOS transistors N2 and N3 have the same source potential, which plays a role in voltage clamping.
[0073] ΔV BE The generation unit includes transistors Q1 and Q2. The collector of transistor Q1 is connected to the source of NMOS transistor N2, and the collector of transistor Q2 is connected to the source of NMOS transistor N3. The base of transistor Q1 is connected to the collector of transistor Q2, and the base of transistor Q2 is connected to the collector of transistor Q1.
[0074] The source of transistor Q1 is shorted to ground, and the source of transistor Q2 is connected to the first end of resistor R2.
[0075] Since the second terminal of resistor R2 is shorted to ground, the voltage drop across resistor R2 is equal to the base-emitter voltage difference ΔV between transistors Q1 and Q2. BE =V BE1 -V BE2 Due to ΔV BE It has a positive temperature characteristic, therefore the current flowing through resistor R2 is the PTAT current I, which also has a positive temperature characteristic. out2 Its value is: Where V T q is the thermal voltage, n is the ratio of the collector junction areas of transistors Q1 and Q2, K is the Boltzmann constant, q is the electron charge, and T is the thermodynamic temperature.
[0076] The temperature decision module 130 includes a current mirror unit and a current comparison unit.
[0077] The current amplification unit includes an NMOS transistor N4 and a PMOS transistor P4. The gate of the NMOS transistor N4 is connected to the gate of the NMOS transistor N1, and the source of the NMOS transistor N4 is grounded. The gate of the PMOS transistor P4 is connected to the gate of the PMOS transistor P3, and the source of the PMOS transistor P4 is connected to the power supply terminal of the over-temperature protection circuit.
[0078] The current amplification unit receives and mirrors the current I generated by the reference current source module 110 and the PTAT current source module 120, respectively. out1 I out2 This generates the first input current I. in1 With the second input current I in2 .
[0079] First input current Where α is the ratio of the width to the length of PMOS transistors P3 and P4.
[0080] Second input current Where β is the ratio of the width to the length of NMOS transistors N3 and N4.
[0081] The purpose of the current amplification unit is to make I... in1 with I in2 The same current value is achieved at the desired over-temperature protection point T0. That is, I in1 (T0)=I in2 (T0). Therefore, I in1 in2 When this occurs, it indicates that the real-time temperature has not reached the protection point; I in1 >I in2 When the temperature reaches the protection point, it indicates that the real-time temperature has reached the protection point.
[0082] The current comparator unit includes NMOS transistors N5, N6, N7, and N8, and PMOS transistors P5, P6, P7, and P8.
[0083] The sources of NMOS transistors N5 and N6 are grounded and their gates are connected. The drain of NMOS transistor N5 is connected to the source of NMOS transistor N7, and the drain of NMOS transistor N6 is connected to the source of NMOS transistor N8. The gates of NMOS transistors N7 and N8 are connected. The gate and drain of NMOS transistor N7 are connected, and the drain of NMOS transistor N8 is connected to the drain of PMOS transistor P8.
[0084] The sources of PMOS transistors P5 and P6 are connected to the power supply terminal of the over-temperature protection circuit, and their gates are connected. The drain of PMOS transistor P5 is connected to the source of NMOS transistor P7, the drain of PMOS transistor P6 is connected to the source of PMOS transistor P8, the gates of PMOS transistors P7 and P8 are connected, and the gate and drain of PMOS transistor N7 are connected.
[0085] The current comparison unit converts the first input current I into a Cascode current mirror. in1 Second input current I in2 Introducing the same branch, the first signal V is output based on the current magnitude. out1 .
[0086] If the first input current I in1 Greater than the second input current I in2 , that is I in1 >I in2 Then the first signal V out1 The first input current I is pulled low by NMOS transistors N6 and N8; in1 Less than the second input current I in2 , that is I in1 in2 Then the first signal V out1 The temperature is determined by pulling P6 and P8 high.
[0087] The temperature sensing module 140 includes an inverter, an analog switching unit, and a temperature sensing unit.
[0088] The inverter includes an NMOS transistor N9 and a PMOS transistor P9. The gates of the NMOS transistor N9 and the PMOS transistor P9 are connected and connected to the first signal output terminal of the temperature decision module 130, and their drains are connected. The source of the NMOS transistor N9 is grounded, and the source of the PMOS transistor P9 is connected to the power supply terminal of the over-temperature protection circuit.
[0089] The inverter receives the first signal and outputs a signal with the opposite polarity to its level, providing the on and off conditions for the analog switch unit.
[0090] The analog switching unit includes an NMOS transistor. 10 N 11 N 12 N 13 N 14 and PMOS transistor P 10 P 11 P 12 P 13 P 14 The NMOS transistor N 10 N 11 The source of the NMOS transistor is grounded. 10 The gate is connected to the first signal, and the drain is connected to the NMOS transistor N. 14 The drain of the NMOS transistor N 11 The gate of the NMOS transistor is connected to the NMOS transistor. 10 The drain of the PMOS transistor is connected to the P2P4 diode. 14 The drain electrode.
[0091] NMOS transistor N 12 The drain of N1 is grounded, the gate is connected to the drain of N9, and the source is connected to N1. 11 The gate.
[0092] NMOS transistor N 14 The gate of N9 is connected to the drain of NMOS transistor N9, and the source is connected to the drain of NMOS transistor N9. 13 The source of the NMOS transistor. 13 The gate of the transistor is connected to the drain of the NMOS transistor N9, and the drain is connected to the PMOS transistor P. 10 The drain electrode.
[0093] PMOS transistor P 10 P 11 The source of the PMOS transistor is connected to the power supply terminal of the over-temperature protection circuit. 10 The gate of the PMOS transistor is connected to the first signal. 11 The gate of the NMOS transistor is connected to the N. 13 The drain of P is connected to the PMOS transistor P. 13 The drain electrode.
[0094] PMOS transistor P 12 The drain is grounded, the gate is connected to the first signal, and the source is connected to the PMOS transistor P. 11 The gate.
[0095] PMOS transistor P 14 The gate is connected to the first signal, and the drain is connected to the PMOS transistor P. 13 The drain of the PMOS transistor P 13 The gate is connected to the first signal, and the drain is connected to the PMOS transistor P. 14 The drain electrode.
[0096] NMOS transistor N 13 N 14 and PMOS transistor P 13 P 14 It forms an analog transmission gate structure with very low on-resistance, whose on- and off-resistance are determined by the first signal and its inverted signal.
[0097] When the first signal is low, NMOS transistor N 13 N 14 Turn on, PMOS transistor P 13 P 14 If it is also conducting, then the analog transmission gate is conducting, which will turn on the NMOS transistor N. 13 The drain voltage signal is transmitted to the NMOS transistor N. 14 The drain of the NMOS transistor. 10 The drain of the PMOS transistor P10 The drain of the NMOS transistor is connected via an analog transmission gate. 11 The drain of the PMOS transistor P 11 The drains are also connected through analog transmission gates, forming two sets of inverters.
[0098] When the first signal is low, the circuit means that the real-time temperature has not reached the over-temperature protection threshold. The second signal is also pulled low through two inverters, turning off the temperature sensing unit.
[0099] When the first signal is high, NMOS transistor N 13 N 14 Cut-off, PMOS transistor P 13 P 14 If it is also cut off, then the analog transmission gate is turned off, and at the same time, the NMOS transistor N... 12 Turn on, turn on NMOS transistor N 11 The gate of the NMOS transistor is pulled low, causing the NMOS transistor to... 11 Turn off, PMOS transistor N 12 Turn on, turn on PMOS transistor P 11 The gate of the PMOS transistor is pulled high, causing the PMOS transistor P to... 11 It is also closed.
[0100] When the first signal is high, the circuit means that the real-time temperature may have reached the over-temperature protection threshold. At this time, the entire analog switch unit does not transmit any signal. The second signal does not depend on the previous stage and enables the temperature sensing unit.
[0101] Diode D and the temperature sensing unit include NMOS transistor N 15 The first terminal of diode D is connected to the power supply terminal of the over-temperature protection circuit, and the second terminal is connected to the NMOS transistor N. 15 The drain of the NMOS transistor N 15 The source of the transistor is grounded, and its gate is connected to the gate of the NMOS transistor N4.
[0102] The NMOS transistor serves to mirror and amplify the first output current provided by the reference current source module 110, and then amplify it into a third input current I with an approximate zero temperature coefficient. in3 Its value is Where γ is the NMOS transistor N4 and NMOS transistor N 15 The ratio of width to length.
[0103] Third input current I in3 When current flows through diode D, a second signal with a positive temperature coefficient is generated at the second terminal of diode D by utilizing the temperature characteristics of the diode voltage. This signal is only generated when the first signal is high, i.e., when the real-time temperature may reach the over-temperature protection threshold; otherwise, it is always zero.
[0104] Hysteresis comparator module 150 includes operational amplifier A1 and NMOS transistor N 16 And resistors R3, R4, and R5.
[0105] Operational amplifier A1 includes a non-inverting input terminal, an inverting input terminal, and an output terminal. The non-inverting input terminal is connected to a preset voltage that represents the over-temperature protection threshold point, and the inverting input terminal is connected to a second signal that represents the real-time temperature. The second signal is compared with the preset voltage signal, and a third signal representing the comparison result is output from the output terminal.
[0106] When the current comparison result indicates that the temperature has not triggered the over-temperature protection, the second signal is always zero and always less than the preset voltage, and the third signal is low, indicating that the temperature has not exceeded the limit.
[0107] When the current comparison result indicates that the temperature may reach the over-temperature protection point, the second signal is generated by the normal operation of the temperature sensing unit. If it is less than the preset voltage, the third signal is low, indicating that the temperature is not over-temperature; if it is greater than the preset voltage, the third signal is high, indicating that the temperature is too high and over-temperature protection is executed.
[0108] The first end of resistor R3 is connected to the power supply terminal of the over-temperature protection circuit, the second end is connected to the first end of resistor R4 and the non-inverting input terminal of the operational amplifier, the second end of resistor R4 is connected to the first end of resistor R5, and the second end of resistor R5 is grounded.
[0109] Preset voltage V A The voltage is generated by the voltage divider formed by resistors R3, R4, and R5, and its value is...
[0110] NMOS transistor N 16 The gate of the circuit is connected to the output of the operational amplifier, the source is grounded, and the drain is connected to the first terminal of resistor R5. This is to construct an external positive feedback network for the operational amplifier, generating hysteresis and forming a hysteresis comparator. The value of the hysteresis is...
[0111] This constitutes an over-temperature protection circuit that can effectively determine whether the operating environment of the power transistor inside the chip is truly over-temperature, has low power consumption, can achieve high reliability detection, and also has hysteresis function.
[0112] This invention also provides an over-temperature protection method for power supply ICs, the specific steps of which are as follows:
[0113] S1. A reference current is generated by the reference current source module;
[0114] S2, PTAT current is generated by the PTAT current source module;
[0115] S3, the temperature judgment module mirrors and amplifies the reference current and compares it with the PTAT current. It starts to output a high-level first signal 5 to 10°C before the required over-temperature protection point, indicating that over-temperature may occur; otherwise, it outputs a low-level signal, indicating that over-temperature has not occurred.
[0116] S4. When the first signal is low, the inverter and analog switch unit in the temperature sensing module work, pulling the second signal close to ground. The temperature sensing unit does not work, and the output second signal is low. When the first signal is high, the inverter and analog switch unit in the temperature sensing module do not work. The temperature sensing unit works and uniquely determines the magnitude of the second signal to characterize the real-time temperature value.
[0117] S5. When both the first and second signals are low, or when the first signal is high but the second signal is low, it indicates that over-temperature has not occurred, and the third signal is output as low. Only when both the first and second signals are high, it indicates that the system is over-temperature, and the third signal is output as high as an over-temperature protection signal.
[0118] S6. When the third signal is low, the power transistor operates normally; when the third signal is high, over-temperature protection is activated, turning off the power transistor to prevent damage or reduced lifespan due to overheating. (See also...) Figure 4 As shown, this embodiment of the invention provides an over-temperature protection circuit. In this circuit, the upper limit of the operating temperature range can be set as the over-temperature protection threshold by adjusting the size of the MOSFET and the parameters of the components. The circuit outputs a high or low level signal indicating whether an over-temperature condition has occurred, using a temperature detection function. Figure 4 This is a waveform diagram of the over-temperature protection point in an embodiment of the present invention. Figure 4 In the demonstration, the over-temperature protection point was set at approximately 120°C. When the temperature was below 120°C, the circuit did not experience over-temperature, the output was low, and the protection was not activated. When the temperature was above 120°C, the circuit experienced an over-temperature fault, the output was high, and the over-temperature protection was activated.
[0119] Simultaneously refer to Figure 5 As shown, this embodiment of the invention provides an over-temperature protection circuit. In this over-temperature protection circuit, by adjusting the first input current and the second input current, the two are made to have the same current value at a preset over-temperature protection point, thereby controlling the first signal to exhibit opposite polarity levels in different temperature ranges before and after the over-temperature protection point. Figure 5 This is a schematic diagram of the waveforms of the first input current and the second input current in an embodiment of the present invention. Figure 5In the demonstration, the over-temperature protection point was set at approximately 120°C. When the temperature was below 120°C, the circuit did not overheat, and the first input current was greater than the second input current, which would pull the first signal down to a low level. When the temperature was below 120°C, the circuit experienced an over-temperature fault, and the first input current was less than the second input current, which would pull the first signal up to a high level.
[0120] Simultaneously refer to Figure 6 As shown, this embodiment of the invention provides an over-temperature protection circuit in which the second signal has different values and physical meanings in different temperature ranges. Within the operating range before the over-temperature protection point, the second signal is approximately pulled down to ground, causing the temperature sensing unit to not perform its sensing function, and the circuit will not trigger protection, saving a significant amount of unnecessary power consumption. Within the operating range after the over-temperature protection point, the temperature sensing unit performs its sensing function, and the second signal is directly generated and determined by the temperature sensing unit to accurately characterize the real-time temperature. Figure 6 In the illustrated scenario, the solid line represents the temperature-dependent change of the second signal in this embodiment. The over-temperature protection point is set at approximately 120°C. When the temperature is below 120°C, the circuit does not experience over-temperature, and the second signal is approximately pulled down to ground. When the temperature exceeds 120°C, an over-temperature fault occurs. The second signal is a voltage quantity that is directly proportional to the temperature. Figure 6 The dashed line represents the corresponding temperature sensing value in a traditional over-temperature protection circuit, indicating that the sensing function is performed throughout the entire operating temperature range.
[0121] Simultaneously refer to Figure 7 As shown, this embodiment of the invention provides an over-temperature protection circuit. In this circuit, the hysteresis comparator module 150 generates different protection thresholds when the temperature changes in different directions. This effectively prevents repeated protection triggering caused by frequent temperature changes near the protection point, thus reducing the lifespan of the power transistor. Since this embodiment of the invention is applied to power supply ICs, it is commonly used in scenarios with harsh temperature environments and drastic temperature changes. Figure 6 In the demonstration, according to automotive-grade standards, the temperature range is defined as -40℃ to 150℃, with 150℃ being the over-temperature protection point. However, considering possible testing errors, a certain margin should be allowed. Figure 6 In the demonstration, when the temperature rises to 147°C, the over-temperature protection is activated, and the third signal is output at a high level. When the temperature drops back to 135°C, the over-temperature protection is deactivated, and the third signal is output at a low level. The temperature hysteresis is 12°C.
[0122] The main calculation formulas involved in the embodiments of the present invention are as follows:
[0123] Formula 1: The circuit's reference current, i.e., the first output current.
[0124] Formula 2: The PTAT current of the circuit, i.e., the second output current.
[0125] Formula 3: When the temperature judgment module 130 is working, the input current of the positive power supply branch, i.e., the first input current.
[0126] Formula 4: When the temperature judgment module 130 is working, the input current of the negative power supply side branch, i.e., the second input current.
[0127] Formula 5: When the temperature sensing module 140 is working, the current injected into diode D is the third input current.
[0128] Formula 6: The voltage at the positive input terminal of the hysteresis comparator module 150 when it is operating, i.e., the preset voltage.
[0129] Formula 7: When the hysteresis comparator module 150 is working, the difference in threshold voltage of the comparator under input voltage in different directions is the hysteresis voltage.
[0130] Although preferred embodiments of this application have been described, those skilled in the art, upon learning the basic inventive concept, can make other changes and modifications to these embodiments. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments as well as all changes and modifications falling within the scope of this application.
[0131] Obviously, those skilled in the art can make various modifications and variations to this application without departing from the spirit and scope of this application. Therefore, if such modifications and variations fall within the scope of the claims of this application and their equivalents, this application also intends to include such modifications and variations.
Claims
1. An over-temperature protection circuit for a power supply IC, characterized in that, include: The reference current source module is used to provide a reference current that is approximately independent of temperature, i.e., the first output current; The PTAT current source module is used to provide a PTAT current that is positively correlated with temperature, i.e., the second output current; The temperature decision module is used to receive the first output current and the second output current, and to mirror and amplify the first output current and the second output current into the first input current and the second input current, respectively. A temperature sensing module is used to receive the first output current and the output of the temperature decision module, i.e., the first signal, and output a second signal; When the first input current is greater than the second input current, the first signal is at a low level; When the first input current is less than the second input current, the first signal is at a high level; When the first signal is low, the second signal is approximately shorted to ground; When the first signal is high, the second signal is an analog voltage that is proportional to the absolute temperature; A hysteresis comparator is used to receive the first signal and the second signal, and output a third signal; The temperature sensing module is also used to mirror and amplify the first output current into a third input current. When the first signal is low and the second signal is approximately shorted to ground, the third signal is low; When the first signal is high and the second signal is proportional to the absolute temperature, the third signal is generated by comparing the second signal with a preset voltage signal representing the over-temperature threshold point by a hysteresis comparator. If the second signal is less than the preset voltage signal, the third signal is low; if the second signal is greater than the preset voltage signal, the third signal is high. The temperature sensing module includes: An inverter includes a ninth NMOS transistor and a ninth PMOS transistor. The gate of the ninth NMOS transistor is connected to the gate of the ninth PMOS transistor, the drain of the ninth NMOS transistor and the drain of the ninth PMOS transistor are connected, the source of the ninth NMOS transistor is grounded, and the source of the ninth PMOS transistor is connected to a power supply. The analog switching unit includes tenth to fourteenth NMOS transistors and tenth to fourteenth PMOS transistors; wherein the source of the tenth NMOS transistor and the source of the eleventh NMOS transistor are grounded, the gate of the tenth NMOS transistor receives the first signal, the drain of the tenth NMOS transistor is connected to the drain of the fourteenth NMOS transistor, the gate of the eleventh NMOS transistor is connected to the drain of the tenth NMOS transistor, the drain of the eleventh NMOS transistor is connected to the drain of the fourteenth PMOS transistor, the drain of the twelfth NMOS transistor is grounded, the gate of the twelfth NMOS transistor is connected to the drain of the ninth NMOS transistor, the source of the twelfth NMOS transistor is connected to the gate of the eleventh NMOS transistor, the gate of the fourteenth NMOS transistor is connected to the drain of the ninth NMOS transistor, the source of the fourteenth NMOS transistor is connected to the source of the thirteenth NMOS transistor, and the thirteenth NMOS transistor... The gate of the 11th PMOS transistor is connected to the drain of the 9th NMOS transistor, and the drain of the 13th NMOS transistor is connected to the drain of the 10th PMOS transistor. The sources of the 10th and 11th PMOS transistors are both connected to the power supply. The gate of the 10th PMOS transistor receives the first signal. The gate of the 11th PMOS transistor is connected to the drain of the 13th NMOS transistor, and the drain of the 11th PMOS transistor is connected to the drain of the 13th PMOS transistor. The drain of the 12th PMOS transistor is grounded. The gate of the 12th PMOS transistor receives the first signal, and the source of the 12th PMOS transistor is connected to the gate of the 11th PMOS transistor. The gate of the 14th PMOS transistor receives the first signal, and the drain of the 14th PMOS transistor is connected to the drain of the 13th PMOS transistor. The gate of the 13th PMOS transistor receives the first signal, and the drain of the 13th PMOS transistor is connected to the drain of the 14th PMOS transistor. The temperature sensing unit includes a fifteenth NMOS transistor, the drain of which is connected to one end of a diode, the source of which is grounded, and the gate of which is connected to the gate of the fourth NMOS transistor in the current amplification unit of the temperature decision module.
2. The over-temperature protection circuit for a power supply IC according to claim 1, characterized in that, The reference current source module includes: The first resistor has one end connected to the power supply. The first PMOS transistor has its source connected to the other end of the first resistor, its gate inputting a reference voltage signal, and its drain connected to the drain of the first NMOS transistor. The first NMOS transistor has its gate and drain connected, and its source grounded.
3. The over-temperature protection circuit for a power supply IC according to claim 2, characterized in that, The PTAT current source module includes: The voltage clamping unit includes a second NMOS transistor, a third NMOS transistor, a second PMOS transistor, and a third PMOS transistor; the sources of the second PMOS transistor and the third PMOS transistor are connected to the power supply, the drain of the second PMOS transistor is connected to the drain of the second NMOS transistor, and the drain of the third PMOS transistor is connected to the drain of the third NMOS transistor; the gates of the second PMOS transistor and the third PMOS transistor are connected, and the gates of the second NMOS transistor and the third NMOS transistor are connected. The generation unit includes a first transistor and a second transistor. The collector of the first transistor is connected to the source of the second NMOS transistor, and the collector of the second transistor is connected to the source of the third NMOS transistor. The base of the first transistor is connected to the collector of the second transistor, and the base of the second transistor is connected to the collector of the first transistor. The emitter of the first transistor is grounded, and the emitter of the second transistor is connected to one end of a second resistor, the other end of the second resistor is grounded. This is the voltage drop across the second resistor.
4. The over-temperature protection circuit for a power supply IC according to claim 3, characterized in that, The current in the second resistor The calculation formula is: ;in, Here, is the thermal voltage, n is the ratio of the collector junction area of the first transistor to that of the second transistor, ln is the operator for taking the natural logarithm, K is the Boltzmann constant, q is the electron charge, and T is the thermodynamic temperature. That is the resistance value of the second resistor.
5. The over-temperature protection circuit for a power supply IC according to claim 3, characterized in that, The temperature determination module includes: The current amplification unit includes a fourth NMOS transistor and a fourth PMOS transistor. The gate of the fourth NMOS transistor is connected to the gate of the first NMOS transistor, and the source of the fourth NMOS transistor is grounded. The gate of the fourth PMOS transistor is connected to the gate of the third PMOS transistor, and the source of the fourth PMOS transistor is connected to the power supply. The current comparison unit includes a fifth NMOS transistor, a sixth NMOS transistor, a seventh NMOS transistor, an eighth NMOS transistor, a fifth PMOS transistor, a sixth PMOS transistor, a seventh PMOS transistor, and an eighth PMOS transistor. The gate of the fifth NMOS transistor is connected to the gate of the sixth NMOS transistor, and the sources of both the fifth and sixth NMOS transistors are grounded. The drain of the fifth NMOS transistor is connected to the source of the seventh NMOS transistor, the drain of the sixth NMOS transistor is connected to the source of the eighth NMOS transistor, the gate of the seventh NMOS transistor is connected to the gate of the eighth NMOS transistor, and the gate and drain of the seventh NMOS transistor are connected. The drain of the eighth NMOS transistor is connected to the drain of the eighth PMOS transistor. The sources of the fifth and sixth PMOS transistors are connected to a power supply, the gates of the fifth and sixth PMOS transistors are connected, the drain of the fifth PMOS transistor is connected to the source of the seventh NMOS transistor, the drain of the sixth PMOS transistor is connected to the source of the eighth PMOS transistor, the gate of the seventh PMOS transistor is connected to the gate of the eighth PMOS transistor, and the gate and drain of the seventh PMOS transistor are connected.
6. The over-temperature protection circuit for a power supply IC according to claim 5, characterized in that, First input current , The ratio of the width-to-length ratio of the third PMOS transistor to that of the fourth PMOS transistor; second input current. , The ratio of the width-to-length ratio of the third NMOS transistor to that of the fourth NMOS transistor, where K is the Boltzmann constant. External power supply voltage, It is the reference voltage used in low-voltage CMOS circuits in power chips. q is the threshold voltage of the PMOS transistor, q is the electron charge, and T is the thermodynamic temperature. That is the resistance value of the first resistor. That is the resistance value of the second resistor.
7. The over-temperature protection circuit for a power supply IC according to claim 1, characterized in that, Third input current The expression is: ; This is the ratio of the width-to-length ratio of the fourth NMOS transistor to the width-to-length ratio of the fifteenth NMOS transistor. That is the resistance value of the first resistor. External power supply voltage, It is the reference voltage used in low-voltage CMOS circuits in power chips. It is the threshold voltage of the PMOS transistor.
8. The over-temperature protection circuit for a power supply IC according to claim 1, characterized in that, The hysteresis comparator includes: The operational amplifier has a preset voltage at the over-temperature threshold point input at the non-inverting input terminal and the second signal input at the inverting input terminal. The third resistor has one end connected to the power supply and the other end connected to one end of the fourth resistor and the non-inverting input terminal of the operational amplifier. The other end of the fourth resistor is connected to one end of the fifth resistor, and the other end of the fifth resistor is grounded. The output terminal of the operational amplifier is connected to the gate of the sixteenth NMOS transistor, the source of the sixteenth NMOS transistor is grounded, and the drain is connected to the fifth resistor.