Semiconductor structure and method of forming the same

By introducing a dielectric isolation structure with a non-flat interface profile and a field plate gate portion into LDMOS devices, the problems of electric field concentration and increased parasitic capacitance are solved, and a semiconductor structure with high breakdown voltage and high frequency is realized.

CN121285013BActive Publication Date: 2026-06-26ZHEJIANG ICSPROUT SEMICONDUCTOR CO LTD
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
ZHEJIANG ICSPROUT SEMICONDUCTOR CO LTD
Filing Date
2025-11-05
Publication Date
2026-06-26

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Abstract

A semiconductor structure and a method of forming the same, the structure comprising: a substrate; a drift region in the substrate; a body region in the substrate on a side of the drift region; a channel gate portion on top of the body region and part of the drift region; a source in the body region on a side of the channel gate portion, and the body region exposing a top surface of the source; a drain in the drift region on another side of the channel gate portion, the drain being spaced apart from the channel gate portion; a first dielectric isolation structure in the drift region spaced apart from the channel gate portion; one or more second dielectric isolation structures in the drift region at a bottom of the first dielectric isolation structure, the second dielectric isolation structure having a non-flat interface profile in a direction parallel to the channel gate portion; and a field plate gate portion on top of the first dielectric isolation structure, the field plate gate portion being spaced apart from the channel gate portion. The semiconductor structure can have a high breakdown voltage and a high device frequency.
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Citation Information

Patent Citations

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