Compiling method, compiling system, equipment, storage medium and program product

Abstract

The invention relates to the technical field of computers, and discloses a compiling method, a compiling system, equipment, a storage medium and a program product. The method comprises the following steps: when a chip is compiled, obtaining a chip model; the electronic device may then generate a global compilation configuration file based on the chip model and a base system compilation configuration file corresponding to the compilation system. In addition, the. Xml file can be generated based on the chip model and the application, memory, communication, Core and system of the item where the chip is located. In addition, a. Cfg file can be generated based on a chip clock configuration file, an application configuration file and a test configuration file corresponding to the chip model. A. C file and a. H file may then be generated based on the code template, the global compilation configuration file, the. Xml file, and the. Cfg file. Finally, the. C file, the. H file and the global compilation configuration file can be compiled to generate an executable file. In this way, visual compiling of a low-cost chip can be realized.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of computer, in particular to a compiling method, a compiling system, a device, a storage medium and a program product. BACKGROUND

[0002] In the process of project development in the field of automotive electronics, with the complication of automotive electronic functions, an automotive open system architecture (AutoSAR) system compiling environment can be used for project development. The AutoSAR system compiling environment provides a standardized software architecture and development method, which enables better integration and collaboration of automotive control units and software components from different suppliers. In addition, the visual configuration tool in the AutoSAR system compiling environment also enables developers to replace part of the code writing with convenient operations such as dragging and parameter setting, thereby completing the configuration of part of the software modules.

[0003] However, although the AutoSAR system compiling environment can provide a visual configuration tool to facilitate the operation of developers, the compiling file generated by the AutoSAR system compiling environment may contain the complete software program of the AutoSAR system (such as various basic software modules of network management and diagnostic services, communication stacks, and operating systems). Since the compiling file needs to occupy a large amount of storage space, the compiling file may not be able to run on a low-cost chip (such as a microcontroller unit (MCU) of a vehicle) with limited random access memory (RAM) and / or read-only memory (ROM).

[0004] Therefore, when an electronic device compiles a chip to implement project development, how to provide a visual configuration tool to developers to facilitate the operation of developers while enabling the generated compiling file to run on a low-cost chip with limited RAM and / or ROM is a problem that needs to be solved at present. SUMMARY

[0005] The present application provides a compiling method, a compiling system, a device, a storage medium and a program product, which are used for visualizing the compilation of a low-cost chip.

[0006] In a first aspect, the present application provides a compiling method applied to an electronic device. The method comprises: obtaining a first chip model of a first chip to be compiled; generating a global compiling configuration file based on the first chip model and a base system compiling configuration file corresponding to a compiling system used for compiling the first chip; generating an.xml format file of a project in which the first chip is located based on the first chip model, underlying application information, memory information, communication information, core configuration and system parameters of the project; generating a.cfg format file of the project in which the first chip is located based on a clock configuration file, an application configuration file and a test configuration file of the first chip corresponding to the first chip model; generating a.c format file and a.h format file of the project in which the first chip is located based on a preset code template, c file generation configuration in the global compiling configuration file, the.xml format file and the.cfg format file; and compiling the.c format file, the.h format file and each configuration in the global compiling configuration file except the c file generation configuration to generate an executable file after compilation.

[0007] In this way, the first chip can be visually compiled by the above method. Moreover, the compilation is implemented by executing multiple processes, and the compilation interface of the software can be exposed more to support the developer to dynamically adjust the configuration content corresponding to the compilation interface. In addition, the compiling system provided by the present application is designed by the developer, so that the developer does not need to pay additional fees and can save project costs. Furthermore, the method provided by the present application can make the compiling system only used for compiling the first chip, and there is no additional network management module or hardware function diagnosis module in the compiling system. Therefore, the executable file after compilation generated by the present application occupies a smaller storage space and can run on a low-cost chip.

[0008] In a possible implementation of the first aspect, the global compiling configuration file is generated based on the first chip model and a base system compiling configuration file corresponding to the compiling system used for compiling the first chip, and the base system compiling configuration file comprises one or more of a tool chain configuration, an assembly compiling option, a register configuration and a c file compiling configuration.

[0009] In a possible implementation of the first aspect, the global compilation configuration file comprises one or more configurations in the base system compilation configuration file and one or more configurations in the chip compilation configuration file; and / or each configuration in the global compilation configuration file is obtained by adjusting parameters of each configuration in the base system compilation configuration file according to parameters of each configuration in the chip compilation configuration file.

[0010] In this way, the developer operation can be simplified by setting the base system compilation configuration file template.

[0011] In a possible implementation of the first aspect, the compiling the.c format file, the.h format file, and each configuration in the global compilation configuration file except the c file generation configuration to generate the compiled executable file comprises: determining that the compiling the.c format file, the.h format file, and each configuration in the global compilation configuration file except the c file generation configuration fails; adjusting the generated global compilation configuration file; and compiling the.c format file, the.h format file, and each configuration in the adjusted global compilation configuration file except the c file generation configuration to generate the compiled executable file.

[0012] In a possible implementation of the first aspect, the adjusting the generated global compilation configuration file comprises any one of the following manners: adjusting a c file compilation option in the chip compilation configuration file, and generating the adjusted global compilation configuration file by using the adjusted chip compilation configuration file and the base system compilation configuration file; or adjusting a c file generation configuration in the chip compilation configuration file, and generating the adjusted global compilation configuration file by using the adjusted chip compilation configuration file and the base system compilation configuration file; or adjusting a compilation step in the global compilation configuration file.

[0013] In this way, the compiling success rate can be improved by the step-by-step adjustment process.

[0014] In a possible implementation of the first aspect, the generating the.xml format file of the project in which the first chip is located based on the first chip model and the underlying application information, the memory information, the communication information, the core configuration, and the system parameter of the project in which the first chip is located comprises: generating a port list based on the first chip model and a project function to be executed by the first chip, wherein each pin information of the first chip is included in the port list, and each pin information comprises a number or a function of each pin; and generating the.xml format file of the project in which the first chip is located based on each pin information corresponding to the port list and the underlying application information, the memory information, the communication information, the core configuration, and the system parameter of the project in which the first chip is located.

[0015] In this way, compared with the developer manually recording the pin information, in the embodiment of the present application, the electronic device can automatically generate the port list through the compiling system, so that the usability of the compiling system is stronger.

[0016] In a possible implementation of the first aspect, the underlying application information is determined according to a controller area network bus database and a virtual function bus, wherein the virtual function bus is determined according to the P signal and the R signal in the data transmission process.

[0017] In a possible implementation of the first aspect, the generating the.c format file and the.h format file of the project in which the first chip is located based on the preset code template, the c file generation configuration in the global compiling configuration file, the.xml format file and the.cfg format file includes: respectively performing visual analysis and display on the c file generation configuration in the global compiling configuration file, the.xml format file and the.cfg format file; providing different editing modes and code snippet slots based on different code attributes in the parsed c file generation configuration, the.xml format file or the.cfg format file, so as to adjust the code in the c file generation configuration, the.xml format file or the.cfg format file, wherein the code attributes at least include code types or code layouts; generating the.c format file and the.h format file of the project in which the first chip is located based on the code template and the adjusted c file generation configuration, the.xml format file and the.cfg format file, corresponding to the c file generation configuration, the.xml format file and the.cfg format file satisfying the preset checking rule.

[0018] In this way, the electronic device can provide a visual configuration tool to simplify the operation of the developer, and can be used for compiling any chip in any project. Moreover, for some commonly used codes in some configuration files, the electronic device can automatically generate corresponding code snippet slots to be embedded in the configuration files, so as to simplify the operation of the developer.

[0019] In a possible implementation of the first aspect, corresponding to the adjusted c file generation configuration, the.xml format file and the.cfg format file not satisfying the preset checking rule, the method further includes: corresponding to receiving an operation of adjusting the checking rule, determining whether the adjusted c file generation configuration, the.xml format file and the.cfg format file satisfy the adjusted checking rule.

[0020] That is, in the embodiment of the present application, the developer is allowed to adjust the checking rule according to the specific project.

[0021] In a possible implementation of the first aspect, the generating the.c file and the.h file of the project in which the first chip is located based on the adjusted code template and the adjusted c file generation configuration, the.xml file, and the.cfg file comprises: determining that the.c file and / or the.h file fails to be generated; and based on the adjusted code template, the adjusted c file generation configuration, the.xml file, and the.cfg file, generating the.c file and the.h file corresponding to the operation of receiving the adjusted code template.

[0022] That is, in the embodiments of the present application, the code template is allowed to be adjusted by the developer according to the specific project.

[0023] In a second aspect, the present application further provides a compiling system, which can be used to compile the first chip. The compiling system comprises a chip model selection module, a global compiling configuration file generation module, a project.xml file generation module, a project.cfg file generation module, a visual tool, and a compiling module.

[0024] The chip model selection module is configured to select a first chip model of the first chip to be compiled from a plurality of chip models.

[0025] The global compiling configuration file generation module is configured to generate a global compiling configuration file according to a chip compiling configuration file corresponding to the first chip model and a base system compiling configuration file corresponding to the compiling system. The chip compiling configuration file comprises at least one or more of a project configuration, a c file generation configuration, a c file compiling option, or a memory layout configuration, and the base system compiling configuration file comprises at least one or more of a tool chain configuration, an assembly compiling option, a register configuration, and a c file compiling configuration.

[0026] The project.xml file generation module is configured to generate an.xml file of a project in which the first chip is located according to pin information in a port list corresponding to the first chip model and underlying application information, memory information, communication information, core configuration, and system parameters of the project in which the first chip is located.

[0027] The project.cfg file generation module is configured to generate a.cfg file of the project in which the first chip is located according to a clock configuration file, an application configuration file, and a test configuration file of the first chip corresponding to the first chip model.

[0028] The visual tool is configured to generate a.c file and a.h file of the project in which the first chip is located according to a preset code template, a c file generation configuration in the global compiling configuration file, the.xml file, and the.cfg file.

[0029] The compiling module compiles the.c format file, the.h format file, and each configuration in the global compiling configuration file except the c file generation configuration to generate a compiled executable file.

[0030] In this way, the first chip can be visually compiled by the compiling system. In addition, the compiling system is designed by the developer, so the developer does not need to pay additional fees and can save project costs. In addition, the compiling system is only used for compiling the first chip, and there is no additional network management module or hardware function diagnosis module. Therefore, the compiled executable file generated by the compiling system occupies a smaller storage space and can run on a low-cost chip.

[0031] In a possible implementation of the second aspect, the visual tool mentioned above can be used to generate the.c format file and the.h format file of the project in which the first chip is located according to the preset code template, the c file generation configuration in the global compiling configuration file, the.xml format file, and the.cfg format file. The visual tool can be used to visually parse and display the c file generation configuration in the global compiling configuration file, the.xml format file, and the.cfg format file, respectively. The visual tool can also be used to provide different editing modes and code snippet slots according to different code attributes in the parsed c file generation configuration, the.xml format file, or the.cfg format file, to adjust the code in the c file generation configuration, the.xml format file, or the.cfg format file, wherein the code attributes at least include code types or code layouts. The visual tool can also be used to determine whether the adjusted c file generation configuration, the.xml format file, and the.cfg format file meet the preset checking rule, and in the case where the adjusted c file generation configuration, the.xml format file, and the.cfg format file meet the checking rule, the visual tool is further used to generate the.c format file and the.h format file according to the code template and the adjusted c file generation configuration, the.xml format file, and the.cfg format file.

[0032] In this way, the visual configuration tool can simplify the operation of the developer and can be used to compile any chip in any project. In addition, for some commonly used codes in some configuration files, the visual tool can automatically generate corresponding code snippet slots to be embedded in each configuration file, thereby simplifying the operation of the developer.

[0033] In a possible implementation of the second aspect, the compiling system further includes a chip compiling configuration file generation module configured to generate a chip compiling configuration file of the first chip according to the first chip model.

[0034] In a possible implementation of the second aspect, the compiling system further includes a port list automatic generation module configured to generate a port list according to the first chip model and a project function required to be executed by the first chip. The port list includes pin information of the first chip, and each pin information includes a number or a function of each pin.

[0035] In this way, compared with manual recording of the pin information by the developer, the compiling system can automatically generate the port list, so that the compiling system has stronger usability.

[0036] In a third aspect, the present application provides an electronic device, including at least one memory and at least one processor, the memory being coupled to the processor; the memory is configured to store computer program codes / instructions; when the computer program codes / instructions are executed by the processor, the electronic device executes the compiling method mentioned in the first aspect and any possible implementation of the first aspect.

[0037] In a fourth aspect, the present application provides a readable storage medium, and the readable storage medium stores instructions, and the instructions are executed on the electronic device to make the electronic device execute the compiling method mentioned in the first aspect and any possible implementation of the first aspect.

[0038] In a fifth aspect, the present application provides a computer program product, including computer instructions, and when the computer instructions are executed on the electronic device, the electronic device executes the compiling method mentioned in the first aspect and any possible implementation of the first aspect.

[0039] The advantages of the second aspect to the fifth aspect can refer to the related description of the first aspect and any possible implementation of the first aspect, which will not be repeated here. BRIEF DESCRIPTION OF DRAWINGS

[0040] Figure 1 According to some embodiments of the present application, a flowchart of a compiling method is shown;

[0041] Figure 2 According to some embodiments of the present application, a specific compiling process diagram is shown;

[0042] Figure 3A According to some embodiments of the present application, a system architecture diagram of a compiling environment is shown;

[0043] Figure 3BAccording to some embodiments of the present application, a working schematic diagram of each module of a compiling system when compiling an MCU is shown.

[0044] Figure 4 According to some embodiments of the present application, a hardware structure schematic diagram of an electronic device is shown. DETAILED DESCRIPTION

[0045] Illustrative embodiments of the present application include, but are not limited to, a compiling method, a compiling system, a device, a storage medium and a program product.

[0046] In order to make the purposes, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be described in detail below with reference to the drawings and specific embodiments.

[0047] As mentioned above, in the project development process in the field of automotive electronics, with the complication of automotive electronic functions, an AutoSAR system compiling environment can be used for project development. The AutoSAR system compiling environment can provide a standardized software architecture and development method for developers, so that automotive control units and software components of different suppliers can be better integrated and work together.

[0048] Among them, when the project is developed through the AutoSAR system compiling environment, the AutoSAR system compiling environment can provide a visual configuration tool to enable developers to replace part of the code writing with convenient operations such as dragging or parameter setting. However, the current AutoSAR system compiling environment is a paid product, which will increase the development cost of the project.

[0049] Further, the compiling file generated by the AutoSAR system compiling environment can contain the complete software program of the AutoSAR system, for example, each basic software module such as network management and diagnostic service, communication stack and operating system in the compiling file. Therefore, the compiling file has high requirements for hardware facilities and may not be able to run on a low-cost chip with limited RAM and / or ROM. Moreover, if the RAM and / or ROM are upgraded in order to enable the compiling file to run on the low-cost chip, the low-cost chip will also lose the cost advantage.

[0050] In summary, when the project is developed through the AutoSAR system compiling environment, the compiling environment needs to be additionally paid and the compiling file cannot run on a low-cost chip.

[0051] Further, in some other examples, during the project development process in the automotive electronics field, there can also be some simple sub-projects with single function and low complexity. For these simple sub-projects with single function and low complexity, the developers can develop the projects without using the AutoSAR system compilation environment, but only using a single-cycle compilation environment. The single-cycle compilation environment has no system concept and can only develop simple projects, and almost all software modules need to be manually coded by the developers.

[0052] However, since all operations in the single-cycle compilation environment are at the code level, the compilation environment does not provide a visual configuration tool so that the developers can replace part of the code writing by convenient operations such as dragging or parameter setting. Therefore, the single-cycle compilation environment has poor ease of use.

[0053] In summary, in the project development process in the automotive electronics field, either the compilation environment does not provide a visual configuration tool, resulting in poor ease of use of the compilation environment, or the compilation environment provides a visual configuration tool for the convenience of the developers, but the compilation environment needs to be additionally charged and the compiled file cannot run on a low-cost chip with limited RAM and / or ROM. Therefore, when the electronic device compiles the chip to implement the project development, how to provide a visual configuration tool for the convenience of the developers while not additionally charging and enabling the generated compiled file to run on a low-cost chip with limited RAM and / or ROM is a problem that needs to be solved urgently.

[0054] To solve the above problems, the application provides a compiling method. Wherein, the electronic device can first obtain the chip model of the first chip (as an example of the first chip model) when compiling the first chip. Then, the electronic device can generate a global compiling configuration file based on the first chip model and the base system compiling configuration file corresponding to the compiling system used to compile the first chip. In addition, the electronic device can also generate a.xml format file of the project in which the first chip is located based on the first chip model and the underlying application information, memory information, communication information, core configuration and system parameters of the project in which the first chip is located. In addition, the electronic device can also generate a.cfg format file of the project in which the first chip is located based on the clock configuration file, application configuration file and test configuration file of the first chip corresponding to the first chip model. Next, the electronic device can generate.c format file and.h format file of the project in which the first chip is located based on the preset code template, c file generation configuration in the global compiling configuration file, the.xml format file and the.cfg format file. Further, the electronic device can compile the.c format file, the.h format file and each configuration in the global compiling configuration file except the c file generation configuration to generate the compiled executable file.

[0055] In this way, by the above method, the compilation of the first chip can be completed to realize project development. In the above compilation process, the electronic device can provide a visual configuration tool to simplify the operation of the developer, which can be used to compile any chip in any project. For example, the base system compiling configuration file provided by the compiling system can be directly used to generate the global compiling configuration file; for another example, the preset code template can also be directly used to generate the.c format file and the.h format file. In this way, the visual configuration tool can enable the developer to replace part of the code writing through convenient operations such as dragging or parameter setting, which is easy to operate and has strong usability. In addition, since the compiling system provided by the application is designed by the developer, the developer does not need to submit additional fees and can save project costs. In addition, the method or compiling system provided by the application is only used to compile the first chip, and there is no additional network management module or hardware function diagnosis module. Therefore, the compiled executable file generated by the application occupies a smaller storage space and can run on a low-cost chip.

[0056] It should be noted that the above-mentioned compiling method of the present application can be applied to any electronic device. The electronic device includes, but is not limited to, a mobile station (MS), a mobile terminal (MT), etc. For example, the electronic device can be a computer, a mobile phone, a smart television, a wearable device, a tablet computer (Pad), a desktop computer, a laptop computer, a virtual reality (VR) device, an augmented reality (AR) device, a terminal in industrial control, a terminal in self driving, a terminal in remote medical surgery, a terminal in smart grid, a terminal in transportation safety, a terminal in smart city, a terminal in smart home, etc. The specific form of the electronic device is not limited in the present application.

[0057] The compiling method mentioned in the present application will be briefly introduced below based on the flowchart shown in FIG. 1. The compiling method can be applied to an electronic device, such as any of the above-mentioned computers, etc. As shown in FIG. 1, specifically, the method is as follows: Figure 1 Figure 1

[0058] S11: Obtain a first chip model of a first chip to be compiled.

[0059] Exemplarily, the first chip can be any chip such as an MCU, an automatic driving chip, or a communication chip, etc., and the present application does not limit the same.

[0060] In some embodiments, the developer can directly input the first chip model of the first chip on the electronic device. Alternatively, the electronic device can also provide a plurality of chip models, and the developer can select the first chip model corresponding to the first chip from the plurality of chip models. The present application does not limit the manner of obtaining the first chip model of the first chip.

[0061] S12: Generate a global compiling configuration file based on the first chip model and a base system compiling configuration file corresponding to a compiling system used for compiling the first chip.

[0062] ​​In some embodiments, different models of chips can have different architectures, instruction sets, or memory mappings, etc., that is, different models of chips need different configurations at compile time. Therefore, before generating the global compilation configuration file, the electronic device can first generate a chip compilation configuration file corresponding to the first chip model based on the first chip model. For example, the chip compilation configuration file can at least include but is not limited to one or more of the following: project configuration, that is, the overall settings of the project in which the first chip participates, such as project name or target running platform, etc.; c file generation configuration, such as specifying which files to generate, how to name, or in which directory to generate, etc.; c file compilation options, referring to specific options and parameters used when compiling c source code; memory layout, used to indicate the allocation or size of different memory regions, etc. chip memory usage.

[0063] Then, after generating the chip compilation configuration file of the first chip, the electronic device can generate a global compilation configuration file based on the chip compilation configuration file and the base system compilation configuration file of the compilation environment. Exemplarily, the base system compilation configuration file can at least include but is not limited to one or more of the following: tool chain configuration, referring to the settings of various tools used in the compilation process, such as compiler or linker, etc.; assembly compilation options, referring to options used when compiling assembly code, such as assembly optimization options or symbol processing options, etc.; register configuration, used to set related parameters of registers in the chip, such as initial value or usage of the registers, etc.; c file compilation configuration, referring to specific options and parameters used when compiling c source code.

[0064] Wherein, when generating the global compilation configuration file based on the chip compilation configuration file and the base system compilation configuration file, the global compilation configuration file can include one or more configurations in the base system compilation configuration file and one or more configurations in the chip compilation configuration file. For example, the global compilation configuration file can include the c file generation configuration and the memory layout configuration in the above chip compilation configuration file. And / or, when generating the global compilation configuration file based on the chip compilation configuration file and the base system compilation configuration file, each configuration in the global compilation configuration file can also be obtained by adjusting the parameters of each configuration in the base system compilation configuration file according to the parameters of each configuration in the chip compilation configuration file. For example, adjusting the parameters in the c file compilation configuration in the base system compilation configuration file according to the parameters of the c file compilation options in the chip compilation configuration file. The present application does not make any limitation in this regard.

[0065] In this way, through the above process, the electronic device can generate a global compilation configuration file.

[0066] S13: generating an.xml format file of the project where the first chip is located based on the first chip model and the underlying application information, memory information, communication information, core configuration and system parameters of the project where the first chip is located.

[0067] In some embodiments, before generating the.xml format file, the electronic device can first generate a port list based on the first chip model and the project functions required to be executed by the first chip. Illustratively, the port list can include pin information of the first chip, for example, the pin information can include the number or function of each pin. In this way, compared with manually recording the pin information by the developer, in the embodiments of the present application, the electronic device can automatically generate the port list through the compilation environment, so that the availability of the compilation environment is stronger.

[0068] Next, after generating the port list, the electronic device can generate the.xml format file of the project where the first chip is located based on the pin information corresponding to the port list (that is, the input output (IO) information is obtained) and the underlying application information, memory information, communication information, core configuration and system parameters of the project where the first chip is located. That is, the electronic device can integrate the information into the.xml file. The communication information can be determined according to the controller area network (CAN), the underlying application information can be determined according to the controller area network database (CAN DB) and the virtual function bus (determined based on the P signal and the R signal in the data transmission process), and the core configuration can include operating system settings, interrupts or dispatchers, etc.

[0069] In this way, through the above process, the electronic device can generate the.xml format file of the project where the first chip is located.

[0070] S14: generating a.cfg format file of the project where the first chip is located based on the clock configuration file, the application configuration file and the test configuration file of the first chip corresponding to the first chip model.

[0071] In some embodiments, after obtaining the first chip model of the first chip, the clock configuration of the first chip can be determined. Then, the electronic device can integrate the clock configuration, common applications and test cases of the first chip to produce the.cfg file. For details, please refer to S22 and S23 shown in the following Figure 2

[0072] ​It can be understood that the present application does not limit the execution order of S12, S13 and S14. For example, the electronic device can execute S12, S13 and S14 simultaneously in parallel. For another example, the electronic device can also execute S14, S13 and S12 in sequence. The present application does not limit this.

[0073] S15: Based on the preset code template, the c file generation configuration in the global compilation configuration file, the.xml format file and the.cfg format file, the.c format file and the.h format file of the project in which the first chip is located are generated.

[0074] In some embodiments, before generating the.c file and the.h file, the electronic device can perform visual analysis and display on the c file generation configuration in the global compilation configuration file, the.xml format file and the.cfg format file obtained by S12 to S14, respectively, so as to enable the developer to observe whether there is an error and to adjust in the case of error.

[0075] Then, after analyzing each file, the electronic device can provide different editing methods and code snippet slots based on different code attributes (such as at least including code type or code layout) in the parsed c file generation configuration,.xml format file or.cfg format file, to automatically adjust the code in the c file generation configuration,.xml format file or.cfg format file. In this way, for some commonly used codes in some configuration files, the electronic device can automatically generate corresponding code snippet slots to be embedded in each configuration file, thereby simplifying the operation of the developer.

[0076] Then, after adjusting the c file generation configuration,.xml format file and.cfg format file, if the adjusted c file generation configuration,.xml format file and.cfg format file meet the preset checking rules (such as field type, field format or whether the field is complete), the electronic device can generate the.c format file and the.h format file of the project in which the first chip is located based on the code template and the adjusted c file generation configuration,.xml format file and.cfg format file.

[0077] Conversely, if the adjusted c file generation configuration, the.xml format file, and the.cfg format file do not meet the preset check rule (for example, the field types do not match), the electronic device can also remind the developer whether the check rule needs to be adjusted based on the specific project. If the electronic device receives an operation of adjusting the check rule, the electronic device can rejudge whether the adjusted c file generation configuration, the.xml format file, and the.cfg format file meet the adjusted check rule, and regenerate the.c file and the.h file based on the code template when the adjusted c file generation configuration, the.xml format file, and the.cfg format file meet the adjusted check rule. Conversely, if the electronic device receives an instruction that the check rule does not need to be adjusted, the electronic device can regenerate the code snippet slot to adjust each configuration file, and generate the.c file and the.h file based on the code template when the adjusted each configuration file meets the check rule.

[0078] Further, in some embodiments, in the process of generating the.c file and the.h file based on the code template, if it is determined that the.c file and / or the.h file fails to be generated, the electronic device can also remind the developer whether the code template needs to be adjusted based on the specific project. For example, if the electronic device receives an operation of adjusting the code template, the electronic device can regenerate the.c file and the.h file based on the adjusted code template and the adjusted c file generation configuration, the.xml format file, and the.cfg format file. Conversely, if the electronic device receives an instruction that the check rule does not need to be adjusted, the electronic device can regenerate the code snippet slot to adjust each configuration file, and generate the.c file and the.h file based on the code template when the adjusted each configuration file meets the check rule.

[0079] In this way, through the above method, the electronic device can automatically generate the.c file and the.h file based on the code template.

[0080] S16: Compiling each configuration in the.c format file, the.h format file, and the global compilation configuration file except the c file generation configuration to generate a compiled executable file.

[0081] In some embodiments, since the c file generation configuration has been used when generating the.c file and the.h file, when compiling each file, each configuration in the global compilation configuration file except the c file generation configuration can be compiled.

[0082] In some embodiments, the electronic device can also adjust the global compilation configuration file if the compilation fails. For example, the electronic device can adjust the c file compilation option in the chip compilation configuration file mentioned in S12 above, and generate an adjusted global compilation configuration file by using the adjusted chip compilation configuration file and the base system compilation configuration file mentioned in S12 above. For another example, the electronic device can also adjust the c file generation configuration in the chip compilation configuration file mentioned in S12 above, and generate an adjusted global compilation configuration file by using the adjusted chip compilation configuration file and the base system compilation configuration file mentioned in S12 above. For another example, the electronic device can also adjust the compilation step in the global compilation configuration file.

[0083] Then, the electronic device can recompile the.c format file, the.h format file, and each configuration in the adjusted global compilation configuration file except the c file generation configuration to generate a compiled executable file.

[0084] In this way, the first chip can be visually compiled by the above method. Moreover, the compilation is implemented by executing multiple processes, and the compilation interface of the software can be exposed more to support the developer to dynamically adjust the configuration content corresponding to the compilation interface. In addition, the method or the compilation environment provided by the present application is only used for compiling the first chip, and there is no additional network management module or hardware function diagnosis module, etc. Therefore, the compiled executable file generated by the present application occupies a smaller storage space and can run on a low-cost chip.

[0085] The above-mentioned compilation method will be described in detail below with reference to the flowchart shown in Figure 2 The compilation method can be applied to an electronic device, such as any electronic device mentioned above, e.g., a computer, etc. As shown in Figure 2 Specifically, the method is as follows:

[0086] S21: Select the MCU model (as an example of the first chip model).

[0087] In some embodiments, the electronic device can also provide multiple MCU models, and the developer can select the MCU model corresponding to the MCU to be compiled this time from the multiple MCU models.

[0088] S22: Generate the MCU clock configuration file.

[0089] In some embodiments, the model of the MCU tends to determine its internal architecture, functional characteristics, and related clock configuration parameters. Different models of MCUs have different clock system designs, including clock sources, clock division coefficients, or clock distribution methods. Therefore, after the electronic device obtains the MCU model corresponding to the MCU to be compiled this time through S21, the corresponding MCU clock configuration file can be determined.

[0090] S23: integrate the application and test configuration files to generate a project.cfg file.

[0091] In some embodiments, after the electronic device obtains the MCU clock configuration file through S22, the electronic device can also obtain an application configuration file and a test configuration file. For example, the application configuration file covers various settings required by the MCU during operation, such as enabling and disabling of functional modules, communication parameter configuration, etc.; the test configuration file contains specific parameters and scene settings for project testing, such as input and output conditions of test cases or simulation parameters of test environment, etc.

[0092] Then, the electronic device can orderly integrate the MCU clock configuration file, the application configuration file, and the test configuration file according to a predetermined rule or logic, to ensure that the parameters and settings in each configuration file can be correctly fused, avoiding parameter conflicts or omissions, thereby generating a.cfg file.

[0093] S24: generate a port list in combination with project functions.

[0094] In some embodiments, different models of MCUs have different functional pins, so after the electronic device obtains the MCU model corresponding to the MCU to be compiled this time through S21, the electronic device can also generate a port list based on the MCU model and the project functions to be executed by the MCU. For example, the port list can include pin information of the MCU, such as pin numbers or functions.

[0095] In this way, compared with manual recording of pin information by the developer, in the embodiments of the present application, the electronic device can automatically generate a port list through the compilation environment, making the compilation environment more available.

[0096] S25: adjust the base system.xml file, including adjusting the system, Core, memory, communication, and IO, etc.

[0097] In some embodiments, the electronic device can provide a base system.xml file as a template. After the electronic device adjusts the configurations or parameters in the base system.xml file according to the specific project, the electronic device can generate the.xml file corresponding to the specific project.

[0098] For example, the system of the project can be a specific operating system used by the project; the core configuration of the project can include parameters and settings of the operating system of the project, interrupts, or schedulers; the memory information of the project can be memory allocation; the communication information of the project can be determined according to the CAN of the project; and the IO of the project can be determined based on the port list generated in S24.

[0099] S26: Adjust the CAN DB and the virtual function bus to generate the project.xml file.

[0100] In some embodiments, after the electronic device adjusts part of the configurations or parameters in the base system.xml file through S25, the electronic device can also adjust the underlying application information in the base system.xml file to generate the final project.xml file. The adjustment of the underlying application information can be achieved by adjusting the CAN DB and the virtual function bus of the project. The virtual function bus can be determined based on the P signal and the R signal in the data transmission process, and the virtual function bus realizes the decoupling of the software components and the underlying hardware through standardized communication interfaces and services.

[0101] In this way, the project.xml file can be generated through S24 to S26.

[0102] S27: Generate an MCU compilation configuration file.

[0103] In some embodiments, different types of chips can have different architectures, instruction sets, or memory mappings, etc. Therefore, after the electronic device obtains the MCU type corresponding to the MCU to be compiled this time through S21, the electronic device can also generate an MCU compilation configuration file based on the MCU type.

[0104] For example, the MCU compilation configuration file can include at least one or more of the following: project configuration, i.e., the overall settings of the project in which the MCU participates, such as the project name or the target running platform; c file generation configuration, such as specifying which files to generate, how to name, or in which directory to generate; c file compilation options, i.e., specific options and parameters used when compiling c source code; and memory layout configuration, used to indicate the allocation or size of different memory regions, etc.

[0105] S28: Adjust the base system compilation configuration file.

[0106] In some embodiments, the electronic device can provide a base system compilation configuration file as a template, so that the user can adjust the parameters or configurations in the base system compilation file according to the specific project.

[0107] For example, the base system compilation configuration file can at least include, but is not limited to, one or more of the following: tool chain configuration, which refers to the settings of various tools used in the compilation process, such as compilers or linkers, etc.; assembly compilation options, which are options used when compiling assembly code, such as assembly optimization options or symbol processing options, etc.; register configuration, which is used to set the relevant parameters of the registers in the chip, such as the initial value or usage of the registers, etc.; c file compilation configuration, which refers to the specific options and parameters used when compiling c source code.

[0108] S29: generating a global compilation configuration file.

[0109] In some embodiments, the electronic device can integrate the MCU compilation configuration file generated in S27 and the base system compilation configuration file adjusted in S28 to ensure that the parameters and settings in each configuration file are correctly integrated, avoiding parameter conflicts or omissions, thereby generating a global compilation configuration file.

[0110] S210: parsing the global compilation configuration file.

[0111] In some embodiments, the electronic device can provide a parsing tool to parse the global compilation configuration file generated in S29.

[0112] It can be understood that the present application does not limit the execution order of S22 to S23, S24 to S26, S27 to S210. For example, the electronic device can execute S22 to S23, S24 to S26, S27 to S210 in parallel. For another example, the electronic device can execute S22 to S210 sequentially. Here, no limitation is made.

[0113] S211: the visualization tool parses the project.cfg file, the project.xml file and the global compilation configuration file and displays them.

[0114] In some embodiments, the electronic device can also provide a visualization tool to visually display the parsed global configuration file, such as the c file generation configuration in the global configuration file.

[0115] In addition, the visualization tool can also parse and visually display the project.cfg file generated in S23 and the project.xml file generated in S26.

[0116] S212: Different editing methods and code snippet slots are provided for different attributes to adjust the project configuration.

[0117] In some embodiments, after the visual parsing of the files, the electronic device can also provide different editing methods and code snippet slots for different code attributes (such as code types or code layouts, etc.) in each file to automatically adjust the code in each file. In this way, for some commonly used code in some configuration files, the electronic device can automatically generate corresponding code snippet slots to be embedded in each configuration file, thereby simplifying the operation of the developer.

[0118] S213: Verify whether the adjusted files meet the consistency check based on the preset check rule.

[0119] For example, the check rule can be field type, field format, or whether the field is complete, etc.

[0120] S214: Determine whether the verification is passed. If not, go to S215; if yes, go to S217.

[0121] In some embodiments, if the adjusted files meet the preset check rule, the electronic device can perform S217 hereinafter to generate the project file based on the code template. Conversely, if the adjusted files do not meet the preset check rule, the electronic device can perform S215 hereinafter to remind the developer whether the check rule needs to be adjusted based on the specific project.

[0122] S215: Determine whether to adjust the check rule. If yes, go to S216; if no, go to S212.

[0123] In some embodiments, if the developer determines that the check rule needs to be adjusted based on the specific project, the electronic device can perform S216 hereinafter to adjust the check rule. Conversely, if the developer determines that the check rule does not need to be adjusted based on the specific project, the electronic device can re-execute S212 to generate the code snippet slots to adjust each configuration file, and in the case that the adjusted each configuration file meets the check rule, generate the project file based on the code template.

[0124] S216: Adjust the check rule.

[0125] In some embodiments, after adjusting the check rule, the electronic device can also re-execute S213 to re-determine whether each file meets the adjusted check rule.

[0126] S217: Generate the project file according to the code template.xsl file.

[0127] In some embodiments, after the electronic device determines that the project.cfg file, the project.xml file, and the global compilation configuration file (e.g., the c file generation configuration in the global configuration file) satisfy the check rules (i.e., the verification is passed) through S214 described above, the electronic device can generate the project code corresponding to the project through the preset code template and the files described above.

[0128] S218: Determine whether the generation is successful. If not, go to S219; if yes, go to S221.

[0129] S219: Whether to adjust the code template. If yes, go to S220; if not, go to S212.

[0130] In some embodiments, if the electronic device determines that the project file is not successfully generated through S217 described above through S218 described above, the electronic device can also remind the developer whether the code template needs to be adjusted based on the specific project. If the code template needs to be adjusted, the electronic device can perform S220 described below. Otherwise, if the code template does not need to be adjusted, the electronic device can re-execute S212 to generate the code snippet slot to adjust the configuration files, and generate the project file based on the code template under the condition that the adjusted configuration files satisfy the check rules.

[0131] S220: Adjust the code template.xsl file.

[0132] In some embodiments, after adjusting the code template, the electronic device can re-execute S217 to generate the project file based on the adjusted code template.

[0133] S221: Obtain the project.c file and the project.h file.

[0134] In some embodiments, after the electronic device determines that the project file is successfully generated through S217 described above through S218 described above, the electronic device can obtain the generated project file as the project.c file and the project.h file.

[0135] S222: Perform project compilation.

[0136] In some embodiments, the electronic device can provide a compilation tool to compile the global compilation configuration file (e.g., each configuration except the c file generation configuration) generated through S29 described above, and the project.c file and the project.h file obtained through S221 described above.

[0137] S223: Whether the compilation is successful. If yes, go to S224; if not, go to S225.

[0138] S224: Obtain the project executable file.

[0139] In some embodiments, if the electronic device determines that the compiling is successful through S223, the electronic device can take the compiled file as the final executable file.

[0140] S225: Determine whether to adjust the c file compiling option. If yes, go to S27; if no, go to S226.

[0141] In some embodiments, if the electronic device determines that the compiling is failed through S223, the electronic device can prompt the developer whether to adjust the c file compiling option in the MCU compiling configuration file. And, when the c file compiling option needs to be adjusted, re-execute S27 to generate the MCU compiling configuration file.

[0142] S226: Determine whether to adjust the c file participating in the compiling. If yes, go to S27; if no, go to S227.

[0143] In some embodiments, if the electronic device determines that the compiling is failed through S223 and determines that the c file compiling option does not need to be adjusted through S225, the electronic device can further prompt the developer whether to adjust the c file generation configuration in the MCU compiling configuration file. And, when the c file generation configuration needs to be adjusted, re-execute S27 to generate the MCU compiling configuration file.

[0144] S227: Determine whether to adjust the compiling step. If yes, go to S29; if no, go to S228.

[0145] In some embodiments, the electronic device can further prompt the developer whether to adjust the compiling step in the global compiling configuration file. And, when the compiling step needs to be adjusted, re-execute S29 to generate the global compiling configuration file.

[0146] S228: Adjust the project.c file and / or the project.h file.

[0147] In some embodiments, if the electronic device determines that the compiling is failed through S223 and determines that the configuration files do not need to be adjusted through S225 to S227, the electronic device can further prompt the developer to adjust the project.c file and / or the project.h file. And, after the project.c file and / or the project.h file are adjusted, re-execute S222 to compile the global compiling configuration file (such as each configuration except the c file generation configuration) and the adjusted project.c file and project.h file.

[0148] Thus, the MCU can be visualized compiled by the above method, and the developer can replace part of code writing by convenient operations such as dragging or parameter setting through the visual configuration tool, which is simple and easy to use. Moreover, the compilation is realized by executing multiple processes, and the software compilation interface can be exposed more to support the developer to dynamically adjust the configuration content corresponding to the compilation interface. In addition, the electronic device can automatically generate a port list through the compilation environment, so that the availability of the compilation environment is stronger. In addition, since the compilation environment provided by the present application is designed by the developer, the developer does not need to submit additional fees and can save project costs. In addition, the method or the compilation environment provided by the present application is only used for compiling the first chip, and there is no additional network management module or hardware function diagnosis module. Therefore, the executable file generated by the present application occupies a smaller storage space and can run on a low-cost chip.

[0149] Further, in some embodiments, corresponding to the above-mentioned compilation method, the present application also provides a system architecture diagram of a compilation environment. For example, as shown in Figure 3A , the compilation system 30 can include a chip model selection module 301, a global compilation configuration file generation module 302, a project.xml file generation module 303, a project.cfg file generation module 304, a visual tool 305, and a compilation module 306.

[0150] Among them, referring to Figure 3A , the chip model selection module 301 in the compilation system 30 can provide the developer with multiple chip models, so that the developer can select the first chip model of the first chip which needs to be compiled from multiple chip models.

[0151] Further, continuing to refer to Figure 3A , the compilation system 30 can also include a global compilation configuration file generation module 302. Among them, the global compilation configuration file generation module 302 can be used to generate a global compilation configuration file according to the chip compilation configuration file corresponding to the first chip model and the base system compilation configuration file corresponding to the compilation system.

[0152] Specifically, the compiling system 30 can further comprise a chip compiling configuration file generation module (not shown in the figure) for generating a chip compiling configuration file of the first chip according to the first chip model. The chip compiling configuration file comprises at least one or more of project configuration, c file generation configuration, c file compiling option or memory layout configuration. Then, the global compiling configuration file generation module 302 can generate a global compiling configuration file according to the chip compiling configuration file generated by the chip compiling configuration file generation module and the base system compiling configuration file provided by the compiling system 30. Details can be referred to the description of S12 in the above Figure 1 .

[0153] In this way, the developer's operation can be simplified by setting the base system compiling configuration file template.

[0154] Further, continuing to refer to Figure 3A , the compiling system 30 can further comprise a project.xml file generation module 303. The project.xml file generation module 303 can be used to generate an.xml format file of the project in which the first chip is located according to the pin information in the port list corresponding to the first chip model and the underlying application information, memory information, communication information, core configuration, system parameters of the project in which the first chip is located.

[0155] Specifically, the compiling system 30 can further comprise a port list automatic generation module (not shown in the figure). The port list automatic generation module can be used to generate a port list according to the first chip model and the project function to be executed by the first chip. The port list comprises pin information of the first chip, and the pin information comprises the number or function of each pin. Then, the project.xml file generation module 303 can generate an.xml format file of the project in which the first chip is located according to the IO information indicated by the port list generated by the port list automatic generation module and the underlying application information, memory information, communication information, core configuration, system parameters of the project in which the first chip is located. Details can be referred to the description of S13 in the above Figure 1 .

[0156] In this way, compared with manually recording pin information by the developer, the compiling system 30 can automatically generate a port list and then generate an.xml format file in the embodiment of the present application, so that the usability of the compiling system is stronger.

[0157] Further, continuing to refer to Figure 3AAs shown, the compiling system 30 can further include a project.cfg file generation module 304. The project.cfg file generation module 304 can be configured to generate a.cfg file of a project in which the first chip is located according to a clock configuration file of the first chip corresponding to the first chip model, an application configuration file and a test configuration file. As an example, the compiling system 30 can further include a chip clock configuration file generation module (not shown in the figure) configured to generate the clock configuration file of the first chip according to the first chip model. For details, refer to the description of S14 in the above Figure 1 .

[0158] Further, with reference to Figure 3A , the compiling system 30 can further include a visualization tool 305. The visualization tool 305 can be configured to generate a.c file and a.h file of a project in which the first chip is located according to a preset code template, a c file generation configuration in the global compiling configuration file, an.xml file and a.cfg file.

[0159] Specifically, the visualization tool 305 can be configured to visually analyze and display the c file generation configuration in the global compiling configuration file, the.xml file and the.cfg file, respectively. Then, after the visual analysis of the files, the visualization tool 305 can be configured to provide different editing modes and code snippet slots for adjusting the codes in the c file generation configuration, the.xml file or the.cfg file according to different code attributes (such as at least including code types or code layouts) in the c file generation configuration, the.xml file or the.cfg file. Then, after the adjustment of the files, the visualization tool 305 can be configured to determine whether the adjusted c file generation configuration,.xml file and.cfg file meet a preset checking rule. And, in the case that the adjusted c file generation configuration,.xml file and.cfg file meet the checking rule, the visualization tool 305 can be configured to generate the.c file and the.h file according to the code template and the adjusted c file generation configuration,.xml file and.cfg file. For details, refer to the description of S15 in the above Figure 1 , which will not be repeated here.

[0160] In this way, the visualization tool 305 can simplify the operation of the developer and can be used to compile any chip in any project. Moreover, for some commonly used codes in some configuration files, the visualization tool 305 can automatically generate corresponding code snippet slots to be embedded in the configuration files, thereby simplifying the operation of the developer.

[0161] Further reference Figure 3A As shown, the compilation system 30 may also include a compilation module 306. This compilation module can be used to compile .c format files, .h format files, and all configurations in the global compilation configuration file except for the .c file generation configuration, thereby generating a compiled executable file. See the above for details. Figure 1 As described in S16, it will not be repeated here.

[0162] Thus, the compilation method provided in this application can be implemented through the system architecture diagram of the compilation environment described above, enabling visual compilation of the first chip. This method is simple to operate and highly user-friendly. Furthermore, the compilation system provided in this application is only used for compiling the first chip and does not include additional network management or hardware function diagnostic modules. Therefore, the executable file generated by the compilation system provided in this application occupies a small amount of storage space and can run on low-cost chips.

[0163] The following example uses the MCU as the first chip, combined with the above. Figure 2 The compilation method shown above and the above Figure 3A The compilation system shown describes the compilation environment in which each module of the compilation system performs specific compilation tasks on the MCU.

[0164] For example, such as Figure 3B As shown, the compilation environment provided in this application may include a chip model selection module 301 (which may also be called an MCU model selection module). The chip model selection module 301 can provide developers with a variety of MCU models so that developers can select the model of the MCU that needs to be compiled (as an example of the first chip model).

[0165] Further reference Figure 3B As shown, the compilation environment may also include an MCU clock configuration file generation module 307 and a project .cfg file generation module 304. The MCU clock configuration file generation module 307 can generate a corresponding clock configuration based on the MCU model, and the project .cfg file generation module 304 can generate a project .cfg file based on the MCU clock configuration, application configuration, and test configuration. See the above for details. Figure 2 As described in S22 and S23, they will not be repeated here.

[0166] Further reference Figure 3B As shown, the compilation environment may also include a port list automatic generation module 308, which can generate a port list based on the MCU model and project functions. See the above for details. Figure 2S24 in FIG. 4, and thus will not be described herein.

[0167] Further, with reference to FIG. 4, Figure 3B As shown in FIG. 4, the compiling environment can further include a project.xml file generation module 303. The project.xml file generation module 303 can be configured to generate a project.xml file according to IO information indicated by the port list, and underlying application information, memory information, communication information, core configuration, system parameters of the project. The communication information of the project can be determined according to the CAN of the project; the underlying application information of the project can be determined according to the CAN DB and the virtual function bus, which can be determined based on the P signal and the R signal in the data transmission process. Details can be referred to the above description of S24-S26 in FIG. 4. Figure 2

[0168] Further, with reference to FIG. 4, Figure 3B As shown in FIG. 4, the compiling environment can further include an MCU compiling configuration file generation module 309 and a global compiling configuration file generation module 302. The MCU compiling configuration file generation module 309 is configured to generate an MCU compiling configuration file according to the MCU model, and the global compiling configuration file generation module 302 is configured to generate a global compiling configuration file according to the base system compiling configuration file and the MCU compiling configuration file.

[0169] The base system compiling configuration file can be a template inherent to the compiling environment, so that the user can adjust the parameters or configurations in the base system compiling file according to the specific project. For example, the base system compiling configuration file can include tool chain configuration, assembly compiling options, register configuration, and c file compiling configuration, etc. The MCU compiling configuration file can be generated by the compiling environment based on the MCU model, for example, the MCU compiling configuration file can include project configuration, c file generation configuration, c file compiling options, and memory layout configuration, etc. The global compiling configuration file can be generated by integrating the base system compiling configuration file and the MCU compiling configuration file, for example, the global compiling configuration file can include c file generation configuration, system compiling configuration, c file compiling configuration, and memory layout configuration, etc. Details can be referred to the above description of S27-S29 in FIG. 4. Figure 2

[0170] Further, with reference to FIG. 4, Figure 3B ​​As shown, the compiling environment can further include a visualization tool 305. The visualization tool 305 can be used to parse and display the c file generation module in the project.cfg file, the project.xml file and the global compiling configuration file. After parsing the files, the visualization tool 305 can provide different editing methods and code snippet slots for different attributes to adjust the project configuration. Then, the visualization tool 305 can verify the files to determine whether the files meet the checking rules.

[0171] If the files do not meet the checking rules, the visualization tool 305 can prompt the developer whether to adjust the checking rules. Otherwise, if the files meet the checking rules, the visualization tool 305 can generate the project.c file and the project.h file based on the code template.xsl file, the project.cfg file, the project.xml file and the global compiling configuration file (e.g., the c file generation configuration in the global configuration file). If the generation fails, the visualization tool 305 can prompt the developer whether to adjust the code template.xsl file. For details, refer to S210 to S221 in the above Figure 2 .

[0172] Further, continuing to refer to Figure 3B , the compiling environment can further include a compiling module 306 to compile the project.c file, the project.h file and the global compiling configuration file (e.g., the configurations other than the c file generation configuration) to generate the project executable file. For details, refer to S222 to S228 in the above Figure 2 .

[0173] In this way, the compiling environment shown in the above Figure 3B can implement the compiling method provided in the present application, thereby realizing the visual compilation of the MCU.

[0174] Exemplarily, Table 1 shows the specific comparison results of the compiling environment provided in the present application and the above-mentioned AutoSAR compiling environment and the single loop compiling environment.

[0175] Table 1

[0176]

[0177] Exemplarily, as shown in Table 1, compared with the high development cost when using the AutoSAR system compiling environment, the project development using the compiling environment provided in the present application does not need to pay for the additional compiling environment. Therefore, the development cost when using the compiling environment provided in the present application is moderate.

[0178] Further exemplarily, as shown in Table 1, compared with the single loop compilation environment which can only be used for relatively simple small project development, the compilation environment provided by the present application can be used for larger project development.

[0179] Further exemplarily, as shown in Table 1, compared with the AutoSAR system compilation environment which needs higher memory consumption, the compilation environment provided by the present application uses lower memory consumption.

[0180] Further exemplarily, as shown in Table 1, compared with the single loop compilation environment which does not provide a visualization tool, the compilation environment provided by the present application can provide a visualization tool so that the developer can replace part of the code writing through convenient operations such as dragging or parameter setting, and has stronger applicability.

[0181] Further exemplarily, as shown in Table 1, compared with the AutoSAR system compilation environment and the single loop compilation environment which are difficult to use, the compilation environment provided by the present application is easier to use.

[0182] Further exemplarily, compared with the AutoSAR system compilation environment and the single loop compilation environment which do not support dynamic compilation, the compilation environment provided by the present application exposes more software compilation interfaces to support the developer to dynamically adjust the configuration content corresponding to the compilation interface.

[0183] In summary, the compilation environment corresponding to the compilation method provided by the present application not only can integrate the advantages of the AutoSAR system compilation environment and the single loop compilation environment, but also can support dynamic compilation and be easier to use.

[0184] Further, in some embodiments, the present application also provides a readable storage medium. The readable storage medium stores instructions. When the instructions are executed on an electronic device, the electronic device executes the compilation method mentioned in the present application.

[0185] Further, in some embodiments, the present application also provides a computer program product. The computer program product includes computer instructions. When the computer instructions are executed on an electronic device, the electronic device can implement the compilation method mentioned in the present application.

[0186] Further, in some embodiments, the present application also provides an electronic device. The electronic device includes at least one memory and at least one processor. The memory is coupled to the processor. The memory is configured to store computer program code / instructions. When the computer program code / instructions are executed by the processor, the electronic device can implement the compilation method mentioned in the present application.

[0187] As Figure 4As shown, an example hardware architecture diagram of the electronic device 400 is illustrated to explain one embodiment of the present application. As shown, the electronic device 400 can include one or more processors 402, a system control logic unit 401 connected to at least one of the processors 402, a system memory 405 connected to the system control logic unit 401, a storage 403 connected to the system control logic unit 401, and a network interface 407 connected to the system control logic unit 401. Figure 4

[0188] It can be appreciated that the structure illustrated in the embodiments of the present application does not constitute a limitation on the only implementable way of the electronic device 400. In other embodiments of the present application, the electronic device 400 can include more or less components than illustrated, or combine certain components, or split certain components, or different arrangement of components. The illustrated components can be implemented in hardware, software, or a combination of software and hardware.

[0189] The processor 402 can include one or more single-core or multi-core processors. In some embodiments, the processor 402 can include any combination of general-purpose processors and special-purpose processors (e.g., application processors, baseband processors, etc.). It can be appreciated that in the embodiments of the present application, the processor 402 can be configured to execute executable instructions 404 stored in the storage 403 to implement the compiling method of the embodiments of the present application. When at least one of the processors 402 executes the instructions, the electronic device 400 implements the compiling method of the embodiments of the present application.

[0190] The system control logic unit 401 can include any suitable interface controller to provide any suitable interface to at least one of the processors 402 and / or any suitable device or component in communication with the system control logic unit 401. The system control logic unit 401 can include one or more memory controllers to provide an interface to connect to the system memory 405. The system memory 405 can be used to load and store data and / or instructions. In some embodiments, the system memory 405 of the electronic device 400 can include any suitable volatile memory, such as suitable dynamic random access memory.

[0191] The storage 403 can include one or more tangible, non-transitory computer-readable media used to store data and / or instructions. In some embodiments, the storage 403 can include any suitable volatile memory and / or any suitable non-volatile storage device. For example, the storage 403 can include RAM and / or cache memory units, and can further include ROM.

[0192] ​Memory 403 can include a portion of the storage resources installed on the device of electronic device 400, or it can be accessible by the device but not necessarily part of the device. For example, memory 403 can be accessed over a network via network interface 407.

[0193] In particular, system memory 405 and memory 403 can include, respectively, a temporary copy and a permanent copy of instructions 404. Instructions 404 can include instructions that, when executed by at least one of processors 402, cause electronic device 400 to implement the compilation method of embodiments of the present application. In some embodiments, instructions 404, hardware, firmware, and / or software components thereof can additionally / alternatively be placed in system control logic 401, network interface 407, and / or processors 402.

[0194] Network interface 407 can include a transceiver to provide a radio interface for electronic device 400 to communicate with any other suitable device (e.g., front end module, antenna, etc.) over one or more networks. In some embodiments, network interface 407 can be integrated with other components of electronic device 400. For example, network interface 407 can be integrated with at least one of processors 402, system memory 405, memory 403, and firmware devices (not shown) having instructions.

[0195] Network interface 407 can further include any suitable hardware and / or firmware to provide a multiple-input multiple-output radio interface. For example, network interface 407 can be a network adapter, a wireless network adapter, a telephone modem, and / or a wireless modem.

[0196] Electronic device 400 can further include input / output (I / O) device 406. Input / output device 406 can include a user interface to enable a user to interact with electronic device 400. In some embodiments, electronic device 400 also includes sensors to determine at least one of environmental conditions and location information related to electronic device 400.

[0197] In some embodiments, electronic device 400 can include, but is not limited to, a display (e.g., a liquid crystal display, a touch screen display, etc.), a speaker, a microphone, one or more cameras (e.g., a still image camera and / or a video camera), a flashlight (e.g., a light emitting diode flash), and a keyboard.

[0198] In some embodiments, peripheral component interface can include, but is not limited to, a non-volatile memory port, an audio jack, and a power supply interface.

[0199] In some embodiments, the sensors can include, but are not limited to, a gyroscope sensor, an accelerometer, a proximity sensor, an ambient light sensor, and a positioning unit. The positioning unit can also be part of or interact with the network interface 407 to communicate with components of a positioning network (e.g., global positioning system (GPS) satellites).

[0200] Embodiments disclosed herein can be implemented in hardware, software, firmware, or combinations thereof. Embodiments of the application can be implemented as computer programs or program code executing on programmable systems comprising at least one processor, a storage system (including volatile and non-volatile memory and / or storage elements), at least one input device, and at least one output device.

[0201] Program code can be applied to input instructions to perform the functions described herein and generate output information. The output information can be applied to one or more output devices, in known fashion. For purposes of this application, a processing system includes any system that has a processor, such as a digital signal processor, microcontroller, a programmable logic device or microprocessor.

[0202] Program code can be implemented in a high level procedural or object oriented programming language to communicate with a processing system. Program code can be implemented in assembly or machine language, if desired. In fact, the mechanisms described herein are not limited in scope to any particular programming language. In any case, the language can be a compiled or interpreted language.

[0203] In some cases, the disclosed embodiments can be implemented in hardware, firmware, software, or any combination thereof. The disclosed embodiments can also be implemented as instructions carried by or stored on a transitory or non-transitory machine-readable (e.g., computer-readable) medium, which can be read and executed by one or more processors. For example, the instructions can be distributed over the network or by other computer readable media. Thus, a machine-readable medium can include any mechanism for storing or transmitting information in a form readable by a machine (e.g., a computer), including without limitation floppy disks, optical disks, optical disks, CD-ROMs, magnetic cassettes or tapes, ROMs, RAMs, magnetic or optical cards, or tangible, machine-readable media storing electronic instructions or information for use by a machine (e.g., a computer). Accordingly, a machine-readable medium includes any type of medium suitable for storing or transmitting electronic instructions or information in a form readable by a machine (e.g., a computer).

[0204] In the drawings, some of the structures or method features can be shown in particular arrangements and / or orders. However, it should be understood that such specific arrangements and / or orders can not be required. Instead, these features can be arranged in a different manner and / or order than shown in the illustrative drawings, in some embodiments. Additionally, inclusion of a structural or method feature in a particular figure is not meant to imply that such feature is required in all embodiments, and in some embodiments, such feature can not be included or can be combined with other features.

[0205] It should be noted that each unit / module mentioned in the embodiments of the devices of the present application is a logical unit / module, and in physical form, one logical unit / module can be a physical unit / module, or a part of a physical unit / module, or a combination of multiple physical unit / modules, and the physical implementation form of the logical unit / module itself is not the most important, and the combination of the functions implemented by these logical units / modules is the key to solving the technical problems proposed in the present application. In addition, in order to highlight the innovative part of the present application, the above-mentioned embodiments of the devices of the present application do not introduce units / modules that are not closely related to solving the technical problems proposed in the present application, which does not mean that the above-mentioned device embodiments do not have other units / modules.

[0206] It should be noted that in the examples and descriptions of the present application, relationship terms such as first and second are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between the entities or operations. Moreover, the terms "include", "contain" or any other variant thereof are intended to cover non-exclusive inclusion, so that the process, method, article or device including a series of elements not only includes those elements, but also includes other elements not explicitly listed or inherent to such process, method, article or device. Without more limitations, the element defined by the statement "including one" does not exclude the presence of another identical element in the process, method, article or device including the element.

[0207] Although the present application has been illustrated and described with reference to certain preferred embodiments thereof, it should be understood by those skilled in the art that various changes in form and details can be made therein without departing from the scope of the present application.

Claims

1. A compiling method applied to an electronic device, characterized in that, The method comprises: obtaining a first chip model of a first chip to be compiled; generating a global compilation configuration file based on the first chip model and a base system compilation configuration file corresponding to a compilation system used for compiling the first chip; generating an.xml format file of a project in which the first chip is located based on the first chip model and underlying application information, memory information, communication information, core configuration and system parameters of the project; generating a.cfg format file of the project in which the first chip is located based on a clock configuration file, an application configuration file and a test configuration file of the first chip corresponding to the first chip model; generating a.c format file and a.h format file of the project in which the first chip is located based on a preset code template, c file generation configuration in the global compilation configuration file, the.xml format file and the.cfg format file; compiling the.c format file, the.h format file and each configuration in the global compilation configuration file except the c file generation configuration to generate an executable file after compilation.

2. The method of claim 1, wherein, The global compilation configuration file is generated based on the first chip model and a base system compilation configuration file corresponding to a compilation system used for compiling the first chip, comprising: generating a chip compilation configuration file of the first chip based on the first chip model, wherein the chip compilation configuration file comprises at least one or more of project configuration, c file generation configuration, c file compilation option or memory layout configuration; generating the global compilation configuration file based on the chip compilation configuration file and the base system compilation configuration file corresponding to the compilation system used for compiling the first chip, wherein the base system compilation configuration file comprises at least one or more of tool chain configuration, assembly compilation option, register configuration and c file compilation configuration.

3. The method of claim 2, wherein: the global compilation configuration file comprises one or more configurations in the base system compilation configuration file and one or more configurations in the chip compilation configuration file; and / or each configuration in the global compilation configuration file is obtained by adjusting parameters of each configuration in the base system compilation configuration file according to parameters of each configuration in the chip compilation configuration file. The.c format file, the.h format file and each configuration in the global compilation configuration file except the c file generation configuration are compiled to generate an executable file after compilation, comprising:

4. The method according to claim 2 or 3, characterized in that, determining that the compilation of each configuration in the.c format file, the.h format file and the global compilation configuration file except the c file generation configuration fails; adjusting the generated global compilation configuration file; and ​ Compiling the.c format file, the.h format file, and each configuration in the global compilation configuration file except the c file generation configuration to generate the executable file.

5. The method of claim 4, wherein, The generated global compilation configuration file includes any one of the following manners: Adjusting the c file compilation options in the chip compilation configuration file, and generating the adjusted global compilation configuration file through the adjusted chip compilation configuration file and the base system compilation configuration file; or Adjusting the c file generation configuration in the chip compilation configuration file, and generating the adjusted global compilation configuration file through the adjusted chip compilation configuration file and the base system compilation configuration file; or Adjusting the compilation steps in the global compilation configuration file.

6. The method of claim 1, wherein, The.xml format file of the first chip project is generated based on the first chip model and the underlying application information, memory information, communication information, core configuration, and system parameters of the first chip project, including: Generating a port list based on the first chip model and the project functions to be executed by the first chip, wherein the port list includes pin information of the first chip, and the pin information includes the number or function of each pin; Generating the.xml format file of the first chip project based on the pin information corresponding to the port list and the underlying application information, memory information, communication information, core configuration, and system parameters of the first chip project.

7. The method of claim 6, wherein, The underlying application information is determined according to a controller area network bus database and a virtual function bus, wherein the virtual function bus is determined according to P signals and R signals in a data transmission process.

8. The method of claim 1, wherein, The.c format file and the.h format file of the first chip project are generated based on a preset code template, c file generation configuration in the global compilation configuration file, the.xml format file, and the.cfg format file, including: Respectively visualizing and displaying the c file generation configuration in the global compilation configuration file, the.xml format file, and the.cfg format file; Based on different code attributes in the parsed c file generation configuration, the.xml format file, or the.cfg format file, different editing methods and code snippet slots are provided to adjust the code in the c file generation configuration, the.xml format file, or the.cfg format file, wherein the code attributes at least include code types or code layouts; Corresponding to the adjusted c file generation configuration, the.xml format file and the.cfg format file meet the preset check rule, and based on the code template and the adjusted c file generation configuration, the.xml format file and the.cfg format file, the.c format file and the.h format file of the first chip project are generated.

9. The method of claim 8, wherein, Corresponding to the adjusted c file generation configuration, the.xml format file and the.cfg format file do not meet the preset check rule, the method further comprises: Corresponding to receiving the operation of adjusting the check rule, it is determined whether the adjusted c file generation configuration, the.xml format file and the.cfg format file meet the adjusted check rule.

10. The method of claim 8, wherein, The.c format file and the.h format file of the first chip project are generated based on the code template and the adjusted c file generation configuration, the.xml format file and the.cfg format file, comprising: It is determined that the.c format file and / or the.h format file fails to be generated; Corresponding to receiving the operation of adjusting the code template, the.c format file and the.h format file are generated based on the adjusted code template and the adjusted c file generation configuration, the.xml format file and the.cfg format file.

11. A compiling system, characterized by A compiling system for compiling a first chip, wherein the compiling system comprises: A chip model selection module for selecting a first chip model of the first chip to be compiled from a plurality of chip models; A global compiling configuration file generation module for generating a global compiling configuration file according to a chip compiling configuration file corresponding to the first chip model and a base system compiling configuration file corresponding to the compiling system, wherein the chip compiling configuration file comprises at least one or more of project configuration, c file generation configuration, c file compiling option or memory layout configuration, and the base system compiling configuration file comprises at least one or more of tool chain configuration, assembly compiling option, register configuration and c file compiling configuration; An project.xml file generation module for generating an.xml format file of the first chip project according to pin information in a port list corresponding to the first chip model, and underlying application information, memory information, communication information, core configuration and system parameters of the first chip project; An project.cfg file generation module for generating a.cfg format file of the first chip project according to clock configuration file, application configuration file and test configuration file of the first chip corresponding to the first chip model; A visual tool for generating the.c format file and the.h format file of the first chip project according to a preset code template, c file generation configuration in the global compiling configuration file, the.xml format file and the.cfg format file; The compiling module compiles the.c format file, the.h format file, and each configuration in the global compiling configuration file except the c file generation configuration to generate a compiled executable file.

12. The compilation system of claim 11, wherein, The.c format file and the.h format file of the project in which the first chip is located are generated according to the preset code template, the c file generation configuration in the global compiling configuration file, the.xml format file, and the.cfg format file, and the method comprises the following steps. The c file generation configuration in the global compiling configuration file, the.xml format file, and the.cfg format file are respectively visually parsed and displayed; and Different editing modes and code snippet slots are provided according to different code attributes in the parsed c file generation configuration, the.xml format file, or the.cfg format file, so as to adjust the code in the c file generation configuration, the.xml format file, or the.cfg format file, wherein the code attributes at least include code types or code layouts; and It is determined whether the adjusted c file generation configuration, the.xml format file, and the.cfg format file meet the preset checking rules, and In the case where it is determined that the adjusted c file generation configuration, the.xml format file, and the.cfg format file meet the checking rules, the visual tool can be used to generate the.c format file and the.h format file according to the code template and the adjusted c file generation configuration, the.xml format file, and the.cfg format file.

13. The compilation system of claim 11, wherein, The compiling system further comprises: A chip compiling configuration file generation module is configured to generate the chip compiling configuration file of the first chip according to the first chip model.

14. The compilation system of claim 11, wherein, The compiling system further comprises: A port list automatic generation module is configured to generate the port list according to the first chip model and the project function required to be executed by the first chip, wherein the port list comprises pin information of the first chip, and the pin information comprises the number or function of each pin.

15. An electronic device, comprising: The method comprises the following steps: At least one memory and at least one processor are coupled to each other; the memory is used to store computer program codes / instructions; and when the computer program codes / instructions are executed by the processor, the electronic device executes the compiling method according to any one of claims 1 to 10.

16. A readable storage medium, characterized by, The readable storage medium stores instructions, and the instructions make the electronic device execute the compiling method according to any one of claims 1 to 10 when executed on the electronic device.

17. A computer program product, characterised in that, The computer instructions make the electronic device execute the compiling method according to any one of claims 1 to 10 when executed on the electronic device. ​

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