Compiler-based self-adaptive memory allocation method and device, equipment and medium

By using a compiler-adaptive memory allocation method, the inefficiency and errors caused by manual memory address management in TPU programming are solved, achieving efficient and accurate memory allocation, reducing memory fragmentation, and improving resource utilization.

CN121300966APending Publication Date: 2026-01-09SOPHGO TECH LTD
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Patent Information

Application Number
CN202511085570.X
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-08-04
Publication Date
2026-01-09

AI Technical Summary

Technical Problem

In traditional TPU programming methods, memory address allocation relies on manual management, which leads to low development efficiency and a high risk of errors. Inaccurate memory allocation and strong coupling between code and memory make it easy for minor modifications to introduce errors.

Method used

A compiler-based adaptive memory allocation method is adopted. The compiler extracts the lifecycle of the data to be allocated in sequence, traverses the list of allocated data in the storage unit, counts the number of data in the storage unit based on lifecycle comparison and data access instructions, and allocates the smallest storage unit as the target.

Benefits of technology

It reduces the reliance on manual memory allocation, avoids human allocation errors, improves memory allocation efficiency and accuracy, reduces memory fragmentation, and improves resource utilization.

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Abstract

The invention relates to the technical field of memory allocation, and particularly discloses an adaptive memory allocation method and device based on a compiler, equipment and a medium. According to the method and the device, the allocated data list corresponding to each storage unit is traversed, and self-adaptive memory allocation is performed according to the second life cycle and the allocated memory address of the allocated data and the first life cycle of the current to-be-allocated data, so that the to-be-allocated memory address of the current to-be-allocated data in each storage unit is obtained; and taking the storage unit with the smallest quantity of conflict data as the target storage unit, so that the current to-be-allocated data is allocated to the to-be-allocated memory address corresponding to the target storage unit, self-adaptive memory allocation is realized, the manual dependence of memory allocation is reduced, errors generated by manual allocation are avoided, and the memory allocation efficiency and accuracy are improved.
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Description

Technical Field

[0001] This application relates to the field of memory allocation technology, and in particular to a compiler-based adaptive memory allocation method, apparatus, device, and medium. Background Technology

[0002] In traditional TPU (Tensor Processing Unit) programming, memory address allocation relies on manual allocation, meaning developers directly use low-level programming tools like C to manually specify the addresses of data in the TPU device's memory. However, manual memory address allocation requires developers to manage memory allocation and deallocation themselves, ensuring memory doesn't go out of bounds, and handling instruction conflicts with memory storage banks. This leads to extremely low development efficiency and a high risk of memory allocation errors. Furthermore, the strong coupling between code and memory allocation means that even minor code modifications can cause a chain reaction of memory address adjustments, resulting in inefficient development iterations and a high likelihood of introducing new errors. Therefore, achieving adaptive memory allocation to improve its efficiency and accuracy has become a pressing issue. Summary of the Invention

[0003] This application provides a compiler-based adaptive memory allocation method, apparatus, device, and medium to achieve adaptive memory allocation and improve the efficiency and accuracy of memory allocation.

[0004] Firstly, this application provides a compiler-based adaptive memory allocation method, the method comprising:

[0005] The compiler extracts the currently allocated data and the first lifetime of the currently allocated data from the list of data to be allocated in sequence, where the lifetime is the time period between the start time and the end time of the access to the data.

[0006] Traverse the allocated data list corresponding to each storage unit, compare the second lifetime of the allocated data with the first lifetime, and determine the memory address to be allocated for the current data to be allocated in each storage unit based on the comparison result and the allocated memory address of the allocated data.

[0007] Based on the data access instruction corresponding to the current data to be allocated, the number of data accessed by the data access instruction in each of the storage units is counted, and the storage unit with the smallest number of data is taken as the target storage unit. The current data to be allocated is then allocated to the memory address to be allocated corresponding to the target storage unit.

[0008] Secondly, this application also provides a compiler-based adaptive memory allocation device, the device comprising:

[0009] The data extraction module is used to extract the currently to-be-allocated data and the first lifecycle of the currently to-be-allocated data from the list of to-be-allocated data in sequence based on the compiler, wherein the lifecycle is the time period between the start time and the end time of the access when the data is accessed.

[0010] The address determination module is used to traverse the allocated data list corresponding to each storage unit, compare the second lifetime of the allocated data with the first lifetime, and determine the memory address to be allocated for the current data to be allocated in each of the storage units based on the comparison result and the allocated memory address of the allocated data.

[0011] The quantity statistics module is used to count the number of data accessed by the data access instruction in each of the storage units based on the data access instruction corresponding to the current data to be allocated, and to select the storage unit with the smallest number of data as the target storage unit, and to allocate the current data to be allocated to the memory address to be allocated corresponding to the target storage unit.

[0012] Thirdly, this application also provides a computer device, the computer device including a memory and a processor; the memory is used to store a computer program; the processor is used to execute the computer program and, when executing the computer program, implement the compiler-based adaptive memory allocation method as described above.

[0013] Fourthly, this application also provides a computer-readable storage medium storing a computer program that, when executed by a processor, causes the processor to implement the compiler-based adaptive memory allocation method described above.

[0014] This application discloses a compiler-based adaptive memory allocation method, apparatus, device, and medium. The method involves extracting currently allocated data and its first lifetime from a list of data to be allocated sequentially, where the lifetime is the time period between the start and end times of data access. It then iterates through the allocated data lists corresponding to each storage unit, comparing the second lifetime of the allocated data with the first lifetime, and determining the allocated memory address of the currently allocated data in each storage unit based on the comparison result and the allocated memory address of the allocated data. Finally, based on the data access instruction corresponding to the currently allocated data, it counts the number of data accessed by the data access instruction in each storage unit, selects the storage unit with the smallest number of data accessed as the target storage unit, and allocates the currently allocated data to the allocated memory address corresponding to the target storage unit. This application can traverse the allocated data list corresponding to each storage unit and perform adaptive memory allocation based on the second lifetime of the allocated data, the allocated memory address, and the first lifetime of the data to be allocated. It obtains the memory address to be allocated for the data to be allocated in each storage unit and selects the storage unit with the fewest conflicting data as the target storage unit. Thus, the data to be allocated is allocated to the memory address to be allocated corresponding to the target storage unit. This achieves adaptive memory allocation, reduces the reliance on manual memory allocation, avoids errors caused by manual allocation, and improves the efficiency and accuracy of memory allocation. Attached Figure Description

[0015] To more clearly illustrate the technical solutions of the embodiments of this application, the drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0016] Figure 1 This is a schematic flowchart of a compiler-based adaptive memory allocation method provided in the first embodiment of this application;

[0017] Figure 2 This is a schematic flowchart illustrating the traversal of allocated data provided in an embodiment of this application;

[0018] Figure 3 This is a schematic flowchart of a compiler-based adaptive memory allocation method provided in the second embodiment of this application;

[0019] Figure 4 A schematic block diagram of a compiler-based adaptive memory allocation device provided for embodiments of this application;

[0020] Figure 5 A schematic block diagram of the structure of a computer device provided for an embodiment of this application. Figure 6 A schematic block diagram of the structure of a computer device provided for an embodiment of this application. Detailed Implementation

[0021] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0022] The flowchart shown in the attached diagram is for illustrative purposes only and does not necessarily include all content and operations / steps, nor does it necessarily have to be performed in the order described. For example, some operations / steps can be broken down, combined, or partially merged, so the actual execution order may change depending on the actual situation.

[0023] It should be understood that the terminology used in this specification is for the purpose of describing particular embodiments only and is not intended to limit the scope of the application. As used in this specification and the appended claims, the singular forms “a,” “an,” and “the” are intended to include the plural forms unless the context clearly indicates otherwise.

[0024] It should also be understood that the term "and / or" as used in this application specification and the appended claims means any combination of one or more of the associated listed items and all possible combinations, and includes such combinations.

[0025] This application provides a compiler-based adaptive memory allocation method, apparatus, device, and medium. The compiler-based adaptive memory allocation method can be applied to a server. It adaptively allocates memory based on the lifecycle and memory address of already allocated data and the lifecycle of data to be allocated, obtaining the memory addresses of the data to be allocated in various storage units. The storage unit with the fewest conflicting data is selected as the target storage unit, and the data to be allocated is then assigned to the target memory address. This achieves adaptive memory allocation, reduces reliance on manual allocation, avoids errors caused by manual allocation, and improves memory allocation efficiency and accuracy. The server can be a standalone server or a server cluster.

[0026] The following detailed description of some embodiments of this application is provided in conjunction with the accompanying drawings. Unless otherwise specified, the following embodiments and features can be combined with each other.

[0027] Please see Figure 1 , Figure 1 This is a schematic flowchart of a compiler-based adaptive memory allocation method provided in an embodiment of this application.

[0028] like Figure 1 As shown, the compiler-based adaptive memory allocation method specifically includes steps S101 to S103.

[0029] S101. Based on the compiler, extract the currently to-be-allocated data and the first lifetime of the currently to-be-allocated data from the list of to-be-allocated data in sequence, wherein the lifetime is the time period between the access start time and the access end time of the data being accessed.

[0030] In this embodiment, the access start time and access end time are the times when the data is first accessed and the last accessed, respectively. The lifecycle is the time period [start, end] between the access start time and access end time, where start is the access start time and end is the access end time.

[0031] In one embodiment, the data to be allocated list stores unallocated memory addresses for data to be allocated, arranged in descending order of data size. Data to be allocated is extracted sequentially from the data to be allocated list, and memory addresses are allocated to each piece of data in the list until all data in the list has been allocated. This ensures that large blocks of data are stored first, reduces memory fragmentation, and effectively utilizes memory space.

[0032] Specifically, each time, one piece of data to be allocated is extracted as the current data to be allocated, and the first lifetime of the current data to be allocated is obtained for subsequent use. After the memory address of the current data to be allocated is allocated, the next data to be allocated is extracted from the list of data to be allocated in sequence and the address is allocated, until the list of data to be allocated is empty.

[0033] Further, before step S101, the method includes: performing format conversion on the source code based on the compiler to obtain target code, and analyzing the target code to determine at least one piece of data to be allocated and data access instructions corresponding to each piece of data to be allocated; determining the access start time and access end time of each piece of data to be allocated based on the data access instructions, and obtaining each first lifetime based on the access start time and access end time; sorting each piece of data to be allocated according to its size, and storing each piece of data to be allocated and its first lifetime in a preset list to obtain the list of data to be allocated.

[0034] In one embodiment, the compiler converts the code into target code in IR (Intermediate Representation) form, which is a language- and hardware-independent representation that facilitates subsequent analysis and optimization.

[0035] Specifically, the compiler converts the source code into an intermediate representation and traces the data access instructions corresponding to each data object. It obtains the position of the data access instructions in the code, that is, the position of the instruction when the data is first accessed and the position of the instruction when the data is last accessed. The instruction position is converted into the time when the data is accessed, that is, the access start time and access end time are the time when the data is first accessed and the time when the data is last accessed. The life cycle [start, end] is recorded.

[0036] In one embodiment, data objects are sorted from largest to smallest by data size and stored in a preset list to generate a list of data to be allocated. A greedy algorithm is used to prioritize the allocation of large data objects in order to reduce memory fragmentation.

[0037] In the above embodiments, because developers find it difficult to globally analyze the lifecycle of different data objects, they typically employ static memory reservation or simple linear allocation strategies, leading to severe memory fragmentation and the inability to dynamically reuse released memory space, resulting in resource waste. Therefore, by sorting the data in the list to be allocated from largest to smallest, larger data blocks can be allocated first during memory allocation, reducing memory fragmentation and thus utilizing memory space more effectively. Secondly, when the code changes, the compiler can automatically reallocate memory without requiring developers to specify the memory allocation address of data in the code, reducing the coupling between code and memory allocation. After code modifications, the compiler can automatically reallocate, reducing the memory allocation error rate and improving development efficiency.

[0038] S102. Traverse the allocated data list corresponding to each storage unit, compare the second lifetime of the allocated data with the first lifetime, and determine the memory address to be allocated for the current data to be allocated in each storage unit based on the comparison result and the allocated memory address of the allocated data.

[0039] In one embodiment, the contiguous memory address space on the TPU is actually distributed across multiple independent storage units (Banks). For example, if the total memory is 1000 bytes and there are 10 storage units (Banks), then addresses 0-99 are in Bank0, 100-199 are in Bank1, and so on, with each Bank having the same memory size.

[0040] In one embodiment, the allocated data list stores the allocated data on each storage unit, the second life cycle of the allocated data, and the allocated memory address, where the allocated memory address includes a memory start address and a memory end address.

[0041] In a specific embodiment, the currently fetched data to be allocated is used as the current data to be allocated, denoted as t. Then the first life cycle is [t_s, t_e]. Traverse the allocated data in the allocated data list, and denote the currently traversed allocated data as a. Then the second life cycle is [a_s, a_e], and the memory start address is a_addr. t_s and a_s are the access start times, and t_e and a_e are the access end times.

[0042] Compare the second life cycle with the first life cycle to determine whether there is an intersection between the first life cycle and the second life cycle. Specifically, according to the formula max_s = max(t_s, a_s), min_e = min(t_e, a_e), obtain max_s and min_e. When max_s < max_e, it indicates that there is an intersection in the life cycle; when max_s ≥ max_e, it indicates that the intersection of the life cycles is empty, that is, there is no intersection. Here, max_s represents the maximum value of the access start time of the data, and min_e represents the minimum value of the access end time of the data.

[0043] When there is an intersection, the memory address corresponding to the allocated data cannot be reused for the current data to be allocated. Then, it is necessary to re-determine the memory address to be allocated for the current data to be allocated according to the allocated memory address. When the intersection is empty, it indicates that the allocated memory address of the currently traversed allocated data can be reused.

[0044] In one embodiment, as Figure 2 shown, after extracting the current data to be allocated, traverse the allocated data list. When the traversal of the allocated data in each storage unit Bank is completed, obtain the optimal memory address of the current data to be allocated in each independent storage unit, that is, the memory address to be allocated.

[0045] Further, before the step S102, it further includes: arranging the allocated data in ascending order of the memory start address in the allocated memory address, and dividing them based on the correspondence between the allocated memory and the storage unit, to generate an allocated data list corresponding to each storage unit.

[0046] In one embodiment, initialize a list to record the allocated data objects, arranged in ascending order of the memory start address. Divide the allocated data with memory addresses in the same storage unit into the same allocated data list, and obtain the allocated data list corresponding to each storage unit.

[0047] In one embodiment, after the data to be allocated is allocated, it is also updated in the list of allocated data according to the memory address size, while maintaining the ascending order of memory addresses.

[0048] S103. Based on the data access instruction corresponding to the current data to be allocated, count the number of data accessed by the data access instruction in each of the storage units, and take the storage unit with the smallest number of data as the target storage unit, and allocate the current data to be allocated to the memory address to be allocated corresponding to the target storage unit.

[0049] Further, before step S103, the method includes: analyzing the data accessed by each data access instruction in the target code based on the compiler analysis, and generating an access relationship list between each data access instruction and each data based on each data access instruction and each data; querying the data access instruction corresponding to the currently to-be-allocated data based on the access relationship list, so as to count the number of data accessed by the data access instruction in each storage unit based on the data access instruction corresponding to the currently to-be-allocated data, and taking the storage unit with the smallest number of data as the target storage unit, and allocating the currently to-be-allocated data to the memory address to be allocated corresponding to the target storage unit.

[0050] In one embodiment, the compiler allocates target code to identify data access instructions in the code, determines the data accessed by each data access instruction, and if the same instruction accesses two or more data objects, then these data objects are conflicting data.

[0051] In one embodiment, a list can be used to record all data access instructions and their access relationships, i.e., to record which data objects each data access instruction accesses, generating an access relationship list. This allows for querying the data access instruction corresponding to the currently to-be-allocated data based on the access relationship list, determining the allocated data in each storage unit accessed by the data access instruction corresponding to the currently to-be-allocated data, and counting the number of data items.

[0052] In one embodiment, the number of allocated data in each storage unit that corresponds to the data access instruction of the currently to-be-allocated data is counted, and the storage unit with the smallest number of data is selected as the target storage unit. The memory address of the currently to-be-allocated data in the target storage unit is selected as the target memory address, and the currently to-be-allocated data is allocated to the target memory address. Since data access instructions can read and write data in parallel when conflicting data addresses are on different banks, but can only read and write data serially if conflicting data are on the same bank, the above steps can determine the number of allocated data in each storage unit that corresponds to the data access instruction of the currently to-be-allocated data, i.e., the number of data conflicting with the currently to-be-allocated data in each storage unit. This effectively allocates the currently to-be-allocated data to the storage unit with the fewest conflicting data, thereby reducing bank conflicts and improving parallel processing capabilities.

[0053] In one embodiment, the currently unallocated data is updated to the allocated data list until all data in the unallocated data list has been allocated, thereby achieving adaptive memory allocation of data.

[0054] The above embodiments provide a compiler-based adaptive memory allocation method, apparatus, device, and medium. The method involves: extracting currently allocated data and its first lifetime from a list of data to be allocated sequentially using the compiler; the lifetime being the time period between the start and end times of data access; traversing the allocated data list corresponding to each storage unit; comparing the second lifetime of the allocated data with the first lifetime; and determining the allocated memory address of the currently allocated data in each storage unit based on the comparison result and the allocated memory address of the allocated data; based on the data access instruction corresponding to the currently allocated data, counting the number of data accessed by the data access instruction in each storage unit, and selecting the storage unit with the smallest number of data as the target storage unit, then allocating the currently allocated data to the allocated memory address corresponding to the target storage unit. This application can traverse the allocated data list corresponding to each storage unit and perform adaptive memory allocation based on the second lifetime of the allocated data, the allocated memory address, and the first lifetime of the data to be allocated. It obtains the memory address to be allocated for the data to be allocated in each storage unit and selects the storage unit with the fewest conflicting data as the target storage unit. Thus, the data to be allocated is allocated to the memory address to be allocated corresponding to the target storage unit. This achieves adaptive memory allocation, reduces the reliance on manual memory allocation, avoids errors caused by manual allocation, and improves the efficiency and accuracy of memory allocation.

[0055] Please see Figure 3 , Figure 3 It is a schematic flowchart of an adaptive memory allocation method based on a compiler provided by an embodiment of the present application. The adaptive memory allocation method based on the compiler can be applied to a server to traverse all the allocated data to find the best memory address of the currently to-be-allocated data in each storage unit, so as to minimize the memory gap in the storage unit, reduce memory fragmentation, and improve the utilization rate of memory resources.

[0056] As Figure 3 shown, the adaptive memory allocation method based on the compiler specifically includes steps S201 to S203.

[0057] S201. Traverse the allocated data in each of the allocated data lists in sequence, and compare the first life cycle of the currently to-be-allocated data with the second life cycle of the allocated data to obtain a comparison result;

[0058] In one embodiment, the currently fetched to-be-allocated data is used as the currently to-be-allocated data, denoted as t, and the first life cycle is [t_s, t_e]. Traverse the allocated data in the allocated data list, and denote the currently traversed allocated data as a, then the second life cycle is [a_s, a_e], and the memory start address is a_addr. t_s and a_s are the access start times, and t_e and a_e are the access end times.

[0059] Compare the second life cycle with the first life cycle to obtain a comparison result, that is, whether there is an intersection between the life cycles of the currently to-be-allocated data and the allocated data. Specifically, according to the formula max_s = max(t_s, a_s), min_e = min(t_e, a_e), max_s and min_e are obtained. When max_s < max_e, it indicates that there is an intersection in the life cycle. When max_s ≥ max_e, it indicates that the intersection of the life cycles is empty, that is, there is no intersection. <00,00137>

[0060] In one embodiment, as Figure 2 shown, the allocated data lists corresponding to each Bank can be traversed serially. That is, after the allocated data list of Bank0 is traversed in sequence, the allocated data list of Bank1 is traversed, and so on until the allocated data lists of all Banks are traversed.

[0061] In another embodiment, the allocated data lists can also be traversed in parallel, that is, the allocated data lists of all Banks are traversed simultaneously to improve the traversal speed and thus improve the memory allocation efficiency.

[0062] S202. Based on the comparison results and the allocated memory address, determine the starting address of the current memory gap and the current memory gap, and determine the memory address to be allocated based on the starting address of the current memory gap, the current memory gap, and the data size of the current data to be allocated.

[0063] In one embodiment, the comparison results include the absence of overlap between the first lifecycle and the second lifecycle, and the presence of overlap between the first lifecycle and the second lifecycle.

[0064] When there is an intersection, the allocated memory address cannot be reused, so the starting address of the memory gap needs to be updated. That is, the current starting address of the memory gap = the starting address of the previous memory gap + the size of the memory allocated, which is the memory termination address of the allocated memory address. When there is no intersection, the allocated memory address can be reused, so the starting address of the previous memory gap can be used. That is, the starting address of the memory to be allocated is the starting address of the previous memory gap.

[0065] In this embodiment, the starting address of the previous memory gap is the initial memory gap starting address or the memory gap starting address updated after the last access to allocated data during the traversal process, and the starting address of the current memory gap is the memory gap starting address updated when the allocated data is accessed during the traversal process.

[0066] In a specific embodiment, if the allocated lists of each Bank are traversed serially, such as Figure 2 As shown, the starting address of the initial memory gap is prev_offset = i * the memory size of the Bank (i is initially 0 and increments by 1 each time); if the allocated data list of each Bank is traversed in parallel, the starting address of the initial memory gap of each Bank is prev_offset = i * the memory size of the Bank (i is the index of the Bank, i = 0, 1, 2, 3, ...).

[0067] For example, if the memory size of each Bank is 100, then the starting address of the initial memory gap in Bank0 is prev_offset = 0 * 100 = 0, the starting address of the initial memory gap in Bank1 is prev_offset = 1 * 100 = 100, the starting address of the initial memory gap in Bank2 is prev_offset = 2 * 100 = 200, and so on.

[0068] The initial value of the starting address of the memory to be allocated for each piece of data in each storage unit is best_offset = prev_offset, and the initial value of the minimum memory gap is small_gap = infinity (INT_MAX).

[0069] Further, determining the memory address to be allocated for the current data to be allocated in each of the storage units based on the comparison result and the allocated memory address of the allocated data further includes: when the intersection of the first lifetime and the second lifetime is empty, taking the starting address of the previous memory gap as the memory starting address of the current data to be allocated, wherein the starting address of the previous memory gap is the initial memory gap starting address or the memory gap starting address last updated during the traversal; and determining the memory ending address of the current data to be allocated based on the data size and the memory starting address of the current data to be allocated.

[0070] In this embodiment, the starting address of the previous memory gap is the starting address of the initial memory gap or the starting address of the memory gap updated last time during the traversal process, and the previous minimum memory gap is the initial minimum memory gap or the minimum memory gap updated after the last access to allocated data during the traversal process.

[0071] In one embodiment, if the comparison result shows that there is no intersection between the first lifetime and the second lifetime, it indicates that the allocated memory address can be reused, the starting address of the memory that t can be placed is the starting address of the previous memory gap, and the ending address of the memory is the starting address of the memory plus the data size of t.

[0072] For example, the initial optimal memory gap size, smallest_gap, is infinity (INT_MAX), and the starting address of the previous memory gap is 0. Figure 4 As shown, rectangle 1 is considered as allocated data a, and rectangle 3 is considered as currently unallocated data t. The lifetimes of t and a do not overlap. At this time, the starting address of memory where t can be placed is 0.

[0073] In the above embodiments, when the intersection of the allocated data and the currently unallocated data is empty, the memory address of the allocated data can be reused, realizing the dynamic release of memory space and improving the utilization rate of memory resources.

[0074] Further, the memory address to be allocated includes a memory start address and a memory end address. The step of determining the current memory gap start address and the current memory gap based on the comparison result and the allocated memory address, and determining the memory address to be allocated based on the current memory gap start address, the current memory gap, and the data size of the current data to be allocated, includes: when the comparison result shows an intersection between the first lifetime and the second lifetime, obtaining the memory start address and the memory end address of the allocated memory address; using the memory end address of the allocated memory address as the current memory gap start address, and obtaining the current memory gap size based on the memory start address of the allocated memory address and the current memory gap start address; when the current memory gap size is less than the previous minimum memory gap, using the current memory gap start address as the memory start address of the current data to be allocated, and determining the memory end address of the current data to be allocated based on the data size; wherein, the previous minimum memory gap is the initial minimum memory gap or the minimum memory gap last updated during the traversal process.

[0075] In one embodiment, if the comparison result shows that the first lifetime and the second lifetime overlap, it indicates that the allocated memory address cannot be reused. The starting address of the current memory gap is the starting address of the previous memory gap plus the memory size of the allocated data 'a'. The current memory gap size gap is the starting address of the current memory gap minus the memory starting address of 'a'. If the gap size is less than smallest_gap, then the current best memory starting address best_offset of the data to be allocated is equal to the starting address of the current memory gap. Then, smallest_gap is updated to gap, and prev_offset is updated to the starting address of the current memory gap plus the memory size of the data to be allocated 't'.

[0076] For example, the initial minimum memory gap size, smallest_gap, is infinity (INT_MAX), and the starting address of the previous memory gap is 0. Figure 4As shown, rectangle 1 is considered as allocated data 'a', and rectangle 2 is considered as the currently unallocated data 't'. The lifecycles of 't' and 'a' overlap. At this point, the current memory gap start address = initial memory gap start address + the memory size of 'a' = the memory start address where 't' can be placed = the memory end address of allocated data 'a'. The current memory gap size gap = the memory start address of 'a' minus the initial gap start address prev_offset = 0, and the memory gap size is less than smallest_gap. Therefore, the current optimal memory start address of 't' is determined to be the memory end address of allocated data 'a'. Then, prev_offset is updated to the current memory gap start address + the memory size of 't', and smallest_gap is updated to the memory gap size gap. This process continues until all allocated data in Bank0 has been traversed, obtaining the optimal memory address of the currently unallocated data 't' in Bank0.

[0077] S203. When the data list allocated to each storage unit has been traversed, the memory address to be allocated for the currently unallocated data in each of the storage units is obtained.

[0078] In one embodiment, after all allocated data in each storage unit Bank has been traversed, the optimal memory address of the currently unallocated data in each independent storage unit is obtained.

[0079] In one embodiment, after the current data to be allocated is allocated, before the next data to be allocated is allocated, the starting address of the memory gap and the minimum memory gap are restored to the initial values ​​corresponding to each Bank.

[0080] For example, such as Figure 4As shown, after the data allocation represented by rectangles 1 and 2 is completed, the data to be allocated, 3, is extracted as the current data to be allocated, t. At this time, the starting address of the memory gap in Bank0, prev_offset = i * Bank size = 0, and the minimum memory gap, small_gap, is infinity (INT_MAX). In the diagram, rectangle 1 represents the currently traversed allocated data a, and rectangle 3 represents the current data to be allocated, t. The lifecycles of t and a do not overlap, so the memory address of a can be reused. At this time, the starting address of the previous memory gap is 0, so the current optimal memory starting address of t is 0, and gap = 0. Continuing to traverse the list of allocated data, that is, rectangle 2 represents the currently traversed allocated data 2, the lifecycle of allocated data 2 is compared with the current data to be allocated, 3. The comparison result shows that the lifecycles of allocated data 2 and the current data to be allocated, 3 overlap, so the memory address of allocated data 2 cannot be reused. At this point, the starting address of the memory for the currently unallocated data 3 is prev_offset + the memory size of the already allocated data 2 = 0 + the memory size of the already allocated data 1 + the memory size of the already allocated data 2. The current memory gap = the starting address of the already allocated data 2 - the starting address of the previous memory gap, which is the area indicated by the double arrows in the diagram. Since gap > the previous smallest memory gap, the condition is not met, so the starting address of the memory for the currently unallocated data 3 is not updated; that is, the optimal starting address of the memory for the currently unallocated data 3 remains 0. Furthermore, all allocated data 1 and allocated data 2 in Bank0 have been completely traversed. Therefore, the optimal starting address of the memory for the currently unallocated data 3 in Bank0 is 0, and the memory ending address = 0 + the memory size of the currently unallocated data 3.

[0081] In the above embodiments, all allocated data is traversed to find the optimal memory address of the data to be allocated in each storage unit, so as to minimize the memory gap in the storage unit, reduce memory fragmentation, and improve memory resource utilization.

[0082] Please see Figure 5 , Figure 5 This application provides a schematic block diagram of a compiler-based adaptive memory allocation device, which is used to execute the aforementioned compiler-based adaptive memory allocation method. The compiler-based adaptive memory allocation device can be configured on a server.

[0083] like Figure 5 As shown, the compiler-based adaptive memory allocation device 300 includes:

[0084] Data extraction module 301 is used to extract the currently to be allocated data and the first life cycle of the currently to be allocated data from the list of to be allocated data in sequence based on the compiler, wherein the life cycle is the time period between the access start time and the access end time of the data being accessed.

[0085] Address determination module 302 is used to traverse the allocated data list corresponding to each storage unit, compare the second lifetime of the allocated data with the first lifetime, and determine the memory address to be allocated of the current data to be allocated in each storage unit based on the comparison result and the allocated memory address of the allocated data.

[0086] The quantity statistics module 302 is used to count the number of data accessed by the data access instruction in each of the storage units based on the data access instruction corresponding to the current data to be allocated, and to select the storage unit with the smallest number of data as the target storage unit, and to allocate the current data to be allocated to the memory address to be allocated corresponding to the target storage unit.

[0087] Furthermore, the address determination module 302 includes:

[0088] The periodic comparison unit is used to sequentially traverse the allocated data in each of the allocated data lists, and compare the first lifetime of the currently to-be-allocated data with the second lifetime of the allocated data to obtain a comparison result;

[0089] The address determination unit is used to determine the starting address of the current memory gap and the current memory gap based on the comparison result and the allocated memory address, and to determine the memory address to be allocated based on the starting address of the current memory gap, the current memory gap and the data size of the current data to be allocated;

[0090] The address collection unit is used to obtain the memory address of the currently to-be-allocated data in each of the storage units when the allocated data list of each storage unit has been traversed.

[0091] Further, the address determination unit includes:

[0092] The memory address acquisition subunit is used to acquire the memory start address and the memory end address of the allocated memory address when the comparison result shows that there is an intersection between the first lifetime and the second lifetime.

[0093] The gap size acquisition sub-unit is used to take the memory termination address of the allocated memory address as the starting address of the current memory gap, and obtain the current memory gap size based on the memory termination address of the allocated memory address and the starting address of the current memory gap;

[0094] The memory termination address acquisition subunit is used to take the current memory gap start address as the memory start address of the current data to be allocated when the current memory gap size is smaller than the previous minimum memory gap, and to determine the memory termination address of the current data to be allocated based on the data size.

[0095] The previous minimum memory gap is either the initial minimum memory gap or the minimum memory gap updated in the previous traversal process.

[0096] Furthermore, the address determination unit further includes:

[0097] The memory start address determination subunit is used to take the previous memory gap start address as the memory start address of the current data to be allocated when the intersection of the first lifetime and the second lifetime is empty, wherein the previous memory gap start address is the initial memory gap start address or the memory gap start address updated last during the traversal.

[0098] The memory termination address determination subunit is used to determine the memory termination address of the currently to-be-allocated data based on the data size and the memory start address of the currently to-be-allocated data.

[0099] Furthermore, the compiler-based adaptive memory allocation device 300 further includes a data list generation module for data to be allocated, the data list generation module comprising:

[0100] The instruction determination unit is used to perform format conversion on the source code based on the compiler to obtain target code, and to analyze the target code to determine at least one piece of data to be allocated and the data access instructions corresponding to each piece of data to be allocated.

[0101] The period determination unit is used to determine the access start time and access end time of each of the data to be allocated based on the data access instruction, and to obtain each first life cycle based on the access start time and the access end time.

[0102] The list acquisition unit is used to sort each of the data to be allocated according to its size, and store each of the data to be allocated and its first lifecycle in a preset list to obtain the list of data to be allocated.

[0103] Furthermore, the compiler-based adaptive memory allocation device 300 also includes a conflict data quantity statistics module, which includes:

[0104] The list generation unit is used to analyze the data accessed by each data access instruction in the target code based on the compiler analysis, and to generate a list of access relationships between each data access instruction and each data based on each data access instruction and each data.

[0105] The instruction query unit is used to query the data access instruction corresponding to the currently unallocated data based on the access relationship list, so as to count the number of data accessed by the data access instruction in each storage unit based on the data access instruction corresponding to the currently unallocated data, and to select the storage unit with the smallest number of data as the target storage unit, and to allocate the currently unallocated data to the unallocated memory address corresponding to the target storage unit.

[0106] Furthermore, the compiler-based adaptive memory allocation device 300 also includes:

[0107] The allocated data list generation module is used to arrange each of the allocated data in ascending order according to the memory starting address in the allocated memory address, and divide it according to the correspondence between the allocated memory and the storage unit to generate an allocated data list corresponding to each storage unit.

[0108] It should be noted that those skilled in the art will understand that, for the sake of convenience and brevity, the specific working processes of the above-described apparatus and modules can be referred to the corresponding processes in the foregoing method embodiments, and will not be repeated here.

[0109] The aforementioned device can be implemented as a computer program, which can be used in, for example... Figure 6 It runs on the computer device shown.

[0110] Please see Figure 6 , Figure 6 This is a schematic block diagram illustrating the structure of a computer device according to an embodiment of this application. The computer device may be a server.

[0111] See Figure 6 The computer device includes a processor, memory, and network interface connected via a system bus, wherein the memory may include non-volatile storage media and internal memory.

[0112] Non-volatile storage media can store operating systems and computer programs. These computer programs include program instructions that, when executed, cause the processor to perform any compiler-based adaptive memory allocation method.

[0113] The processor provides computing and control capabilities, supporting the operation of the entire computer device.

[0114] Internal memory provides an environment for the execution of computer programs in non-volatile storage media. When the computer program is executed by the processor, it enables the processor to execute any compiler-based adaptive memory allocation method.

[0115] This network interface is used for network communication, such as sending assigned tasks. Those skilled in the art will understand that... Figure 6 The structure shown is merely a block diagram of a portion of the structure related to the present application and does not constitute a limitation on the computer device to which the present application is applied. Specific computer devices may include more or fewer components than those shown in the figure, or combine certain components, or have different component arrangements.

[0116] It should be understood that the processor can be a Central Processing Unit (CPU), but it can also be other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. Among these, a general-purpose processor can be a microprocessor or any conventional processor.

[0117] In one embodiment, the processor is configured to run a computer program stored in memory to perform the following steps:

[0118] The compiler extracts the currently allocated data and the first lifetime of the currently allocated data from the list of data to be allocated in sequence, where the lifetime is the time period between the start time and the end time of the access to the data.

[0119] Traverse the allocated data list corresponding to each storage unit, compare the second lifetime of the allocated data with the first lifetime, and determine the memory address to be allocated for the current data to be allocated in each storage unit based on the comparison result and the allocated memory address of the allocated data.

[0120] Based on the data access instruction corresponding to the current data to be allocated, the number of data accessed by the data access instruction in each of the storage units is counted, and the storage unit with the smallest number of data is taken as the target storage unit. The current data to be allocated is then allocated to the memory address to be allocated corresponding to the target storage unit.

[0121] In one embodiment, when the processor iterates through the allocated data list corresponding to each storage unit, compares the second lifetime of the allocated data with the first lifetime, and determines the memory address to be allocated for the currently allocated data in each storage unit based on the comparison result and the allocated memory address of the allocated data, it is configured to:

[0122] The allocated data in each of the allocated data lists are traversed sequentially, and the first lifetime of the currently to-be-allocated data and the second lifetime of the allocated data are compared to obtain the comparison result.

[0123] Based on the comparison results and the allocated memory address, the starting address of the current memory gap and the current memory gap are determined, and the memory address to be allocated is determined based on the starting address of the current memory gap, the current memory gap, and the data size of the current data to be allocated.

[0124] When the allocated data list of each storage unit has been traversed, the memory address to be allocated for the currently unallocated data in each of the storage units is obtained.

[0125] In one embodiment, the memory address to be allocated includes a memory start address and a memory end address. When the processor determines the current memory gap start address and the current memory gap based on the comparison result and the allocated memory address, and determines the memory address to be allocated based on the current memory gap start address, the current memory gap, and the data size of the current data to be allocated, it performs the following:

[0126] When the comparison result shows that there is an intersection between the first lifecycle and the second lifecycle, the memory start address and the memory end address of the allocated memory address are obtained.

[0127] The memory termination address of the allocated memory address is used as the starting address of the current memory gap, and the current memory gap size is obtained based on the memory termination address of the allocated memory address and the starting address of the current memory gap;

[0128] When the current memory gap size is smaller than the previous minimum memory gap, the starting address of the current memory gap is used as the starting address of the memory of the current data to be allocated, and the ending address of the memory of the current data to be allocated is determined based on the data size.

[0129] The previous minimum memory gap is either the initial minimum memory gap or the minimum memory gap updated in the previous traversal process.

[0130] In one embodiment, when the processor determines the memory address to be allocated for the currently unallocated data in each of the storage units based on the comparison result and the allocated memory address of the allocated data, it is further configured to:

[0131] When the intersection of the first lifecycle and the second lifecycle is empty, the starting address of the previous memory gap is taken as the starting address of the memory of the current data to be allocated, wherein the starting address of the previous memory gap is the initial memory gap starting address or the memory gap starting address updated last during the traversal.

[0132] Based on the data size and the memory start address of the currently unallocated data, the memory end address of the currently unallocated data is determined.

[0133] In one embodiment, before implementing the compiler-based sequential extraction of the currently to-be-allocated data from the list of to-be-allocated data and the first lifetime of the currently to-be-allocated data, the processor is further configured to implement:

[0134] The compiler performs format conversion on the source code to obtain target code, and analyzes the target code to determine at least one piece of data to be allocated and the data access instructions corresponding to each piece of data to be allocated.

[0135] Based on the data access instruction, the access start time and access end time of each of the data to be allocated are determined, and the first life cycle of each is obtained based on the access start time and the access end time.

[0136] The data to be allocated is sorted according to its size, and the data to be allocated and its first lifecycle are stored in a preset list to obtain the list of data to be allocated.

[0137] In one embodiment, before the processor implements the data access instruction corresponding to the currently unallocated data, counts the number of data accessed by the data access instruction in each of the storage units, selects the storage unit with the smallest number of data as the target storage unit, and allocates the currently unallocated data to the unallocated memory address corresponding to the target storage unit, it is further configured to implement:

[0138] The compiler analyzes the data accessed by each data access instruction in the target code, and generates a list of access relationships between each data access instruction and each data based on each data access instruction and each data.

[0139] Based on the access relationship list, query the data access instructions corresponding to the currently unallocated data, so as to count the number of data accessed by the data access instructions in each storage unit, and take the storage unit with the smallest number of data as the target storage unit, and allocate the currently unallocated data to the unallocated memory address corresponding to the target storage unit.

[0140] In one embodiment, before the processor iterates through the allocated data list corresponding to each storage unit, compares the second lifetime of the allocated data with the first lifetime, and determines the memory address of the currently unallocated data in each storage unit based on the comparison result and the allocated memory address of the allocated data, it is further configured to:

[0141] The allocated data are arranged in ascending order according to the starting address of the allocated memory address, and divided according to the correspondence between the allocated memory and the storage unit to generate an allocated data list corresponding to each storage unit.

[0142] The embodiments of this application also provide a computer-readable storage medium storing a computer program, the computer program including program instructions, and the processor executing the program instructions to implement any of the compiler-based adaptive memory allocation methods provided in the embodiments of this application.

[0143] The computer-readable storage medium may be an internal storage unit of the computer device described in the foregoing embodiments, such as the hard disk or memory of the computer device. The computer-readable storage medium may also be an external storage device of the computer device, such as a plug-in hard disk, SmartMedia Card (SMC), Secure Digital (SD) card, or Flash Card equipped on the computer device.

[0144] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any person skilled in the art can easily conceive of various equivalent modifications or substitutions within the technical scope disclosed in this application, and these modifications or substitutions should all be covered within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. A compiler-based adaptive memory allocation method, characterized in that, include: The compiler extracts the currently allocated data and the first lifetime of the currently allocated data from the list of data to be allocated in sequence, where the lifetime is the time period between the start time and the end time of the access to the data. Traverse the allocated data list corresponding to each storage unit, compare the second lifetime of the allocated data with the first lifetime, and determine the memory address to be allocated for the current data to be allocated in each storage unit based on the comparison result and the allocated memory address of the allocated data. Based on the data access instruction corresponding to the current data to be allocated, the number of data accessed by the data access instruction in each of the storage units is counted, and the storage unit with the smallest number of data is taken as the target storage unit. The current data to be allocated is then allocated to the memory address to be allocated corresponding to the target storage unit.

2. The compiler-based adaptive memory allocation method according to claim 1, characterized in that, The step of traversing the allocated data list corresponding to each storage unit, comparing the second lifetime of the allocated data with the first lifetime, and determining the unallocated memory address of the currently unallocated data in each of the storage units based on the comparison result and the allocated memory address of the allocated data includes: The allocated data in each of the allocated data lists are traversed sequentially, and the first lifetime of the currently to-be-allocated data and the second lifetime of the allocated data are compared to obtain the comparison result. Based on the comparison results and the allocated memory address, the starting address of the current memory gap and the current memory gap are determined, and the memory address to be allocated is determined based on the starting address of the current memory gap, the current memory gap, and the data size of the current data to be allocated. When the allocated data list of each storage unit has been traversed, the memory address to be allocated for the currently unallocated data in each of the storage units is obtained.

3. The compiler-based adaptive memory allocation method according to claim 2, characterized in that, The memory address to be allocated includes a memory start address and a memory end address. The process of determining the current memory gap start address and the current memory gap based on the comparison result and the already allocated memory address, and determining the memory address to be allocated based on the current memory gap start address, the current memory gap, and the data size of the current data to be allocated, includes: When the comparison result shows that there is an intersection between the first lifecycle and the second lifecycle, the memory start address and the memory end address of the allocated memory address are obtained. The memory termination address of the allocated memory address is used as the starting address of the current memory gap, and the current memory gap size is obtained based on the memory termination address of the allocated memory address and the starting address of the current memory gap; When the current memory gap size is smaller than the previous minimum memory gap, the starting address of the current memory gap is used as the starting address of the memory of the current data to be allocated, and the ending address of the memory of the current data to be allocated is determined based on the data size. The previous minimum memory gap is either the initial minimum memory gap or the minimum memory gap updated in the previous traversal process.

4. The compiler-based adaptive memory allocation method according to claim 2, characterized in that, The step of determining the memory address to be allocated for the currently unallocated data in each of the storage units based on the comparison result and the allocated memory address of the allocated data further includes: When the intersection of the first lifecycle and the second lifecycle is empty, the starting address of the previous memory gap is taken as the starting address of the memory of the current data to be allocated, wherein the starting address of the previous memory gap is the initial memory gap starting address or the memory gap starting address updated last during the traversal. Based on the data size and the memory start address of the currently unallocated data, the memory end address of the currently unallocated data is determined.

5. The compiler-based adaptive memory allocation method according to claim 1, characterized in that, Before the compiler sequentially extracts the currently to-be-allocated data from the list of data to be allocated and the first lifetime of the currently to-be-allocated data, the process also includes: The compiler performs format conversion on the source code to obtain target code, and analyzes the target code to determine at least one piece of data to be allocated and the data access instructions corresponding to each piece of data to be allocated. Based on the data access instruction, the access start time and access end time of each of the data to be allocated are determined, and the first life cycle of each is obtained based on the access start time and the access end time. The data to be allocated is sorted according to its size, and the data to be allocated and its first lifecycle are stored in a preset list to obtain the list of data to be allocated.

6. The compiler-based adaptive memory allocation method according to claim 1, characterized in that, Before allocating the current data to be allocated to the memory address corresponding to the target storage unit, based on the data access instruction corresponding to the current data to be allocated, counting the number of data accessed by the data access instruction in each of the storage units, and taking the storage unit with the smallest number of data as the target storage unit, the method further includes: The compiler analyzes the data accessed by each data access instruction in the target code, and generates a list of access relationships between each data access instruction and each data based on each data access instruction and each data. Based on the access relationship list, query the data access instructions corresponding to the currently unallocated data, so as to count the number of data accessed by the data access instructions in each storage unit, and take the storage unit with the smallest number of data as the target storage unit, and allocate the currently unallocated data to the unallocated memory address corresponding to the target storage unit.

7. The compiler-based adaptive memory allocation method according to any one of claims 1 to 6, characterized in that, Before traversing the allocated data list corresponding to each storage unit, comparing the second lifetime of the allocated data with the first lifetime, and determining the memory address of the currently unallocated data in each storage unit based on the comparison result and the allocated memory address of the allocated data, the method further includes: The allocated data are arranged in ascending order according to the starting address of the allocated memory address, and divided according to the correspondence between the allocated memory and the storage unit to generate an allocated data list corresponding to each storage unit.

8. A compiler-based adaptive memory allocation device, characterized in that, include: The data extraction module is used to extract the currently to-be-allocated data and the first lifecycle of the currently to-be-allocated data from the list of to-be-allocated data in sequence based on the compiler, wherein the lifecycle is the time period between the start time and the end time of the access when the data is accessed. The address determination module is used to traverse the allocated data list corresponding to each storage unit, compare the second lifetime of the allocated data with the first lifetime, and determine the memory address to be allocated for the current data to be allocated in each of the storage units based on the comparison result and the allocated memory address of the allocated data. The data allocation module is used to count the number of data accessed by the data access instruction in each of the storage units based on the data access instruction corresponding to the current data to be allocated, and to select the storage unit with the smallest number of data as the target storage unit, and to allocate the current data to be allocated to the memory address to be allocated corresponding to the target storage unit.

9. A computer device, characterized in that, The computer device includes a memory and a processor; The memory is used to store computer programs; The processor is configured to execute the computer program and, in executing the computer program, implement the compiler-based adaptive memory allocation method as described in any one of claims 1 to 7.

10. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a computer program that, when executed by a processor, causes the processor to implement the compiler-based adaptive memory allocation method as described in any one of claims 1 to 7.