Power module and power conversion device

Abstract

The embodiment of the invention provides a power module and a power conversion device, the power module comprises a driving chip, a power chip, a first substrate and a second substrate which are packaged in the power module, and the driving chip is electrically connected with the power chip; the heating value of the driving chip and the heating value of the power chip are different during working, the heating value of the power chip is larger than that of the driving chip, and the power chip has a higher heat dissipation requirement. The driving chip is arranged on the first substrate, the power chip is arranged on the second substrate, and a gap is formed between the first substrate and the second substrate, so that heat generated by the power chip is not easy to transfer to the driving chip, the power chip can be prevented from baking the driving chip during working, and the heat conductivity coefficient of the second substrate is greater than that of the first substrate; and the second substrate with low thermal resistance is used for bearing the power chip, so that heat dissipation of the power chip is facilitated.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of packaging, in particular to a power module and a power conversion device. BACKGROUND

[0002] With the gradual application of third-generation wide-bandgap semiconductor power devices such as silicon carbide (SiC) and gallium nitride (GaN) devices, switching power supplies are developing towards higher switching frequency, higher power density and super-high efficiency. However, the parasitic inductance caused by the traditional discrete driving scheme wiring and device packaging brings the problem of driving voltage oscillation, and the increase of the absorbing element to solve the driving voltage leads to the slow switching speed of the power device, which cannot fully exert the advantage of fast switching speed of the third-generation semiconductor device. In order to fully exert the high-frequency advantage of the third-generation wide-bandgap semiconductor and reduce the influence of the parasitic parameters of PCB wiring and packaging, the driving chip and the power chip are considered to be combined and packaged as one module.

[0003] In the traditional driving chip and power chip combined packaging module, the power chip, the driving chip and other passive devices are placed on the same insulating substrate, and this scheme has two problems: ① Compared with the copper frame of the traditional TO packaging, the lateral spreading thermal resistance of the insulating substrate is larger, which will affect the heat dissipation of the power chip; ② The driving chip and the power chip are placed on the same insulating substrate, which may cause the driving chip to be baked by the power chip, affecting the long-term operation reliability. SUMMARY

[0004] The embodiments of the present application provide a power module and a power conversion device, which can prevent the driving chip from being baked by the power chip, improve the heat dissipation performance of the power chip, and be beneficial to the long-term operation reliability of the power module.

[0005] In a first aspect, the present application provides a power module, which comprises a driving chip, a power chip, a first substrate and a second substrate; the thermal conductivity of the second substrate is greater than that of the first substrate; the driving chip is arranged on the first substrate, the power chip is arranged on the second substrate, and there is a gap between the first substrate and the second substrate; the driving chip and the power chip are electrically connected; the driving chip, the power chip, the first substrate and the second substrate are packaged in the power module.

[0006] The heat generation of the driving chip and the power chip is different when they work, and the heat generation of the power chip is greater than that of the driving chip, and the power chip has a higher heat dissipation requirement. In the present scheme, the driving chip is arranged on the first substrate, and the power chip is arranged on the second substrate, so that the heat generated by the power chip is not easily transmitted to the driving chip, and the power chip can be prevented from baking the driving chip when it works. The thermal conductivity of the second substrate is greater than that of the first substrate; the power chip is carried by the second substrate with small thermal resistance, which is beneficial to the heat dissipation of the power chip and is beneficial to improving the long-term operation reliability of the power module.

[0007] With reference to the first aspect, in a possible implementation manner, the power module includes a plurality of power chips, the plurality of power chips are arranged on a same second substrate, and each power chip is electrically connected with the driving chip. The same second substrate carries the plurality of power chips, the same second substrate can conduct heat for the plurality of power chips, and the heat dissipation performance of the plurality of power chips can be simultaneously improved. The same second substrate carries the plurality of power chips, the number of second substrates can be reduced, the manufacturing cost of the power module is reduced, and the packaging process of the power module is simplified.

[0008] With reference to the first aspect, in a possible implementation manner, the power module includes a plurality of power chips, the plurality of power modules include a plurality of second substrates, there is a gap between any two second substrates, the plurality of power chips are arranged on the plurality of second substrates, and each power chip is electrically connected with the driving chip. Since the plurality of power chips are arranged on the plurality of second substrates, if the number of power chips is equal to the number of second substrates, the plurality of power chips can correspond to the plurality of second substrates one by one, each power chip can be arranged on the second substrate corresponding to the power chip, the heat generated by each power chip during operation does not affect each other, the power chip with a lower heat generation during operation is not affected by the high temperature of the power chip with a higher heat generation, and the power chip that is not in operation is not affected by the high temperature of the power chip that is in operation, thereby improving the stability of the power module during long-term operation. If the number of power chips is greater than the number of second substrates, at least part of the plurality of second substrates simultaneously carries two or more power chips. Since at least part of the second substrates simultaneously carries two or more power chips, the number of second substrates can be saved, the manufacturing cost of the power module is reduced, and the packaging process of the power module is simplified.

[0009] With reference to the first aspect, in a possible implementation manner, each power chip includes a power port and a driving port, the power ports of the power chips are electrically connected with each other, and the driving chip is electrically connected with the driving port of each power chip. The rated current and the voltage resistance of a single power chip have physical limits. By electrically connecting the power ports of some power chips with each other, power stacking can be achieved, and the power limit of a single power chip can be broken through.

[0010] With reference to the first aspect, in a possible implementation manner, the first substrate and the second substrate are located on a same first reference surface.

[0011] With reference to the first aspect, in a possible implementation manner, the first substrate and the second substrate are arranged in a stacked manner, and the first substrate is parallel to the second substrate. The area of the power module occupied by the first substrate and the second substrate together can be reduced, and the energy density of the power module is improved.

[0012] With reference to the first aspect, in a possible implementation manner, the driving chip is arranged on a surface of the first substrate facing the second substrate, and the power chip is arranged on a surface of the second substrate facing the first substrate. The distance between the driving chip and the power chip is reduced, the conductive wire connecting the driving chip and the power chip can be shortened, and thus the parasitic inductance generated by the inductive coupling between the conductive wires can be reduced or eliminated, and the signal interference between the conductive wires is reduced, and the stability of the power module in power conversion is improved.

[0013] With reference to the first aspect, in a possible implementation manner, the first substrate and the second substrate are stacked, the first substrate is parallel to the second substrate, the first substrate is provided with a via, the driving chip is arranged on a surface of the first substrate facing away from the second substrate, the power chip is arranged on a surface of the second substrate facing the first substrate, and the driving chip and the power chip are connected through the via. The via does not need to pass through the first substrate to connect the driving chip and the power chip. Compared with connecting the driving chip and the power chip through the conductive wire, the length of the via is shorter than that of the conductive wire, the parasitic inductance generated by connecting the driving chip and the power chip through the via is smaller, the signal interference between the conductive wires is reduced, and the stability of the power module in power conversion is improved. Since the via connects the driving chip and the power chip, the via does not need to pass through the first substrate to connect the driving chip and the power chip, the electrical connection between the power chip and the driving chip is simpler, and the packaging process of the power module can be effectively simplified.

[0014] With reference to the first aspect, in a possible implementation manner, the first substrate and the second substrate are stacked, the first substrate is parallel to the second substrate, the driving chip is arranged on a surface of the first substrate facing away from the second substrate, and a plurality of power chips are arranged on a surface of the second substrate facing the first substrate; the first substrate is provided with a plurality of vias, and the driving chip is electrically connected to the plurality of power chips through the plurality of vias respectively. Each via does not need to pass through the first substrate to connect the driving chip and the power chip. Compared with connecting the driving chip and the power chip through the conductive wire, the length of the via is shorter than that of the conductive wire, the parasitic inductance generated by connecting the driving chip and the power chip through the via is smaller, the signal interference between the conductive wires is reduced, and the stability of the power module in power conversion is improved.

[0015] In a possible implementation manner of the first aspect, the plurality of second substrates are stacked with the first substrate, each second substrate is located at a same second reference surface, the first substrate is parallel to the second reference surface, the second substrate is parallel to the second reference surface, and a stacking direction of each second substrate and the first substrate is perpendicular to the second reference surface; the driving chip is arranged on a surface of the first substrate away from the plurality of second substrates, and the plurality of power chips are respectively arranged on surfaces of the corresponding second substrates facing the first substrate; the first substrate is provided with a plurality of through holes, and the driving chip is electrically connected to the plurality of power chips through the plurality of through holes. Each through hole does not need to connect the driving chip and the power chip by bypassing the first substrate, and compared with connecting the driving chip and the power chip by a conductive wire, the length of the through hole is shorter than that of the conductive wire, the parasitic inductance generated by connecting the driving chip and the power chip through the through hole is smaller, and then the signal interference between the conductive wires is reduced, and the stability of the power module in power conversion is improved.

[0016] In a possible implementation manner of the first aspect, the power module further includes a passive device, and the passive device is arranged on the first substrate and electrically connected to the power chips. The passive device can be a capacitor, an inductor, a resistor or the like. By arranging the passive device on the first substrate, the power module can realize efficient, stable and reliable movement.

[0017] In a possible implementation manner of the first aspect, the power module further includes a capacitor, the capacitor is arranged on the first substrate, each power chip includes a common port and a non-common port, the common ports of the power chips are electrically connected to each other, one end of the capacitor is electrically connected to the non-common port of one power chip, and the other end of the capacitor is electrically connected to the non-common port of another power chip. The capacitor can decouple each component (for example, the driving chip and the power chip) in the power module, absorb the sudden current generated when the power module operates, absorb the current surge, suppress the voltage overshoot caused by the parasitic inductance, and protect the entire power module.

[0018] In a possible implementation manner of the first aspect, the first substrate and the second substrate are stacked, the first substrate is parallel to the second substrate, the power module further includes a capacitor, the capacitor is arranged on a surface of the first substrate away from the second substrate, and the plurality of power chips are arranged on a surface of the second substrate facing the first substrate; the first substrate is provided with a plurality of through holes, each power chip includes a power port and a plurality of driving ports, the power port of each power chip includes a common port and a non-common port, and the common ports of the power chips are electrically connected to each other; one end of the capacitor is connected to the non-common port of one power chip through one through hole, and the other end of the capacitor is connected to the non-common port of another power chip through another through hole. The capacitor can decouple two power chips connected thereto, suppress the voltage overshoot caused by the parasitic inductance, and protect the entire power module.

[0019] With reference to the first aspect, in a possible implementation form of the first aspect, the plurality of second substrates are stacked with the first substrate, each second substrate is located at a same second reference surface, the first substrate is parallel to the second reference surface, the second substrate is parallel to the second reference surface, and the power module further comprises a capacitor, the capacitor is disposed on a surface of the first substrate facing away from the plurality of second substrates, and the plurality of power chips are respectively disposed on surfaces of the plurality of second substrates facing the first substrate. The first substrate is provided with a plurality of vias, each power chip comprises a power port and a plurality of driving ports, the power port of each power chip comprises a common port and a non-common port, and the power ports of the plurality of power chips are electrically connected to each other. One end of the capacitor is connected to the non-common port of one power chip through one via, and the other end of the capacitor is connected to the non-common port of another power chip through another via. The via does not need to pass through the first substrate to directly connect the one end of the capacitor to the non-common port of the one power chip, and the via does not need to pass through the first substrate to directly connect the other end of the capacitor to the non-common port of the another power chip. Compared with the case that the two ends of the capacitor are respectively connected to the two power chips through conductive wires, the parasitic inductance between the capacitor and the two power chips is smaller, and the stability of the power module in power conversion is improved.

[0020] With reference to the first aspect, in a possible implementation form of the first aspect, the power module further comprises a conductive layer, the conductive layer is disposed on the first substrate, the conductive layer and the capacitor are located on a same surface of the first substrate, and the conductive layer is parallel to the first substrate. The conductive layer is used to connect the one via and the one end of the capacitor, and / or the conductive layer is used to connect the another via and the other end of the capacitor. The conductive layer can extend to any position of a side surface of the first substrate facing away from the second substrate. One power chip can be connected to the one end of the capacitor through the one via and the conductive layer, and another power chip can be connected to the other end of the capacitor through the another via and the conductive layer, so that the power chips and the capacitor can be conveniently electrically connected.

[0021] With reference to the first aspect, in a possible implementation form of the first aspect, the power module further comprises a conductive layer, the conductive layer is disposed on the first substrate, the conductive layer and the capacitor are respectively located on two surfaces of the first substrate facing away from each other, and the conductive layer is parallel to the first substrate. The conductive layer is used to connect the one via and the non-common port of the one power chip, and / or the conductive layer is used to connect the another via and the non-common port of the another power chip. The conductive layer can extend to any position of a side surface of the first substrate facing the second substrate. One power chip can be connected to the one end of the capacitor through the one via and the conductive layer, and another power chip can be connected to the other end of the capacitor through the another via and the conductive layer, so that the power chips and the capacitor can be conveniently electrically connected.

[0022] In a second aspect, the application provides a power conversion device, comprising a circuit board and the power module as described in the first aspect, the power module being connected with the circuit board.

[0023] In the present solution, in the power module, the gap between the first substrate and the second substrate can prevent the power chip from driving the drive chip for a long time, and the heat dissipation performance of the power chip is improved, which is beneficial to improve the reliability of the power module in long-term operation, and further improves the reliability of the power conversion device in long-term operation. BRIEF DESCRIPTION OF DRAWINGS

[0024] Figure 1 A structural schematic diagram of a power conversion device provided by an embodiment of the application is shown in the figure;

[0025] Figure 2 A top view of a power module provided by an embodiment of the application is shown in the figure;

[0026] Figure 3 A side view of a power module provided by an embodiment of the application is shown in the figure;

[0027] Figure 4 A top view of another power module provided by an embodiment of the application is shown in the figure;

[0028] Figure 5 A top view of another power module provided by an embodiment of the application is shown in the figure;

[0029] Figure 6 A top view of another power module provided by an embodiment of the application is shown in the figure;

[0030] Figure 7 A side view of another power module provided by an embodiment of the application is shown in the figure;

[0031] Figure 8 A top view of another power module provided by an embodiment of the application is shown in the figure;

[0032] Figure 9 A top view of another power module provided by an embodiment of the application is shown in the figure;

[0033] Figure 10 A side view of another power module provided by an embodiment of the application is shown in the figure;

[0034] Figure 11 A top view of another power module provided by an embodiment of the application is shown in the figure.

[0035] REFERENCE SIGNS:

[0036] 10, power conversion device; 100, power module; 110, drive chip; 120, power chip; 121, drive port; 122, power port; 122a, common port; 122b, non-common port; 130, first substrate; 131, via hole; 140, second substrate; 150, conductive wire; 160, capacitor; 170, conductive layer; 200, circuit board. DETAILED DESCRIPTION

[0037] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the background art, the present application will be further described in detail below with reference to the drawings.

[0038] Please refer to Figure 1 The embodiments of the present application provide a power conversion device 10, which can realize power transmission and control under different power requirements. The power converter can be applied to power supply, rectifier, inverter, uninterruptible power supply (UPS), direct current to direct current module (DCDC module), charging pile and on-board charger (OBC) and the like. The power conversion device 10 comprises a circuit board 200 and a power module 100, and the power module 100 is electrically connected to the circuit board 200. The power device comprises a plurality of circuit boards 200 and a plurality of power modules 100, and the circuit board 200 can be electrically connected to one or more power modules 100. The power module 100 can realize power conversion, for example, the power module 100 can convert direct current into alternating current, the power module 100 can convert alternating current into direct current, and the power module 100 can convert direct current into direct current. In the power conversion device 10 provided by the present application, the power conversion device 10 can simultaneously have the ability to convert direct current into alternating current, convert alternating current into direct current and convert direct current into direct current.

[0039] In the embodiments provided by the present application, please refer to Figure 2 and Figure 3The power module 100 can include a driving chip 110, a power chip 120, a first substrate 130, and a second substrate 140, the second substrate 140 has a thermal conductivity greater than that of the first substrate 130. The driving chip 110 is disposed on the first substrate 130, and the power chip 120 is disposed on the second substrate 140. The driving chip 110 is electrically connected to the power chip 120, and the driving chip 110 is configured to send a control signal to the power chip 120 to control the power chip 120 to process power conversion. For example, the power chip 120 is controlled by the driving chip 110 to convert direct current into alternating current, convert alternating current into direct current, or convert direct current into direct current. During the process of converting power, the driving chip 110 has a small current flowing therethrough, and the power chip 120 has a large current flowing therethrough. Compared with the driving chip 110, the power chip 120 has a higher heat dissipation requirement.

[0040] The first substrate 130 can be an insulating substrate, for example, the first substrate 130 can be but is not limited to an insulated metal substrate (IMS), a direct bond copper substrate (DBC), or a flame-retardant 4 epoxy glass cloth laminate (FR4). The first substrate 130 can support the driving chip 110, and the first substrate 130 can also serve as an insulating substrate. The first substrate 130 can also be thermally conductive to facilitate heat dissipation of the driving chip 110.

[0041] To facilitate heat dissipation of the power chip 120, the second substrate 140 provided by the present application has good heat dissipation performance. The second substrate 140 can be a metal substrate, and the second substrate 140 can be a metal frame (for example, a copper frame). It should be noted that in the embodiments of the present application, the second substrate 140 is not limited to a metal substrate or a metal frame. The second substrate 140 can also be an insulating substrate with good thermal conductivity.

[0042] The first substrate 130 and the second substrate 140 have a gap therebetween, which prevents heat of the second substrate 140 from being transferred to the first substrate 130, so that heat generated by the power chip 120 is transferred to the driving chip 110, thereby avoiding negative effects on long-term operation of the driving chip 110. The first substrate 130 and the second substrate 140 can be connected by an insulating material with high thermal resistance, or the first substrate 130 and the second substrate 140 can be connected without a connecting member.

[0043] In the embodiments provided in the present application, the first substrate 130, the second substrate 140, the driving chip 110 and the power chip 120 are packaged in the power module 100, wherein the first substrate 130, the second substrate 140, the driving chip 110 and the power chip 120 can be packaged in the power module 100 by various packaging processes, for example, the first substrate 130, the second substrate 140, the driving chip 110 and the power chip 120 can be packaged in the power module 100 by plastic packaging, pouring packaging, metal packaging, ceramic packaging, thin film packaging or embedded packaging.

[0044] In the embodiments of the present application, please refer to Figure 4 The power module 100 can include a plurality of power chips 120, and the plurality of power chips 120 are arranged on the same second substrate 140, and each power chip 120 is electrically connected with the driving chip 110. The driving chip 110 can control the operation of each power chip 120, for example, the driving chip 110 can control each power chip 120 to convert direct current into alternating current, convert alternating current into direct current or convert direct current into direct current. The same second substrate 140 carries a plurality of power chips 120, and the same second substrate 140 can conduct heat for the plurality of power chips 120, and can simultaneously improve the heat dissipation performance of the plurality of power chips 120. The same second substrate 140 carries a plurality of power chips 120, which can reduce the number of second substrates 140, reduce the manufacturing cost of the power module 100, and be beneficial to simplify the packaging process of the power module 100.

[0045] In the embodiments of the present application, if the second substrate 140 is a metal substrate or a metal frame, different power chips 120 located on the same second substrate 140 can be connected to the same circuit network. If the second substrate 140 is an insulating substrate with small thermal resistance, different power chips 120 located on the same second substrate 140 can be connected to the same circuit network, and different power chips 120 located on the same second substrate 140 can also be connected to different circuit networks.

[0046] In the embodiments provided in the present application, the power module 100 includes a plurality of power chips 120, the plurality of power modules 100 includes a plurality of second substrates 140, any two second substrates 140 have a gap, the plurality of power chips 120 are arranged on the plurality of second substrates 140, and each power chip 120 is electrically connected with the driving chip 110.

[0047] In a possible implementation, please refer to Figure 5, the number of power chips 120 is equal to the number of second substrates 140, the plurality of power chips 120 can correspond to the plurality of second substrates 140 one by one, and each power chip 120 can be arranged on the second substrate 140 corresponding thereto. Each second substrate 140 respectively conducts heat for the power chip 120 corresponding thereto, and the second substrate 140 can select a metal substrate or a metal frame to improve the heat conduction performance of the second substrate 140. Since each power chip 120 is respectively located on the second substrate 140 corresponding thereto, and there is a gap between any two different second substrates 140, the heat generated by each power chip 120 when operating will not affect each other, the power chip 120 with low heat generation when operating will not be affected by the high temperature of the power chip 120 with high heat generation for a long time, and the power chip 120 that is not operating will not be affected by the high temperature of the power chip 120 that is operating, which is beneficial to improve the stability of the power module 100 during long-term operation.

[0048] In a feasible implementation, the number of power chips 120 is greater than the number of second substrates 140, and at least part of the plurality of second substrates 140 simultaneously carries two or more power chips 120. In the plurality of second substrates 140, since at least part of the second substrates 140 simultaneously carries two or more power chips 120, the number of second substrates 140 can be saved, the manufacturing cost of the power module 100 is reduced, and the packaging process of the power module 100 is simplified. The second substrates 140 can all be metal substrates or metal frames, the power chips 120 located on the same second substrate 140 are connected to the same circuit network, and the power chips 120 located on different second substrates 140 are connected to different circuit networks.

[0049] In the embodiments provided in the present application, each power chip 120 includes a power port 122 and a driving port 121, and the power ports 122 of each power chip 120 are electrically connected to each other. The driving chip 110 is electrically connected to the driving port 121 of each power chip 120, and each power chip 120 is controlled by the driving chip 110. The rated current and voltage resistance of a single power chip 120 have physical limits. By electrically connecting the power ports 122 of some power chips 120 to each other, power stacking can be achieved, and the power limit of a single power chip 120 can be broken through.

[0050] In order to facilitate the electrical connection between the driving chip 110 and the power chip 120, the first substrate 130 and the second substrate 140 can be located on the same first reference surface, the first substrate 130 can be parallel to the first reference surface, the second substrate 140 is parallel to the first reference surface, and the driving chip 110 and the power chip 120 can be electrically connected through the conductive wire 150. In order to shorten the length of the conductive wire 150, the driving chip 110 is located on one side surface of the first substrate 130 and the power chip 120 is located on one side surface of the second substrate 140, which can be on the same side, for example, the first reference surface is a horizontal plane, and the first substrate 130 and the second substrate 140 are arranged on the first reference surface. The driving chip 110 can be arranged on the surface of the first substrate 130 away from the first reference surface, and the power chip 120 can be arranged on the surface of the second substrate 140 away from the first reference surface, so as to shorten the distance between the driving chip 110 and the power chip 120, and further shorten the length of the conductive wire 150 connecting the driving chip 110 and the power chip 120. Generally, the driving chip 110 and the power chip 120 are connected by a plurality of conductive wires 150, which can reduce or eliminate the parasitic inductance generated by the inductive coupling between the conductive wires 150 and the conductive wires 150, and further reduce the signal interference between the conductive wires 150 and the conductive wires 150, and improve the stability of the power module 100 in power conversion. The conductive wire 150 can be, but is not limited to, a bonding wire, a metal strip (such as a copper sheet), a metal sheet (such as a copper sheet), or a metal skin (such as a copper skin).

[0051] In the embodiments provided in the present application, please refer to Figure 6 and Figure 7 , the first substrate 130 and the second substrate 140 are stacked, the first substrate 130 is parallel to the second substrate 140, which can reduce the area occupied by the first substrate 130 and the second substrate 140 together in the power module 100, and improve the energy density of the power module 100.

[0052] The driving chip 110 is arranged on the surface of the first substrate 130 facing the second substrate 140, and the power chip 120 is arranged on the surface of the second substrate 140 facing the first substrate 130. The driving chip 110 and the power chip 120 are arranged on the opposite surfaces of the first substrate 130 and the second substrate 140 respectively, which can reduce the distance between the driving chip 110 and the power chip 120, shorten the conductive wire 150 connecting the driving chip 110 and the power chip 120, and further reduce or eliminate the parasitic inductance generated by the inductive coupling between the conductive wire 150 and the conductive wire 150, and further reduce the signal interference between the conductive wire 150 and the conductive wire 150, and improve the stability of the power module 100 in power conversion.

[0053] Please continue to refer to Figure 6 andFigure 7 The first substrate 130 and the second substrate 140 are stacked, the first substrate 130 is parallel to the second substrate 140, the plurality of power chips 120 are arranged on the surface of the second substrate 140 facing the first substrate 130, and the driving chip 110 is electrically connected to the plurality of power chips 120 through the conductive wires 150.

[0054] Please refer to Figure 8 The plurality of second substrates 140 are stacked with the first substrate 130, the plurality of second substrates 140 are parallel to the first substrate 130, and there is a gap between any two of the plurality of second substrates 140. The plurality of power chips 120 are arranged on the surface of the second substrate 140 where the power chip 120 is located facing the first substrate 130, and the driving chip 110 is arranged on the surface of the first substrate 130 facing the second substrate 140. The driving chip 110 is electrically connected to the plurality of power chips 120 through the conductive wires 150.

[0055] In some embodiments, please refer to Figure 9 and Figure 10 The first substrate 130 and the second substrate 140 are stacked, the first substrate 130 is parallel to the second substrate 140, the first substrate 130 is provided with a via hole 131, the driving chip 110 is arranged on the surface of the first substrate 130 away from the second substrate 140, the power chip 120 is arranged on the surface of the second substrate 140 facing the first substrate 130, the first substrate 130 is located between the power chip 120 and the driving chip 110, and the driving chip 110 and the power chip 120 are connected through the via hole 131. The via hole 131 penetrates and is perpendicular to the first substrate 130, the via hole 131 does not need to bypass the first substrate 130 to connect the driving chip 110 and the power chip 120, and compared with connecting the driving chip 110 and the power chip 120 through the conductive wires 150, the length of the via hole 131 is shorter, the parasitic inductance generated by connecting the driving chip 110 and the power chip 120 through the via hole 131 is smaller, thereby reducing the signal interference between the conductive wires 150 and the conductive wires 150 and improving the stability of the power module 100 in power conversion. Since the via hole 131 connects the driving chip 110 and the power chip 120, the via hole 131 does not need to bypass the first substrate 130 to connect the driving chip 110 and the power chip 120, the electrical connection between the power chip 120 and the driving chip 110 is simpler, and the packaging process of the power module 100 can be effectively simplified.

[0056] In the embodiments provided in the present application, please refer to Figure 9 and Figure 10The first substrate 130 and the second substrate 140 are stacked, the first substrate 130 is parallel to the second substrate 140, the driving chip 110 is arranged on the surface of the first substrate 130 away from the second substrate 140, and the plurality of power chips 120 are arranged on the surface of the second substrate 140 facing the first substrate 130; the first substrate 130 is provided with a plurality of through holes 131, and the driving chip 110 is electrically connected with the plurality of power chips 120 through the plurality of through holes 131 respectively. The plurality of through holes 131 all penetrate the first substrate 130, each through hole 131 does not need to bypass the first substrate 130 to connect the driving chip 110 and the power chip 120, and compared with connecting the driving chip 110 and the power chip 120 through the conductive wire 150, the length of the through hole 131 is shorter than that of the conductive wire 150, the parasitic inductance generated by connecting the driving chip 110 and the power chip 120 through the through hole 131 is smaller, thereby reducing the signal interference between the conductive wires 150 and the conductive wires 150, and improving the stability of the power module 100 in power conversion. Since the through hole 131 connects the driving chip 110 and the power chip 120, the through hole 131 does not need to bypass the first substrate 130 to connect the driving chip 110 and the power chip 120, the electrical connection between the power chip 120 and the driving chip 110 is simpler, and the packaging process of the power module 100 can be effectively simplified.

[0057] In the embodiments provided in the present application, please refer to Figure 11The first substrate 130 is arranged to be parallel to the second reference surface, and the second substrate 140 is arranged to be parallel to the second reference surface. The stacking direction of each second substrate 140 and the first substrate 130 is perpendicular to the second reference surface. The driving chip 110 is arranged on the surface of the first substrate 130 facing away from the two or more second substrates 140. The plurality of power chips 120 are arranged on the surfaces of the corresponding second substrates 140 facing the first substrate 130. The first substrate 130 is provided with a plurality of through holes 131. The driving chip 110 is electrically connected to the plurality of power chips 120 through the plurality of through holes 131. The plurality of through holes 131 all penetrate the first substrate 130. Each through hole 131 does not need to bypass the first substrate 130 to connect the driving chip 110 and the power chip 120. Compared with connecting the driving chip 110 and the power chip 120 through the conductive wire 150, the length of the through hole 131 is shorter than that of the conductive wire 150. The parasitic inductance generated by connecting the driving chip 110 and the power chip 120 through the through hole 131 is smaller. Thus, the signal interference between the conductive wires 150 is reduced, and the stability of the power module 100 in power conversion is improved. Since the through hole 131 connects the driving chip 110 and the power chip 120, the through hole 131 does not need to bypass the first substrate 130 to connect the driving chip 110 and the power chip 120. The electrical connection between the power chip 120 and the driving chip 110 is simpler, and the packaging process of the power module 100 can be effectively simplified.

[0058] In the embodiments provided in the present application, the driving chip 110 needs to be electrically connected to the plurality of power chips 120. The size of some driving chips 110 is insufficient to realize vertical interconnection with each power chip 120 through the plurality of through holes 131. The conductive layer 170 can be attached to the surface of the first substrate 130 facing away from the second substrate 140. The conductive layer 170 can extend to any position on the side surface of the first substrate 130 facing away from the second substrate 140. The driving chip 110 is electrically connected to the plurality of power chips 120 through the conductive layer 170 and the plurality of through holes 131. The conductive layer 170 can be a metal skin (for example, a copper skin). The conductive layer 170 can be directly attached to the surface of the first substrate 130 facing away from the second substrate 140, so that the electrical connection between the driving chip 110 and the power chip 120 is simpler.

[0059] In the embodiments provided in the present application, the power module 100 further comprises a passive device, the passive device is arranged on the first substrate 130, and the passive device is electrically connected with the power chip 120. The passive device can be a capacitor 160, an inductor, a resistor, etc. By arranging the passive device on the first substrate 130, the power module 100 can realize efficient, stable and reliable operation. For example, if the passive device is a capacitor 160, the capacitor 160 can decouple each component (such as the drive chip 110, the power chip 120, etc.) in the power module 100, absorb the sudden current generated when the power module 100 operates, absorb current surges, and at the same time suppress voltage overshoot caused by parasitic inductance to protect the entire power module 100. If the passive device is a resistor, the resistor can function as a current sharing resistor to prevent overcurrent of a single power chip 120 in the power module 100. The resistor can also act as a sampling resistor. By measuring the voltage drop across the sampling resistor, the loop current of the power module 100 in operation can be accurately determined, which is used for overcurrent protection and control feedback. The resistor can also limit the impact current flowing through the drive chip 110 to protect the drive chip 110. If the passive device is an inductor, the inductor can function as a filter and energy storage device, which can make the current flowing through the inductor smooth during operation of the power module 100, and the high-frequency noise current can pass through, thereby suppressing high-frequency oscillation and electromagnetic interference.

[0060] In some embodiments, referring to Figures 4-11 , the power module 100 comprises a capacitor 160 arranged on the first substrate 130, and the power module 100 comprises a plurality of power chips 120, the power port 122 of each power chip 120 comprises a common port 122a and a non-common port 122b, the common ports 122a of the power chips 120 are electrically connected with each other, one end of the capacitor 160 is electrically connected with the non-common port 122b of one power chip 120, and the other end of the capacitor 160 is electrically connected with the non-common port 122b of another power chip 120. The capacitor 160 can decouple each component (such as the drive chip 110, the power chip 120, etc.) in the power module 100, absorb the sudden current generated when the power module 100 operates, absorb current surges, and at the same time suppress voltage overshoot caused by parasitic inductance to protect the entire power module 100.

[0061] Referring to Figure 9 and Figure 10 , the first substrate 130 and the second substrate 140 are arranged in a stacked manner, the first substrate 130 is parallel to the second substrate 140, the power module 100 further comprises a capacitor 160, the capacitor 160 is arranged on the surface of the first substrate 130 away from the second substrate 140, and the plurality of power chips 120 are arranged on the surface of the first substrate 130 facing the second substrate 140; the first substrate 130 is provided with a plurality of through holes 131 penetrating through the first substrate 130.

[0062] Each power chip 120 includes a power port 122 and a plurality of drive ports 121, the power port 122 of each power chip 120 includes a common port 122a and a non-common port 122b, the common ports 122a of the respective power chips 120 are electrically connected to each other; specifically, the common ports 122a between the respective power chips 120 can be electrically connected through the conductive wires 150.

[0063] One end of the capacitor 160 is connected to the non-common port 122b of one power chip 120 through a via 131, and the other end of the capacitor 160 is connected to the non-common port 122b of another power chip 120 through another via 131. The capacitor 160 can decouple the two power chips 120 connected thereto, while suppressing voltage overshoot caused by parasitic inductance, thereby protecting the entire power module 100.

[0064] The via 131 does not need to bypass the first substrate 130 to directly connect one end of the capacitor 160 and the non-common port 122b of one power chip 120, and the via 131 does not need to bypass the first substrate 130 to directly connect the other end of the capacitor 160 and the non-common port 122b of another power chip 120. Compared with the connection of the two ends of the capacitor 160 to the two power chips 120 through the conductive wires 150 respectively, the parasitic inductance between the capacitor 160 and the two power chips 120 is smaller, thereby improving the stability of the power module 100 in power conversion.

[0065] Please refer to Figure 11 , a plurality of second substrates 140 are stacked with the first substrate 130, each second substrate 140 is located at the same second reference surface, the first substrate 130 is parallel to the second reference surface, the second substrate 140 is parallel to the second reference surface, and there is a gap between any two second substrates 140.

[0066] The power module 100 further includes a capacitor 160, the capacitor 160 is arranged on the surface of the first substrate 130 facing away from the plurality of second substrates 140, and the plurality of power chips 120 are arranged with the surface of the second substrate 140 where each power chip 120 is located facing the surface of the first substrate 130;

[0067] The first substrate 130 is provided with a plurality of vias 131, each power chip 120 includes a power port 122 and a plurality of driving ports 121, the power port 122 of each power chip 120 includes a common port 122a and a non-common port 122b, and the power ports 122 of the respective power chips 120 are electrically connected to each other; one end of the capacitor 160 is connected to the non-common port 122b of one power chip 120 through one via 131, and the other end of the capacitor 160 is connected to the non-common port 122b of another power chip 120 through another via 131. The via 131 does not need to bypass the first substrate 130 to directly connect one end of the capacitor 160 and the non-common port 122b of one power chip 120, and the via 131 does not need to bypass the first substrate 130 to directly connect the other end of the capacitor 160 and the non-common port 122b of another power chip 120. Compared with the connection of the two ends of the capacitor 160 to the two power chips 120 through the conductive wires 150 respectively, the parasitic inductance between the capacitor 160 and the two power chips 120 is smaller, and the stability of the power module 100 in power conversion is improved.

[0068] In some embodiments, the power module 100 further includes a conductive layer 170, the conductive layer 170 is arranged on the first substrate 130, the conductive layer 170 and the capacitor 160 are located on the same surface of the first substrate 130, and the conductive layer 170 is parallel to the first substrate 130, the conductive layer 170 is used to connect one via 131 and one end of the capacitor 160, and / or the conductive layer 170 is used to connect another via 131 and the other end of the capacitor 160. It should be noted that the capacitor 160 needs to be electrically connected to the two power chips 120, and there is a gap between the two power chips 120. To achieve vertical interconnection of the capacitor 160 to the two power chips 120 through multiple vias 131, a conductive layer 170 can be arranged on the first substrate 130, the conductive layer 170 can extend to any position of the side surface of the first substrate 130 facing away from the second substrate 140, one power chip 120 can be connected to the conductive layer 170 through one via 131 to realize connection with one end of the capacitor 160, and another power chip 120 can be connected to the conductive layer 170 through another via 131 to realize connection with the other end of the capacitor 160. The conductive layer 170 can be a metal skin (such as a copper skin), and the conductive layer 170 can be directly attached to the surface of the first substrate 130 facing away from the second substrate 140, so that the electrical connection of the capacitor 160 to the power chip 120 is simpler.

[0069] In some embodiments, the power module 100 further includes a conductive layer 170 disposed on the first substrate 130. The conductive layer 170 and the capacitor 160 are respectively located on two opposite surfaces of the first substrate 130. The conductive layer 170 is parallel to the first substrate 130. The conductive layer 170 is used to connect a via 131 and a non-common port 122b of a power chip 120, and / or, the conductive layer 170 is used to connect another via 131 and another non-common port 122b of a power chip 120. The conductive layer 170 can extend to any position on the side surface of the first substrate 130 facing the second substrate 140. One power chip 120 can be connected to one end of the capacitor 160 through the conductive layer 170 and a via 131, and another power chip 120 can be connected to the other end of the capacitor 160 through the conductive layer 170 and another via 131. The conductive layer 170 can be a metal sheet (e.g., copper sheet). The conductive layer 170 can be directly attached to the surface of the first substrate 130 facing away from the second substrate 140, making the electrical connection between the capacitor 160 and the power chip 120 simpler.

[0070] It should be understood that expressions such as “comprising” and “may include” used in this application indicate the existence of the disclosed functions, operations, or constituent elements, and do not limit one or more additional functions, operations, and constituent elements. In this application, terms such as “comprising” and / or “having” are to be interpreted as indicating a particular characteristic, number, operation, constituent element, component, or combination thereof, but not to exclude the existence or possibility of adding one or more other characteristics, numbers, operations, constituent elements, components, or combinations thereof.

[0071] Furthermore, in this application, the expression "and / or" includes any and all combinations of the associated listed words. For example, the expression "A and / or B" may include A, may include B, or may include both A and B.

[0072] In this application, expressions including ordinal numbers such as "first" and "second" may modify the elements. However, such elements are not limited by the foregoing expressions. For example, the foregoing expressions do not limit the order and / or importance of the elements. The foregoing expressions are only used to distinguish one element from other elements. For example, "first user equipment" and "second user equipment" refer to different user equipment, although both "first user equipment" and "second user equipment" are user equipment. Similarly, without departing from the scope of this application, a first element may be referred to as a second element, and similarly, a second element may be referred to as a first element.

[0073] When a component is referred to as "connected" or "accessed" to other components, it should be understood that this component not only connects directly to or accesses other components, but also that another component may exist between this component and other components. On the other hand, when a component is referred to as "directly connected" or "directly accessed" to other components, it should be understood that no component exists between them.

[0074] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. A power module, characterized in that, The power module includes a driver chip, a power chip, a first substrate, and a second substrate. The thermal conductivity of the second substrate is greater than that of the first substrate. The driver chip is disposed on the first substrate, and the power chip is disposed on the second substrate. There is a gap between the first substrate and the second substrate, and the driver chip and the power chip are electrically connected. The driver chip, the power chip, the first substrate, and the second substrate are packaged within the power module.

2. The power module as described in claim 1, characterized in that, The power module includes multiple power chips, all of which are disposed on the same second substrate, and each power chip is electrically connected to the driver chip.

3. The power module as described in claim 1, characterized in that, The power module includes multiple power chips, and the multiple power modules include multiple second substrates. There is a gap between any two second substrates. The multiple power chips are respectively disposed on the multiple second substrates, and each power chip is electrically connected to the driver chip.

4. The power module as described in claim 2 or 3, characterized in that, Each of the power chips includes a power port and a drive port. The power ports of the power chips are electrically connected to each other, and the drive chips are electrically connected to the drive ports of the power chips respectively.

5. The power module according to any one of claims 1-4, characterized in that, The first substrate and the second substrate are located on the same first reference plane.

6. The power module according to any one of claims 1-4, characterized in that, The first substrate and the second substrate are stacked together, with the first substrate parallel to the second substrate.

7. The power module according to claim 6, characterized in that, The driving chip is disposed on the surface of the first substrate facing the second substrate, and the power chip is disposed on the surface of the second substrate facing the first substrate.

8. The power module according to any one of claims 1-4, characterized in that, The first substrate and the second substrate are stacked and arranged in parallel. The first substrate is provided with a via. The driving chip is disposed on the surface of the first substrate facing away from the second substrate, and the power chip is disposed on the surface of the second substrate facing the first substrate. The driving chip and the power chip are connected through the via.

9. The power module according to claim 2, characterized in that, The first substrate and the second substrate are stacked and arranged, with the first substrate and the second substrate being parallel. The driving chip is disposed on the surface of the first substrate facing away from the second substrate, and the plurality of power chips are disposed on the surface of the second substrate facing the first substrate. The first substrate has multiple vias, and the driving chip is electrically connected to the multiple power chips through the multiple vias respectively.

10. The power module according to claim 3, characterized in that, The plurality of second substrates are stacked with the first substrate, each second substrate is located on the same second reference plane, the first substrate is parallel to the second reference plane, the second substrates are parallel to the second reference plane, and the stacking direction of each second substrate and the first substrate is perpendicular to the second reference plane; the driving chip is disposed on the surface of the first substrate facing away from the plurality of second substrates, and the plurality of power chips are respectively disposed on the surface of the corresponding second substrate facing the first substrate. The first substrate has multiple vias, and the driving chip is electrically connected to multiple power chips through the multiple vias respectively.

11. The power module according to any one of claims 1-10, characterized in that, The power module also includes passive components, which are disposed on the first substrate and electrically connected to the power chip.

12. The power module as described in claim 2 or 3, characterized in that, The power module further includes a capacitor disposed on the first substrate. Each power chip has a power port including a common port and a non-common port. The common ports of each power chip are electrically connected to each other. One end of the capacitor is electrically connected to a non-common port of one power chip, and the other end of the capacitor is electrically connected to a non-common port of another power chip.

13. The power module according to claim 2, characterized in that, The first substrate and the second substrate are stacked and arranged in parallel. The power module also includes a capacitor, which is disposed on the surface of the first substrate facing away from the second substrate. A plurality of power chips are disposed on the surface of the second substrate facing the first substrate. The first substrate is provided with multiple vias, and each power chip includes a power port and multiple drive ports. The power port of each power chip includes a common port and non-common ports, and the common ports of each power chip are electrically connected to each other. One end of the capacitor is connected to a non-public port of a power chip through one of the vias, and the other end of the capacitor is connected to a non-public port of another power chip through another via.

14. The power module according to claim 3, characterized in that, Multiple second substrates are stacked with the first substrate, each second substrate is located on the same second reference plane, the first substrate is parallel to the second reference plane, the second substrate is parallel to the second reference plane, the power module also includes a capacitor, the capacitor is disposed on the surface of the first substrate facing away from the multiple second substrates, and multiple power chips are respectively disposed on the surface of the second substrate they are on facing the first substrate. The first substrate has multiple vias, and each power chip includes a power port and multiple drive ports. The power ports of each power chip include a common port and non-common ports, and the power ports of each power chip are electrically connected to each other. One end of the capacitor is connected to a non-public port of a power chip through one of the vias, and the other end of the capacitor is connected to a non-public port of another power chip through another via.

15. The power module according to claim 13 or 14, characterized in that, The power module further includes a conductive layer disposed on the first substrate. The conductive layer and the capacitor are located on the same surface of the first substrate, and the conductive layer is parallel to the first substrate. The conductive layer is used to connect one of the vias and one end of the capacitor, and / or, the conductive layer is used to connect another via and the other end of the capacitor.

16. The power module according to claim 13 or 14, characterized in that, The power module further includes a conductive layer disposed on the first substrate. The conductive layer and the capacitor are respectively located on two opposite surfaces of the first substrate. The conductive layer is parallel to the first substrate. The conductive layer is used to connect one of the vias and a non-common port of a power chip, and / or, the conductive layer is used to connect another via and another non-common port of a power chip.

17. A power conversion device, characterized in that, It includes a circuit board and a power module as described in any one of claims 1-16, wherein the power module is connected to the circuit board.

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