Method for preparing bsg layer, tbc battery and method for preparing same
Patent Information
- Application Number
- CN202511483264.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2025-10-15
- Publication Date
- 2026-11-03
- Estimated Expiration
- 2045-10-15
AI Technical Summary
In the existing technology, the BSG layer of TBC solar cells has a problem of low uniformity after boron diffusion, which leads to inconsistent reaction rates during subsequent etching or removal processes, making it difficult to achieve isotropic removal and affecting cell yield and conversion efficiency.
A stepwise variable-temperature deposition method for BSG layers was adopted, in which the BSG layers were prepared through at least two cycle units. Each cycle unit included BSG layer deposition and repair gas conditioning. The deposition temperature was controlled to decrease sequentially along the process sequence. Combined with nitrogen purging and vacuuming, a homogenized BSG layer was gradually constructed.
It significantly improves the thickness uniformity and composition consistency of the BSG layer, reduces excessive boron aggregation and edge stacking, and improves the yield and conversion efficiency of the battery.
Smart Images

Figure CN121335267B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of solar cell technology, and in particular to a method for preparing a BSG layer, a TBC cell, and the same method. Background Technology
[0002] In the fabrication of TBC solar cells, boron diffusion is commonly used to form p-type doped regions, accompanied by the formation of a borosilicate glass (BSG) layer as both a dopant source and a protective layer. However, existing technologies generally suffer from low uniformity in the BSG layer formed after boron diffusion. During subsequent patterning and alkaline polishing processes, the insufficient uniformity of the BSG layer leads to inconsistent reaction rates during etching or removal, making isotropic and complete removal difficult. Particularly at wafer edges and along the sides of the channels, incompletely removed BSG material or laser residue often remains, resulting in decreased cell yield and conversion efficiency.
[0003] In view of this, the present invention is hereby proposed. Summary of the Invention
[0004] One of the objectives of this invention is to provide a method for preparing a BSG layer, thereby addressing at least one of the technical problems existing in the prior art. This invention effectively combines a stepwise temperature-controlled BSG deposition method with the removal of uneven thin layers before and after each deposition step, thereby improving the uniformity of the BSG layer and ultimately increasing yield and conversion efficiency.
[0005] The second objective of this invention is to provide a method for preparing a TBC battery.
[0006] The third objective of this invention is to provide a TBC battery.
[0007] In order to achieve the above-mentioned objectives of the present invention, the following technical solution is adopted: In a first aspect, the present invention provides a method for preparing a BSG layer, comprising: preparing a homogenized BSG layer on an initial BSG layer formed by boron diffusion, wherein the initial BSG layer and the homogenized BSG layer are superimposed to form a complete BSG layer; The homogenized BSG layer is prepared by at least two circulation units; the circulation unit includes depositing the BSG layer and trimming the BSG layer with a repair gas, wherein the temperature of each deposition step decreases sequentially along the process order.
[0008] Furthermore, the time for each deposition step increases sequentially along the process order; Preferably, the thickness of the initial BSG layer is 5-10 nm; Preferably, the thickness of the homogenized BSG layer is 30-80 nm.
[0009] Furthermore, each of the said loop units includes: (a) Deposit a BSG layer at a preset temperature; (b) Surface finishing of the BSG layer under the repair gas range; (c) Purge with nitrogen and evacuate the vacuum; Preferably, the remediation gas includes one or more of HCl, H2, and Ar; Preferably, the gas flow rate ratio of HCl, H2 and Ar is 1-3:1-3:1-5; Preferably, during the nitrogen purging process, the nitrogen gas flow rate is 13-18 slm; and the nitrogen purging time is 5-10 min.
[0010] Furthermore, the homogenized BSG layer is prepared by three cyclic units, namely the first cyclic unit, the second cyclic unit, and the third cyclic unit. Preferably, the deposition temperature of the BSG layer in the first circulation unit is 1000-1100℃; the deposition time is 5-10 min; the gas used to deposit the BSG layer in the first circulation unit includes oxygen; the oxygen flow rate is 20-60 slm; and the thickness of the BSG layer in the first circulation unit is 10-30 nm. Preferably, the deposition temperature of the BSG layer in the second circulation unit is 900-1000℃; the deposition time is 10-20 min; the gas used to deposit the BSG layer in the second circulation unit includes oxygen; the oxygen flow rate is 20-60 slm; and the thickness of the BSG layer in the second circulation unit is 10-30 nm. Preferably, the deposition temperature of the BSG layer in the third circulation unit is 800-900℃; the deposition time is 20-40 min; the gas used to deposit the BSG layer in the third circulation unit includes oxygen; the oxygen flow rate is 20-60 slm; and the thickness of the BSG layer in the third circulation unit is 10-30 nm.
[0011] Furthermore, after the initial BSG layer is formed and before the homogenized BSG layer is prepared, the preparation method further includes: using a repair gas to trim the initial BSG layer.
[0012] Secondly, the present invention improves a method for preparing a TBC battery, wherein the BSG layer preparation method described above is used to form the complete BSG layer required for the TBC battery during the preparation process.
[0013] Furthermore, the TBC battery preparation method includes: (a) A first tunneling oxide layer and a first intrinsic amorphous silicon layer are prepared on the back side of a silicon substrate; then phosphorus diffusion is performed to form a boron-doped polycrystalline silicon layer and the complete BSG layer is formed on the surface of the boron-doped polycrystalline silicon layer; (b) Remove the BSG layer, boron-doped polysilicon layer and first tunneling oxide layer in the negative electrode region; (c) A second tunneling oxide layer and a second intrinsic amorphous silicon layer are prepared on the solar cell after the treatment in step (b); then phosphorus diffusion is performed to form a phosphorus-doped polycrystalline silicon layer; (d) The first tunneling oxide layer and boron-doped polycrystalline silicon layer in the positive electrode region are retained; the second tunneling oxide layer and phosphorus-doped polycrystalline silicon layer in the negative electrode region are retained; the remaining film layers are removed to obtain the TBC battery.
[0014] Furthermore, in step (a), the first tunneling oxide layer and the first intrinsic amorphous silicon layer are prepared using LPCVD process; Preferably, the thickness of the first tunneling oxide layer is 1.0~2.5 nm; the deposition temperature of the first tunneling oxide layer is 500~650℃; and the deposition time is 20~80 min. Preferably, the thickness of the first intrinsic amorphous silicon layer is 200~400 nm; the deposition temperature of the first intrinsic amorphous silicon layer is 500~650 °C; and the deposition time is 50~100 min. Preferably, the gases required for the boron diffusion include BCl3, O2, and N2; the gas flow rate of BCl3 is 200-400 sccm; the gas flow rate of O2 is 700-1000 sccm; the gas flow rate of N2 is 2500-3000 sccm; the deposition temperature is 800-1000℃; the deposition time is 1-2 h; and the sheet resistance is 100-200 Ω. Preferably, in step (b), a laser is used to remove the BSG layer in the negative electrode region to form a patterned groove; the depth of the patterned groove is 35~90nm; the width of the patterned groove is 400~600μm; the laser includes a picosecond laser; Preferably, the boron-doped polycrystalline silicon layer and the first tunneling oxide layer in the negative electrode region are removed by groove polishing; the depth of the patterned groove is increased to 2~3μm; Preferably, in step (c), the second tunneling oxide layer and the second intrinsic amorphous silicon layer are prepared using LPCVD process; Preferably, the thickness of the second tunneling oxide layer is 1.0~2.5 nm; the deposition temperature of the second tunneling oxide layer is 500~650℃; and the deposition time is 20~80 min. Preferably, the thickness of the second intrinsic amorphous silicon layer is 100~300 nm; the deposition temperature of the second intrinsic amorphous silicon layer is 500~650 °C; and the deposition time is 50~100 min. Preferably, the gases required for phosphorus diffusion include POCl3, O2, and N2; the gas flow rate of POCl3 is 1000-2000 sccm; the gas flow rate of O2 is 500-1000 sccm; the gas flow rate of N2 is 500-1500 sccm; the deposition temperature is 800-1000℃; the deposition time is 1-3 h; the sheet resistance is 20-80 Ω; and the thickness of the PSG layer formed on the surface of the phosphorus-doped polycrystalline silicon layer is 30-80 nm.
[0015] Furthermore, the preparation method further includes: passivating the battery cell after step (d); Preferably, the passivation process includes: depositing an aluminum oxide passivation layer on both sides of the cell, followed by depositing a silicon nitride passivation layer on the back side and depositing a silicon nitride passivation layer and a silicon oxide passivation layer on the front side.
[0016] Thirdly, the present invention provides a TBC battery prepared using the aforementioned preparation method.
[0017] Compared with the prior art, the present invention has the following beneficial effects: The BSG layer preparation method provided by this invention prepares a homogenized BSG layer on top of an initial BSG layer formed by boron diffusion. The two layers are then superimposed to form a complete BSG layer, significantly improving the overall thickness uniformity, compositional consistency, and interface quality of the BSG layer. The homogenized BSG layer is constructed stepwise using at least two cycle units. Each cycle unit includes BSG deposition and repair gas conditioning, enabling in-situ repair of defects during deposition and regulation of surface active states. In particular, by controlling the temperature of each deposition step to decrease sequentially along the process, excessive boron accumulation and edge buildup caused by high-temperature deposition are effectively suppressed, enhancing the distribution consistency of the BSG layer within the silicon wafer surface and at the edges. Attached Figure Description
[0018] To more clearly illustrate the specific embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the specific embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present invention. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.
[0019] Figure 1 This invention relates to a solar cell having a first tunneling oxide layer, a boron-doped polycrystalline silicon layer, and a complete BSG layer deposited on it; Figure 2 A graphical representation of a battery cell; Figure 3 These are battery cells after BSG removal and alkaline polishing. Figure 4 The cells are after secondary LPCVD; Figure 5 The battery cell after secondary patterning; Figure 6 These are battery cells after PSG+ texturing removal; Figure 7 These are passivated battery cells.
[0020] Icons: 100 - N-type crystalline silicon substrate; 200 - First tunneling oxide layer; 300 - Boron-doped polycrystalline silicon layer; 400 - Complete BSG layer; 500 - Second tunneling oxide layer; 600 - Phosphorus-doped polycrystalline silicon layer; 700 - PSG layer; 800 - Alumina passivation layer; 900 - Silicon nitride passivation layer; 1000 - Silicon oxide passivation layer. Detailed Implementation
[0021] Unless otherwise defined herein, the scientific and technical terms used in conjunction with this invention shall have the meanings commonly understood by one of ordinary skill in the art. The meaning and scope of terms shall be clear; however, in any case of potential ambiguity, the definitions provided herein shall prevail over any dictionary or foreign definitions. In this application, unless otherwise stated, the use of "or" means "and / or". Furthermore, the use of the term "comprising" and other forms is non-limiting.
[0022] The technical solution of the present invention will be clearly and completely described below with reference to the embodiments. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.
[0023] The first aspect of the present invention provides a method for preparing a BSG layer, comprising: preparing a homogenized BSG layer on an initial BSG layer formed by boron diffusion, wherein the initial BSG layer and the homogenized BSG layer are superimposed to form a complete BSG layer; The homogenized BSG layer is prepared by at least two circulation units; the circulation unit includes depositing the BSG layer and trimming the BSG layer with a repair gas, wherein the temperature of each deposition step decreases sequentially along the process order.
[0024] In some preferred embodiments, the time for each deposition step increases sequentially along the process order.
[0025] This invention improves the uniformity of BSG by combining a stepwise variable-temperature deposition method of high-temperature short-time base building and low-temperature long-time flat laying with the effective removal of uneven thin layers before and after each deposition step, thereby improving the yield and conversion efficiency.
[0026] In some preferred embodiments, the thickness of the initial BSG layer is 5-10 nm, for example, it can be 5 nm, 6 nm, 7 nm, 8 nm, 9 nm, 10 nm, etc. Preferably, the thickness of the homogenized BSG layer is 30-80nm, for example, it can be 30nm, 35nm, 40nm, 45nm, 50nm, 55nm, 60nm, 65nm, 70nm, 75nm, 80nm, etc.
[0027] In some preferred embodiments, each of the loop units includes: (a) Deposit a BSG layer at a preset temperature; (b) Surface finishing of the BSG layer under the repair gas range; (c) Purge with nitrogen and evacuate the vacuum; Preferably, the remediation gas includes one or more of HCl, H2, and Ar; Preferably, the gas flow rate ratio of HCl, H2 and Ar is 1-3:1-3:1-5; Among them, "1-3" can be 1, 1.5, 2, 2.5, 3, etc.; "1-5" can be 1, 1.5, 2, 2.5, 3, 3.5, 4, 4.5, 5, etc.
[0028] Preferably, during the nitrogen purging process, the nitrogen gas flow rate is 13-18 slm, for example, 13 slm, 14 slm, 15 slm, 16 slm, 17 slm, 18 slm, etc.; and the nitrogen purging time is 5-10 min, for example, 5 min, 6 min, 7 min, 8 min, 9 min, 10 min, etc.
[0029] In some preferred embodiments, the homogenized BSG layer is prepared by three cyclic units, namely the first cyclic unit, the second cyclic unit, and the third cyclic unit. Preferably, the deposition temperature of the BSG layer in the first circulation unit is 1000-1100℃, for example, 1000℃, 1050℃, 1100℃, etc.; the deposition time is 5-10 min, for example, 5 min, 6 min, 7 min, 8 min, 9 min, 10 min, etc.; the gas used to deposit the BSG layer in the first circulation unit includes oxygen; the oxygen flow rate is 20-60 slm, for example, 20 slm, 25 slm, 30 slm, 35 slm, 40 slm, 45 slm, 50 slm, 55 slm, 60 slm, etc.; the thickness of the BSG layer in the first circulation unit is 10-30 nm, for example, 10 nm, 15 nm, 20 nm, 25 nm, 30 nm, etc.
[0030] Preferably, the deposition temperature of the BSG layer in the second circulation unit is 900-1000℃, for example, 900℃, 950℃, 1000℃, etc.; the deposition time is 10-20min, for example, 10min, 15min, 20min, etc.; the gas used to deposit the BSG layer in the second circulation unit includes oxygen; the oxygen flow rate is 20-60 slm, for example, 20 slm, 25 slm, 30 slm, 35 slm, 40 slm, 45 slm, 50 slm, 55 slm, 60 slm, etc.; the thickness of the BSG layer in the second circulation unit is 10-30nm, for example, 10nm, 15nm, 20nm, 25nm, 30nm, etc.
[0031] Preferably, the deposition temperature of the BSG layer in the third circulation unit is 800-900℃, for example, 800℃, 850℃, 900℃, etc.; the deposition time is 20-40min, for example, 20min, 25min, 30min, 35min, 40min, etc.; the gas used to deposit the BSG layer in the third circulation unit includes oxygen; the oxygen flow rate is 20-60 slm, for example, 20 slm, 25 slm, 30 slm, 35 slm, 40 slm, 45 slm, 50 slm, 55 slm, 60 slm; the thickness of the BSG layer in the third circulation unit is 10-30nm, for example, 10nm, 15nm, 20nm, 25nm, 30nm, etc.
[0032] In some preferred embodiments, after the initial BSG layer is formed and before the homogenized BSG layer is prepared, the preparation method further includes: trimming the initial BSG layer with a repair gas.
[0033] A second aspect of the present invention provides a method for preparing a TBC battery, wherein the BSG layer preparation method described above is used to form the complete BSG layer required for the TBC battery during the preparation process.
[0034] In some preferred embodiments, the TBC battery preparation method includes: (a) A first tunneling oxide layer and a first intrinsic amorphous silicon layer are prepared on the back side of a silicon substrate; then phosphorus diffusion is performed to form a boron-doped polycrystalline silicon layer and the complete BSG layer is formed on the surface of the boron-doped polycrystalline silicon layer; (b) Remove the BSG layer, boron-doped polysilicon layer and first tunneling oxide layer in the negative electrode region; (c) A second tunneling oxide layer and a second intrinsic amorphous silicon layer are prepared on the solar cell after the treatment in step (b); then phosphorus diffusion is performed to form a phosphorus-doped polycrystalline silicon layer; (d) The first tunneling oxide layer and boron-doped polycrystalline silicon layer in the positive electrode region are retained; the second tunneling oxide layer and phosphorus-doped polycrystalline silicon layer in the negative electrode region are retained; the remaining film layers are removed to obtain the TBC battery.
[0035] In some preferred embodiments, in step (a), the first tunneling oxide layer and the first intrinsic amorphous silicon layer are prepared using an LPCVD process; Preferably, the thickness of the first tunneling oxide layer is 1.0~2.5 nm, for example, it can be 1.0 nm, 1.5 nm, 2.0 nm, 2.5 nm, etc.; the deposition temperature of the first tunneling oxide layer is 500~650℃, for example, it can be 500℃, 550℃, 650℃, etc.; the deposition time is 20~80 min, for example, it can be 20 min, 30 min, 40 min, 50 min, 60 min, 70 min, 80 min, etc. Preferably, the thickness of the first intrinsic amorphous silicon layer is 200~400nm, for example, it can be 200nm, 250nm, 300nm, 350nm, 400nm, etc.; the deposition temperature of the first intrinsic amorphous silicon layer is 500~650℃, for example, it can be 500℃, 550℃, 650℃, etc.; the deposition time is 50~100min, for example, it can be 50min, 60min, 70min, 80min, 90min, 100min, etc. Preferably, the gases required for the boron diffusion include BCl3, O2, and N2; the gas flow rate of BCl3 is 200-400 sccm, for example, 200 sccm, 250 sccm, 300 sccm, 350 sccm, 400 sccm, etc.; the gas flow rate of O2 is 700-1000 sccm, for example, 700 sccm, 750 sccm, 800 sccm, 850 sccm, 900 sccm, 950 sccm, 1000 sccm, etc.; the gas flow rate of N2 is... The deposition rate is 2500-3000 sccm, for example, 2500 sccm, 2600 sccm, 2700 sccm, 2800 sccm, 2900 sccm, 3000 sccm, etc.; the deposition temperature is 800-1000℃, for example, 800℃, 850℃, 900℃, 950℃, 1000℃, etc.; the deposition time is 1-2h, for example, 1h, 1.5h, 2h, etc.; the sheet resistance is 100-200Ω, for example, 100Ω, 150Ω, 200Ω, etc. Preferably, in step (b), a laser is used to remove the BSG layer in the negative electrode region to form a patterned groove; the depth of the patterned groove is 35~90nm, for example, it can be 35nm, 40nm, 45nm, 50nm, 55nm, 60nm, 65nm, 70nm, 75nm, 80nm, 85nm, 90nm, etc.; the width of the patterned groove is 400~600μm, for example, it can be 400μm, 450μm, 500μm, 550μm, 600μm, etc.; the laser includes a picosecond laser; Preferably, the boron-doped polycrystalline silicon layer and the first tunneling oxide layer in the negative electrode region are removed by groove polishing; the depth of the patterned groove is increased to 2~3μm; Preferably, in step (c), the second tunneling oxide layer and the second intrinsic amorphous silicon layer are prepared using LPCVD process; Preferably, the thickness of the second tunneling oxide layer is 1.0~2.5 nm, for example, it can be 1.0 nm, 1.5 nm, 2.0 nm, 2.5 nm, etc.; the deposition temperature of the first tunneling oxide layer is 500~650℃, for example, it can be 500℃, 550℃, 650℃, etc.; the deposition time is 20~80 min, for example, it can be 20 min, 30 min, 40 min, 50 min, 60 min, 70 min, 80 min, etc. Preferably, the thickness of the second intrinsic amorphous silicon layer is 100~300nm, for example, it can be 100nm, 150nm, 200nm, 250nm, 300nm, etc.; the deposition temperature of the second intrinsic amorphous silicon layer is 500~650℃, for example, it can be 500℃, 550℃, 600℃, 650℃, etc.; the deposition time is 50~100min, for example, it can be 50min, 60min, 70min, 80min, 90min, 100min, etc. Preferably, the gases required for the phosphorus diffusion include POCl3, O2, and N2; the gas flow rate of POCl3 is 1000-2000 sccm, for example, 1000 sccm, 1500 sccm, 2000 sccm, etc.; the gas flow rate of O2 is 500-1000 sccm, for example, 500 sccm, 600 sccm, 700 sccm, 800 sccm, 900 sccm, 1000 sccm, etc.; the gas flow rate of N2 is 500-1500 sccm, for example, 500 sccm, 1000 sccm, 600 sccm, 700 sccm, 800 sccm, 900 sccm, 1000 sccm, etc. 00 sccm, 1500 sccm, etc.; deposition temperature is 800-1000℃, for example, 800℃, 850℃, 900℃, 950℃, 1000℃, etc.; deposition time is 1-3h, for example, 1h, 2h, 3h, etc.; sheet resistance is 20-80Ω, for example, 20Ω, 30Ω, 40Ω, 50Ω, 60Ω, 70Ω, 80Ω, etc.; the thickness of the PSG layer formed on the surface of the phosphorus-doped polycrystalline silicon layer is 30-80nm, for example, 30nm, 40nm, 50nm, 60nm, 70nm, 80nm, etc.
[0036] In some preferred embodiments, the preparation method further includes: passivating the battery cell after step (d); Preferably, the passivation process includes: depositing an aluminum oxide passivation layer on both sides of the cell, followed by depositing a silicon nitride passivation layer on the back side and depositing a silicon nitride passivation layer and a silicon oxide passivation layer on the front side.
[0037] A third aspect of the present invention provides a TBC battery, which is prepared using the aforementioned preparation method.
[0038] In a preferred embodiment of the present invention, the TBC battery preparation method includes the following steps: Step 1: A first tunneling oxide layer 200 and a first intrinsic amorphous silicon layer (i-PolySi) are deposited on the back side of a double-sided polished N-type crystalline silicon substrate 100 using LPCVD. The thickness of the tunneling oxide layer is 1.0~2.5nm, the deposition temperature is 500~650℃, and the deposition time is 20~80min. The thickness of the i-PolySi layer is 200~400nm, the deposition temperature is 500~650℃, and the deposition time is 50~100min.
[0039] Step 2: The battery cells processed in Step 1 are subjected to boron expansion to prepare i-PolySi into a boron-doped polycrystalline silicon layer 300 (P-Poly layer).
[0040] Step 2-1: Introduce a mixed gas of BCl3, O2, and N2. The flow rate of BCl3 is 200-400 sccm, the flow rate of O2 is 700-1000 sccm, the flow rate of N2 is 2500-3000 sccm, the deposition temperature is 800-1000℃, the deposition time is 1-2 h, the sheet resistance is 100-200 Ω, and the initial BSG thickness formed on the surface of the boron-doped polycrystalline silicon layer 300 is 5-10 nm. The following steps were then performed to improve the uniformity of the BSG, resulting in a homogenized BSG with a thickness of 30-80 nm: Step 2-2: Introduce a mixed gas of HCl, H2, and Ar, where HCl, H2, and Ar = (1-3): (1-3): (1-5). Chlorine atoms can purify the activity of metal ions such as sodium ions, thereby reducing defects caused by the introduction of metal impurities. H2 and Ar remove uneven thin layers. Steps 2-3: Purge with N2 at a flow rate of 13-18 slm for 5-10 minutes, then evacuate to remove residual gas and reactants. Steps 2-4, High-temperature BSG: Introduce O2 at a flow rate of 20-60 slm, a temperature of 1000-1100℃, a time of 5-10 min, and a thickness of 10-30 nm; Steps 2-5: Introduce a mixture of HCl, H2, and Ar gases, where HCl, H2, and Ar = (1-3): (1-3): (1-5). Chlorine atoms can purify the activity of metal ions such as sodium ions, thereby reducing defects caused by the introduction of metal impurities. H2 and Ar remove uneven thin layers. Steps 2-6: Purge with N2 at a flow rate of 13-18 slm for 5-10 min, then evacuate to remove residual gas and reactants. Steps 2-7, High-temperature (medium-temperature) BSG: Introduce O2 at a flow rate of 20-60 slm, a temperature of 900-1000℃, a time of 10-20 min, and a thickness of 10-30 nm; Steps 2-8: Introduce a mixture of HCl, H2, and Ar gases, where HCl, H2, and Ar = (1-3): (1-3): (1-5). Chlorine atoms can purify the activity of metal ions such as sodium ions, thereby reducing defects caused by the introduction of metal impurities. H2 and Ar remove uneven thin layers. Steps 2-9: Purge with N2 at a flow rate of 13-18 slm for 5-10 min, then evacuate to remove residual gas and reactants. Steps 2-10, Relatively Low Temperature BSG: Introduce O2 at a flow rate of 20-60 slm, a temperature of 800-900℃, a time of 20-40 min, and a thickness of 10-20 nm; Step 2-11: Introduce a mixed gas of HCl, H2, and Ar, where HCl, H2, and Ar = (1-3): (1-3): (1-5). Chlorine atoms can purify the activity of metal ions such as sodium ions, thereby reducing defects caused by the introduction of metal impurities. H2 and Ar remove uneven thin layers. Steps 2-12: Purge with N2 at a flow rate of 13-18 slm for 5-10 minutes, then evacuate to remove residual gas and reactants, obtaining... Figure 1 The battery cells shown (where, Figure 1 The BSG layer in the image is the final complete BSG layer 400.
[0041] Step 3: The solar cells obtained in Step 2 are sequentially subjected to patterning, BSG removal + alkaline polishing, secondary LPCVD process, phosphorus diffusion, secondary patterning, PSG removal + texturing, passivation treatment, and electrode printing to obtain TBC cells, specifically including: Step 3-1, as follows Figure 2 As shown, the specific steps of patterning are as follows: removing part of the BSG layer on the back side of the N-type crystalline silicon substrate 100 obtained in step 2, that is, the BSG layer of the subsequent Gap region and N region (negative electrode region), to form a patterned groove. The removal is performed using a picosecond laser. The depth of the patterned groove is 35~90nm and the width of the patterned groove is 400~600μm. Step 3-2, as follows Figure 3 As shown, the BSG removal + alkaline polishing steps are as follows: the BSG wrap-around plating on the front side is removed by a chain wet method, and the boron-doped polysilicon layer 300 and the first tunneling oxide layer 200 in the patterned groove area on the back side are removed by a tank polishing method. The depth of the patterned groove is increased to 2~3μm. Step 3-3, the specific steps of the secondary LPCVD are as follows: LPCVD is used for double-sided deposition to form a second tunneling oxide layer 500 and a second intrinsic amorphous silicon layer (i-PolySi); the thickness of the tunneling oxide layer is 1.0~2.5nm, the deposition temperature is 500~650℃, and the deposition time is 20~80min; the thickness of the i-PolySi layer is 100~300nm, the deposition temperature is 500~650℃, and the deposition time is 50~100min. Steps 3-4, such as Figure 4 As shown, i-PolySi is prepared into a phosphorus-doped polycrystalline silicon layer 600 (N-Poly layer) by phosphorus diffusion. The specific steps of phosphorus diffusion are as follows: a mixed gas of POCl3, O2 and N2 is introduced, with a POCl3 flow rate of 1000-2000 sccm, an O2 flow rate of 500-1000 sccm, and an N2 flow rate of 500-1500 sccm. The deposition temperature is 800-1000℃, the deposition time is 1-3h, the sheet resistance is 20-80Ω, and the thickness of the PSG layer 700 formed on the surface of the phosphorus-doped polycrystalline silicon layer 600 is 30-80nm. Steps 3-5, such as Figure 5 As shown, the secondary patterning steps are as follows: retain the PSG layer 700 in the N-region on the back of the silicon substrate, and remove the PSG layer 700 in the remaining region; the removal is performed using a picosecond laser. Steps 3-6, such as Figure 6 As shown, a PSG+ removal texturing method is used, retaining the N-PolySi layer (boron-doped polycrystalline silicon layer 300) and tunnel oxide layer in the N-region on the back side, and retaining the P-PolySi layer (phosphorus-doped polycrystalline silicon layer 600) and tunnel oxide layer in the P-region (positive electrode region) on the back side. The remaining front and back areas are then texturized. The specific steps for PSG+ removal texturing are as follows: Chain-type PSG removal: The PSG layer on the front side is removed using HF reagent 700; Texturing: First, use NaOH reagent to remove the N-PolySi layer on the front side and the N-PolySi layer in the back side except for the N region. Then, use HF reagent to remove the tunneling oxide layer on the front side, the second tunneling oxide layer 500 in the back side except for the N region, the BSG layer on the back side, and the PSG layer 700 in the N region on the back side.
[0042] Steps 3-7, such as Figure 7 As shown, the passivation process sequentially includes: depositing an aluminum oxide passivation layer 800 on both sides of the silicon substrate, depositing a silicon nitride passivation layer 900 on the back side, and depositing a silicon nitride passivation layer 900 and a silicon oxide passivation layer 1000 on the front side.
[0043] This invention employs a repair gas to chemically passivate or stress-relieve the BSG layer after each deposition cycle, reducing structural defects such as micropores and cracks, and improving film density and the controllability of subsequent etching processes. Therefore, after patterning (laser grooving) and alkaline polishing, the BSG layer achieves more uniform removal, significantly reducing the risk of BSG residue and laser-modified layer residue in edge areas, and avoiding poor contact or localized short circuits caused by insulation residue.
[0044] The present invention will be further illustrated by the following examples. Unless otherwise specified, the materials in the examples are prepared according to existing methods or purchased directly from the market.
[0045] Example 1 This embodiment provides a TBC battery, the preparation process of which is as follows: Step 1: A tunneling oxide layer and an intrinsic amorphous silicon layer (i-PolySi) are deposited on the back side of a double-sided polished N-type crystalline silicon substrate using LPCVD. The thickness of the tunneling oxide layer is 2 nm, the deposition temperature is 600℃, and the deposition time is 50 min. The thickness of the i-PolySi layer is 300 nm, the deposition temperature is 600℃, and the deposition time is 75 min.
[0046] Step 2: The battery cells processed in Step 1 are subjected to boron expansion to prepare i-PolySi into a boron-doped polycrystalline silicon layer.
[0047] Step 2-1: Introduce a mixed gas of BCl3, O2, and N2. The flow rate of BCl3 is 300 sccm, the flow rate of O2 is 850 sccm, the flow rate of N2 is 2800 sccm, the deposition temperature is 900℃, the deposition time is 1.5h, the sheet resistance is 150Ω, and the initial BSG thickness formed on the surface of the boron-doped polycrystalline silicon layer is 8 nm. The following steps were then taken to improve BSG uniformity: Step 2-2: Introduce a mixture of HCl, H2, and Ar gases, where the ratio of HCl, H2, and Ar is 1:1:2. Steps 2-3: Purge with N2 at a flow rate of 16 slm for 7.5 min, then evacuate. Steps 2-4: High-temperature BSG deposition: O2 is introduced at a flow rate of 40 slm, the temperature is 1050℃, the time is 8 min, and the thickness is 20 nm. Steps 2-5: Introduce a mixed gas of HCl, H2, and Ar, where the ratio of HCl, H2, and Ar is 1:1:2; Steps 2-6: Purge with N2 at a flow rate of 16 slm for 7.5 min, then evacuate. Steps 2-7: High-temperature BSG deposition: O2 is introduced at a flow rate of 40 slm, a temperature of 950℃, a time of 15 min, and a thickness of 20 nm. Steps 2-8: Introduce a mixed gas of HCl, H2, and Ar, where the ratio of HCl, H2, and Ar is 1:1:2; Steps 2-9: Purge with N2 at a flow rate of 16 slm for 7.5 min, then evacuate. Steps 2-10: Low-temperature BSG deposition: O2 is introduced at a flow rate of 40 slm, a temperature of 850℃, a time of 30 min, and a thickness of 15 nm. Step 2-11: Introduce a mixture of HCl, H2, and Ar gases, where the ratio of HCl, H2, and Ar is 1:1:2; Steps 2-12: Purge with N2 at a flow rate of 16 slm for 7.5 min, then evacuate.
[0048] Step 3: The solar cells obtained in Step 2 are sequentially subjected to patterning, BSG removal + alkaline polishing, secondary LPCVD process, phosphorus diffusion, secondary patterning, PSG removal + texturing, passivation treatment, and electrode printing to obtain TBC cells, specifically including: Step 3-1, the first patterning step is as follows: remove part of the BSG layer on the back side of the N-type crystalline silicon substrate obtained in step 2, that is, the BSG layer of the subsequent Gap region and N region (negative electrode region), to form a patterned groove. The removal is performed using a picosecond laser. The depth of the patterned groove is 60 nm and the width of the patterned groove is 500 μm. Step 3-2, the BSG removal + alkaline polishing step is as follows: the BSG wrap-around plating on the front side is removed by chain wet method, and the boron-doped polysilicon layer (P-PolySi layer) and the first tunneling oxide layer in the patterned groove area on the back side are removed by tank polishing. The depth of the patterned groove is increased to 3μm. Step 3-3, the specific steps of the secondary LPCVD are as follows: double-sided deposition is performed using the LPCVD method to form a second tunneling oxide layer and a second intrinsic amorphous silicon layer (i-PolySi); the thickness of the tunneling oxide layer is 2 nm, the deposition temperature is 600℃, and the deposition time is 50 min; the thickness of the i-PolySi layer is 200 nm, the deposition temperature is 600℃, and the deposition time is 75 min. Steps 3-4: Phosphorus diffusion is used to prepare i-PolySi into a phosphorus-doped polycrystalline silicon layer. The specific steps of phosphorus diffusion are as follows: a mixed gas of POCl3, O2 and N2 is introduced, with a POCl3 flow rate of 1500 sccm, an O2 flow rate of 800 sccm and an N2 flow rate of 1000 sccm, a deposition temperature of 900℃, a deposition time of 2 h, a sheet resistance of 50 Ω, and a PSG layer with a thickness of 55 nm formed on the surface of the phosphorus-doped polycrystalline silicon layer. Steps 3-5, the secondary patterning step, specifically involves: retaining the PSG layer in the N-region on the back of the silicon substrate and removing the PSG layer in the remaining region; the removal is performed using a picosecond laser. Steps 3-6: Using a PSG+ removal texturing method, retain the N-PolySi layer (boron-doped polycrystalline silicon layer) and tunnel oxide layer in the N-region on the back side, and retain the P-PolySi layer (phosphorus-doped polycrystalline silicon layer) and tunnel oxide layer in the P-region (positive electrode region) on the back side. Texturing is then performed on the remaining front and back areas. The specific steps for PSG+ removal texturing are as follows: Chain-type PSG removal: The PSG layer on the front side is removed using HF reagent; Texturing: First, use NaOH reagent to remove the N-PolySi layer on the front side and the N-PolySi layer in the back side except for the N region. Then, use HF reagent to remove the tunneling oxide layer on the front side, the second tunneling oxide layer in the back side except for the N region, the BSG layer on the back side, and the PSG layer in the N region on the back side.
[0049] Steps 3-7, the passivation process, sequentially includes: depositing an aluminum oxide passivation layer on both sides of the silicon substrate, depositing a silicon nitride passivation layer on the back side, and depositing a silicon nitride passivation layer and a silicon oxide passivation layer on the front side. After passivation, metal electrodes are printed.
[0050] Example 2 This embodiment provides a TBC battery, which differs from Embodiment 1 in that: In step 1, a tunneling oxide layer and an intrinsic amorphous silicon layer (i-PolySi) are deposited on the back side of a double-sided polished N-type crystalline silicon substrate using the LPCVD method. The thickness of the tunneling oxide layer is 1 nm, the deposition temperature is 500℃, and the deposition time is 80 min. The thickness of the i-PolySi layer is 400 nm, the deposition temperature is 500℃, and the deposition time is 100 min.
[0051] In step 2, the solar cells processed in step 1 undergo boron expansion to prepare i-PolySi into a boron-doped polycrystalline silicon layer.
[0052] Step 2-1: Introduce a mixed gas of BCl3, O2, and N2. The flow rate of BCl3 is 400 sccm, the flow rate of O2 is 1000 sccm, the flow rate of N2 is 2500 sccm, the deposition temperature is 800℃, the deposition time is 2h, the sheet resistance is 100Ω, and the initial BSG thickness formed on the surface of the boron-doped polycrystalline silicon layer is 10 nm. In step 3, the battery cells obtained in step 2 are sequentially subjected to patterning, BSG removal + alkaline polishing, secondary LPCVD process, phosphorus diffusion, secondary patterning, PSG removal + texturing, passivation treatment, and electrode printing to obtain TBC batteries, wherein: Step 3-3, the specific steps of the secondary LPCVD are as follows: double-sided deposition is performed using the LPCVD method to form a second tunneling oxide layer and a second intrinsic amorphous silicon layer (i-PolySi); the thickness of the tunneling oxide layer is 1 nm, the deposition temperature is 500℃, and the deposition time is 80 min; the thickness of the i-PolySi layer is 300 nm, the deposition temperature is 500℃, and the deposition time is 100 min. Steps 3-4: Phosphorus diffusion is used to prepare i-PolySi into a phosphorus-doped polycrystalline silicon layer. The specific steps of phosphorus diffusion are as follows: a mixed gas of POCl3, O2, and N2 is introduced, with a POCl3 flow rate of 2000 sccm, an O2 flow rate of 1000 sccm, and an N2 flow rate of 500 sccm. The deposition temperature is 800℃, the deposition time is 3h, the sheet resistance is 20Ω, and the thickness of the PSG layer formed on the surface of the phosphorus-doped polycrystalline silicon layer is 80 nm.
[0053] Example 3 This embodiment provides a TBC battery, which differs from Embodiment 1 in that: In step 1, a tunneling oxide layer and an intrinsic amorphous silicon layer (i-PolySi) are deposited on the back side of a double-sided polished N-type crystalline silicon substrate using LPCVD. The thickness of the tunneling oxide layer is 2.5 nm, the deposition temperature is 650 °C, and the deposition time is 20 min. The thickness of the i-PolySi layer is 200 nm, the deposition temperature is 650 °C, and the deposition time is 50 min.
[0054] In step 2, the solar cells processed in step 1 undergo boron expansion to prepare i-PolySi into a boron-doped polycrystalline silicon layer.
[0055] Step 2-1: Introduce a mixed gas of BCl3, O2, and N2. The flow rate of BCl3 is 200 sccm, the flow rate of O2 is 700 sccm, the flow rate of N2 is 3000 sccm, the deposition temperature is 800℃, the deposition time is 1 h, the sheet resistance is 200 Ω, and the initial BSG thickness formed on the surface of the boron-doped polycrystalline silicon layer is 5 nm. In step 3, the battery cells obtained in step 2 are sequentially subjected to patterning, BSG removal + alkaline polishing, secondary LPCVD process, phosphorus diffusion, secondary patterning, PSG removal + texturing, passivation treatment, and electrode printing to obtain TBC batteries, wherein: Step 3-3, the specific steps of the secondary LPCVD are as follows: LPCVD is used to deposit a second tunneling oxide layer and a second intrinsic amorphous silicon layer (i-PolySi) on both sides; the thickness of the tunneling oxide layer is 2.5 nm, the deposition temperature is 650℃, and the deposition time is 20 min; the thickness of the i-PolySi layer is 100 nm, the deposition temperature is 650℃, and the deposition time is 50 min. Steps 3-4: Phosphorus diffusion is used to prepare i-PolySi into a phosphorus-doped polycrystalline silicon layer. The specific steps of phosphorus diffusion are as follows: a mixed gas of POCl3, O2, and N2 is introduced, with a POCl3 flow rate of 1000 sccm, an O2 flow rate of 500 sccm, and an N2 flow rate of 1500 sccm. The deposition temperature is 1000℃, the deposition time is 1 h, the sheet resistance is 80 Ω, and the thickness of the PSG layer formed on the surface of the phosphorus-doped polycrystalline silicon layer is 30 nm.
[0056] Example 4 This embodiment provides a TBC battery, which differs from Embodiment 1 in that: Step 2-2: Introduce a mixture of HCl, H2, and Ar gases, where the ratio of HCl, H2, and Ar is 1:1:1. Steps 2-3: Purge with N2 at a flow rate of 13 slm for 10 min, then evacuate. Steps 2-4: High-temperature BSG deposition: O2 is introduced at a flow rate of 20 slm, a temperature of 1000℃, a time of 5 min, and a thickness of 10 nm. Steps 2-5: Introduce a mixed gas of HCl, H2, and Ar, where the ratio of HCl, H2, and Ar is 1:1:1; Steps 2-6: Purge with N2 at a flow rate of 13 slm for 10 minutes, then evacuate. Steps 2-7: High-temperature BSG deposition: O2 is introduced at a flow rate of 20 slm, a temperature of 900℃, a time of 10 min, and a thickness of 10 nm. Steps 2-8: Introduce a mixed gas of HCl, H2, and Ar, where the ratio of HCl, H2, and Ar is 1:1:1; Steps 2-9: Purge with N2 at a flow rate of 13 slm for 10 minutes, then evacuate. Steps 2-10: Low-temperature deposition of BSG: O2 is introduced at a flow rate of 20 slm, a temperature of 800℃, a time of 20 min, and a thickness of 10 nm. Step 2-11: Introduce a mixed gas of HCl, H2, and Ar, where the ratio of HCl, H2, and Ar is 1:1:1; Steps 2-12: Purge with N2 at a flow rate of 18 slm for 5 minutes, then evacuate.
[0057] Example 5 This embodiment provides a TBC battery, which differs from Embodiment 1 in that: Step 2-2: Introduce a mixture of HCl, H2, and Ar gases, where the ratio of HCl, H2, and Ar is 3:3:5. Steps 2-3: Purge with N2 at a flow rate of 18 slm for 5 minutes, then evacuate. Steps 2-4: High-temperature BSG deposition: O2 is introduced at a flow rate of 60 slm, a temperature of 1100℃, a time of 10 min, and a thickness of 30 nm. Steps 2-5: Introduce a mixture of HCl, H2, and Ar gases, where the ratio of HCl, H2, and Ar is 3:3:5. Steps 2-6: Purge with N2 at a flow rate of 18 slm for 5 minutes, then evacuate. Steps 2-7: High-temperature BSG deposition: O2 is introduced at a flow rate of 60 slm, a temperature of 1000℃, a time of 20 min, and a thickness of 30 nm. Steps 2-8: Introduce a mixed gas of HCl, H2, and Ar, where the ratio of HCl, H2, and Ar is 3:3:5; Steps 2-9: Purge with N2 at a flow rate of 18 slm for 5 minutes, then evacuate. Steps 2-10: Low-temperature deposition of BSG: O2 is introduced at a flow rate of 60 slm, a temperature of 900℃, a time of 40 min, and a thickness of 20 nm. Step 2-11: Introduce a mixture of HCl, H2, and Ar gases, where the ratio of HCl, H2, and Ar is 3:3:5; Steps 2-12: Purge with N2 at a flow rate of 18 slm for 5 minutes, then evacuate.
[0058] Example 6 This embodiment provides a TBC battery, which differs from Embodiment 1 in that: In steps 2-4, adjust the temperature to 1200℃; In steps 2-7, adjust the temperature to 1100℃; In steps 2-10, adjust the temperature to 1000℃.
[0059] Example 7 This embodiment provides a TBC battery, which differs from Embodiment 1 in that: In steps 2-4, adjust the temperature to 900℃; In steps 2-7, adjust the temperature to 800℃; In steps 2-10, adjust the temperature to 700℃.
[0060] Example 8 This embodiment provides a TBC battery, which differs from Embodiment 1 in that: In steps 2-4, the deposition time is adjusted to 3 minutes; In steps 2-7, the deposition time is adjusted to 8 min; In steps 2-10, the deposition time is adjusted to 15 min.
[0061] Example 9 This embodiment provides a TBC battery, which differs from Embodiment 1 in that: In steps 2-4, the deposition time is adjusted to 15 min; In steps 2-7, the deposition time is adjusted to 25 min; In steps 2-10, the deposition time is adjusted to 45 min.
[0062] Example 10 This embodiment provides a TBC battery, which differs from Embodiment 1 in that: Step 2-2: Introduce a mixture of HCl, H2, and Ar gases, where the ratio of HCl, H2, and Ar is 1:1:6; Steps 2-5: Introduce a mixed gas of HCl, H2, and Ar, where the ratio of HCl, H2, and Ar is 1:1:6; Steps 2-8: Introduce a mixed gas of HCl, H2, and Ar, where the ratio of HCl, H2, and Ar is 1:1:6; Step 2-11: Introduce a mixture of HCl, H2, and Ar gases, where the ratio of HCl, H2, and Ar is 1:1:6.
[0063] Example 11 This embodiment provides a TBC battery, which differs from Embodiment 1 in that: Step 2-2: Introduce a mixture of HCl, H2, and Ar gases, where the ratio of HCl, H2, and Ar is 4:4:1. Steps 2-5: Introduce a mixed gas of HCl, H2, and Ar, where the ratio of HCl, H2, and Ar is 4:4:1; Steps 2-8: Introduce a mixed gas of HCl, H2, and Ar, where the ratio of HCl, H2, and Ar is 4:4:1; Step 2-11: Introduce a mixture of HCl, H2, and Ar gases, where the ratio of HCl, H2, and Ar is 4:4:1.
[0064] Example 12 This embodiment provides a TBC battery, which differs from Embodiment 1 in that: In steps 2-4, the deposition time is adjusted to 30 min; In steps 2-7, the deposition time is adjusted to 15 min; In steps 2-10, the deposition time is adjusted to 8 min.
[0065] Example 13 This embodiment provides a TBC battery, which differs from Embodiment 1 in that: In step 2, only steps 2-1 to 2-9 are performed.
[0066] Example 14 This embodiment provides a TBC battery, which differs from Embodiment 1 in that: In step 2, only steps 2-1 to 2-3 and steps 2-7 to 2-12 are performed.
[0067] Example 15 This embodiment provides a TBC battery, which differs from Embodiment 1 in that: In step 2, only steps 2-1 to 2-6 and steps 2-10 to 2-12 are performed.
[0068] Comparative Example 1 This comparative example provides a TBC battery, which differs from Example 1 in that: In steps 2-4, adjust the temperature to 850℃; In steps 2-7, the temperature is 950℃; In steps 2-10, adjust the temperature to 1050℃.
[0069] Comparative Example 2 This comparative example provides a TBC battery, which differs from Example 1 in that: In step 2, only step 2-1 is performed.
[0070] Comparative Example 3 This comparative example provides a TBC battery, which differs from Example 1 in that: In step 2, only steps 2-1 to 2-6 are performed.
[0071] Test case Test samples: TBC batteries prepared in Examples 1-15 and Comparative Examples 1-3 were used as samples for testing.
[0072] Testing method: The Halm testing system was used to test efficiency and yield.
[0073] The test results are shown in Table 1.
[0074] Table 1
[0075] As shown in Table 1, the TBC batteries prepared using Examples 1-15 of this invention significantly outperformed Comparative Examples 1-3 in both conversion efficiency and yield. The comparative examples, due to only performing conventional boron expansion or incomplete processes (such as missing cycle units or reversed temperature sequence), all had efficiencies below 25.91% and yields below 76%, indicating that traditional methods are insufficient to meet the uniformity requirements of the BSG layer for high-performance TBC batteries. In contrast, Example 1 was the optimal example, employing a decreasing temperature sequence of "high temperature for short time → medium temperature → low temperature for long time," combined with post-deposition repair gas treatment, achieving high uniformity of the BSG layer and obtaining a maximum efficiency of 26.35% and a maximum yield of 90.5%. Other examples showed varying degrees of performance degradation when the temperature, time, or gas ratio deviated from this preferred range, further verifying the crucial role of the stepwise variable-temperature deposition, cycle trimming, and parameter synergistic control proposed in this invention in improving battery performance.
[0076] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.
Claims
1. A method for preparing a BSG layer, characterized in that, include: A homogenized BSG layer is prepared on an initial BSG layer formed by boron diffusion, and the initial BSG layer and the homogenized BSG layer are superimposed to form a complete BSG layer. The homogenized BSG layer is prepared by at least two circulation units; each circulation unit includes depositing the BSG layer and trimming the BSG layer with a repair gas, wherein the temperature of each deposition step decreases sequentially along the process order. The remediation gases include HCl, H2, and Ar; The gas flow rate ratio of HCl, H2 and Ar is 1-3:1-3:1-5; The homogenized BSG layer is prepared by three cyclic units, namely the first cyclic unit, the second cyclic unit, and the third cyclic unit. The deposition temperature of the BSG layer in the first cycle unit is 1000-1100℃; the deposition temperature of the BSG layer in the second cycle unit is 900-1000℃; and the deposition temperature of the BSG layer in the third cycle unit is 800-900℃.
2. The method for preparing the BSG layer according to claim 1, characterized in that, The time for each deposition step increases sequentially along the process order.
3. The method for preparing the BSG layer according to claim 1, characterized in that, The initial BSG layer has a thickness of 5-10 nm.
4. The method for preparing the BSG layer according to claim 1, characterized in that, The thickness of the homogenized BSG layer is 30-80 nm.
5. The method for preparing the BSG layer according to claim 1, characterized in that, Each of the loop units includes: (a) Deposit a BSG layer at a preset temperature; (b) Surface finishing of the BSG layer under the repair gas range; (c) Purge with nitrogen and evacuate.
6. The method for preparing the BSG layer according to claim 5, characterized in that, During the nitrogen purging process, the nitrogen gas flow rate is 13-18 slm; the nitrogen purging time is 5-10 min.
7. The method for preparing the BSG layer according to claim 1, characterized in that, The deposition time of the first circulation unit is 5-10 min; the gas used to deposit the BSG layer in the first circulation unit includes oxygen; the oxygen flow rate is 20-60 slm; and the thickness of the BSG layer in the first circulation unit is 10-30 nm.
8. The method for preparing the BSG layer according to claim 1, characterized in that, The deposition time of the second circulation unit is 10-20 min; the gas used to deposit the BSG layer in the second circulation unit includes oxygen; the oxygen flow rate is 20-60 slm; and the thickness of the BSG layer in the second circulation unit is 10-30 nm.
9. The method for preparing the BSG layer according to claim 1, characterized in that, The deposition time of the third circulation unit is 20-40 min; the gas used to deposit the BSG layer in the third circulation unit includes oxygen; the oxygen flow rate is 20-60 slm; and the thickness of the BSG layer in the third circulation unit is 10-30 nm.
10. The method for preparing the BSG layer according to claim 1, characterized in that, After the initial BSG layer is formed and before the homogenized BSG layer is prepared, the preparation method further includes: using a repair gas to trim the initial BSG layer.
11. A method for preparing a TBC battery, characterized in that, The complete BSG layer required for the TBC battery is formed during the preparation process using the BSG layer preparation method as described in any one of claims 1-10. The TBC battery preparation method includes: (a) A first tunneling oxide layer and a first intrinsic amorphous silicon layer are prepared on the back side of a silicon substrate; then boron diffusion is performed to form a boron-doped polycrystalline silicon layer and the complete BSG layer is formed on the surface of the boron-doped polycrystalline silicon layer; (b) Remove the BSG layer, boron-doped polysilicon layer and first tunneling oxide layer in the negative electrode region; (c) A second tunneling oxide layer and a second intrinsic amorphous silicon layer are prepared on the solar cell after the treatment in step (b); then phosphorus diffusion is performed to form a phosphorus-doped polycrystalline silicon layer; (d) The first tunneling oxide layer and boron-doped polycrystalline silicon layer in the positive electrode region are retained; the second tunneling oxide layer and phosphorus-doped polycrystalline silicon layer in the negative electrode region are retained; the remaining film layers are removed to obtain the TBC battery.
12. The preparation method according to claim 11, characterized in that, In step (a), the first tunneling oxide layer and the first intrinsic amorphous silicon layer are prepared using LPCVD process.
13. The preparation method according to claim 12, characterized in that, The thickness of the first tunneling oxide layer is 1.0~2.5 nm; the deposition temperature of the first tunneling oxide layer is 500~650℃; and the deposition time is 20~80 min.
14. The preparation method according to claim 12, characterized in that, The thickness of the first intrinsic amorphous silicon layer is 200~400nm; the deposition temperature of the first intrinsic amorphous silicon layer is 500~650℃; and the deposition time is 50~100min.
15. The preparation method according to claim 11, characterized in that, The gases required for the boron diffusion process include BCl3, O2, and N2; the gas flow rate of BCl3 is 200-400 sccm; the gas flow rate of O2 is 700-1000 sccm; the gas flow rate of N2 is 2500-3000 sccm; the deposition temperature is 800-1000℃; the deposition time is 1-2 h; and the sheet resistance is 100-200 Ω.
16. The preparation method according to claim 11, characterized in that, In step (b), a laser is used to remove the BSG layer in the negative electrode region to form a patterned groove; the depth of the patterned groove is 35~90nm; the width of the patterned groove is 400~600μm; the laser includes a picosecond laser.
17. The preparation method according to claim 16, characterized in that, The boron-doped polycrystalline silicon layer and the first tunneling oxide layer in the negative electrode region are removed by groove polishing; the depth of the patterned groove is increased to 2~3μm.
18. The preparation method according to claim 11, characterized in that, In step (c), the second tunneling oxide layer and the second intrinsic amorphous silicon layer are prepared using LPCVD process.
19. The preparation method according to claim 18, characterized in that, The thickness of the second tunneling oxide layer is 1.0~2.5 nm; the deposition temperature of the second tunneling oxide layer is 500~650℃; and the deposition time is 20~80 min.
20. The preparation method according to claim 18, characterized in that, The thickness of the second intrinsic amorphous silicon layer is 100~300nm; the deposition temperature of the second intrinsic amorphous silicon layer is 500~650℃; and the deposition time is 50~100min.
21. The preparation method according to claim 11, characterized in that, The gases required for the phosphorus diffusion include POCl3, O2, and N2; the gas flow rate of POCl3 is 1000-2000 sccm; the gas flow rate of O2 is 500-1000 sccm; the gas flow rate of N2 is 500-1500 sccm; the deposition temperature is 800-1000℃; the deposition time is 1-3h; the sheet resistance is 20-80Ω; and the thickness of the PSG layer formed on the surface of the phosphorus-doped polycrystalline silicon layer is 30-80nm.
22. The preparation method according to claim 11, characterized in that, The preparation method further includes: passivating the battery cells after step (d).
23. The preparation method according to claim 22, characterized in that, The passivation process includes: depositing an aluminum oxide passivation layer on both sides of the cell, followed by depositing a silicon nitride passivation layer on the back side and depositing a silicon nitride passivation layer and a silicon oxide passivation layer on the front side.
24. A TBC battery, characterized in that, It is prepared by the preparation method according to any one of claims 11-23.
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