Graph structure force guided dynamic spring effect acceleration method based on GPU parallel computing
By partitioning the kernel function of the graph structure force-guided dynamic spring effect algorithm on the GPU and combining it with the improved KIFMM algorithm and simulated annealing algorithm, the computational complexity and convergence speed problems of traditional CPU algorithms in large-scale graph data processing are solved, and efficient and stable graph layout calculation is achieved.
Patent Information
- Application Number
- CN202511488696.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-10-17
- Publication Date
- 2026-01-16
AI Technical Summary
Traditional CPU-based graph structure force-guided dynamic spring effect algorithms suffer from high computational complexity, slow convergence speed, and large memory overhead in large-scale graph data processing. Furthermore, they lack efficient resource allocation and iterative convergence mechanisms, making it difficult to meet real-time computing requirements.
A GPU-based parallel computing approach is adopted, dividing the repulsion force calculation, spring force calculation, and damping force calculation into three independent GPU kernel functions. Resource allocation is performed in combination with the hardware characteristics of the Ada architecture, and an improved KIFMM algorithm and simulated annealing algorithm are introduced. Through thread coarsening, shared memory privatization, and reduce operator fusion optimization, efficient iteration and convergence of node positions are achieved.
It significantly reduces computational complexity and storage latency, improves computational efficiency and iteration convergence speed, and can achieve millisecond-level computational latency in large-scale graph structure processing, meeting real-time requirements. It is suitable for fields such as social network visualization, knowledge graph layout, and molecular modeling.
Smart Images
Figure CN121353054A_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present application relates to the field of computer graphics and parallel computing, and particularly relates to a graph structure force-directed dynamic spring effect acceleration method based on GPU parallel computing. BACKGROUND
[0002] As an important data representation method, graph structure is widely used in social network analysis, knowledge graph construction, molecular modeling, traffic planning and computer visualization. When visualizing or analyzing large-scale graphs, force-directed layout algorithms are widely used because they can intuitively show the global structure and local clustering characteristics of the graph. Among them, the force-directed dynamic spring effect algorithm compares nodes to charged particles and edges to springs, so that the nodes continuously adjust their positions under the joint action of repulsive force, spring force and damping force, and reach convergence after iterative updating, generating a clear and stable graph layout. However, with the rapid growth of graph size, the traditional CPU-based implementation has problems such as high computational complexity, slow convergence speed and large memory overhead, making it difficult to meet the needs of large-scale real-time computing. The optimization on GPU architecture is insufficient, and the computational complexity and memory access delay are still high. In addition, the fixed step strategy commonly used in the iterative updating process of node positions is prone to oscillation or slow convergence, and lacks adaptive adjustment in different stages. Finally, repulsive force calculation, spring force calculation and damping and position updating are often executed as independent kernels, and intermediate results need to be frequently written to global memory, increasing the delay and storage overhead, and lacking efficient fusion optimization mechanism.
[0003] Although the prior art improves the efficiency of graph structure force-directed algorithms through GPU parallel computing, there are still problems such as rough resource allocation, heavy thread scheduling burden, insufficient optimization of complex algorithms, imperfect iterative convergence mechanism and low kernel fusion degree. SUMMARY
[0004] One object of the present application is to provide a graph structure force-directed dynamic spring effect acceleration method based on GPU parallel computing. The present application makes full use of the large-scale parallel computing capability of GPU, combines reasonable resource allocation strategies, thread coarsening and memory optimization methods, introduces improved KIFMM algorithm and simulated annealing algorithm, and decomposes and accelerates the repulsive force calculation, spring force calculation and damping force and position updating of the graph structure force-directed dynamic spring effect, to realize efficient iteration and convergence of node positions. The present application can significantly reduce computational complexity and storage delay while maintaining stable layout effect, and has the advantages of high computational efficiency, fast iterative convergence speed and suitability for large-scale graph structure processing.
[0005] According to the graph structure force-directed dynamic spring effect acceleration method based on GPU parallel computing, the following steps are included: The repulsion force calculation, spring force calculation and damping force calculation in the dynamic spring effect calculation of the graph structure force guide are divided into three independent GPU kernel functions; An execution configuration is generated by using a resource allocation strategy for the execution process of the three independent GPU kernel functions of the Ada architecture. Based on the execution configuration, an optimized kernel execution result is generated by using a thread coarsening method. Based on the optimized kernel execution result, a node position calculation result is generated by using a shared memory privatization method in combination with an improved KIFMM algorithm and a reduce operator fusion method. Based on the node position calculation result, the three independent GPU kernel functions are called in each graph structure force guide dynamic spring effect calculation process to obtain an iterative update result of the node position. The iterative update result of the node position is processed by using a simulated annealing algorithm to generate a cooling-processed iterative update result. Based on the cooling-processed iterative update result, a final node position is output.
[0006] Optionally, the division of the three independent GPU kernel functions specifically includes: A node set and an edge set of a graph structure are obtained, a node position matrix and a node velocity matrix are established, and the node positions of the node position matrix and the node velocities of the node velocity matrix are initialized, the node position matrix and the node velocity matrix are constructed by allocating a unique index to each node of the graph structure and allocating continuous storage space for the two matrices in the GPU global memory area, the number of columns of the matrix is set to three dimensions according to the layout dimension, the initial position of the node is written into the node position matrix, and the initial velocity of the node is written into the node velocity matrix and initialized. The kernel function for calculating the repulsion force is divided, the node position matrix is read in parallel on the GPU, and the repulsion force between the nodes in the node position matrix is calculated. The kernel function for calculating the spring force is divided, the node position matrix and the edge set are read in parallel on the GPU, and the spring force between the connected nodes is calculated. The kernel function for calculating the damping force is divided, the repulsion force, spring force, node velocity and node position are read in parallel on the GPU, the damping force is calculated, and the node velocity and node position are updated. The kernel function for calculating the repulsion force, the kernel function for calculating the spring force and the kernel function for calculating the damping force are independent of each other and are executed in parallel on the GPU.
[0007] Optionally, the generation of the execution configuration specifically includes: Based on the hardware characteristics of the Ada architecture, the maximum number of threads accommodated by a single processor is limited and the thread block size is allocated to the GPU kernel function. Based on the hardware characteristics of the Ada architecture, the maximum shared memory capacity of a single processor is limited, and in combination with shared memory, the maximum shared memory resources are allocated to GPU kernel functions. Based on the hardware characteristics of the Ada architecture, the maximum number of registers for a single processor is limited, and combined with the constraint of 100% GPU thread utilization, the maximum number of registers is allocated to GPU kernel functions. By limiting the thread block size and shared memory size, the kernel functions for repulsive force calculation, spring force calculation, and damping force calculation are all made to use the same thread block size and shared memory size. By limiting the number of registers, register resources are allocated to the kernel functions for repulsion force calculation, spring force calculation, and damping force calculation, respectively. Based on the constraints between thread block size, shared memory size, and number of registers, an execution configuration is generated. This execution configuration generates a grid dimension by combining the number of thread blocks that can be parallelized by a single processor with the task size and thread coarsening parameters, forming a unified execution configuration for the kernel functions of repulsion calculation, spring force calculation, and damping force calculation.
[0008] Optionally, the generation of the optimized kernel execution result specifically includes: Based on the execution configuration, the kernel functions for repulsion calculation, spring force calculation, and damping force and position update are respectively subjected to the thread coarsening method to generate thread coarsening parameter results. The thread coarsening method refers to processing multiple processing units sequentially at consecutive addresses within the same thread. The thread coarsening parameter result is input into the allocation range of each thread block to generate a register temporary storage result. After the processing of this thread is completed, the register temporary storage result is written back to the GPU global memory area, which serves as the data interaction area between thread blocks and GPU kernel functions. Based on the temporary storage results in the registers in the GPU global memory region, the kernel functions for repulsion calculation, spring force calculation, and damping force and position update are executed in a unified order to generate execution order results; Based on the execution order, the optimized kernel execution result is output.
[0009] Optionally, the generation of the node position calculation result specifically includes: Based on the optimized kernel execution results, shared memory private segments are allocated for the three independent GPU kernel functions using a shared memory privatization method. Simultaneously, the node position matrix is optimized using an improved KIFMM algorithm. This improved KIFMM algorithm includes Morton coding sorting, upward aggregation, multipole-to-local translation, downward propagation, and observation point evaluation. Morton coding sorting linearizes the nodes in the node position matrix according to their spatial coordinates. Upward aggregation converts local point source information into multipole expansion coefficients. Multipole-to-local translation converts multipole expansion coefficients into expansion coefficients when far-field conditions are met between two units. Downward propagation and observation point evaluation refer to each unit inheriting far-field information to obtain the far-field action of each node. The node position matrix is linearized according to Morton encoding and a hierarchical unit set is constructed to generate an equivalent point set and a test point set. The compressed pseudo-inverse is obtained through singular value decomposition to generate an equivalent density. The hierarchical unit set includes all partitioning units from the root unit to the finest unit. The purpose of the singular value decomposition is to remove redundant information from the hierarchical unit set, and the purpose of the compressed pseudo-inverse is to transform the field information of the test point set into the density parameters of the equivalent point set. Based on the equivalent density, upward aggregation is performed from the finest layer in the hierarchical unit set to the root layer to generate multipole coefficients; Based on the multipole coefficient, a far-field interaction list of hierarchical unit sets is defined. The multipole to local translation is transformed into local expansion coefficients. The far-field interaction list records the hierarchical unit sets that satisfy the far-field determination conditions. Based on the local expansion coefficient, local expansion is propagated from the upper layer to the lower layer, and observation point evaluation is performed on the nodes in the hierarchical unit set to generate the node far-field action. In the shared memory private segment, load the nearest nodes and connected edges in the hierarchical unit set, define the nearest neighbor set of the node and the target edge length, and calculate the near field action of the node. The reduce operator fusion method is used to perform multi-level reduction of the far-field action and near-field action of a node within the same thread block to synthesize the node action. The multi-level reduction refers to the parallel reduction method in the GPU that merges intermediate results layer by layer at the warp level. The synthesis of the node action refers to each thread adding the far-field action and near-field action of the node in its own interval in the register to obtain the preliminary synthesis result. Within the warp, the shuffle instruction is used to reduce layer by layer to form a warp-level partial sum. Then, the partial sums of each warp are written to the private segment of shared memory, and a thread block-level reduction is performed within the block to obtain the final node action. Finally, the node action is written back to the GPU global memory area in one go according to the allocated interval to generate a unified node action output. Write the node action back to the GPU global memory area all at once to generate the node location calculation results.
[0010] Optionally, obtaining the iterative update result of the node position specifically includes: Based on the node position calculation results, the updated node position matrix, the updated node velocity matrix, and the updated edge set are used as input data for the kernel function of repulsion force calculation, the kernel function of spring force calculation, and the kernel function of damping force and position update. The kernel function for repulsion calculation is called to perform parallel calculations on the updated node position matrix and generate intermediate results of node repulsion. The kernel function for calculating spring force is called, and the updated node position matrix and the updated edge set are combined for parallel calculation to generate intermediate results of node spring force. The kernel function for damping force and position update is called, and the node velocity matrix is calculated in parallel by combining the intermediate results of node repulsion force and node spring force, generating intermediate results for node position iterative update. Write the intermediate results of the node position iterative update to the GPU global memory area to generate the node position iterative update results.
[0011] Optionally, the generation of the iterative update result after the cooling process specifically includes: Based on the iterative update results of node positions, the temperature value, cooling rate and termination temperature threshold of the simulated annealing algorithm are set. In each iteration, the node position iteration update result is used as input, and the update step size of the node position iteration update result is adjusted in combination with the temperature value; The temperature value is gradually reduced according to the cooling rate, and the update step size of the node position iterative update result is gradually reduced. When the temperature drops to the termination temperature threshold, the iterative update result after cooling is output.
[0012] Optionally, the final position of the node is the stable coordinate when the calculation of the dynamic spring effect guided by the graph structure force reaches the convergence condition after multiple iterations and cooling processing.
[0013] The beneficial effects of this invention are: First, this invention divides the repulsion force calculation, spring force calculation, and damping force calculation in the graph structure force-guided dynamic spring effect calculation into three independent GPU kernel functions. It then leverages the hardware characteristics of the Ada architecture to rationally allocate thread block size, shared memory, and register count, generating an execution configuration that significantly improves GPU resource utilization. By applying thread coarsening methods, shared memory privatization methods, and reduce operator fusion methods, it effectively reduces thread scheduling overhead and memory access conflicts, achieving efficient parallel computation of large-scale nodes and edges.
[0014] Secondly, this invention introduces an improved kernel-independent fast multipole method during the calculation process. This method performs Morton coding sorting, upward aggregation, multipole-to-local translation, and observation point evaluation on the node position matrix, transforming the complex long-range interactions between nodes into compact expansion coefficients. This significantly reduces the overall computational complexity while maintaining computational accuracy. Furthermore, the efficient fusion of far-field and near-field interactions makes node position calculation faster and more accurate, providing stable input for iterative updates.
[0015] Finally, this invention incorporates the cooling concept of simulated annealing during the iterative update phase. By gradually reducing the step size of node position updates, it effectively avoids oscillations and overshoot that may occur during the iteration process, thus accelerating the overall convergence speed. After multiple iterations, this invention can achieve millisecond-level computational latency in medium-to-large-scale graph data scenarios, meeting the requirements of real-time systems. It also possesses good versatility and scalability, and can be applied to multiple fields such as social network visualization, knowledge graph layout, molecular modeling, and complex network analysis. It has the beneficial effects of high computational efficiency, good convergence stability, and wide applicability. Attached Figure Description
[0016] The accompanying drawings are provided to further illustrate the invention and form part of the specification. They are used in conjunction with embodiments of the invention to explain the invention and do not constitute a limitation thereof. In the drawings:
[0017] Figure 1 This is an overall flowchart of a graph structure force-guided dynamic spring effect acceleration method based on GPU parallel computing proposed in this invention; Figure 2 This is a schematic diagram of the improved KIFMM algorithm module structure for a graph structure force-guided dynamic spring effect acceleration method based on GPU parallel computing proposed in this invention. Figure 3 The graph layout before applying the spring effect in the graph structure force-guided dynamic spring effect acceleration method based on GPU parallel computing proposed in this invention; Figure 4 This invention relates to a graph layout in the application of a graph structure force-guided dynamic spring effect acceleration method based on GPU parallel computing, as proposed in this invention. Figure 5 This is a graph layout after applying the spring effect of a graph structure force-guided dynamic spring effect acceleration method based on GPU parallel computing proposed in this invention. Detailed Implementation
[0018] The present invention will now be described in further detail with reference to the accompanying drawings. These drawings are simplified schematic diagrams, illustrating only the basic structure of the invention, and therefore only show the components relevant to the invention.
[0019] refer to Figures 1-5 A method for accelerating the dynamic spring effect guided by graph structure based on GPU parallel computing includes the following steps: The calculation of repulsive force, spring force, and damping force in the calculation of dynamic spring effect guided by graph structure force is divided into three independent GPU kernel functions; The graph structure force-guided dynamic spring effect is based on force guidance, treating nodes as points of repulsion and edges as springs. Through dynamic iterative calculation of repulsion, spring force and damping force, the graph structure gradually converges to a stable layout. The execution process of the three independent GPU kernel functions of the Ada architecture is analyzed using a resource allocation strategy to generate the execution configuration. Based on the execution configuration, an optimized kernel execution result is generated using a thread coarsening method. Based on the optimized kernel execution results, a shared memory privatization method is adopted, combined with an improved KIFMM algorithm and a reduce operator fusion method, to generate node position calculation results; Based on the node position calculation results, three independent GPU kernel functions are called in each graph structure force-guided dynamic spring effect calculation process to obtain the iterative update results of the node positions; The iterative update results of the node positions are processed using a simulated annealing algorithm to generate a cooled iterative update result. Based on the iterative update results after the cooling process, the final position of the node is output.
[0020] In this embodiment, the division of the three independent GPU kernel functions specifically includes: Obtain the node set and edge set of the graph structure, establish the node position matrix and node velocity matrix, and initialize the node positions in the node position matrix and the node velocities in the node velocity matrix. The node position matrix and node velocity matrix are constructed by assigning a unique index to each node in the graph structure and allocating contiguous storage space for the two matrices in the GPU global memory area. The number of columns in the matrix is set to three dimensions according to the layout dimension. The initial position of the node is written into the node position matrix, and the initial velocity of the node is written into the node velocity matrix and initialized. The graph structure is a data structure composed of a set of nodes and a set of edges, representing the relational network in social networks, knowledge graphs, molecular structures, and transportation networks. The set of nodes is the set of all nodes in the graph structure, and the set of edges refers to the set of all edges in the graph structure. The kernel function for repulsion calculation is divided, and the node position matrix is read in parallel on the GPU. The repulsion force between nodes in the node position matrix is calculated, and the repulsion force decreases inversely proportional to the distance between nodes. The kernel function for calculating spring force is divided, and the node position matrix and edge set are read in parallel on the GPU. The spring force between connected nodes is calculated. The spring force refers to the attractive force generated when the actual distance between nodes is greater than the target edge length, and the repulsive force generated when it is less than the target edge length. The kernel function for calculating damping force is divided, and the repulsive force, spring force, node velocity and node position are read in parallel on the GPU. The damping force is calculated and the node velocity and node position are updated. The damping force is linearly proportional to the node velocity. The kernel functions for repulsion calculation, spring force calculation, and damping force calculation are independent of each other and are executed in parallel on the GPU.
[0021] In this embodiment, the generation of the execution configuration specifically includes: Based on the hardware characteristics of the Ada architecture, the maximum number of threads that a single processor can accommodate is limited to 1,536, and the thread block size is allocated to the GPU kernel function. Each thread block contains 512 threads, which are divided according to a two-dimensional structure of 16 rows and 32 columns. Based on the hardware characteristics of the Ada architecture, the maximum shared memory capacity of a single processor is limited to 32,768 bytes. Combined with shared memory, the maximum shared memory resources are allocated to GPU kernel functions. The shared memory shape used by the thread block of each GPU kernel function is defined as 16 by 32, and the corresponding shared memory size is 4,096 bytes. Based on the hardware characteristics of the Ada architecture, the maximum number of registers for a single processor is limited to 65,536. Combined with the constraint of 100% GPU thread utilization, the maximum number of registers is allocated to GPU kernel functions, and the number of registers in the thread block of each GPU kernel function is set to be less than 43. By limiting the thread block size and shared memory size, the kernel functions for repulsive force calculation, spring force calculation, and damping force calculation are all made to use the same thread block size and shared memory size. By limiting the number of registers, register resources are allocated to the kernel functions for repulsion force calculation, spring force calculation, and damping force calculation, respectively. Based on the constraints between thread block size, shared memory size, and number of registers, an execution configuration is generated. This execution configuration generates a grid dimension by combining the number of thread blocks that can be parallelized by a single processor with the task size and thread coarsening parameters, forming a unified execution configuration for the kernel functions of repulsion calculation, spring force calculation, and damping force calculation.
[0022] In this embodiment, the generation of the optimized kernel execution result specifically includes: Based on the execution configuration, the kernel functions for repulsion calculation, spring force calculation, and damping force and position update are respectively subjected to the thread coarsening method to generate thread coarsening parameter results. The thread coarsening method refers to processing multiple processing units sequentially at consecutive addresses within the same thread. The thread coarsening parameter result is input into the allocation range of each thread block to generate a register temporary storage result. After the processing of this thread is completed, the register temporary storage result is written back to the GPU global memory area, which serves as the data interaction area between thread blocks and GPU kernel functions. Based on the temporary storage results in the registers in the GPU global memory region, the kernel functions for repulsion calculation, spring force calculation, and damping force and position update are executed in a unified order to generate execution order results; Based on the execution order, the optimized kernel execution result is output.
[0023] In this embodiment, the generation of the node position calculation result specifically includes: Based on the optimized kernel execution results, shared memory private segments are allocated for the three independent GPU kernel functions using a shared memory privatization method. Simultaneously, the node position matrix is optimized using an improved KIFMM algorithm. This improved KIFMM algorithm includes Morton coding sorting, upward aggregation, multipole-to-local translation, downward propagation, and observation point evaluation. Morton coding sorting linearizes the nodes in the node position matrix according to their spatial coordinates. Upward aggregation converts local point source information into multipole expansion coefficients. Multipole-to-local translation converts multipole expansion coefficients into expansion coefficients when far-field conditions are met between two units. Downward propagation and observation point evaluation refer to each unit inheriting far-field information to obtain the far-field action of each node. The node position matrix is linearized according to Morton encoding and a hierarchical unit set is constructed to generate an equivalent point set and a test point set. The compressed pseudo-inverse is obtained through singular value decomposition to generate an equivalent density. The hierarchical unit set includes all partitioning units from the root unit to the finest unit. The purpose of the singular value decomposition is to remove redundant information from the hierarchical unit set, and the purpose of the compressed pseudo-inverse is to transform the field information of the test point set into the density parameters of the equivalent point set. Based on the equivalent density, upward aggregation is performed from the finest layer in the hierarchical unit set to the root layer to generate multipole coefficients; Based on the multipole coefficient, a far-field interaction list of hierarchical unit sets is defined. The multipole to local translation is transformed into local expansion coefficients. The far-field interaction list records the hierarchical unit sets that satisfy the far-field determination conditions. Based on the local expansion coefficient, local expansion is propagated from the upper layer to the lower layer, and observation point evaluation is performed on the nodes in the hierarchical unit set to generate the node far-field action: ; in, For nodes The far-field action, For the evaluation operator that is locally expanded to the observation point, For nodes In iteration number Spatial coordinates of the step, The local expansion coefficient; In the shared memory private segment, load the nearest neighbor nodes and connected edges in the hierarchical unit set, define the nearest neighbor set of the node and the target edge length, and calculate the near-field action of the node: ; in, For nodes The near-field action, For nodes In iteration number Spatial coordinates of the step, For nodes and nodes The target side length between The repulsion coefficient is... The spring force coefficient, To soften the parameters, The decay exponent is N, and the total number of nodes is N. The reduce operator fusion method is used to perform multi-level reduction of the far-field action and near-field action of a node within the same thread block to synthesize the node action. The multi-level reduction refers to the parallel reduction method in the GPU that merges intermediate results layer by layer at the warp level. The synthesis of the node action refers to each thread adding the far-field action and near-field action of the node in its own interval in the register to obtain the preliminary synthesis result. Within the warp, the shuffle instruction is used to reduce layer by layer to form a warp-level partial sum. Then, the partial sums of each warp are written to the private segment of shared memory, and a thread block-level reduction is performed within the block to obtain the final node action. Finally, the node action is written back to the GPU global memory area in one go according to the allocated interval to generate a unified node action output. Write the node action back to the GPU global memory area all at once to generate the node location calculation results.
[0024] In this embodiment, obtaining the iterative update result of the node position specifically includes: Based on the node position calculation results, the updated node position matrix, the updated node velocity matrix, and the updated edge set are used as input data for the kernel function of repulsion force calculation, the kernel function of spring force calculation, and the kernel function of damping force and position update. The kernel function for repulsion calculation is called to perform parallel calculations on the updated node position matrix and generate intermediate results of node repulsion. The kernel function for calculating spring force is called, and the updated node position matrix and the updated edge set are combined for parallel calculation to generate intermediate results of node spring force. The kernel function for damping force and position update is called, and the node velocity matrix is calculated in parallel by combining the intermediate results of node repulsion force and node spring force, generating intermediate results for node position iterative update. Write the intermediate results of the node position iterative update to the GPU global memory area to generate the node position iterative update results.
[0025] In this embodiment, the generation of the iterative update result after the cooling process specifically includes: Based on the iterative update results of node positions, the temperature value, cooling rate and termination temperature threshold of the simulated annealing algorithm are set. In each iteration, the node position iteration update result is used as input, and the update step size of the node position iteration update result is adjusted in combination with the temperature value; The temperature value is gradually reduced according to the cooling rate, and the update step size of the node position iterative update result is gradually reduced. When the temperature drops to the termination temperature threshold, the iterative update result after cooling is output.
[0026] In this embodiment, the final position of the node is the stable coordinate when the calculation of the dynamic spring effect guided by the graph structure force reaches the convergence condition after multiple iterations and cooling processing.
[0027] Example 1: In a real-world application scenario for social network visualization, we selected a publicly available dataset from a major international social media platform as our experimental subject. This dataset contains 20,000 user nodes and 150,000 edges, exhibiting complex connections between nodes and clear small-group and cross-group connections. Traditional CPU-based force-guided dynamic spring effect algorithms suffer from efficiency bottlenecks when processing such medium-to-large-scale graph data: the average time per iteration exceeds 480 milliseconds, and even with multi-core CPU parallel optimization, the overall frame rate is less than 2 FPS, far below the 30 FPS requirement of real-time visualization systems.
[0028] To verify the superiority of the proposed GPU-parallel computing-based graph structure force-guided dynamic spring effect acceleration method, we selected an NVIDIA Ada architecture RTX4070 GPU in our experiments and implemented it strictly according to the optimization strategy described in the claims. Specifically, this included dividing the repulsion force calculation, spring force calculation, and damping force and position update into three independent GPU kernel functions. A resource allocation strategy was adopted to fix the thread block size at 16×32, the single-block shared memory size at 4096 bytes, and the number of registers per thread to within 42. Simultaneously, a thread coarsening method was applied to improve the throughput of single-threaded tasks, and a shared memory privatization method combined with a reduce operator fusion method was used to improve global memory access efficiency. In the force calculation stage, an improved kernel-independent fast multipole method was further introduced, and the node position matrix was processed using the improved KIFMM algorithm with Morton encoding sorting, upward aggregation, and multipole-to-local translation, thereby achieving efficient fusion of far-field and near-field effects. During the iterative update process, a simulated annealing cooling strategy was introduced to gradually reduce the step size of node position updates, accelerating convergence and avoiding position oscillations.
[0029] The experiments were conducted in a GPU server cluster environment of a university's high-performance computing laboratory, using Ubuntu 22.04 as the operating system, CUDA 12.3 toolchain, and GCC 11.3 as the compiler. In this environment, we conducted experiments on four datasets with node sizes of 1,000, 5,000, 10,000, and 20,000, respectively, and recorded the single-iteration time, the number of iterations required for convergence, and the overall computational latency for both CPU and GPU methods.
[0030] Experimental results show that with 1,000 nodes, the traditional CPU method takes 45 milliseconds per iteration, while the GPU method takes only 3.2 milliseconds. When the node size increases to 20,000, the CPU method takes as much as 482 milliseconds per iteration, while the GPU method remains within 6.7 milliseconds. In terms of convergence performance, the GPU method, by introducing a simulated annealing cooling strategy, reduces the number of iterations from an average of 1,500 for the CPU to approximately 720, shortening the overall convergence time by more than 70%. Regarding the visualization frame rate, the CPU method consistently stays below 2 FPS, while the GPU method can still maintain a stable 60 FPS even on the largest datasets.
[0031] The experiments described above demonstrate that the method proposed in this invention not only significantly improves the computation speed in the calculation of large-scale graph structure force-guided layouts but also significantly accelerates the convergence process, ensuring the requirement for real-time visualization. This result shows that this invention can effectively solve the technical problem that traditional CPU algorithms cannot meet the requirements of real-time performance and efficiency.
[0032] Table 1. Performance comparison of GPU parallel acceleration and CPU methods at different scales. Experimental results.
[0033] Table 1 shows that as the number of nodes and edges increases, the computation time of the CPU method increases linearly or even exponentially. The time per iteration increases from 45 milliseconds with 1,000 nodes to 482 milliseconds with 20,000 nodes, and the overall convergence time exceeds 700 seconds, far from meeting the requirements of real-time visualization. In contrast, the GPU method, thanks to optimization techniques such as thread coarsening, shared memory privatization, and reduce operator fusion, consistently keeps its single iteration time below 7 milliseconds, significantly reducing the number of convergence iterations, with the total convergence time being only about one percent of that of the CPU method. Regarding frame rate performance, the CPU method consistently achieves less than 12 FPS across all scales, with the largest scale even falling below 2 FPS, while the GPU method maintains a smooth 60 FPS even at a scale of 20,000 nodes. These data fully demonstrate the significant advantages of this invention in computational efficiency and convergence speed, solving the problem of traditional CPU force-directed algorithms being unable to run in real-time for large-scale graph structure visualization.
Claims
1. A method for accelerating dynamic spring effect based on GPU parallel computing, characterized in that, The method comprises the following steps: repulsion force calculation, spring force calculation, and damping force calculation in the graph structure force-directed dynamic spring effect calculation are divided into three independent GPU kernel functions; an execution configuration is generated by using a resource allocation strategy for the execution process of the three independent GPU kernel functions of the Ada architecture; an optimized kernel execution result is generated by using a thread coarsening method based on the execution configuration; a node position calculation result is generated by using a shared memory privatization method in combination with an improved KIFMM algorithm and a reduce operator fusion method based on the optimized kernel execution result; an iterative update result of the node position is obtained by calling the three independent GPU kernel functions in each graph structure force-directed dynamic spring effect calculation process based on the node position calculation result; a cooling-processed iterative update result of the node position is generated by using a simulated annealing algorithm for the iterative update result of the node position; a final position of the node is output based on the cooling-processed iterative update result.
2. The GPU parallel computing based graph structure force-directed dynamic spring effect acceleration method according to claim 1, wherein, The division of the three independent GPU kernel functions specifically comprises: a node set and an edge set of a graph structure are obtained, a node position matrix and a node velocity matrix are established, and the node position of the node position matrix and the node velocity of the node velocity matrix are initialized, the node position matrix and the node velocity matrix are constructed by allocating a unique index to each node of the graph structure and allocating continuous storage space for the two matrices in a GPU global memory area, the number of columns of the matrix is set to three dimensions according to the layout dimension, the initial position of the node is written into the node position matrix, and the initial velocity of the node is written into the node velocity matrix and initialized; a kernel function for repulsion force calculation is divided, the node position matrix is read in parallel on the GPU, and the repulsion force between the nodes in the node position matrix is calculated; a kernel function for spring force calculation is divided, the node position matrix and the edge set are read in parallel on the GPU, and the spring force between the connected nodes is calculated; a kernel function for damping force calculation is divided, the repulsion force, the spring force, the node velocity, and the node position are read in parallel on the GPU, the damping force is calculated, and the node velocity and the node position are updated; the kernel function for repulsion force calculation, the kernel function for spring force calculation, and the kernel function for damping force are independent of each other and are executed in parallel on the GPU.
3. The GPU parallel computing based graph structure force-directed dynamic spring effect acceleration method according to claim 1, wherein, The generation of the execution configuration specifically comprises: based on the hardware characteristics of the Ada architecture, the maximum number of threads accommodated by a single processor is limited, and the thread block size is allocated to the GPU kernel function; based on the hardware characteristics of the Ada architecture, the maximum shared memory capacity of a single processor is limited, and the maximum shared memory resource is allocated to the GPU kernel function in combination with the shared memory; based on the hardware characteristics of the Ada architecture, the maximum number of registers of a single processor is limited, and the maximum number of registers is allocated to the GPU kernel function in combination with the constraint of 100% GPU thread occupancy; by limiting the thread block size and the shared memory size, the kernel function for repulsion force calculation, the kernel function for spring force calculation, and the kernel function for damping force calculation use the same thread block size and shared memory size; by limiting the number of registers, the kernel function for repulsion force calculation, the kernel function for spring force calculation, and the kernel function for damping force calculation are allocated with register resources, respectively. The execution configuration is generated based on a limited relationship among a thread block size, a shared memory size and a number of registers, the execution configuration being a number of thread blocks that are parallelizable by a single processor, and a grid dimension is generated in combination with a task size and a thread coarsening parameter to form a unified execution configuration of the kernel function for repulsion force calculation, the kernel function for spring force calculation and the kernel function for damping force calculation.
4. The GPU parallel computing based graph structure force-directed dynamic spring effect acceleration method according to claim 1, wherein, The generation of the optimized kernel execution result specifically includes: Based on the execution configuration, a thread coarsening method is used for the kernel function for repulsion force calculation, the kernel function for spring force calculation and the kernel function for damping force and position update, respectively, to generate a thread coarsening parameter result, the thread coarsening method being a method of processing a plurality of processing units in a thread in order according to continuous addresses; The thread coarsening parameter result is input into an allocation interval of each thread block to generate a register temporary storage result, and the register temporary storage result is written back to a GPU global memory area after the end of the current thread processing, the GPU global memory area being a data interaction area between thread blocks and between GPU kernel functions; Based on the register temporary storage result in the GPU global memory area, a unified execution order is used for the kernel function for repulsion force calculation, the kernel function for spring force calculation and the kernel function for damping force and position update to generate an execution order result; Based on the execution order result, an optimized kernel execution result is output.
5. The GPU parallel computing based graph structure force-directed dynamic spring effect acceleration method according to claim 1, wherein, The generation of the node position calculation result specifically includes: Based on the optimized kernel execution result, a shared memory privatization method is used to allocate shared memory privatization segments for the three independent GPU kernel functions, and an improved KIFMM algorithm is used to optimize the node position matrix, the improved KIFMM algorithm including Morton coding sorting, upward aggregation, multipole-to-local translation, downward propagation and observation point evaluation, the Morton coding sorting being a method of linearly sorting nodes in the node position matrix according to spatial coordinates, the upward aggregation being a method of converting local point source information into multipole expansion coefficients, the multipole-to-local translation being a method of converting multipole expansion coefficients into expansion coefficients when two units satisfy a far field condition, and the downward propagation and observation point evaluation being a method of inheriting far field information by each unit to obtain a far field action amount of each node; The node position matrix is linearized according to Morton coding and a hierarchical cell set is constructed to generate an equivalent point set and a test point set, and a compressed pseudo-inverse is obtained through singular value decomposition to generate an equivalent density, the hierarchical cell set including all divided cells from a root layer cell to a finest layer cell, the singular value decomposition removing redundant information of the hierarchical cell set, and the compressed pseudo-inverse converting field information of the test point set into density parameters of the equivalent point set; Based on the equivalent density, upward aggregation is performed from the finest layer to the root layer in the hierarchical cell set to generate multipole coefficients; Based on the multipole coefficients, a far field interaction list of the hierarchical cell set is defined and converted into local expansion coefficients through multipole-to-local translation, the far field interaction list recording the hierarchical cell set that satisfies a far field judgment condition. Based on the local expansion coefficient, the local expansion is propagated from the upper layer to the lower layer, the observation point evaluation is performed on the nodes in the hierarchical cell set, and the node far-field action quantity is generated; In the shared memory privatized segment, the near neighbor nodes and the connected edges in the hierarchical cell set are loaded, the near neighbor set of the node and the target edge length are defined, and the node near-field action quantity is calculated; The node far-field action quantity and the node near-field action quantity are fused in the same thread block by using a reduce operator fusion method to perform multi-level reduction, synthesize the node action quantity, the multi-level reduction refers to a parallel reduction mode of merging intermediate results layer by layer in a warp level in the GPU, and the synthesis of the node action quantity refers to that each thread adds the far-field action quantity and the near-field action quantity of the node in the current interval in the register to obtain a preliminary synthesis result, and the warp-level partial sum is formed by layer-by-layer reduction in the warp through a shuffle instruction, and then the partial sum of each warp is written into the shared memory privatized segment, and a thread block-level reduction is performed in the block to obtain the final node action quantity, and finally the node action quantity is written back to the GPU global memory area in one time to generate a unified node action quantity output; The node action quantity is written back to the GPU global memory area in one time to generate the node position calculation result.
6. The GPU parallel computing based graph structure force-directed dynamic spring effect acceleration method according to claim 1, wherein, The iteration update result of the node position specifically includes: Based on the node position calculation result, the updated node position matrix, the updated node speed matrix and the updated edge set are taken as the input data of the kernel function for repulsive force calculation, the kernel function for spring force calculation, and the kernel function for damping force and position update; The kernel function for repulsive force calculation is called to perform parallel calculation on the updated node position matrix to generate a node repulsive force intermediate result; The kernel function for spring force calculation is called to perform parallel calculation in combination with the updated node position matrix and the updated edge set to generate a node spring force intermediate result; The kernel function for damping force and position update is called to perform parallel calculation on the node speed matrix in combination with the node repulsive force intermediate result and the node spring force intermediate result to generate a node position iteration update intermediate result; The node position iteration update intermediate result is written into the GPU global memory area to generate the node position iteration update result.
7. The GPU parallel computing based graph structure force-directed dynamic spring effect acceleration method according to claim 1, wherein, The generation of the iteration update result after the cooling treatment specifically includes: Based on the node position iteration update result, the temperature value, the cooling rate and the termination temperature threshold of the simulated annealing algorithm are set; In each iteration process, the node position iteration update result is taken as the input, and the update step of the node position iteration update result is adjusted in combination with the temperature value; The temperature value is gradually reduced according to the cooling rate, and the update step of the node position iteration update result is gradually reduced; When the temperature value decreases to the termination temperature threshold, the iteration update result after the cooling treatment is output.
8. The GPU parallel computing based graph structure force-directed dynamic spring effect acceleration method according to claim 1, wherein, The final node position is a stable coordinate when the graph structure force guiding dynamic spring effect calculation is iterated for multiple rounds and the cooling treatment is performed until the convergence condition is reached.