Pixel circuit, display panel and display device

Abstract

Embodiments of the present application provide a pixel circuit, a display panel and a display device. In the pixel circuit, a first electrode of a driving transistor is electrically connected with a first power signal line, a first electrode of a light-emitting control transistor is electrically connected with a second electrode of the driving transistor and electrically connected with a first node, the first node is electrically connected with a light-emitting device; a first electrode of an anode reset transistor is coupled with a first reset voltage signal line, a second electrode of the anode reset transistor is electrically connected with the first node; a first electrode of a compensation transistor is electrically connected with the first reset voltage signal line, a second electrode of the compensation transistor is electrically connected with the anode reset transistor, a gate electrode of the compensation transistor is electrically connected with the first electrode or the second electrode of the compensation transistor; one working cycle of the pixel circuit includes a non-light-emitting phase and a light-emitting phase, the compensation transistor and the anode reset transistor are turned on at least in part of the non-light-emitting phase, and the anode reset transistor is turned off in the light-emitting phase. The present application can improve the high-temperature color shift problem caused by the increase of the brightness of the light-emitting device.

Description

Technical Field

[0001] This application relates to the field of display technology, and in particular to a pixel circuit, display panel, and display device. Background Technology

[0002] In the field of display technology, the pixel circuits in display panels have a significant impact on the display quality of the display panels and have become a current research focus.

[0003] In existing technologies, the driving current provided by the pixel circuit is too high under heating conditions, which can easily cause color shift problems in the display panel at high temperatures. Therefore, a solution is urgently needed. Summary of the Invention

[0004] In view of this, embodiments of this application provide a pixel circuit, a display panel, and a display device to solve the above problems.

[0005] In a first aspect, embodiments of this application provide a pixel circuit applied in a display panel, wherein the pixel circuit is electrically connected to a light-emitting device, and the pixel circuit includes;

[0006] A driving transistor, the first terminal of which is electrically connected to the first power signal line;

[0007] The light-emitting control transistor has its first terminal electrically connected to the second terminal of the driving transistor, the second terminal electrically connected to the first node, and the first node electrically connected to the light-emitting device.

[0008] An anode reset transistor, wherein the first terminal of the anode reset transistor is coupled to the first reset voltage signal line and the second terminal is electrically connected to the first node;

[0009] The compensation transistor has its first terminal electrically connected to the first reset voltage signal line, its second terminal electrically connected to the first terminal of the anode reset transistor, and its gate electrically connected to either the first or second terminal of the compensation transistor.

[0010] One operating cycle of the pixel circuit includes a non-light-emitting phase and a light-emitting phase. The compensation transistor and the anode reset transistor are turned on in at least a portion of the non-light-emitting phase, and the anode reset transistor is turned off in the light-emitting phase.

[0011] Secondly, based on the same inventive concept, embodiments of this application provide a display panel including the pixel circuits provided in the first aspect.

[0012] Thirdly, based on the same inventive concept, embodiments of this application provide a display device, including a display panel as provided in the second aspect.

[0013] In this embodiment, by electrically connecting the gate of the compensation transistor to the first or second terminal of the compensation transistor, the compensation transistor can be made to operate in the saturation region, so that the threshold voltage of the compensation transistor has a greater impact on the circuit loop in which the compensation transistor is located.

[0014] With the compensation transistor positioned between the first reset voltage signal line and the anode reset transistor, during the non-light-emitting phase, when the compensation transistor and the anode reset transistor are turned on, the potential transmitted from the first reset voltage to the first node will be affected by the threshold voltage of the compensation transistor. Since the absolute value of the threshold voltage of the compensation transistor decreases at high temperatures, the potential of the second electrode of the compensation transistor will decrease, as can be seen from the relationship between the first electrode potential and the second electrode potential of the compensation transistor. This will lower the potential of the first node, which is beneficial for compensating for the increase in the first node potential caused by the increase in the light-emitting driving current generated by the driving transistor, and may even offset the increase in the first node potential caused by the increase in the light-emitting driving current generated by the driving transistor. This will help reduce the charging current of the light-emitting device and improve the high-temperature color shift problem caused by the increase in the brightness of the light-emitting device. Attached Figure Description

[0015] To more clearly illustrate the technical solutions of the embodiments of this application, the drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0016] Figure 1 A schematic diagram of a pixel circuit provided in an embodiment of this application;

[0017] Figure 2 for Figure 1 The diagram shows a schematic of a pixel circuit.

[0018] Figure 3 for Figure 2 The shown is a timing diagram of a pixel circuit.

[0019] Figure 4 A schematic diagram of yet another pixel circuit provided in an embodiment of this application;

[0020] Figure 5 A schematic diagram of the film layer of a pixel circuit and a light-emitting device provided in an embodiment of this application;

[0021] Figure 6 A schematic diagram of yet another pixel circuit provided in an embodiment of this application;

[0022] Figure 7 A schematic diagram of yet another pixel circuit provided in an embodiment of this application;

[0023] Figure 8 This is a schematic diagram of the structure of a compensation transistor provided in an embodiment of this application;

[0024] Figure 9 A schematic diagram of yet another pixel circuit provided in an embodiment of this application;

[0025] Figure 10 A schematic diagram of yet another pixel circuit provided in an embodiment of this application;

[0026] Figure 11 A schematic diagram of yet another pixel circuit provided in an embodiment of this application;

[0027] Figure 12 A schematic diagram of yet another pixel circuit provided in an embodiment of this application;

[0028] Figure 13 A schematic diagram of yet another pixel circuit provided in an embodiment of this application;

[0029] Figure 14 A schematic diagram of yet another pixel circuit provided in an embodiment of this application;

[0030] Figure 15 A schematic diagram of yet another pixel circuit provided in an embodiment of this application;

[0031] Figure 16 A schematic diagram of yet another pixel circuit provided in an embodiment of this application;

[0032] Figure 17 A schematic diagram of yet another pixel circuit provided in an embodiment of this application;

[0033] Figure 18 A schematic diagram of a display panel provided in an embodiment of this application;

[0034] Figure 19 This is a schematic diagram of a display device provided in an embodiment of this application. Detailed Implementation

[0035] To better understand the technical solution of this application, the embodiments of this application will be described in detail below with reference to the accompanying drawings.

[0036] It should be understood that the described embodiments are merely some, not all, of the embodiments in this application. All other embodiments obtained by those skilled in the art based on the embodiments in this application without inventive effort are within the scope of protection of this application.

[0037] The terminology used in the embodiments of this application is for the purpose of describing particular embodiments only and is not intended to be limiting of this application. The singular forms “a,” “the,” and “the” used in the embodiments of this application and the appended claims are also intended to include the plural forms unless the context clearly indicates otherwise.

[0038] It should be understood that the term "and / or" used in this article is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, or B existing alone. Furthermore, the character " / " in this article generally indicates that the related objects before and after it have an "or" relationship.

[0039] Various modifications and variations can be made to this application without departing from its spirit or scope, which will be apparent to those skilled in the art. Therefore, this application is intended to cover modifications and variations falling within the scope of the corresponding claims (the claimed technical solutions) and their equivalents. It should be noted that the implementation methods provided in the embodiments of this application can be combined with each other without contradiction.

[0040] Figure 1 This is a schematic diagram of a pixel circuit provided in an embodiment of this application. Figure 2 for Figure 1 The diagram shows a schematic of a pixel circuit.

[0041] This application provides a pixel circuit 10, which can be applied to a display panel, such as... Figure 1 As shown, the pixel circuit 10 is electrically connected to the light-emitting device 20. The pixel circuit 10 is used to provide light-emitting driving current to the light-emitting device 20 so as to drive the light-emitting device 20 to emit light.

[0042] like Figure 1 As shown, the pixel circuit 10 includes a driving transistor Md, a light-emitting control module 12, an anode reset module 13, and a compensation transistor Mt. The driving transistor Md is used to generate a light-emitting driving current. The first terminal of the driving transistor Md is electrically connected to the first power signal line DL1. The first power signal line DL1 is used to transmit the first power supply voltage PVDD.

[0043] The input terminal of the light-emitting control module 12 is electrically connected to the second electrode of the driving transistor Md, and the output terminal is electrically connected to the first node N1. The first node N1 is electrically connected to the light-emitting device 20. The light-emitting driving current generated by the driving transistor Md can be transmitted through the light-emitting control module 12 to the first node N1, and then to the light-emitting device 20. For example, the first node N1 is connected to the anode of the light-emitting device 20, and the cathode of the light-emitting device 20 is electrically connected to the second power signal line DL2, which transmits the second power supply voltage PVEE.

[0044] For example, such as Figure 2 As shown, the light-emitting control module 12 includes a light-emitting control transistor M2, the first terminal of the light-emitting control transistor M2 is electrically connected to the second terminal of the driving transistor Md, and the second terminal is electrically connected to the first node N1.

[0045] The input terminal of the anode reset module 13 is coupled to the first reset voltage signal line SL1, and the output terminal is electrically connected to the first node N1. The voltage on the first reset voltage signal line SL1 can be transmitted to the first node N1 through the anode reset module 13 to reset the first node N1. Since the first node N1 can be connected to the anode of the light-emitting device 20, resetting the first node N1 can realize the reset of the anode of the light-emitting device 20.

[0046] For example, such as Figure 2 As shown, the anode reset module 13 includes an anode reset transistor M3. The first terminal of the anode reset transistor M3 is coupled to the first reset voltage signal line SL1, and the second terminal is electrically connected to the first node N1.

[0047] Optionally, the first reset voltage signal line SL1 transmits the first reset voltage VREF1, and the potential of the first reset voltage VREF1 is less than 0V to ensure the reset effect on the anode of the light-emitting device 20.

[0048] The compensation transistor Mt is connected in series between the first reset voltage signal line SL1 and the anode reset module 13. For example, as shown... Figure 2 As shown, the first terminal of the compensation transistor Mt is electrically connected to the first reset voltage signal line SL1, the second terminal of the compensation transistor Mt is electrically connected to the first terminal of the anode reset transistor M3, and the gate of the compensation transistor Mt is electrically connected to either the first or second terminal of the compensation transistor Mt.

[0049] In one operating cycle of the pixel circuit 10, there are a non-light-emitting phase and a light-emitting phase. The compensation transistor Mt and the anode reset transistor M3 are turned on in at least a part of the non-light-emitting phase, and the anode reset transistor M3 is turned off in the light-emitting phase.

[0050] In other words, before the pixel circuit 10 drives the light-emitting device 20 to emit light, the first reset voltage VREF1 on the first reset voltage signal line SL1 can be transmitted to the first node N1 through the compensation transistor Mt and the anode reset transistor M3. When the pixel circuit 10 drives the light-emitting device 20 to emit light, the transmission of the first reset voltage VREF1 on the first reset voltage signal line SL1 to the first node N1 is blocked by the anode reset transistor M3.

[0051] The inventors of this application discovered through research that, in related technologies, rising temperature leads to an increase in the subthreshold swing (SS) of the driving transistor in the pixel circuit. This increased SS tends to cause a rise in the light-emitting driving current generated during transistor operation, resulting in increased brightness of the light-emitting device. This can easily cause changes in the brightness white balance set at room temperature, leading to high-temperature color shift problems and affecting display quality.

[0052] In view of this, the inventors of this application have proposed a technical solution based on the characteristics of transistors: adding a compensation transistor to the pixel circuit to compensate for the increase in light-emitting driving current caused by the change in the threshold voltage of the compensation transistor at high temperatures.

[0053] Understandably, as temperature rises, the intrinsic carrier density of a transistor typically increases, resulting in a decrease in the absolute value of the transistor's threshold voltage.

[0054] In this embodiment, by electrically connecting the gate of the compensation transistor Mt to either the first or second terminal of the compensation transistor Mt, the compensation transistor Mt can operate in the saturation region. This makes the threshold voltage of the compensation transistor Mt have a significant impact on the circuit loop in which the compensation transistor Mt is located. When the temperature rises, the absolute value of the threshold voltage of the compensation transistor Mt will decrease. The change in the threshold voltage of the compensation transistor Mt can cause a change in the node potential in its circuit.

[0055] Understandably, assuming the first terminal potential of the compensation transistor Mt is V1, the second terminal potential is V2, and the threshold voltage is Vth, then when the compensation transistor Mt is a P-type transistor, because the first terminal of the compensation transistor Mt receives a lower first reset voltage VREF1, the second terminal of the compensation transistor Mt is its source, and the first terminal of the compensation transistor Mt is its drain. In this case, V2 = V1 - Vth. When the compensation transistor Mt is an N-type transistor, because the first terminal of the compensation transistor Mt receives a lower first reset voltage VREF1, the first terminal of the compensation transistor Mt is its source, and the second terminal of the compensation transistor Mt is its drain. In this case, V2 = V1 + Vth. Since the threshold voltage of a P-type transistor is usually negative, and the threshold voltage of an N-type transistor is usually positive, regardless of whether the compensation transistor Mt is an N-type or P-type transistor, V2 = V1 + |Vth|.

[0056] With the compensation transistor Mt positioned between the first reset voltage signal line SL1 and the anode reset transistor M3, during the non-light-emitting phase, when the compensation transistor Mt and the anode reset transistor M3 are turned on, the potential transmitted from the first reset voltage VREF1 to the first node N1 will be affected by the threshold voltage of the compensation transistor Mt. Since the absolute value of the threshold voltage of the compensation transistor Mt decreases at high temperatures, it can be seen from the above formula V2=V1+|Vth| that the sum between the absolute values ​​of the first reset voltage VREF1 and the threshold voltage of the compensation transistor Mt will also decrease. This will reduce the potential of the second electrode of the compensation transistor Mt, thereby lowering the potential of the first node N1. This is beneficial for compensating for the increase in the potential of the first node N1 caused by the increase in the light-emitting driving current generated by the driving transistor Md, and may even offset the increase in the potential of the first node N1 caused by the increase in the light-emitting driving current generated by the driving transistor Md. This will help reduce the charging current of the light-emitting device 20 and improve the high-temperature color shift problem caused by the increase in the brightness of the light-emitting device 20.

[0057] For example, taking the first reset voltage VREF1 as -2.7V and the threshold voltage of the compensation transistor Mt at room temperature as -0.7V, at room temperature, the sum of the absolute values ​​of the first reset voltage VREF1 and the threshold voltage of the compensation transistor Mt is Vt1, Vt1 = -2.7V + |-0.7V| = -2V.

[0058] At high temperature, the sum of the absolute values ​​of the first reset voltage VREF1 and the threshold voltage of the compensation transistor Mt is Vt2. When the temperature rises, the absolute value of the threshold voltage of the compensation transistor Mt decreases. Assuming that the threshold voltage of the compensation transistor Mt becomes -0.5V at high temperature, then at high temperature, Vt2 = -2.7V + |-0.5V| = -2.2V.

[0059] Therefore, under high temperature conditions, the sum of the absolute values ​​of the first reset voltage VREF1 and the threshold voltage of the compensation transistor Mt becomes smaller, which can lower the potential of the second electrode of the compensation transistor Mt, and further lower the potential of the first node N1, thus compensating for the increase in the potential of the first node N1 caused by the increase in the light-emitting driving current generated by the driving transistor Md.

[0060] Please continue to refer to this. Figure 1 The pixel circuit 10 also includes a power supply voltage writing module 11, a gate reset module 14, a data writing module 15, and a threshold capture module 16. The input terminal of the power supply voltage writing module 11 is electrically connected to the first power signal line DL1, and the output terminal is electrically connected to the first pole of the driving transistor Md. The power supply voltage writing module 11 can be used to control the electrical connection between the first power supply voltage PVDD on the first power signal line DL1 and the first pole of the driving transistor Md.

[0061] The input terminal of the gate reset module 14 is electrically connected to the second reset voltage signal line SL2, and the output terminal is electrically connected to the gate of the driving transistor Md. The gate reset module 14 is used to transmit the second reset voltage VREF2 on the second reset voltage signal line SL2 to the gate of the driving transistor Md to reset the gate of the driving transistor Md.

[0062] The input terminal of the data writing module 15 is electrically connected to the data signal line DL3, and the output terminal is electrically connected to the first pole of the driving transistor Md. The data writing module 15 is used to transmit the data voltage Vdata on the data signal line DL3 to the driving transistor Md.

[0063] The input terminal of the threshold capture module 16 is electrically connected to the second electrode of the driving transistor Md, and the output terminal is electrically connected to the gate of the driving transistor Md. The threshold capture module 16 is used to capture the threshold voltage of the driving transistor Md to the gate of the driving transistor Md.

[0064] The non-light-emitting phase of the pixel circuit 10 includes a reset phase and a data writing phase. That is, one working cycle of the pixel circuit 10 can include a reset phase, a data writing phase and a light-emitting phase. The data writing phase is performed after the reset phase and before the light-emitting phase. The anode reset module 13 can be turned on during the reset phase or during the data writing phase.

[0065] For example, please continue to refer to Figure 2 The power supply voltage writing module 11 includes a power supply voltage writing transistor M1. The first terminal of the power supply voltage writing transistor M1 is electrically connected to the first power signal line DL1, the second terminal is electrically connected to the first terminal of the driving transistor Md, and the gate is electrically connected to the light emission control signal line EM.

[0066] The data writing module 15 includes a data writing transistor M5, the first terminal of which is electrically connected to the data signal line DL3, the second terminal of which is electrically connected to the first terminal of the driving transistor Md, and the gate of which is electrically connected to the first scan line S1.

[0067] The threshold grasping module 16 includes a threshold grasping transistor M6, the first terminal of the threshold grasping transistor M6 is electrically connected to the second terminal of the driving transistor Md, the second terminal is electrically connected to the gate of the driving transistor Md, and the gate is electrically connected to the first scan line S1.

[0068] The gate reset module 14 includes a gate reset transistor M4. The first terminal of the gate reset transistor M4 is electrically connected to the second reset voltage signal line SL2, the second terminal is electrically connected to the gate of the driving transistor Md, and the gate is electrically connected to the second scan line S2.

[0069] In addition, the gate of the light-emitting control transistor M2 can be electrically connected to the light-emitting control signal line EM, and the gate of the anode reset transistor M3 can be electrically connected to the first scan line S1.

[0070] Combination Figure 3 As shown, Figure 3 for Figure 2 The diagram shows a timing diagram of a pixel circuit. One working cycle of the pixel circuit 10 includes a reset phase t1, a data writing phase t2, and a light emission phase t3 performed sequentially.

[0071] During the reset phase t1, the second scan line S2 transmits an enable signal (such as a low-level signal) to control the gate reset transistor M4 to turn on. The second reset voltage VREF2 on the second reset voltage signal line SL2 is transmitted to the gate of the driving transistor Md through the turned-on gate reset transistor M4 to reset the gate of the driving transistor Md.

[0072] During the data writing phase t2, the first scan line S1 transmits an enable signal (e.g., a low-level signal) to control the data writing transistor M5 and the threshold grabbing transistor M6 to turn on. The data voltage Vdata on the data signal line DL3 is transmitted to the first terminal of the driving transistor Md through the turned-on data writing transistor M5. At this time, since the gate potential of the driving transistor Md is the second reset voltage VREF, the driving transistor Md is turned on, and the data voltage Vdata is transmitted to the gate of the driving transistor Md through the turned-on driving transistor Md and the threshold grabbing transistor M6.

[0073] Simultaneously, the enable signal transmitted by the first scan line S1 controls the anode reset transistor M3 to turn on, and the first reset voltage VREF1 on the first reset signal line SL1 is transmitted to the anode of the light-emitting device 20 through the compensation transistor Mt and the anode reset transistor M3 to reset the anode of the light-emitting device 20.

[0074] During the light-emitting stage t3, the light-emitting control signal line EM transmits an enable signal (such as a low-level signal) to control the power supply voltage to turn on the transistor M1 and the light-emitting control transistor M2, driving the transistor Md to generate a light-emitting driving current, which is transmitted to the anode of the light-emitting device 20 through the light-emitting control transistor M2, driving the light-emitting device 20 to emit light.

[0075] It should be noted that since the gate of the compensation transistor Mt is electrically connected to its first or second terminal, the source and drain of the compensation transistor Mt can be determined according to the channel type of the compensation transistor Mt, thereby setting the gate of the compensation transistor Mt to be electrically connected to its drain (the first or second terminal of the compensation transistor Mt) so that it operates in the saturation region.

[0076] Figure 4This is a schematic diagram of another pixel circuit provided in an embodiment of this application.

[0077] In one embodiment of this application, such as Figure 2 or Figure 4 As shown, the first terminal of the compensation transistor Mt is electrically connected to the first reset voltage signal line SL1, and the second terminal of the compensation transistor Mt is electrically connected to the first terminal of the anode reset transistor M3.

[0078] Among them, such as Figure 2 As shown, the compensation transistor Mt is a P-type transistor, and its gate is electrically connected to the first reset voltage signal line SL1. That is, the gate of the compensation transistor Mt is electrically connected to its first electrode.

[0079] Or such as Figure 4 As shown, the compensation transistor Mt is an N-type transistor, and its gate is electrically connected to the first terminal of the anode reset transistor M3. That is, the gate of the compensation transistor Mt is electrically connected to its second terminal.

[0080] Since the first reset voltage signal line SL1 transmits the first reset voltage VREF1, and the potential of the first reset voltage VREF1 is less than 0V, the first terminal of the compensation transistor Mt receives a relatively fixed low potential signal. However, when the anode reset transistor M3 is turned on, the second terminal of the compensation transistor Mt will be connected to the first node N1. At this time, the first node N1 maintains a higher potential from the previous stage, thereby pulling up the potential of the second terminal of the compensation transistor Mt, making the potential of the second terminal of the compensation transistor Mt higher than the potential of the first terminal of the compensation transistor Mt.

[0081] When the compensation transistor Mt is a P-type transistor, the second terminal of the compensation transistor Mt with a higher potential is its source, and the first terminal of the compensation transistor Mt with a lower potential is its drain. At this time, if the gate of the compensation transistor Mt is electrically connected to the first terminal of the compensation transistor Mt with a lower potential, the compensation transistor Mt can be turned on during the anode reset transistor M3 turn-on stage (i.e., during the data writing stage of the pixel circuit 10) until the voltage difference between the gate and the second terminal of the compensation transistor Mt is equal to the threshold voltage of the compensation transistor Mt, then the compensation transistor Mt is turned off.

[0082] When the compensation transistor Mt is an N-type transistor, the first terminal of the compensation transistor Mt with a lower potential is its source, and the second terminal of the compensation transistor Mt with a higher potential is its drain. At this time, by electrically connecting the gate of the compensation transistor Mt to the second terminal of the compensation transistor Mt with a higher potential, the compensation transistor Mt can be turned on during the anode reset transistor M3 turn-on stage (i.e., during the data writing stage of the pixel circuit 10) until the voltage difference between the gate of the compensation transistor Mt and its first terminal is equal to the threshold voltage of the compensation transistor Mt, at which point the compensation transistor Mt is turned off.

[0083] In this embodiment of the application, while ensuring that the compensation transistor Mt is turned on normally, the channel type of the compensation transistor Mt can be flexibly set, which is beneficial to improving the structural diversity of the pixel circuit 10.

[0084] Figure 5 This is a schematic diagram of the film layer of a pixel circuit and a light-emitting device provided in an embodiment of this application. Figure 6 This is a schematic diagram of another pixel circuit provided in an embodiment of this application.

[0085] In one embodiment of this application, such as Figure 5 As shown, the light-emitting device 20 includes an anode 21, a light-emitting layer 22, and a cathode 23. The light-emitting layer 22 is located between the anode 21 and the cathode 23. The pixel circuit 10 is electrically connected to the anode 21 of the light-emitting device 20.

[0086] Combination Figure 6 As shown, the anode 21 of the light-emitting device 20 is electrically connected to the first node N1, and the cathode of the light-emitting device 20 is electrically connected to the second power signal line DL2. The second power signal line DL2 is used to transmit the second power supply voltage PVEE.

[0087] The first reset voltage signal line SL1 is electrically connected to the second power supply signal line DL2.

[0088] In other words, the first reset voltage VREF1 on the first reset voltage signal line SL1 can be the second power supply voltage PVEE transmitted on the second power supply signal line DL2.

[0089] In this embodiment, by electrically connecting the first reset voltage signal line SL1 to the second power signal line DL2, the second power signal line DL2 can be reused as the first reset voltage signal line SL1. The anode of the light-emitting device 20 is reset using the second power voltage PVEE on the second power signal line DL2, thus eliminating the need to set an additional reset voltage for resetting the anode of the light-emitting device 20, which helps to reduce the complexity of the pixel circuit 10.

[0090] In addition, such as Figure 2 As shown, the first reset voltage signal line SL1 and the second power signal line DL2 can also be independent of each other. Thus, the first reset voltage signal line SL1 and the second power signal line DL2 can transmit different voltages, allowing the voltage of the first reset voltage signal line SL1 to be flexibly set according to factors such as the anode reset requirements of the light-emitting device 20 and power consumption.

[0091] Figure 7 This is a schematic diagram of another pixel circuit provided in an embodiment of this application.

[0092] like Figure 7As shown, in one embodiment of this application, the pixel circuit 10 further includes a gate reset transistor M4. The first terminal of the gate reset transistor M4 is electrically connected to the second reset voltage signal line SL2, and the second terminal is electrically connected to the gate of the driving transistor Md. The gate reset transistor M4 is used to transmit the second reset voltage VREF2 on the second reset voltage signal line SL2 to the gate of the driving transistor Md to reset the gate of the driving transistor Md.

[0093] The first reset voltage signal line SL1 is electrically connected to the second reset voltage signal line SL2.

[0094] In other words, the second reset voltage VREF2 on the second reset voltage signal line SL2 can be reused as the first reset voltage VREF1 on the first reset voltage signal line SL1.

[0095] In this embodiment, by electrically connecting the first reset voltage signal line SL1 and the second reset voltage signal line SL2, the second reset voltage signal line SL2 can be reused as the first reset voltage signal line SL1. The anode of the light-emitting device 20 is reset using the second reset voltage VREF2 on the second reset voltage signal line SL2, thus eliminating the need to set an additional reset voltage for resetting the anode of the light-emitting device 20, which helps to reduce the complexity of the pixel circuit 10.

[0096] In addition, such as Figure 2 As shown, the first reset voltage signal line SL1 and the second reset voltage signal line SL2 can also be independent of each other. In this way, the first reset voltage signal line SL1 and the second reset voltage signal line SL2 can transmit different voltages, so that the anode of the light-emitting device 20 and the gate of the driving transistor Md can be reset in a targeted manner.

[0097] Figure 8 This is a schematic diagram of a compensation transistor provided in an embodiment of this application. Figure 9 This is a schematic diagram of another pixel circuit provided in an embodiment of this application.

[0098] In one embodiment of this application, combined with Figure 8 and Figure 9 As shown, the gate of the compensation transistor Mt includes a first gate G1 and a second gate G2. The first gate G1 and the second gate G2 are located on opposite sides of the channel GD of the compensation transistor Mt. The first gate G1 can be the top gate of the compensation transistor Mt, and the second gate G2 can be the bottom gate of the compensation transistor Mt.

[0099] The first gate G1 is electrically connected to the first reset voltage signal line SL1, and the second gate G2 is electrically connected to the bias adjustment signal line DL4.

[0100] In this embodiment, the compensation transistor Mt includes a first gate G1 and a second gate G2 located on both sides of the channel, i.e., the compensation transistor Mt is a top-bottom dual-gate structure. The threshold voltage of the compensation transistor Mt can be adjusted by applying voltage to the first gate G1 and the second gate G2. This allows for flexible adjustment of the potential of the first reset voltage VREF1 transmitted to the first node N1 after passing through the compensation transistor Mt, according to actual needs, thereby adjusting the charging current of the light-emitting device 20 so that the brightness of the light-emitting device 20 meets the requirements.

[0101] It should be noted that the switching state of the compensation transistor Mt is mainly controlled by the potential of the first gate G1, while the voltage received by the second gate G2 is mainly used to control the bias of the compensation transistor Mt and adjust the threshold voltage of the compensation transistor Mt.

[0102] Optional, such as Figure 9 As shown, the bias adjustment signal line DL4 transmits the first voltage VH1, and the potential of the first voltage VH1 is DH1, -5V≤DH1≤-2V. That is, the second gate G2 of the compensation transistor Mt receives the first voltage VH1, and the first voltage VH1 is a negative voltage.

[0103] Based on the characteristics of transistors, by having the second gate G2 (bottom gate) of the compensation transistor Mt receive a negative voltage, the absolute value of the threshold voltage of the compensation transistor Mt can be reduced. Therefore, as the temperature rises, it is beneficial to make the absolute value of the threshold voltage of the compensation transistor Mt smaller at high temperatures.

[0104] During the turn-on phase of the anode reset transistor M3, the first node N1 and the second terminal of the compensation transistor Mt are connected. The high potential maintained by the first node N1 in the previous phase will pull up the potential of the second terminal of the compensation transistor Mt, causing the compensation transistor Mt to conduct. The first reset voltage VREF1 can be transmitted to the first node N1 through the compensation transistor Mt and the anode reset transistor M3. Since the absolute value of the threshold voltage of the compensation transistor Mt becomes smaller at high temperatures, it can be seen from the above formula V2=V1+|Vth| that the potential V2 of the second terminal of the compensation transistor Mt will also become smaller. This will make the potential of the first node N1 even lower, which is beneficial to further improve the compensation effect on the problem of increased potential of the first node N1 caused by the increased light-emitting driving current generated by the driving transistor Md. This is beneficial to further improve the high-temperature color shift problem caused by the increased brightness of the light-emitting device 20.

[0105] Figure 10 This is a schematic diagram of another pixel circuit provided in an embodiment of this application.

[0106] In one embodiment of this application, such as Figure 10As shown, the bias adjustment signal line DL4 is electrically connected to the first reset voltage signal line SL1. That is, the second gate G2 receives the same voltage as the first gate G1. Since the first reset voltage signal line SL1 can transmit negative voltage, the second gate G2 can receive negative voltage.

[0107] Based on this configuration, the embodiments of this application can further improve the high-temperature color shift problem without the need to set an additional voltage for the second gate G2 of the compensation transistor Mt, which helps to reduce the complexity of the pixel circuit 10. Figure 11 This is a schematic diagram of another pixel circuit provided in an embodiment of this application.

[0108] In one embodiment of this application, such as Figure 11 As shown, the pixel circuit 10 includes a gate reset transistor M4. The first terminal of the gate reset transistor M4 is electrically connected to the second reset voltage signal line SL2, and the second terminal is electrically connected to the gate of the driving transistor Md. The gate reset transistor M4 is used to transmit the second reset voltage VREF2 on the second reset voltage signal line SL2 to the gate of the driving transistor Md, thereby resetting the gate of the driving transistor Md. The potential of the second reset voltage VREF2 can be less than 0V.

[0109] Combination Figure 5 As shown, the light-emitting device 20 includes an anode 21, a light-emitting layer 22, and a cathode 23. The light-emitting layer 22 is located between the anode 21 and the cathode 23. The anode 21 of the light-emitting device 20 is electrically connected to the first node N1, and the cathode 23 of the light-emitting device 20 is electrically connected to the second power signal line DL2. The second power signal line DL2 is used to transmit the second power supply voltage PVEE.

[0110] The first reset voltage signal line SL1 is electrically connected to the second power supply signal line DL2, and the bias adjustment signal line DL4 is electrically connected to the second reset voltage signal line SL2.

[0111] In this embodiment, since the voltage transmitted by the second reset voltage signal line SL2 is negative, the second gate G2 of the compensation transistor Mt receives a negative voltage. As can be seen from the above analysis, this is beneficial to make the absolute value of the threshold voltage of the compensation transistor Mt smaller, thereby improving the effect of improving the high temperature color shift problem caused by the increase in brightness of the light-emitting device 20.

[0112] Meanwhile, by electrically connecting the first reset voltage signal line SL1 to the second power signal line DL2, the second power signal line DL2 can be reused as the first reset voltage signal line SL1. The anode 21 of the light-emitting device 20 can be reset using the second power supply voltage PVEE on the second power signal line DL2, thus eliminating the need to set an additional reset voltage for resetting the anode 21 of the light-emitting device 20.

[0113] By electrically connecting the bias adjustment signal line DL4 to the second reset voltage signal line SL2, the second reset voltage signal line SL2 can be reused as the bias adjustment signal line DL4. This allows the second gate G2 of the compensation transistor Mt to receive the second reset voltage VREF2, eliminating the need to set an additional voltage for the second gate G2 of the compensation transistor Mt. This significantly reduces the complexity of the pixel circuit 10.

[0114] Figure 12 This is a schematic diagram of another pixel circuit provided in an embodiment of this application.

[0115] In one embodiment of this application, such as Figure 12 As shown, the pixel circuit 10 includes a gate reset transistor M4. The first terminal of the gate reset transistor M4 is electrically connected to the second reset voltage signal line SL2, and the second terminal is electrically connected to the gate of the driving transistor Md. The gate reset transistor M4 is used to transmit the second reset voltage VREF2 on the second reset voltage signal line SL2 to the gate of the driving transistor Md, thereby resetting the gate of the driving transistor Md. The potential of the second reset voltage VREF2 can be less than 0V.

[0116] Combination Figure 5 As shown, the light-emitting device 20 includes an anode 21, a light-emitting layer 22, and a cathode 23. The light-emitting layer 22 is located between the anode 21 and the cathode 23. The anode 21 of the light-emitting device 20 is electrically connected to the first node N1, and the cathode 23 of the light-emitting device 20 is electrically connected to the second power signal line DL2. The second power signal line DL2 is used to transmit the second power supply voltage PVEE.

[0117] The first reset voltage signal line SL1 is electrically connected to the second reset voltage signal line SL2, and the bias adjustment signal line DL4 is electrically connected to the second power supply signal line DL2.

[0118] In this embodiment, since the voltage transmitted by the second power signal line DL2 is negative, the second gate G2 of the compensation transistor Mt receives a negative voltage. As can be seen from the above analysis, this is beneficial to make the absolute value of the threshold voltage of the compensation transistor Mt smaller, thereby improving the effect of improving the high temperature color shift problem caused by the increase in brightness of the light-emitting device 20.

[0119] Meanwhile, by electrically connecting the first reset voltage signal line SL1 and the second reset voltage signal line SL2, the second reset voltage signal line SL2 can be reused as the first reset voltage signal line SL1. The anode 21 of the light-emitting device 20 can be reset using the second reset voltage VREF2 on the second reset voltage signal line SL2, thus eliminating the need to set an additional reset voltage for resetting the anode 21 of the light-emitting device 20.

[0120] By electrically connecting the bias adjustment signal line DL4 to the second power supply signal line DL2, the second power supply signal line DL2 can be reused as the bias adjustment signal line DL4. This allows the second gate G2 of the compensation transistor Mt to receive the second power supply voltage PVEE, eliminating the need to set an additional voltage for the second gate G2 of the compensation transistor Mt. This significantly reduces the complexity of the pixel circuit 10.

[0121] Figure 13 This is a schematic diagram of another pixel circuit provided in an embodiment of this application.

[0122] like Figure 13 As shown, in one embodiment of this application, the bias adjustment signal line DL4 transmits a second voltage VH2, the potential of the second voltage VH2 is DH2, and 2V≤DH2≤7V. That is, the second gate G2 of the threshold compensation transistor Mt receives a positive voltage.

[0123] The inventors of this application have discovered through research that, in related technologies, when the light-emitting device 20 is in a low grayscale display, the charging current of the light-emitting device 20 is small and prone to fluctuation, resulting in poor brightness uniformity among different light-emitting devices 20.

[0124] In view of this, in the embodiments of this application, the second gate G2 of the compensation transistor Mt is configured to receive a positive voltage, so that the absolute value of the threshold voltage of the compensation transistor Mt can be increased according to the characteristics of the transistor.

[0125] During the turn-on phase of the anode reset transistor M3, the first node N1 and the second terminal of the compensation transistor Mt are connected. The high potential maintained by the first node N1 in the previous phase will pull up the potential of the second terminal of the compensation transistor Mt, causing the compensation transistor Mt to conduct. The first reset voltage VREF1 can be transmitted to the first node N1 through the compensation transistor Mt and the anode reset transistor M3. Since the second gate G2 of the compensation transistor Mt receives a positive voltage, the absolute value of the threshold voltage of the compensation transistor Mt increases. Therefore, according to the above formula V2=V1+|Vth|, the potential V2 of the second terminal of the compensation transistor Mt will also become larger. This can raise the potential of the first node N1 relative to related technologies, which is beneficial to make the pre-charging of the light-emitting device 20 more sufficient, increase the brightness of the light-emitting device 20, and thus help improve the brightness uniformity problem of different light-emitting devices 20 at low gray levels.

[0126] For example, taking the first reset voltage VREF1 as -2.7V and the initial threshold voltage of the compensation transistor Mt as -0.7V, when the second gate G2 of the compensation transistor Mt is not connected to a positive voltage, the sum of the absolute values ​​of the first reset voltage VREF1 and the threshold voltage of the compensation transistor Mt is Vt3, Vt3 = -2.7V + |-0.7V| = -2V.

[0127] When the second gate G2 of the compensation transistor Mt receives a positive voltage, the absolute value of the threshold voltage of the compensation transistor Mt increases. Assuming that the threshold voltage of the compensation transistor Mt becomes -1.2V, the sum of the absolute value of the first reset voltage VREF1 and the threshold voltage of the compensation transistor Mt is Vt4, Vt4=-2.7V+|-1.2V|=-1.5V.

[0128] Therefore, when the second gate G2 of the compensation transistor Mt receives a positive voltage, the sum of the absolute values ​​of the first reset voltage VREF1 and the threshold voltage of the compensation transistor Mt will increase, thereby raising the second electrode potential of the compensation transistor Mt relative to related technologies, thereby raising the potential of the first node N1, increasing the brightness of the light-emitting device 20, and thus improving the brightness uniformity problem of different light-emitting devices 20 at low gray levels.

[0129] Figure 14 This is a schematic diagram of another pixel circuit provided in an embodiment of this application.

[0130] In one embodiment of this application, such as Figure 14 As shown, the bias adjustment signal line DL4 is electrically connected to the gate of the driving transistor Md.

[0131] As can be seen from the operation of the aforementioned pixel circuit 10, in the data writing stage t2 before the light emission stage t3, the data voltage Vdata is written to the gate of the driving transistor Md. The data voltage Vdata is usually positive, that is, the potential of the gate of the driving transistor Md in the data writing stage t2 is positive.

[0132] Therefore, in this embodiment of the application, the bias adjustment signal line DL4 is electrically connected to the gate of the driving transistor Md. Then, during the data writing stage t2, the second gate G2 of the compensation transistor Mt receives a positive voltage, and the absolute value of the threshold voltage of the compensation transistor Mt increases. As can be seen from the above formula V2=V1+|Vth|, when the first reset voltage VREF1 is transmitted to the first node N1 through the compensation transistor Mt and the anode reset transistor M3, it can raise the potential of the first node N1 relative to the related technology, thereby improving the brightness uniformity problem of different light-emitting devices 20 at low gray levels.

[0133] Furthermore, by electrically connecting the bias adjustment signal line DL4 to the gate of the driving transistor Md, there is no need to provide additional voltage to the second gate G2 of the compensation transistor Mt, which helps to reduce the complexity of the pixel circuit 10.

[0134] Figure 15 This is a schematic diagram of another pixel circuit provided in an embodiment of this application.

[0135] like Figure 15As shown, in one embodiment of this application, the pixel circuit 10 includes a first threshold grabbing transistor M61 and a second threshold grabbing transistor M62. The first terminal of the first threshold grabbing transistor M61 is electrically connected to the second terminal of the driving transistor Md and the second terminal is electrically connected to the second node N2. The first terminal of the second threshold grabbing transistor M62 is electrically connected to the second node N2 and the second terminal is electrically connected to the gate of the driving transistor Md.

[0136] Among them, the bias adjustment signal line DL4 is electrically connected to the second node N2.

[0137] As can be seen from the working process of the aforementioned pixel circuit 10, during the data writing stage t2, the data voltage Vdata will be transmitted to the gate of the driving transistor Md through the threshold capture module 16, that is, the data voltage Vdata will be transmitted to the second node N2. Since the data voltage Vdata is usually positive, the potential of the second node N2 is positive.

[0138] In this embodiment, the bias adjustment signal line DL4 is electrically connected to the second node N2. During the data writing stage t2, the second gate G2 of the compensation transistor Mt receives a positive voltage, and the absolute value of the threshold voltage of the compensation transistor Mt increases. When the first reset voltage VREF1 is transmitted to the first node N1 through the compensation transistor Mt and the anode reset transistor M3, the potential of the first node N1 can be raised relative to the related technology, thereby improving the brightness uniformity problem of different light-emitting devices 20 at low gray levels.

[0139] Furthermore, by electrically connecting the bias adjustment signal line DL4 to the second node N2, there is no need to provide additional voltage to the second gate G2 of the compensation transistor Mt, which helps to reduce the complexity of the pixel circuit 10.

[0140] Figure 16 This is a schematic diagram of another pixel circuit provided in an embodiment of this application.

[0141] In one embodiment of this application, such as Figure 16 As shown, the bias adjustment signal line DL4 is electrically connected to the first power supply signal line DL1. That is, the bias adjustment signal line DL4 can transmit the first power supply voltage PVDD. Since the first power supply voltage PVDD is a positive voltage, the second gate G2 of the compensation transistor Mt receives the positive voltage.

[0142] Based on this configuration, while improving the brightness uniformity of different light-emitting devices 20 at low gray levels, the first power supply voltage PVDD can be reused as the connection voltage of the second gate G2 of the compensation transistor Mt, eliminating the need to provide an additional voltage for the second gate G2 of the compensation transistor Mt, which helps to reduce the complexity of the pixel circuit 10.

[0143] Figure 17This is a schematic diagram of another pixel circuit provided in an embodiment of this application.

[0144] like Figure 17 As shown, in one embodiment of this application, the bias adjustment signal line DL4 transmits a first voltage VH1 and a second voltage VH2 in a time-division multiplexing manner. The potential of the first voltage VH1 is DH1, -5V≤DH1≤-2V. The potential of the second voltage VH2 is DH2, 2V≤DH2≤7V.

[0145] In other words, the second gate G2 of the compensation transistor Mt can receive the first voltage VH1 and the second voltage VH2 in a time-division manner, that is, the second gate G2 of the compensation transistor Mt can receive positive voltage and negative voltage in a time-division manner.

[0146] As the foregoing analysis shows, when the second gate G2 of the compensation transistor Mt receives a negative voltage, the absolute value of the threshold voltage of the compensation transistor Mt decreases, which can lower the potential of the first node N1 relative to the correlation technique for high-temperature color shift during the data writing phase t2. When the second gate G2 of the compensation transistor Mt receives a positive voltage, the absolute value of the threshold voltage of the compensation transistor Mt increases, which can raise the potential of the first node N1 relative to the correlation technique for poor uniformity of low grayscale brightness during the data writing phase t2.

[0147] In this embodiment, the bias adjustment signal line DL4 transmits the first voltage VH1 and the second voltage VH2 in a time-division manner. This allows the first voltage VH1, which has a negative potential, to be provided to the second gate G2 of the compensation transistor Mt at high temperatures. This reduces the potential of the first node N1 in the high-temperature environment, compensating for the increase in the potential of the first node N1 caused by the increase in the light-emitting driving current generated by the driving transistor Md at high temperatures. This improves the high-temperature color shift problem caused by the increased brightness of the light-emitting device 20.

[0148] When the light-emitting device 20 is displayed at a low grayscale, a second voltage V2 with a positive potential is provided to the second gate G2 of the compensation transistor Mt so that the potential of the first node N1 can be raised when the light-emitting device 20 is displayed at a low grayscale, thereby improving the brightness uniformity problem of different light-emitting devices 20 at low grayscale.

[0149] Figure 18 This is a schematic diagram of a display panel provided in an embodiment of this application.

[0150] like Figure 18 As shown, this application embodiment provides a display panel 01, which includes a pixel circuit 10 and a light-emitting device 20 as provided in the above embodiment.

[0151] In the display panel 01, if the gate of the compensation transistor Mt is electrically connected to the first or second terminal of the compensation transistor Mt, the compensation transistor Mt can be made to work in the saturation region, so that the threshold voltage of the compensation transistor Mt has a greater impact on the circuit loop in which the compensation transistor Mt is located.

[0152] With the compensation transistor Mt positioned between the first reset voltage signal line SL1 and the anode reset transistor M3, during the non-light-emitting phase, when the compensation transistor Mt and the anode reset transistor M3 are turned on, the potential transmitted from the first reset voltage VREF1 to the first node N1 will be affected by the threshold voltage of the compensation transistor Mt. Since the absolute value of the threshold voltage of the compensation transistor Mt decreases at high temperatures, it can be seen from the aforementioned formula V2=V1+|Vth| that the sum between the absolute values ​​of the first reset voltage VREF1 and the threshold voltage of the compensation transistor Mt will also decrease. This will lower the potential of the second electrode of the compensation transistor Mt, thereby lowering the potential of the first node N1. This is beneficial for compensating for the increase in the potential of the first node N1 caused by the increase in the light-emitting driving current generated by the driving transistor Md, and may even offset the increase in the potential of the first node N1 caused by the increase in the light-emitting driving current generated by the driving transistor Md. This will help reduce the charging current of the light-emitting device 20 and improve the high-temperature color shift problem caused by the increase in the brightness of the light-emitting device 20.

[0153] Figure 19 This is a schematic diagram of a display device provided in an embodiment of this application.

[0154] This application provides a display device 02, such as... Figure 19 As shown, the display device 02 includes the display panel 01 as provided in the above embodiments. Exemplarily, the display device 02 can be an electronic device such as a mobile phone, computer, television, vehicle display, or wearable display; this application does not impose any specific limitations.

[0155] In the display device 02, if the gate of the compensation transistor Mt is electrically connected to the first or second terminal of the compensation transistor Mt, the compensation transistor Mt can be made to work in the saturation region, so that the threshold voltage of the compensation transistor Mt has a greater impact on the circuit loop in which the compensation transistor Mt is located.

[0156] With the compensation transistor Mt positioned between the first reset voltage signal line SL1 and the anode reset transistor M3, during the non-light-emitting phase, when the compensation transistor Mt and the anode reset transistor M3 are turned on, the potential transmitted from the first reset voltage VREF1 to the first node N1 will be affected by the threshold voltage of the compensation transistor Mt. Since the absolute value of the threshold voltage of the compensation transistor Mt decreases at high temperatures, it can be seen from the aforementioned formula V2=V1+|Vth| that the sum between the absolute values ​​of the first reset voltage VREF1 and the threshold voltage of the compensation transistor Mt will also decrease. This will lower the potential of the second electrode of the compensation transistor Mt, thereby lowering the potential of the first node N1. This is beneficial for compensating for the increase in the potential of the first node N1 caused by the increase in the light-emitting driving current generated by the driving transistor Md, and may even offset the increase in the potential of the first node N1 caused by the increase in the light-emitting driving current generated by the driving transistor Md. This will help reduce the charging current of the light-emitting device 20 and improve the high-temperature color shift problem caused by the increase in the brightness of the light-emitting device 20.

[0157] The above description is merely a preferred embodiment of this application and is not intended to limit this application. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the scope of protection of this application.

Claims

1. A pixel circuit, characterized in that, The pixel circuit, used in a display panel, is electrically connected to a light-emitting device, and includes: A driving transistor, the first terminal of which is electrically connected to the first power signal line; A light-emitting control transistor, wherein the first terminal of the light-emitting control transistor is electrically connected to the second terminal of the driving transistor, the second terminal is electrically connected to a first node, and the first node is electrically connected to the light-emitting device; An anode reset transistor, wherein the first terminal of the anode reset transistor is coupled to a first reset voltage signal line and the second terminal is electrically connected to the first node; A compensation transistor, wherein the first terminal of the compensation transistor is electrically connected to the first reset voltage signal line, the second terminal of the compensation transistor is electrically connected to the first terminal of the anode reset transistor, and the gate of the compensation transistor is electrically connected to either the first or second terminal of the compensation transistor; The pixel circuit has a working cycle that includes a non-light-emitting phase and a light-emitting phase. The compensation transistor and the anode reset transistor are turned on in at least a portion of the non-light-emitting phase, and the anode reset transistor is turned off in the light-emitting phase.

2. The pixel circuit according to claim 1, characterized in that, The first reset voltage signal line transmits the first reset voltage, and the potential of the first reset voltage is less than 0V.

3. The pixel circuit according to claim 1, characterized in that, The compensation transistor is a P-type transistor, and the gate of the compensation transistor is electrically connected to the first reset voltage signal line. Alternatively, the compensation transistor is an N-type transistor, and the gate of the compensation transistor is electrically connected to the first electrode of the anode reset transistor.

4. The pixel circuit according to claim 3, characterized in that, The light-emitting device includes an anode, a light-emitting layer, and a cathode. The light-emitting layer is located between the anode and the cathode. The anode of the light-emitting device is electrically connected to the first node, and the cathode of the light-emitting device is electrically connected to the second power signal line. The first reset voltage signal line is electrically connected to the second power supply signal line.

5. The pixel circuit according to claim 3, characterized in that, The pixel circuit further includes a gate reset transistor, wherein the first terminal of the gate reset transistor is electrically connected to the second reset voltage signal line, and the second terminal is electrically connected to the gate of the driving transistor. The first reset voltage signal line is electrically connected to the second reset voltage signal line.

6. The pixel circuit according to claim 3, characterized in that, The pixel circuit also includes a gate reset transistor, wherein the first terminal of the gate reset transistor is electrically connected to the second reset voltage signal line, and the second terminal is electrically connected to the gate of the driving transistor. The first reset voltage signal line and the second reset voltage signal line are independent of each other.

7. The pixel circuit according to claim 2, characterized in that, The gate of the compensation transistor includes a first gate and a second gate, which are located on opposite sides of the channel of the compensation transistor. The first gate is electrically connected to the first reset voltage signal line, and the second gate is electrically connected to the bias adjustment signal line.

8. The pixel circuit according to claim 7, characterized in that, The bias adjustment signal line transmits a first voltage, the potential of which is DH1, -5V≤DH1≤-2V.

9. The pixel circuit according to claim 7, characterized in that, The bias adjustment signal line is electrically connected to the first reset voltage signal line.

10. The pixel circuit according to claim 7, characterized in that, The pixel circuit further includes a gate reset transistor, wherein the first terminal of the gate reset transistor is electrically connected to the second reset voltage signal line, and the second terminal is electrically connected to the gate of the driving transistor. The light-emitting device includes an anode, a light-emitting layer, and a cathode. The light-emitting layer is located between the anode and the cathode. The anode of the light-emitting device is electrically connected to the first node, and the cathode of the light-emitting device is electrically connected to the second power signal line. The first reset voltage signal line is electrically connected to the second power supply signal line, and the bias adjustment signal line is electrically connected to the second reset voltage signal line.

11. The pixel circuit according to claim 7, characterized in that, The pixel circuit further includes a gate reset transistor, wherein the first terminal of the gate reset transistor is electrically connected to the second reset voltage signal line, and the second terminal is electrically connected to the gate of the driving transistor. The light-emitting device includes an anode, a light-emitting layer, and a cathode. The light-emitting layer is located between the anode and the cathode. The anode of the light-emitting device is electrically connected to the first node, and the cathode of the light-emitting device is electrically connected to the second power signal line. The first reset voltage signal line is electrically connected to the second reset voltage signal line, and the bias adjustment signal line is electrically connected to the second power supply signal line.

12. The pixel circuit according to claim 7, characterized in that, The bias adjustment signal line transmits a second voltage, the potential of which is DH2, and 2V≤DH2≤7V.

13. The pixel circuit according to claim 7, characterized in that, The bias adjustment signal line is electrically connected to the gate of the driving transistor.

14. The pixel circuit according to claim 7, characterized in that, The pixel circuit includes a first threshold grabbing transistor and a second threshold grabbing transistor. The first terminal of the first threshold grabbing transistor is electrically connected to the second terminal of the driving transistor and the second terminal is electrically connected to the second node. The first terminal of the second threshold grabbing transistor is electrically connected to the second node and the second terminal is electrically connected to the gate of the driving transistor. The bias adjustment signal line is electrically connected to the second node.

15. The pixel circuit according to claim 7, characterized in that, The bias adjustment signal line is electrically connected to the first power signal line.

16. The pixel circuit according to claim 7, characterized in that, The bias adjustment signal line transmits a first voltage and a second voltage in a time-division multiplexing manner. The potential of the first voltage is DH1, -5V≤DH1≤-2V; the potential of the second voltage is DH2, 2V≤DH2≤7V.

17. The pixel circuit according to claim 1, characterized in that, The pixel circuit also includes; A power supply voltage writing transistor is provided, wherein the first terminal of the power supply voltage writing transistor is electrically connected to the first power supply signal line, the second terminal is electrically connected to the first terminal of the driving transistor, and the gate is electrically connected to the light emission control signal line. A data writing transistor, wherein the first electrode of the data writing transistor is electrically connected to the data signal line, the second electrode is electrically connected to the first electrode of the driving transistor, and the gate is electrically connected to the first scan line; A threshold grabbing transistor, wherein the first terminal of the threshold grabbing transistor is electrically connected to the second terminal of the driving transistor, the second terminal is electrically connected to the gate of the driving transistor, and the gate is electrically connected to the first scan line; A gate reset transistor, wherein the first terminal of the gate reset transistor is electrically connected to the second reset voltage signal line, the second terminal is electrically connected to the gate of the driving transistor, and the gate is electrically connected to the second scan line; The gate of the light-emitting control transistor is electrically connected to the light-emitting control signal line, and the gate of the anode reset transistor is electrically connected to the first scan line.

18. A display panel, characterized in that, Includes the pixel circuit as described in any one of claims 1-17.

19. A display device, characterized in that, Includes the display panel as described in claim 18.

Images