Sampling method, sampling device and switching power supply
By performing multiple attenuations and conversions on the voltage under test and adjusting the attenuation ratio, the sampling accuracy problem over a wide voltage range was solved, achieving high-precision sampling across the entire range, simplifying circuit design and reducing errors.
Patent Information
- Application Number
- CN202511275668.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-09-08
- Publication Date
- 2026-01-16
AI Technical Summary
Existing sampling schemes over a wide voltage range suffer from large accuracy errors and high costs, especially in the low voltage range where accuracy is too poor. Furthermore, increasing the ADC resolution will increase costs and design complexity.
By attenuating and converting the voltage under test multiple times and adjusting the attenuation ratio using digital signals, the quantization error is kept consistent across the entire voltage range, avoiding the use of high-precision ADC devices and achieving high-precision sampling with a simple circuit.
Without increasing cost or complexity, high-precision sampling across the entire range is achieved, reducing errors in the low-voltage range, improving sampling accuracy and ripple ratio, and simplifying circuit design.
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Figure CN121356584A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of power converter control, and in particular to a sampling method, sampling device, and switching power supply. Background Technology
[0002] With the development of power electronics technology, high-voltage power supplies have been widely used in industries such as manufacturing, defense, and medicine. However, the problems that have arisen are becoming increasingly prominent. Voltage display often uses analog-to-digital (ADC) sampling followed by data transmission to an MCU controller, which then sends the data to the display unit. Similarly, in digital control, the acquisition of analog signals also relies on ADC sampling, with the obtained data used for digital control. However, the number of bits in ADC sampling is limited; currently, the mainstream bit depths are mostly concentrated in 12-bit, 16-bit, 20-bit, and 24-bit. The input voltage range of ADC units is typically 3.3V, 5V, ±5V, and 10V.
[0003] The wide range of output voltage requirements in customer applications is driving power supply manufacturers to develop products with increasingly wider output ranges. For example, a switching power supply with a rated output of 1000V needs to guarantee an output range of 10V-1000V. Within this range, the promised performance meets the specifications. If a 12-bit ADC device is used, its effective resolution is 10 bits. Therefore, within the full-scale range, the change in the digital value of an ADC represents a fluctuation in the analog voltage of 1000V / 1024 = 0.97656V. At 1000V, the accuracy error caused by quantization error is (1000 / 1024) / 1000 = 1 / 1024. However, at a rated output of 10V, the quantization error is (1000 / 1024) / 10 = 100 / 1024, a difference of 100 times in accuracy error. At the same time, the ripple ratio also increases by 100 times.
[0004] For devices with a wide output voltage range, the greater the difference between the upper and lower output voltage limits, the greater the relative error between high and low output voltage conditions. The accuracy is worst and the performance is most difficult to achieve under the lower output voltage condition, affecting the usability of the sampled signal. The traditional solution is to increase the effective resolution of the ADC, switching to a 16-bit ADC or a higher resolution ADC device. However, this increases cost, reduces product competitiveness, and increases design complexity. Summary of the Invention
[0005] Therefore, the technical problem to be solved by the present invention is to provide a sampling method, sampling device and switching power supply that can achieve high-precision sampling across the entire range when the voltage to be measured is within a wide voltage range.
[0006] As a first aspect of the present invention, the technical solution of the sampling method provided is as follows:
[0007] A sampling method is used to acquire a digital signal characterizing the magnitude of a voltage to be measured, wherein the voltage to be measured is greater than or equal to a first preset value and less than or equal to a second preset value, wherein the sampling method includes the following steps:
[0008] The voltage to be measured is attenuated into a first voltage signal according to a first attenuation ratio;
[0009] Convert the first voltage signal into a first digital signal;
[0010] A second attenuation ratio is generated based on the first digital signal;
[0011] The voltage to be measured is attenuated into a second voltage signal according to a second attenuation ratio;
[0012] The second voltage signal is converted into a second digital signal, which is the digital signal representing the magnitude of the voltage to be measured.
[0013] Wherein: when the voltage to be measured is a second set value, the second attenuation ratio is a set attenuation ratio, and the second voltage signal after the voltage to be measured is attenuated by the set second attenuation ratio is the second voltage signal reference value; when the voltage to be measured is other voltage values, the second voltage signal after each voltage to be measured is attenuated by the corresponding second attenuation ratio tends to the second voltage signal reference value.
[0014] Furthermore, generating a second attenuation ratio based on the first digital signal includes:
[0015] Estimate the current voltage to be measured based on the first digital signal;
[0016] Calculate the adjustment factor K according to the following formula;
[0017] V02×K0=V0×R1 / (R1+R0*(1-K / N));
[0018] Wherein: V02 is the second set value; K0 is the set second attenuation ratio; V0 is the estimated voltage obtained by estimating the current voltage to be measured based on the first digital signal; R1 and R0 are set constants; K is an adjustment coefficient; N is a set value, and N is a natural number greater than 1;
[0019] The second attenuation ratio is generated based on the calculated adjustment coefficient K, and the second attenuation ratio is equal to R1 / (R1+R0*(1-K / N)).
[0020] As a second aspect of the present invention, the technical solution of the provided sampling device is as follows:
[0021] A sampling device is used to acquire a digital signal characterizing the magnitude of a voltage to be measured, wherein the voltage to be measured is greater than or equal to a first preset value and less than or equal to a second preset value, wherein the sampling device includes the following units:
[0022] The first voltage attenuation unit is used to attenuate the voltage to be measured into a first voltage signal according to a first attenuation ratio;
[0023] The first analog-to-digital converter is used to convert the first voltage signal into a first digital signal;
[0024] The second attenuation ratio generation unit is used to generate a second attenuation ratio based on the first digital signal;
[0025] The second voltage attenuation unit is used to attenuate the voltage to be measured into a second voltage signal according to a second attenuation ratio;
[0026] The second analog-to-digital converter is used to convert the second voltage signal into a second digital signal, which is the digital signal representing the magnitude of the voltage to be measured.
[0027] Wherein: when the voltage to be measured is a second set value, the second attenuation ratio is a set attenuation ratio, and the second voltage signal after the voltage to be measured is attenuated by the set second attenuation ratio is the second voltage signal reference value; when the voltage to be measured is other voltage values, the second voltage signal after each voltage to be measured is attenuated by the corresponding second attenuation ratio tends to the second voltage signal reference value.
[0028] Preferably, the first voltage attenuation unit includes resistor R3 and resistor R4. One end of resistor R3 is used to connect to the voltage to be measured, and the other end is connected together with one end of resistor R4 to output the first voltage signal. The other end of resistor R4 is used to ground.
[0029] Preferably, the first analog-to-digital conversion unit includes a first ADC unit, wherein the first ADC unit receives the first voltage signal at its input terminal and outputs the first digital signal at its output terminal.
[0030] Preferably, the second attenuation ratio generation unit includes an MCU006 and a first DAC unit. The first input terminal of the MCU006 receives the first digital signal, the first input terminal of the first DAC unit receives the second voltage signal, the output terminal of the MCU006 is connected to the second input terminal of the first DAC unit, the output terminal of the first DAC unit is the output terminal of the second attenuation ratio generation unit, and the ground terminal of the first DAC unit is used for grounding.
[0031] Furthermore, the MCU006 generates an adjustment coefficient K based on the first digital signal using the following formula:
[0032] V02×K0=V0×R1 / (R1+R0*(1-K / N));
[0033] Wherein: V02 is the second set value; K0 is the set second attenuation ratio; V0 is the estimated voltage obtained by estimating the current voltage to be measured based on the first digital signal; R1 and R0 are set constants; N is a set value, and N is a natural number greater than 1;
[0034] The first DAC unit multiplies one-N of the second voltage signal by K and then outputs the result.
[0035] Preferably, the second voltage attenuation unit includes a resistor R0 and a resistor R1. One end of the resistor R0 is used to connect to the voltage to be measured, and the other end is connected together with one end of the resistor R1 to output the second voltage signal. The other end of the resistor R1 is connected to the output terminal of the second attenuation ratio generation unit.
[0036] Preferably, the second analog-to-digital conversion unit includes a second ADC unit. The second ADC unit receives the second voltage signal at its input terminal and outputs the second digital signal at its output terminal. The second digital signal is output to the second input terminal of the MCU006, and the MCU006 uses the second digital signal to perform digital control or display externally.
[0037] As a second aspect of the present invention, the technical solution of the provided switching power supply embodiment is as follows:
[0038] A switching power supply, wherein: it includes the sampling device described in any of the second aspects above.
[0039] Existing sampling schemes suffer from significant sampling errors in the low-voltage range due to the constant error ratio across the entire measurement range. This invention identifies the current voltage condition using a first digital signal and generates a second attenuation ratio. This ensures that the second voltage signal obtained when the voltage is not at its upper limit approaches the second voltage signal obtained when the voltage is at its upper limit, thereby guaranteeing a consistent quantization error ratio across the entire voltage range. This effectively ensures sampling accuracy without requiring a higher-precision ADC device. Specifically, the advantages are:
[0040] (1) The embodiments of the present invention can achieve equivalent accuracy across the entire range through a very simple circuit and digital control logic design. The equivalent accuracy is basically the same as the accuracy of the voltage under test under the upper limit condition, which solves the problem of poor accuracy of the voltage under test in the low voltage region over a wide voltage range.
[0041] (2) The specific implementation circuit of the present invention is simple and can be used in any scenario where voltage value needs to be detected. Compared with the multi-level switching scheme of hardware, the circuit is simpler and has a wider range of applications. Attached Figure Description
[0042] Figure 1 This is a block diagram of a traditional sampling device.
[0043] Figure 2 This is a schematic diagram of the sampling device of the present invention. Detailed Implementation
[0044] It should be noted that, unless otherwise specified, the embodiments and features described in this application can be combined with each other.
[0045] To enable those skilled in the art to better understand the present application, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present application, and not all embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative effort should fall within the scope of protection of the present application.
[0046] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this application are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be used interchangeably where appropriate for the purposes of describing embodiments of this application herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.
[0047] It should be understood that in the specification, claims, and drawings, when a step is described as continuing into another step, the step may directly continue into that other step or be continued into that other step through a third step; when an element / unit is described as "continuing" into another element / unit, the element / unit may be "directly connected" to that other element / unit or "connected" to that other element / unit through a third element / unit.
[0048] Furthermore, the accompanying drawings are merely illustrative of this disclosure and are not necessarily drawn to scale. The same reference numerals in the drawings denote the same or similar parts, and therefore repeated descriptions thereof will be omitted. Some block diagrams shown in the drawings are functional entities and do not necessarily correspond to physically or logically independent entities. These functional entities can be implemented in software, in one or more hardware modules or integrated circuits, or in different network and / or processor devices and / or microcontroller devices.
[0049] Figure 1 The diagram shows the principle of a traditional sampling device. The voltage of the input source 001 after being processed by the converter unit 002 (also referred to as a switching power supply in this invention) is the output voltage V0 (i.e., the voltage to be measured). The circuit connected to the output terminal of the converter unit 002 is the traditional sampling circuit. The output voltage V0 is attenuated by resistors R0 and R1 to become the first node voltage Vadc. The ADC unit 004 converts the first node voltage Vadc into a digital signal and outputs it to the MCU00. The MCU006 uses this digital signal to perform digital control or display externally.
[0050] Traditional sampling circuits can only be designed with the upper limit (i.e., maximum value) of the output voltage V0. This is because, at the maximum output voltage, the first node voltage Vadc input to the ADC unit 004 must not exceed the maximum analog sampling voltage of the ADC unit 004 (i.e., the reference voltage of the ADC unit 004, for example, 3.3V). The biggest problem caused by this design is that all quantization errors are designed based on the maximum output voltage. For example, if the maximum output voltage is designed to be 1000V, and an ADC with 10-bit effective resolution is used, in engineering, in order to reserve a certain margin, the sampling voltage range is 0-1050V. If represented by 10-bit data, the quantization error is (1 / 1024)*1050V. If the current rated output is 1000V, the quantization error ratio is (1 / 1024)*1050 / 1000=1.05 / 1024, which is nearly 1 / 1000; if the current output voltage is 10V, the quantization error ratio is (1 / 1024)*1050 / 10=105 / 1024, which is nearly 1 / 10, seriously affecting the output accuracy and increasing the relative ripple ratio.
[0051] To this end, the present invention proposes a sampling method for acquiring a digital signal characterizing the magnitude of a voltage to be measured, wherein the voltage to be measured is greater than or equal to a first preset value and less than or equal to a second preset value. The sampling method includes the following steps:
[0052] The voltage to be measured is attenuated to a first voltage signal according to a first attenuation ratio;
[0053] Convert the first voltage signal into a first digital signal;
[0054] A second attenuation ratio is generated based on the first digital signal;
[0055] The voltage to be measured is attenuated into a second voltage signal according to the second attenuation ratio;
[0056] The second voltage signal is converted into a second digital signal, which is the digital signal that represents the magnitude of the voltage to be measured.
[0057] Wherein: when the voltage to be measured is the second set value, the second attenuation ratio is the set attenuation ratio, and the second voltage signal after the voltage to be measured is attenuated by the set second attenuation ratio is the second voltage signal reference value; when the voltage to be measured is other voltage values, the second voltage signal after each voltage to be measured is attenuated by the corresponding second attenuation ratio tends to the second voltage signal reference value.
[0058] The above sampling method can identify the current voltage under test through the first digital signal and generate a second attenuation ratio, so that the second voltage signal obtained when the voltage under test is not at the upper limit value tends to the second voltage signal obtained when the voltage under test is at the upper limit value. This ensures that the quantization error ratio of the voltage under test is consistent across the entire voltage range (i.e., it is independent of the accuracy of the ADC device), and sampling accuracy can be effectively guaranteed without selecting a higher precision ADC device.
[0059] Figure 2 This is a block diagram of the sampling device of the present invention. The voltage V0 output by the input source 001 after processing by the converter unit 002 is the voltage to be measured. The range of the voltage to be measured is greater than or equal to a first set value and less than or equal to a second set value. The sampling device is used to acquire a digital signal characterizing the magnitude of the voltage to be measured. The sampling device specifically includes:
[0060] A first voltage attenuation unit is used to attenuate the voltage to be measured V0 into a first voltage signal 007 according to a first attenuation ratio; a first analog-to-digital conversion unit is used to convert the first voltage signal 007 into a first digital signal 011; a second attenuation ratio generation unit is used to generate a second attenuation ratio based on the first digital signal 011; a second voltage attenuation unit is used to attenuate the voltage to be measured V0 into a second voltage signal 008 according to the second attenuation ratio; a second analog-to-digital conversion unit is used to convert the second voltage signal 008 into a second digital signal 010, where the second digital signal 010 is a digital signal representing the magnitude of the voltage to be measured; wherein: when the voltage to be measured is a second set value, the second voltage signal after attenuation by the corresponding second attenuation ratio is the second voltage signal reference value; when the voltage to be measured is other voltage values, the second voltage signals after attenuation by the corresponding second attenuation ratio tend to the second voltage signal reference value.
[0061] Please continue reading Figure 2 ,in:
[0062] The first voltage attenuation unit includes resistors R3 and R4. One end of resistor R3 is used to connect to the voltage to be measured V0, and the other end is connected to one end of resistor R4 to output the first voltage signal 007. The other end of resistor R4 is used to ground.
[0063] The first analog-to-digital conversion unit includes an ADC unit 005, which receives a first voltage signal 007 at its input terminal and outputs a first digital signal 011 at its output terminal.
[0064] The second attenuation ratio generation unit includes an MCU006 and a DAC unit003. The first input terminal of the MCU006 receives a first digital signal 011, and the first input terminal of the DAC unit003 receives a second voltage signal. The output terminal of the MCU006 is connected to the second input terminal of the DAC unit003. The output terminal of the DAC unit003 is the output terminal of the second attenuation ratio generation unit, and the ground terminal of the DAC unit003 is used for grounding.
[0065] The second voltage attenuation unit includes resistors R0 and R1. One end of resistor R0 is used to connect to the voltage to be measured V0, and the other end is connected to one end of resistor R1 to output the second voltage signal 008. The other end of resistor R1 is connected to the output terminal of the second attenuation ratio generation unit.
[0066] The second analog-to-digital conversion unit includes an ADC unit 004. The input terminal of the ADC unit 004 receives a second voltage signal 008, and the output terminal outputs a second digital signal 010. The second digital signal 010 is output to the second input terminal of the MCU 006, and the MCU 006 uses the second digital signal 010 to perform digital control or external display.
[0067] The resistance values of each resistor are denoted by their corresponding symbols in the attached diagram. The voltage at the connection point between resistors R0 and R1 is denoted as the first node voltage Vadc (i.e., the second voltage signal 008). Assuming the first set value of the voltage to be measured is 10V and the second set value is 1000V, meaning the voltage range is 10-1000V, when the voltage to be measured is 1000V, the second attenuation ratio is set to 1 / 1000. Therefore, the second voltage signal after attenuation by the set second attenuation ratio of 1 / 1000 is 1V (i.e., the reference value of the second voltage signal is 1V). Combined with... Figure 2 The working principle of this invention is analyzed in detail below:
[0068] The first voltage attenuation unit, composed of resistors R3 and R4, attenuates the output voltage V0 to obtain the first voltage signal 007 = V0 × R4 / (R3 + R4), where R4 / (R3 + R4) is the first attenuation ratio.
[0069] The ADC unit 005 is used to monitor the approximate value of the current output voltage. It converts the first voltage signal 007 into a first digital signal 011. The ADC unit 005 does not require high precision, but it must ensure that all the first voltage signals are within its input voltage range. The first digital signal only needs to be able to represent the approximate range of the current output voltage V0.
[0070] ADC unit 004 converts the second voltage signal into a second digital signal. This second digital signal carries information about the output voltage V0, which can be used to calculate the magnitude of V0. To ensure accuracy, ADC unit 005 is required to achieve a certain effective accuracy, such as 10 bits, so it can convert the analog signal into a signal with 2... 10 (That is, 1024) different levels of digital signals, with a precision of 1 / 1024. Assume... Figure 2 The circuit does not include resistors R3 and R4, ADC unit 005, and ADC unit 003 (i.e., it uses...). Figure 1 (Traditional sampling device); For a 1000V voltage to be measured, if the attenuation ratio caused by resistors R0 and R1 is 1 / 1000, then the first node voltage Vadc is 1V. Assuming that there is a jitter error of 0.01V at the input of ADC unit 004, the error resulting from the conversion and processing by ADC unit 004 is 0.01V / 1V = 1%; For a 10V voltage to be measured, if the attenuation ratio caused by resistors R0 and R1 is still 1 / 1000, then the first node voltage Vadc is 0.01V. If voltage fluctuations occur, the error caused by the conversion and processing of the ADC unit 005 is 0.01V / 0.01V = 100%. This error is unacceptable in engineering applications. Therefore, it is necessary to add resistors R3 and R4, ADC unit 005, and DAC unit 003. The MCU 006 adjusts the first node voltage Vadc (i.e., the second voltage signal) of each measured voltage so that they all tend to 1V. That is, the jitter error of the input of ADC unit 004 is very small, ensuring that the relative accuracy does not change with the magnitude of the input sampling voltage.
[0071] DAC unit 003 and MCU 006, as the second attenuation ratio generation unit, are used to adjust the attenuation ratio (i.e., the second attenuation ratio) of the output voltage V0 after attenuation through resistors R0 and R1. In a specific embodiment, the first node voltage Vadc (i.e., the second voltage signal) is divided into N parts, where N is a natural number greater than 1. In order for DAC unit 003 to effectively process the N parts of the first node voltage Vadc, the maximum value within the allowable range of digital quantity variation of DAC unit 003 is set to N, so each part is Vadc / N. MCU 006 generates an adjustment coefficient K based on the first digital signal. DAC unit 003 performs a multiplication operation and outputs (Vadc / N)×K (denoted as V2) to the other end of resistor R1. This allows the second attenuation ratio to be adjusted through the compensation effect of V2 when the voltage to be measured is less than 1000V, so that the second voltage signal (i.e., the first node voltage Vadc) after attenuation by the corresponding second attenuation ratio tends to 1V (i.e., the reference value of the second voltage signal).
[0072] The principle behind adjusting the value of coefficient K in MCU006 is analyzed as follows:
[0073] Assuming DAC unit 003 is a 10-bit DAC, meaning the digital value can vary between 0 and 1023, then:
[0074] V2=(Vadc / 1023)×K---------(1);
[0075] Let I1 be the current in resistor R0 and I2 be the current in resistor R1, then we have:
[0076] I1=(V0-Vadc) / R0---------(2)
[0077] I2=(Vadc-V2) / R1---------(3)
[0078] To reduce the current consumption of the signal source, the input terminal of ADC unit 004 is designed with high impedance, which is considered as no current flowing in. Therefore, I1 = I2. Combining formulas (1), (2), and (3), we can obtain:
[0079] Vadc=V0×R1 / (R1+R0*(1-K / 1023))-------------(4).
[0080] In formula (4), R1 / (R1+R0*(1-K / 1023)) is the second attenuation ratio.
[0081] When the voltage to be measured is the second set value of 1000V, the second attenuation ratio is the set attenuation ratio of 1 / 1000. The second voltage signal of 1V after the voltage to be measured is attenuated by the set second attenuation ratio, and this is the reference value of the second voltage signal. In order to ensure that when the voltage to be measured is other voltage values, the second voltage signal after each voltage to be measured by the corresponding second attenuation ratio tends to the reference value of the second voltage signal, then we have:
[0082] 1000V×1 / 1000=V0×R1 / (R1+R0*(1-K / 1023))-------------(5)
[0083] In the above formula (5), R1 and R0 are known, and there are only two variables, V0 and K. V0 can be represented by the first digital signal output by the ADC unit 005. Therefore, the value of K under any voltage to be measured except the second set value can be calculated. The corresponding second attenuation ratio can be obtained according to R1 / (R1+R0*(1-K / 1023)).
[0084] The above solution reveals that regardless of whether V0 outputs a high or low voltage, adjusting the K value ensures that the current V0, after attenuation through R0, R1, and the DAC unit, maintains a range close to the full-scale range of the ADC unit 004. This ensures that the quantization error percentage is essentially the same across all output voltage levels, thus resolving the issue of excessively high quantization error percentages under low-voltage output conditions.
[0085] Using the above scheme, without significantly increasing the cost or complexity of the application equipment, the quantization error ratio is 1 / 1024*1050 when the output is 1000V. If the output is 10V, and the range corresponding to 10V is adjusted to a 10-bit effective resolution, the quantization error is 1 / 1024*10, and the quantization error ratio is 1 / 1024*10 / 10 = 1 / 1024. That is, the relative error ratio remains basically unchanged under different ranges and different output voltage values. Compared with the original scheme, the error resolution is improved by 100 times when the output is 10V.
[0086] The implementation process of this invention will be described in detail below through examples. Assume the current output condition is 10V-900V, the range of ADC unit 005 is 1000V, and the effective number of bits of the ADC is 10 bits. R0 = 995K, R1 = 5K, R3 = 995K, R4 = 5K, and the reference voltages of ADC unit 005 and ADC unit 004 are both 5V.
[0087] 1. Assuming the current output voltage is 900V, the attenuated signal obtained by voltage division through resistors R3 and R4 is input to ADC unit 005 for analog-to-digital conversion. MCU006 determines the current voltage to be 900V based on the digital signal output by ADC unit 005. Based on the determined 900V voltage, MCU006 adjusts the value of K to 0. Then, the voltage division ratio of sampling resistors R0 and R1 is R1 / (R0+R1)=5 / 1000. The analog signal of the current output voltage after voltage division by sampling resistors R0 and R1 is 900*5 / 100=4.5V. The resolution of ADC unit 004 in sampling the current voltage is 1000 / 1024, and the relative quantization error ratio is 1000 / 1024 / 900=10 / 9 / 1024.
[0088] 2. Assuming the current output voltage is 10V, the analog signal of the ADC input signal 007 is detected by the ADC unit 005 to determine that the current voltage is 10V. A certain margin is retained, and the current voltage division ratio is adjusted according to the full-scale 15V operating condition. Using formula (4), 10*R1 / (R1+R0*(1-K / 1023))=(10 / 15)*5 is used to adjust the value of K to 1012. Therefore, the current voltage division ratio is 5 / (5+995*(1-1012 / 1023))=0.3185. The output voltage V0, after passing through the attenuation circuit composed of resistor R1, resistor R0, and DAC unit 003, yields an analog voltage of 3.185V. The current 10V can be represented by (3.185 / 5)*1023=615 points. Therefore, the actual voltage corresponding to each digital point is 10 / 615V, resulting in a quantization error of 10 / 615 / 10=1 / 615. Compared to the highest voltage condition, the quantization error ratio is less than 1 / 600. Compared to the traditional solution, its resolution is improved by about 60 times.
[0089] As a specific embodiment, the present invention also provides a switching power supply, including any of the above-mentioned sampling devices, which can improve the voltage sampling accuracy of the switching power supply when using a voltage-type output controller, thereby achieving accurate compensation.
[0090] The above are merely preferred embodiments of the present invention. It should be noted that the above preferred embodiments should not be considered as limitations on the present invention. For those skilled in the art, several equivalent substitutions, improvements, and modifications can be made without departing from the spirit and scope of the present invention. These equivalent substitutions, improvements, and modifications should also be considered within the protection scope of the present invention. Further details will not be provided here, and the protection scope of the present invention should be determined by the scope defined in the claims.
Claims
1. A sampling method for obtaining a digital signal representing a magnitude of a voltage to be measured, the voltage to be measured ranging from greater than or equal to a first set value to less than or equal to a second set value, characterized in that, The sampling method comprises the following steps: attenuating the to-be-tested voltage into a first voltage signal according to a first attenuation ratio; converting the first voltage signal into a first digital signal; generating a second attenuation ratio according to the first digital signal; attenuating the to-be-tested voltage into a second voltage signal according to the second attenuation ratio; converting the second voltage signal into a second digital signal, which is the digital signal representing the size of the to-be-tested voltage; wherein, when the to-be-tested voltage is a second set value, the second attenuation ratio is a set attenuation ratio, and the second voltage signal after the to-be-tested voltage is attenuated by the set second attenuation ratio is a second voltage signal reference value; when the to-be-tested voltage is other voltage values, the second voltage signals after each to-be-tested voltage is attenuated by the corresponding second attenuation ratio tend to the second voltage signal reference value.
2. The method of claim 1, wherein: The generating of the second attenuation ratio according to the first digital signal comprises: estimating the current to-be-tested voltage according to the first digital signal; calculating an adjustment coefficient K according to the following formula: V02×K0=V0×R1 / (R1+R0*(1-K / N)); wherein, V02 is the second set value; K0 is the set second attenuation ratio; V0 is an estimated voltage obtained by estimating the current to-be-tested voltage according to the first digital signal; R1 and R0 are set constants; K is the adjustment coefficient; N is a set value, and N is a natural number greater than 1; generating the second attenuation ratio according to the calculated adjustment coefficient K, and the second attenuation ratio is equal to R1 / (R1+R0*(1-K / N)).
3. A sampling device for obtaining a digital signal representing the magnitude of a voltage to be measured, said voltage to be measured ranging from greater than or equal to a first set value and less than or equal to a second set value, characterized in that, The sampling device comprises the following units: a first voltage attenuation unit, configured to attenuate the to-be-tested voltage into a first voltage signal according to a first attenuation ratio; a first analog-to-digital conversion unit, configured to convert the first voltage signal into a first digital signal; a second attenuation ratio generation unit, configured to generate a second attenuation ratio according to the first digital signal; a second voltage attenuation unit, configured to attenuate the to-be-tested voltage into a second voltage signal according to the second attenuation ratio; a second analog-to-digital conversion unit, configured to convert the second voltage signal into a second digital signal, which is the digital signal representing the size of the to-be-tested voltage; wherein, when the to-be-tested voltage is a second set value, the second attenuation ratio is a set attenuation ratio, and the second voltage signal after the to-be-tested voltage is attenuated by the set second attenuation ratio is a second voltage signal reference value; when the to-be-tested voltage is other voltage values, the second voltage signals after each to-be-tested voltage is attenuated by the corresponding second attenuation ratio tend to the second voltage signal reference value.
4. The sampling device of claim 3, wherein: The first voltage attenuation unit comprises a resistor R3 and a resistor R4, one end of the resistor R3 is configured to be connected to the to-be-tested voltage, and the other end of the resistor R3 and one end of the resistor R4 are connected together to output the first voltage signal, and the other end of the resistor R4 is configured to be grounded.
5. The sampling device of claim 3, wherein: The first analog-to-digital conversion unit comprises a first ADC unit (005), an input end of the first ADC unit (005) inputs the first voltage signal, and an output end of the first ADC unit (005) outputs the first digital signal.
6. The sampling device of claim 3, wherein: The second attenuation ratio generating unit comprises an MCU 006 and a first DAC unit (003), a first input end of the MCU 006 inputs the first digital signal, a first input end of the first DAC unit (003) inputs the second voltage signal, an output end of the MCU 006 is connected to a second input end of the first DAC unit (003), and an output end of the first DAC unit (003) is an output end of the second attenuation ratio generating unit, and a grounding end of the first DAC unit (003) is grounded.
7. The sampling device of claim 6, wherein: The MCU 006 generates an adjustment coefficient K according to the first digital signal according to the following formula: V02×K0=V0×R1 / (R1+R0*(1-K / N)); Wherein: V02 is the second set value; K0 is the set second attenuation ratio; V0 is an estimated voltage obtained by estimating the current to-be-measured voltage according to the first digital signal; R1 and R0 are set constants; N is a set value, and N is a natural number greater than 1; The first DAC unit (003) outputs the Nth part of the second voltage signal multiplied by K.
8. The sampling device of claim 3, wherein: The second voltage attenuation unit comprises a resistor R0 and a resistor R1, one end of the resistor R0 is used for connecting a to-be-measured voltage, the other end of the resistor R0 and one end of the resistor R1 are connected together to output the second voltage signal, and the other end of the resistor R1 is connected to an output end of the second attenuation ratio generating unit.
9. The sampling device of claim 3, wherein: The second analog-to-digital conversion unit comprises a second ADC unit (004), an input end of the second ADC unit (004) inputs the second voltage signal, and an output end of the second ADC unit (004) outputs the second digital signal, the second digital signal is output to a second input end of the MCU 006, and the MCU 006 performs digital control or external display by using the second digital signal.
10. A switching power supply characterized by comprising: The sampling device of any one of claims 3 to 9. The sampling device of any one of claims 3 to 9.