Low-side overvoltage protection circuit

By using a low-side overvoltage protection circuit composed of a Zener diode and a transistor, the problems of complex structure or high cost in the prior art are solved, achieving low-cost and effective overvoltage protection and ensuring load safety.

CN121367167APending Publication Date: 2026-01-20深圳君正时代集成电路有限公司
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Patent Information

Application Number
CN202410957860.8
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-07-17
Publication Date
2026-01-20

AI Technical Summary

Technical Problem

Existing low-side overvoltage protection circuits suffer from complex structures or high costs, making it difficult to achieve effective overvoltage protection while ensuring low costs.

Method used

A low-side overvoltage protection circuit composed of a Zener diode and a MOSFET is used to control the conduction and cutoff of the MOSFET through the cooperation of the Zener diode and the transistor, thereby achieving overvoltage protection and avoiding the need to use an overvoltage protection IC.

Benefits of technology

It achieves simple, low-cost, and effective overvoltage protection, avoiding high-cost integrated chip solutions while ensuring the safety of the load.

✦ Generated by Eureka AI based on patent content.

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Abstract

The invention relates to the technical field of electronic circuits, in particular to a low-side overvoltage protection circuit. The low-side overvoltage protection circuit comprises an overvoltage protection circuit, the first end of the second voltage stabilizing device is connected with the power supply ground node, and the second end of the second voltage stabilizing device is connected with the power supply input node through a first resistor; the first end of the first voltage stabilizing device is connected with the second end of the second voltage stabilizing device through a second resistor, and the second end of the first voltage stabilizing device is connected with the power supply input node; an emitter of the first triode is connected with the power input node, a base of the first triode is connected with a first end of the first voltage stabilizer, and a collector of the first triode is connected with a grid of the first MOS tube; one end of the third resistor is connected with the power supply input node, and the other end of the third resistor is connected with the collector of the first triode; a grid electrode of the first MOS tube is connected with the power supply ground node, a drain electrode of the first MOS tube is connected with the power supply output node, and a source electrode of the first MOS tube is connected with the power supply input node. The low-side overvoltage protection circuit is simple in structure and convenient to manufacture.
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Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of electronic circuit, in particular to a low-side overvoltage protection circuit. BACKGROUND

[0002] With the development of technology, the application scene and function of electronic equipment are increasingly complex, and the quality requirement is higher and higher, and the electronic circuit protection also becomes more and more important. Especially, higher requirements are put forward for the reliability of power supply. To ensure normal power supply, prevent the abnormality of power supply end from causing the failure or damage of electronic equipment, it is required that the power supply input end needs a safe and reliable protection circuit, i.e. a low-side overvoltage protection circuit.

[0003] When the input voltage of the circuit exceeds the predetermined value, the low-side overvoltage protection circuit will disconnect the connection with the load, so that the device will not be damaged due to the overhigh voltage. When the input voltage returns to the normal voltage range, the low-side overvoltage protection circuit will restore the connection with the load and maintain normal power supply.

[0004] From the position of the switch disconnection, the overvoltage protection can be divided into high-side overvoltage protection and low-side overvoltage protection. The disconnection position before the load is called high-side overvoltage protection, and the disconnection position after the load is called low-side overvoltage protection.

[0005] In the prior art, there are two kinds of low-side overvoltage protection circuits. The first kind is to directly use an integrated chip for overvoltage protection. This scheme has the characteristics of simple use, without the need to build a circuit, and overvoltage protection can be realized by adding resistance and capacitance, but the cost is high. The second kind is to use discrete devices to build a low-side overvoltage protection circuit. This scheme has the advantages of low cost, but the structure is often complex. SUMMARY

[0006] In order to solve the problems existing in the prior art, the purpose of the present application is to provide a low-side overvoltage protection circuit with simple structure and low cost.

[0007] To achieve the above-mentioned purpose, the present application provides a low-side overvoltage protection circuit, which comprises a power supply input node, a power supply ground node and a power supply output node, the power supply input node is used for connecting a power supply, and further comprises:

[0008] A second voltage stabilizing device, a first end of which is connected with the power supply ground node, and a second end of which is connected with the power supply input node through a first resistor;

[0009] A first voltage stabilizing device, a first end of which is connected with the second end of the second voltage stabilizing device through a second resistor, and a second end of which is connected with the power supply input node;

[0010] A first triode, an emitter of which is connected with the power supply input node, a base of which is connected with the first end of the first voltage stabilizing device, and a collector of which is connected with a gate of a first MOS tube.

[0011] a third resistor, one end of which is connected with the power input node, and the other end of which is connected with the collector of the first triode;

[0012] a first MOS tube, the gate of which is connected with the power ground node through the fourth resistor, the drain of which is connected with the power output node, and the source of which is connected with the power input node.

[0013] Further, the second voltage stabilizer device is a second voltage stabilizing diode, the anode of which is connected with the power ground node, and the cathode of which is connected with the power input node through the first resistor.

[0014] Further, the first voltage stabilizer device is a first voltage stabilizing diode, the anode of which is connected with the cathode of the second voltage stabilizing diode through the second resistor, and the cathode of which is connected with the power input node.

[0015] Further, the first triode is a PNP type triode.

[0016] Further, the first MOS tube is a PMOS tube.

[0017] Further, the low-side overvoltage protection circuit further comprises:

[0018] a first capacitor, which is arranged between the power input node and the power ground node;

[0019] a fifth resistor, which is arranged in parallel with the first capacitor.

[0020] The low-side overvoltage protection circuit of the present application can protect the load from overvoltage without using overvoltage protection IC.

[0021] The low-side overvoltage protection circuit of the present application has simple structure, is convenient to manufacture, and has low cost.

[0022] Other features and advantages of the present application will be set forth in the following description, and in part will become apparent from the description, or can be learned by practice of the present application. BRIEF DESCRIPTION OF DRAWINGS

[0023] The accompanying drawings are included to provide a further understanding of the present application, and constitute a part of the specification, and are used to explain the present application together with the embodiments of the present application, and do not constitute a limitation of the present application. In the drawings:

[0024] Figure 1 Fig. 1 is a structure schematic diagram of the low-side overvoltage protection circuit of the present application. DETAILED DESCRIPTION

[0025] Embodiments of the present application will be described below in greater detail by referring to the drawings. While certain embodiments of the application are shown in the drawings, it is understood that the application can be embodied in various forms and should not be construed as being limited to the embodiments set forth herein, but rather should be construed broadly. It should be understood that the drawings and detailed description thereto are illustrative only and are not intended to limit the scope of the present application.

[0026] It should be understood that the various steps of the method embodiments of the present application can be performed in different orders and / or in parallel. Furthermore, the method embodiments can include additional steps and / or omit performing the steps shown. The scope of the present application is not limited in this respect.

[0027] The term "comprising" and variations thereof as used herein are open-ended, that is, "comprising but not limited to." The term "based on" is "based, at least in part, on." The term "one embodiment" means "at least one embodiment." The term "another embodiment" means "at least one additional embodiment." The term "some embodiments" means "at least some embodiments." Related definitions are given throughout the detailed description.

[0028] It should be noted that the terms "a" and "an" and "the" and "at least one" used in the present application are used in the sense that they mean "one or more," unless otherwise specified in context. "A plurality" means "two or more."

[0029] Zener diode: also called Zener diode, using the PN junction reverse breakdown state, the current can be changed in a wide range while the voltage is basically unchanged, the phenomenon of making a diode for voltage stabilization.

[0030] MOS: is the abbreviation of MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor), that is, metal-oxide semiconductor field effect transistor, divided into PMOS tube (P channel type) and NMOS tube (N channel type), belongs to insulated gate field effect tube; It has three ports, respectively gate (Gate), source (Source), drain (Drain), commonly used as a switch in digital circuits, by applying voltage to the gate (Gate), to control the on-off between the source (Source) and the drain (Drain).

[0031] Triode: full name semiconductor triode, also known as bipolar transistor, crystal triode, arrangement mode has NPN and PNP two kinds; It has three ports, which are base, collector and emitter, its function is to amplify weak signal into larger amplitude value electric signal, in digital circuit, it is often used as switch, through applying current in base, to control the on-off of collector and emitter.

[0032] Hereinafter, the embodiments of the present application will be described in detail with reference to the drawings.

[0033] Example 1

[0034] An embodiment of the present application provides a low-side overvoltage protection circuit, which will be described below with reference to the accompanying drawings Figure 1 The low-side overvoltage protection circuit of the present application is described in detail, which comprises:

[0035] It comprises a power input node, a power ground node and a power supply output node, the power input node is used to connect the power supply, and the power supply output node and the power ground node are connected with a load;

[0036] It can be understood that the power input node is used to connect the input power VCC.

[0037] It further comprises:

[0038] The second voltage stabilizing diode D2 is connected with the power ground node at the positive electrode, and connected with the power input node at the negative electrode through the first resistor R1;

[0039] The first voltage stabilizing diode D1 is connected with the second voltage stabilizing diode R2 at the positive electrode through the second resistor R2, and connected with the power input node at the negative electrode

[0040] The first triode Q1 is connected with the power input node at the emitter, connected with the positive electrode of the first voltage stabilizing diode D1 at the base, and connected with the gate of the first MOS tube Q2 at the collector;

[0041] The third resistor R3 is connected with the power input node at one end, and connected with the collector of the first triode Q1 at the other end;

[0042] The first MOS tube Q2 is connected with the power ground node at the gate through the fourth resistor R4, connected with the power supply output node at the drain, and connected with the power input node at the source.

[0043] In the embodiment, the first voltage stabilizing diode D1 and the second voltage stabilizing diode D2 can also be other voltage stabilizing devices.

[0044] In the embodiment, the first triode Q1 is a PNP triode.

[0045] In the embodiment, the first MOS Q2 is a PMOS.

[0046] In the embodiment, further comprising:

[0047] The first capacitor C1 is arranged between the power input node and the power ground node.

[0048] The fifth resistor R5 is arranged in parallel with the first capacitor C1.

[0049] The working principle of the embodiment is as follows:

[0050] When the input power VCC is less than the threshold voltage, the first stabilizing diode D1 will not be turned on, so the first triode Q1 is cut off. The cut-off of the first triode Q1 is equivalent to an open circuit, which can be removed. The first MOS Q2 will be turned on, and the VOUT will have an output.

[0051] When VCC exceeds the threshold voltage, the first stabilizing diode D1 is turned on, and the cathode voltage of the stabilizing diode is maintained at a stable voltage. Thus, the voltage between the base and the collector of Q1 is not 0, and the first triode Q1 is turned on, so that the gate voltage of the first MOS Q2 is equal to the source voltage, and the first MOS Q2 is turned off, that is, the VOUT has no output, and the purpose of overvoltage protection is achieved.

[0052] The second stabilizing diode D2 is used to protect the base and collector voltage of the first triode Q1 from exceeding the range.

[0053] The above description is only part of the embodiments of the present application and the explanation of the applied technical principles. Those skilled in the art should understand that the disclosed range in the present application is not limited to the technical solutions formed by the specific combination of the above technical features, and also covers other technical solutions formed by any combination of the above technical features or equivalent features without departing from the disclosed concept. For example, the above features are replaced with the technical features disclosed in the present application (but not limited to) having similar functions to form technical solutions.

[0054] Furthermore, although the operations are described in a specific order, this should not be construed as requiring these operations to be performed in the specific order shown or in sequential order. Multitasking and parallel processing may be advantageous in certain environments. Similarly, while several specific implementation details are included in the above discussion, these should not be construed as limiting the scope of the invention. Certain features described in the context of individual embodiments may also be implemented in combination in a single embodiment. Conversely, various features described in the context of a single embodiment may also be implemented individually or in any suitable sub-combination in multiple embodiments.

[0055] Although the subject matter has been described using language specific to structural features and / or methodological logic, it should be understood that the subject matter defined in the appended claims is not necessarily limited to the specific features or actions described above. Rather, the specific features and actions described above are merely illustrative examples of implementing the claims.

Claims

1. A low-side overvoltage protection circuit comprising a power supply input node for accessing a power supply, a power supply ground node, and a power supply output node, the circuit comprising: Also comprising: a second voltage stabilizing device, a first end of which is connected to the power supply ground node, and a second end of which is connected to the power supply input node through a first resistor; a first voltage stabilizing device, a first end of which is connected to the second end of the second voltage stabilizing device through a second resistor, and a second end of which is connected to the power supply input node; a first transistor, an emitter of which is connected to the power supply input node, a base of which is connected to the first end of the first voltage stabilizing device, and a collector of which is connected to a gate of a first MOS transistor; a third resistor, one end of which is connected to the power supply input node, and the other end of which is connected to the collector of the first transistor; a first MOS transistor, a gate of which is connected to the power supply ground node through a fourth resistor, a drain of which is connected to the power supply output node, and a source of which is connected to the power supply input node.

2. The low-side overvoltage protection circuit of claim 1, wherein, The second voltage stabilizing device is a second voltage stabilizing diode, a positive electrode of which is connected to the power supply ground node, and a negative electrode of which is connected to the power supply input node through the first resistor.

3. The low-side overvoltage protection circuit of claim 2, wherein, The first voltage stabilizing device is a first voltage stabilizing diode, a positive electrode of which is connected to the negative electrode of the second voltage stabilizing diode through the second resistor, and a negative electrode of which is connected to the power supply input node.

4. The low-side overvoltage protection circuit of claim 1, wherein, The first transistor is a PNP type transistor.

5. The low-side overvoltage protection circuit of claim 1, wherein, The first MOS transistor is a PMOS transistor.

6. The low-side overvoltage protection circuit of claim 1, wherein, Also comprising: a first capacitor, which is arranged between the power supply input node and the power supply ground node; a fifth resistor, which is arranged in parallel with the first capacitor.