Renewable energy grid-connected system sub / super synchronous collaborative suppression method, terminal device and storage medium

Abstract

The application discloses a renewable energy grid-connected system sub / super-synchronous collaborative suppression method, a terminal device and a storage medium, which are based on instantaneous power theory, sliding window fast Fourier transform, virtual resistance, phase compensation and the like. While effectively controlling the grid-side reactive power and the capacitor voltage of the sub-module, the sub / super-synchronous oscillation suppression current reference value is obtained through accurate extraction and conversion, so that the system can accurately suppress the oscillation. Different from the prior art, the virtual resistance value of the application does not need to be changed in the sub / super-synchronous oscillation frequency band; at the same time, the SWFFT algorithm is adopted for frequency locking adaptive control, so that the jumping and mixed oscillation frequencies can be identified at the same time; the collaborative suppression method is proposed for the problems of the symmetric amplification phenomenon in the single frequency sub / super-synchronous oscillation suppression and the inaccuracy of individual super-synchronous oscillation suppression, so that the problems are effectively solved and the stability of the system is improved.

Description

Technical Field

[0001] This invention relates to the field of power electronic control technology, and in particular to a method for suppressing subsynchronous / supersynchronous collaboratively in renewable energy grid-connected systems, terminal equipment, and storage medium. Background Technology

[0002] Novel subsynchronous / supersynchronous oscillations have a significant impact on the stability and reliability of power systems, seriously threatening the safe and stable operation of the power grid. The core mechanism of subsynchronous / supersynchronous oscillations is the open-loop mode resonance and impedance imbalance of the subsystem, including: when a doubly-fed wind farm is connected to the grid via series compensation, the generator and the grid-series compensation subsystem mode resonance triggers subsynchronous / supersynchronous mixed oscillations; direct-drive farms exhibit field oscillations due to inter-generator mode resonance and field-grid oscillations due to SG mode resonance with the grid, and when transmitted via flexible DC, they are also coupled with VSC-HVDC converters; the increase in large-scale farm units leads to mode migration instability, and the transmission channel affects oscillation propagation, etc. For the suppression of subsynchronous / supersynchronous oscillations, there have been numerous research achievements both domestically and internationally based on improvements to the structure or control of the grid-connected system itself. Existing technologies can be mainly divided into four categories: First, additional damping control, which extracts the oscillation signal, processes it, and superimposes it onto control loops such as converters (e.g., SSDC, wind farm / generator layer control). This is compatible with existing equipment but mostly targets a single frequency, with minimal suppression effect on mixed oscillation frequencies. Second, filter technology, which uses bandpass / notch filters to filter out specific frequency components. While simple in principle, it has poor robustness. Third, parameter optimization, which adjusts parameters such as converter PI and PLL. This has no additional cost but presents complex parameter trade-offs. Fourth, flexible equipment control, which regulates reactive power through SVC / STATCOM and VSC-HVDC, balancing transmission and suppression. However, under weak grid conditions, it is prone to negative resistance characteristics, which can amplify oscillations. Furthermore, it has poor frequency adaptability, making it difficult to suppress mixed or offset oscillations and compensate for phase inaccuracies. Because renewable energy grid-connected systems generate or absorb reactive power under different operating conditions, these reactive power changes can cause sudden changes in grid-side reactive power, which in turn can lead to grid-side voltage instability. In medium and high voltage grids, cascaded STATCOMs are often used to provide dynamic reactive power support and improve the problems of low short-circuit ratio and poor voltage stability in weak grids.

[0003] In view of the shortcomings of existing subsynchronous oscillation suppression technologies, it is necessary to achieve rapid identification and efficient suppression of subsynchronous oscillation frequencies in medium and high voltage power grids, as well as to solve the problems of frequency mixing and offset oscillation suppression and phase misalignment compensation. Summary of the Invention

[0004] The technical problem to be solved by the present invention is to provide a method, terminal equipment and storage medium for the coordinated suppression of subsynchronous / supersynchronous oscillations in a renewable energy grid-connected system, which addresses the shortcomings of the existing technology, enables rapid identification and efficient suppression of subsynchronous / supersynchronous oscillation frequencies in medium and high voltage power grids, and solves the problems of frequency mixing and offset oscillation suppression and phase misalignment compensation.

[0005] To solve the above-mentioned technical problems, the technical solution adopted by the present invention is: a method for coordinated suppression of subsynchronous / supersynchronous transmission in renewable energy grid-connected systems, comprising the following steps:

[0006] S1. Connect the cascaded STATCOM device in parallel to the renewable energy grid-connected system, and detect and collect the voltage signal at the grid connection point, the output current signal of the cascaded STATCOM device, the grid-side current signal, and the submodule capacitor voltage signal in real time.

[0007] S2. Generate reactive current component compensation value using the voltage signal at the grid connection point, the output current signal of the cascaded STATCOM device, and the grid-side current signal; perform submodule capacitor voltage control based on the acquired submodule capacitor voltage signal to generate submodule capacitor voltage modulation current component; obtain grid-side oscillation voltage component other than the base frequency after processing the acquired grid connection point voltage signal through a base frequency notch filter, and use the oscillation voltage component to obtain the oscillation suppression current component of the sub / supersynchronous oscillation component;

[0008] S3. The reactive current component compensation value, the submodule capacitor voltage modulation current component, and the oscillation suppression current component are superimposed to obtain the cascaded STATCOM suppression current reference value. The difference between this cascaded STATCOM suppression current reference value and the output current signal of the cascaded STATCOM device is calculated. The difference is passed through a quasi-proportional resonant controller. The output of the quasi-proportional resonant controller is controlled by the grid voltage feedforward control to obtain the cascaded STATCOM bridge arm modulation voltage. The CPS-PWM modulation method is used to control the on / off state of the switching devices of each full-bridge submodule.

[0009] In this invention, the formula for calculating the reactive current component compensation value is as follows:

[0010] ;

[0011] in, This is the reactive current component compensation value. , This indicates the three phases of a cascaded STATCOM device. For coordinate transformation angle, , The proportional gain of the reactive power PI controller. The integral coefficient of the reactive power PI controller. Provide a command value for the reactive power of the cascaded STATCOM unit. This refers to the real-time output reactive power of the cascaded STATCOM device.

[0012] ; ; ; ; The voltage signal at the grid connection point. This is the output current signal of the cascaded STATCOM device.

[0013] The calculation process for the capacitor voltage modulation current component of the submodule includes: averaging the capacitor voltages of each submodule in the three-phase bridge arm of the cascaded STATCOM device. With DC capacitor voltage reference command After differential calculation and per-unit scaling, the amplitude of the submodule capacitor voltage modulation is obtained through a PI controller. Amplitude Multiply by each , , That is, to obtain the voltage-modulated current component of the submodule capacitor. ; , This indicates the three phases of a cascaded STATCOM device.

[0014] Where N is the number of full-bridge submodules connected in series in each phase of the cascaded STATCOM device. This is the sum of the output voltages of each phase submodule of the cascaded STATCOM. Output voltage for each individual submodule in each phase of a cascaded STATCOM.

[0015] The formula for calculating the oscillating voltage component is as follows:

[0016] ;

[0017] in, It is the oscillating voltage component. , This indicates the three phases of a cascaded STATCOM device. , s is the fundamental frequency, and s is the complex frequency. This is the grid-side voltage.

[0018] The process of obtaining the oscillation suppression current component includes:

[0019] Perform a sliding window fast Fourier transform on the oscillating voltage component, and subtract 100Hz from the result of the sliding window fast Fourier transform to obtain the oscillation frequency;

[0020] Invert the first virtual resistance and take its reciprocal. Multiply the reciprocal of this result with the oscillating voltage component to obtain the first current.

[0021] Invert the second virtual resistor and take its reciprocal. Multiply the reciprocal of this result with the oscillating voltage component to obtain the second current.

[0022] Use the first current as the input to the first bandpass filter; use the second current as the input to the second bandpass filter;

[0023] The oscillation suppression current component is obtained by superimposing the outputs of the first bandpass filter and the second bandpass filter.

[0024] in,

[0025] The center frequency of the first bandpass filter is 100Hz - the oscillation frequency, and the frequency of the second bandpass filter is the oscillation frequency.

[0026] As an inventive concept, the present invention also provides a terminal device, including a memory, a processor, and a computer program stored in the memory; the processor executes the computer program to implement the steps of the above method.

[0027] As an inventive concept, the present invention also provides a computer-readable storage medium having a computer program / instructions stored thereon; when the computer program / instructions are executed by a processor, they implement the steps of the above-described method.

[0028] Compared with the prior art, the beneficial effects of the present invention are as follows:

[0029] 1. The method of the present invention can achieve rapid identification and efficient suppression of sub / supersynchronous oscillations in medium and high voltage power grids, and solve the problems of frequency mixing, offset and phase misalignment. The core of this invention comes from the collaborative design of adaptive topology and precise control logic.

[0030] 2. At the topology level, the cascaded H-bridge STATCOM structure, which is the mainstream of medium and high voltage power grids, is adopted. The sub-modules are connected in series to adapt to the high voltage level. At the same time, the capacitor voltage control strategy is simplified, providing stable hardware support for oscillation suppression. Parallel connection does not change the original structure of the power grid and is suitable for weak network scenarios.

[0031] 3. At the identification level, it relies on sliding window fast Fourier transform (SWFFT) to achieve accurate frequency locking. It can identify mixed oscillation frequencies in parallel through real-time spectrum analysis, capture weak oscillation signals with an amplitude of only 3%, and has a fast response speed. It can track frequency jumps and shifts, solving the problems of single-frequency tracking failure and poor anti-interference in traditional methods.

[0032] 4. In terms of suppression, a fixed virtual resistor is used to generate a reverse suppression current, which does not need to be adjusted with frequency. To address the problem of supersynchronous amplification caused by single suppression of subsynchronous oscillation, a supersynchronous suppression module is added by utilizing the fundamental frequency symmetry characteristics. The dual-band coordinated suppression is achieved through differentiated virtual resistors. In conjunction with a quasi-proportional resonant controller, it is ensured that the suppression current tracks the reference value without steady-state error.

[0033] 5. Regarding phase misalignment, a phase compensation stage is added to address the phase deviation caused by sampling delay in supersynchronous oscillation suppression. This stage accurately corrects the phase at the target frequency, preventing system divergence and ensuring suppression accuracy.

[0034] 6. The entire solution requires no additional hardware modifications, has simple control logic, effectively adapts to the complex operating conditions of medium and high voltage power grids, and achieves efficient governance of oscillations across all scenarios. Attached Figure Description

[0035] Figure 1 This is a flowchart of a method according to an embodiment of the present invention;

[0036] Figure 2 This is a block diagram of the control structure according to an embodiment of the present invention;

[0037] Figure 3 This is a block diagram of the reactive power control structure according to an embodiment of the present invention;

[0038] Figure 4 This is a simulation diagram of the reactive power output of a cascaded STATCOM according to an embodiment of the present invention;

[0039] Figure 5 This is a block diagram of the capacitor voltage control structure of a submodule in an embodiment of the present invention;

[0040] Figure 6 The above are simulation results of capacitor voltage control for a submodule in an embodiment of the present invention.

[0041] Figure 7 This is a block diagram of the control structure for extracting the subsynchronous oscillation component according to an embodiment of the present invention;

[0042] Figure 8 This is a flowchart illustrating the SWFFT programming process according to an embodiment of the present invention.

[0043] Figure 9 In this embodiment of the invention, the amplitude of the synchronous oscillation is 10%. Comparison of simulation results between SOGI_FLL and SWFFT;

[0044] Figure 10 In this embodiment of the invention, the amplitude of the synchronous oscillation is 3%. Comparison of simulation results between SOGI_FLL and SWFFT;

[0045] Figure 11This is a comparison chart of the simulation results of SOGI_FLL and SWFFT when the synchronous oscillation frequency jumps in an embodiment of the present invention;

[0046] Figure 12 This is a comparison chart of SOGI_FLL and SWFFT simulation results when multiple subsynchronous oscillation frequencies are mixed in an embodiment of the present invention;

[0047] Figure 13 This invention provides embodiments for suppressing the voltage of the grid side before and after synchronous oscillation and compensating for the current of the cascaded STATCOM.

[0048] Figure 14 To suppress the grid-side voltage FFT before and after the next synchronous oscillation in this embodiment of the invention;

[0049] Figure 15 This is a block diagram of the control structure for extraction of subsynchronous / supersynchronous oscillation components according to an embodiment of the present invention;

[0050] Figure 16 The above are the FFT results of the grid-side voltage before and after the second / supersynchronous oscillation suppression in this invention.

[0051] Figure 17 This is an embodiment of the present invention. Time-synchronous oscillation suppresses the voltage on both the front and rear grid sides, and cascaded STATCOM compensates for the current.

[0052] Figure 18 This is an embodiment of the present invention. Bird diagram;

[0053] Figure 19 This is a block diagram of the subsynchronous / supersynchronous oscillation component extraction and control structure with phase compensation according to an embodiment of the present invention;

[0054] Figure 20 This invention provides an embodiment with phase compensation for suppressing the voltage on the grid side before and after supersynchronous oscillation and compensating the current of the cascaded STATCOM.

[0055] Figure 21 The embodiment of the present invention provides a phase-compensated time / supersynchronous oscillation suppression front and rear grid-side voltage FFT;

[0056] Figure 22 The results of frequency sweep of equivalent impedance and grid-side impedance of cascaded STATCOM in Embodiment 1 of the present invention are shown. Detailed Implementation

[0057] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0058] In this document, the terms "first," "second," and other similar words are not intended to imply any order, quantity, or importance, but are merely used to distinguish different elements. The terms "one," "a," and other similar words are not intended to indicate the existence of only one of the stated things, but rather that the description refers only to one of the stated things, which may have one or more. The terms "comprising," "including," and other similar words are intended to indicate a logical relationship, not a spatial relationship. For example, "A includes B" means that logically B belongs to A, not that spatially B is located inside A. Furthermore, the meanings of the terms "comprising," "including," and other similar words should be considered open-ended, not closed. For example, "A includes B" means that B belongs to A, but B does not necessarily constitute all of A; A may also include other elements such as C, D, and E.

[0059] Example 1

[0060] Embodiment 1 of the present invention provides a method and system for coordinating the suppression of subsynchronous / supersynchronous events in a renewable energy grid-connected system based on cascaded STATCOM under weak grid conditions. The main steps are as follows:

[0061] Step 1: Connect the cascaded STATCOM device in parallel to the renewable energy grid-connected system, and simultaneously detect and collect the voltage signal at the grid connection point, the output current signal of the cascaded STATCOM device, the grid-side current signal, and the submodule capacitor voltage signal in real time.

[0062] Step 2: Based on the collected grid connection point voltage signal, cascaded STATCOM device output current signal, and grid-side current signal, reactive power control based on instantaneous power theory is used to generate reactive current component compensation values.

[0063] Step 3: Based on the acquired submodule capacitor voltage signal, perform submodule capacitor voltage control to generate submodule capacitor voltage modulation current component.

[0064] Step 4: Based on the acquired grid connection point voltage signal, after processing by a base frequency notch filter, the oscillation voltage component on the grid side other than the base frequency is obtained. Then, based on sliding window fast Fourier transform (SWFFT), virtual resistance, and phase compensation, the oscillation suppression current component of the subsynchronous / supersynchronous oscillation component is extracted.

[0065] Step 5: Add the components obtained in steps 2, 3, and 4 to form the cascaded STATCOM suppression current reference value. This value is then used as the difference between the output current signal of the cascaded STATCOM device and the input current signal. This difference is then passed through a quasi-proportional resonant controller to achieve zero steady-state error tracking. After further grid voltage feedforward control, the modulation voltage of the cascaded STATCOM bridge arm can be obtained. CPS-PWM modulation is used to control the conduction of the switching devices in each full-bridge submodule.

[0066] Medium- and high-voltage STATCOMs commonly employ a cascaded H-bridge topology (single-star MMC). Single-star MMCs lack arm circulating current and corresponding circulating current control strategies. Addressing the shortcomings of existing technologies, this collaborative suppression strategy, based on the typical control structure of a cascaded STATCOM, not only achieves reactive power control but also effectively suppresses sub-supersynchronous oscillations caused by grid-connected renewable energy systems such as direct-drive wind turbines and photovoltaic inverters, thereby enhancing the stability and reliability of renewable energy grid-connected systems. Figure 2 As shown, unlike the typical control structure of a cascaded STATCOM, this suppression strategy does not employ the traditional global voltage plus phase-to-phase voltage equalization control method for its DC-side capacitor voltage. To reduce control complexity, it adopts a cascaded STATCOM submodule capacitor voltage control strategy, that is, directly controlling the average capacitor voltage of each submodule in the three-phase bridge arm. While achieving the basic function of reactive power regulation, it adds oscillation suppression control with sliding window fast Fourier transform (SWFFT), virtual resistance, phase compensation and other core components, realizing functions such as rapid identification, efficient extraction and suppression of subsynchronous / supersynchronous oscillations.

[0067] Depend on Figure 2 As shown in the system control structure block diagram, the system mainly consists of three control functions: system reactive power control, submodule capacitor voltage control, and extraction of subsynchronous / supersynchronous oscillation components. Among these, the system reactive power control generates reactive current component compensation values. Submodule capacitor voltage control generates submodule capacitor voltage modulation current component The subsynchronous / supersynchronous oscillation current components are extracted based on virtual resistance. The three are added together to form the cascaded STATCOM compensation current reference value. The output current is then compensated by the STATCOM after actual sampling. Negative feedback regulation, which employs quasi-proportional resonant control; further, after grid voltage feedforward regulation and normalization, the modulation voltage of the three-phase bridge arms is obtained. Finally, based on the three-phase bridge arm voltage modulation... The method for generating drive signals for the switching devices of each submodule of the cascaded STATCOM mainly includes two parts: CPS-PWM modulation method and submodule capacitor voltage sorting and equalization. Figure 2 middle For bridge arm inductance, The equivalent resistance of the bridge arm inductance, This represents the total voltage of each phase arm.

[0068] Firstly, there is the issue of reactive power control in the system. Because renewable energy grid-connected systems generate or absorb reactive power under different operating conditions, this can cause sudden changes in reactive power on the grid side. For example... Figure 3 The system's reactive power control structure block diagram is shown. The reactive power control element of this system adopts a control method based on instantaneous reactive power theory. It detects the reactive power on the grid side in real time and uses it as the reactive power command value for the cascaded STATCOM. Real-time output reactive power of cascaded STATCOM For comparison, a PI controller generates a specified value for reactive power current regulation. It has a power current adjustment setting. The value is set to 0, and then the three-phase reactive power current regulation value is generated through coordinate transformation. This enables the reactive power regulation of the system.

[0069] (1)

[0070] (2)

[0071] (3)

[0072] (4)

[0073] (5)

[0074] (6)

[0075] In formula (5) , For the control parameters of the controller, equation (6) shows the coordinate transformation angle. Based on grid-side voltage It is obtained by decoupling the dual synchronous coordinate system PLL (DDSRF-PLL).

[0076] based on Figure 3A Simulink simulation model was built based on the reactive power control structure block diagram. The Simulink simulation was run, with a total simulation time of 4 seconds. Reactive power control was added at 1 second, and the cascaded STATCOM output reactive power was... Figure 4 As shown, 1 second ago, the renewable energy grid-connected system absorbed 1000kVar of reactive power, causing a decrease in the grid-side reactive power support capability and resulting in a drop in grid-side voltage. 1 second later, with the addition of the reactive power control strategy, the cascaded STATCOM compensated and output the reactive power consumed by the renewable energy grid-connected system, which restored the grid-side reactive power support capability to normal and the grid-side voltage value to normal.

[0077] Secondly, for the submodule capacitor voltage control, equation (7) is used to calculate the average capacitor voltage of each submodule in the three-phase bridge arm. N represents the number of full-bridge submodules connected in series in each phase of the cascaded STATCOM. For example... Figure 5 The control structure block diagram is shown. With DC capacitor voltage reference command After differential calculation and per-unit scaling, the amplitude of the submodule capacitor voltage modulation is obtained through a PI controller. Then multiply by each , , By corresponding to the three phases a, b, and c, the voltage modulation current components of the submodule capacitor can be obtained. , Also based on grid-side voltage It is obtained by decoupling the dual synchronous coordinate system PLL (DDSRF-PLL).

[0078] (7)

[0079] based on Figure 5 The simulation analysis is shown below. In the simulation, the number of STATCOM modules N in each phase cascade is 42, and the capacitance value in the sub-module is 4900. The pre-charge voltage on the DC capacitor side is 810V. During control, the DC capacitor voltage is referenced from the command. Take 810V, add control after 1 second, from Figure 6 It can be clearly seen that the voltage fluctuation range of the submodule capacitor does not exceed The effect is better.

[0080] The extraction of the subsynchronous / supersynchronous oscillation components is the most important part of the embodiments of the present invention. Figure 7 This is a block diagram of the control structure for extracting subsynchronous oscillation components, which includes the grid-side voltage. After passing through a fundamental frequency notch filter, the oscillation voltage components on the grid side, excluding the fundamental frequency, are obtained. In equation (8), the notch frequency of the fundamental frequency notch filter is... , Take the fundamental frequency as 50Hz, and the damping ratio coefficient Take 0.04. Based on Perform frequency locking adaptive control.

[0081] (8)

[0082] Frequency-locked adaptive control is used to determine the center frequency of the oscillation. Virtual resistance value Taking 0.005, inverting and reciprocating it is to convert the detected and extracted oscillation voltage into a reverse oscillation suppression current based on virtual resistance. Then, using a second-order bandpass filter, extract the based... Suppressing the subsynchronous oscillation current component For (ultra)low frequency oscillations ( < 2.5 Hz), subsynchronous oscillation (2.5 Hz < ≤ 45 Hz), supersynchronous oscillation (55 Hz < The frequency range is relatively small (<100Hz), therefore, when suppressing subsynchronous / supersynchronous oscillations, the virtual resistance value within this frequency range is limited while ensuring the system does not diverge and can be effectively suppressed. Just leave it as is.

[0083] The frequency-locking adaptive control of this suppression method uses sliding window fast Fourier transform (SWFFT). Compared with second-order generalized integrator frequency-locking loop SOGI_FLL and other common frequency-locking loops (such as SRF-PLL, dq-PLL, etc.), the core advantages of SWFFT frequency locking are its multi-frequency processing capability based on frequency domain analysis, controllable resolution, and flexible anti-interference design, making it more suitable for monitoring complex signals (such as renewable energy grid-connected systems with multiple oscillation frequencies and strong interference). SWFFT performs real-time spectrum analysis of signals through a sliding window, simultaneously identifying and tracking multiple frequency components. The amplitude and distribution of each frequency can be extracted independently. SOGI_FLL, essentially a single-frequency tracker, suffers from tracking deviations or even failures due to frequency aliasing if multiple frequency components exist in the signal (e.g., 20Hz subsynchronous oscillation + 80Hz hypersynchronous oscillation). Traditional PLLs aim for fundamental frequency locking, but phase jitter and inaccurate frequency estimation occur due to harmonics or interference frequencies when multiple frequencies coexist. SWFFT offers controllable frequency resolution and can distinguish between similar frequency components. Its frequency resolution is determined by the sliding window length (resolution = sampling rate / ...). The frequency resolution of SOGI_FLL is determined by its bandwidth parameter, which is usually wide (to ensure dynamic response). It is susceptible to interference from adjacent frequencies, which can lead to "frequency lock-in drift". SWFFT is more flexible in frequency domain anti-interference and can actively shield specific frequency bands. SOGI_FLL and traditional PLL rely on internal parameter design for anti-interference, which can only suppress high-frequency noise or specific harmonics. It has limited ability to suppress interference in unknown frequency bands (such as sudden oscillations). Moreover, the adjustment of filter parameters must take into account dynamic response (excessive damping will lead to tracking lag). SWFFT's spectral information is reusable, facilitating feature analysis and decision-making. SOGI_FLL and traditional PLL only output locked frequencies and phases, lacking global spectral information, making it impossible to determine whether there are unlocked weak frequency components (such as potential small-amplitude oscillations) in the signal, and difficult to support subsequent multi-frequency suppression decisions. SWFFT is more adaptable to frequency jumps and drifts. In scenarios where the signal frequency jumps rapidly (such as from 20Hz to 35Hz), SWFFT updates the spectrum in real time through a sliding window, which can quickly capture frequency changes (the response speed is determined by the window length; the shorter the window, the faster the response). In contrast, the dynamic response of traditional SOGI_FLL depends on the loop gain. Too much gain will lead to overshoot, and too little gain will result in tracking lag, making it difficult to balance "no overshoot" and "fast tracking".

[0084] The flowchart of the SWFFT program is as follows: Figure 8As shown, the parameters are first initialized, then a sliding window update is performed, followed by a recursive SWFFT calculation. After completing the spectrum processing, the frequency-locked results are masked, and peak detection and frequency-locking updates are performed. Finally, the results are output, thus achieving "fast tracking". In the simulation verification of this embodiment, the SWFFT program is designed to store 0.5s of data with a spectral resolution of 2Hz. This frequency accuracy is sufficient for bandpass filtering to suppress the oscillation part. The computational complexity is low, consisting of 50 additions and multiplications, and the discrimination threshold is 2% of the rated bus voltage.

[0085] In this embodiment of the invention, SIMULINK simulation models of SOGI_FLL and SWFFT were built respectively. A controlled voltage source was used on the grid side to simulate oscillation. The frequency locking effects of the two adaptive frequency locking algorithms under different operating conditions were compared and analyzed. Figure 9 and Figure 10 The frequency was 20 Hz and the amplitude was 10% when applied at 1 second. and 3% The frequency locking results of SOGI_FLL and SWFFT during subsynchronous oscillation. This invention focuses on the fundamental voltage amplitude on the grid side and examines a 35kV power grid. The voltage level is set to 28.58 kV. The simulation results show that SOGI-FLL has poor frequency locking performance at low frequencies. When the oscillation amplitude is large, both frequency locking algorithms can achieve stable frequency locking at 1.3 s, but SOGI-FLL's frequency locking result will fluctuate to some extent. When the oscillation amplitude is small, SOGI-FLL cannot achieve correct identification, but SWFFT can still achieve accurate identification at 1.3 s. Figure 11 This is a comparison of the simulation results of SOGI_FLL and SWFFT when the subsynchronous oscillation frequency jumps. During the simulation, the frequency was set to 20 Hz and the amplitude to 10% at 1 second. The oscillation changes to a constant amplitude oscillation with a frequency of 40 Hz at 2s. Under this condition, SOGI_FLL cannot correctly identify the oscillation frequency after the change, but SWFFT can quickly and correctly identify the oscillation frequency at 1.2s and 2.2s. Figure 12 This is a comparison of SOGI_FLL and SWFFT simulation results when multiple subsynchronous oscillation frequencies are mixed. During the simulation, the frequencies added at 1 second were set to 20 Hz and 40 Hz, with an amplitude of 10%. The mixed oscillations occur under these conditions, and the frequency locking effect of SOGI-FLL fails. However, SWFFT can simultaneously identify the mixed oscillation frequencies at 1.2s. The simulation results effectively verify the advantages of the adaptive frequency locking control used in this embodiment of the invention.

[0086] based on Figure 2The control structure block diagram shown is used to build a SIMULINK simulation model, with the network-side given frequency of 20 Hz and amplitude of 5%. The oscillation was simulated over a time period of 2 seconds, with control applied at 1 second. Figure 13 As can be seen from the grid-side voltage, the subsynchronous oscillation on the grid side has been effectively suppressed. Figure 14 The results shown are the FFT results of the grid-side voltage before and after suppression. After suppression, the subsynchronous oscillation component of the grid-side voltage at 20 Hz is reduced to 0.15%, but a supersynchronous oscillation is generated at 80 Hz, which is symmetrical to the 50 Hz fundamental frequency.

[0087] To address the supersynchronous oscillation phenomenon caused by subsynchronous oscillation suppression, embodiments of the present invention add a supersynchronous oscillation component extraction step to the oscillation component stage, such as... Figure 15 As shown. The frequency of the supersynchronous oscillation generated after the subsynchronous oscillation is suppressed. Since the frequency is symmetrical around the 50Hz fundamental frequency, frequency locking for the supersynchronous oscillation is unnecessary. It should be noted that the virtual resistance values ​​selected for extracting the primary and supersynchronous oscillation components are different. Compared The selection will be larger. Choosing a smaller value can easily lead to system instability during system simulation. Take 0.1, Take 0.005. Based on Figure 15 A simulation was built, with the network side given a frequency of 20 Hz and an amplitude of 5%. The oscillation was simulated with a simulation time of 2 seconds, and control was added at 1 second. Figure 16 The results shown are the FFT results before and after suppressing the grid-side voltage. The subsynchronous oscillation is effectively suppressed, and the supersynchronous oscillation caused by it is also effectively suppressed.

[0088] When the system individually suppresses supersynchronous oscillations at specific frequencies, there may be instances where suppression misalignment leads to grid-side voltage divergence, such as... Figure 17 As shown, the given frequency on the network side Amplitude of 5% The supersynchronous oscillation was introduced with suppression control at 1 second, but the supersynchronous oscillation on the grid side was not only not effectively suppressed, but even caused the grid side voltage to diverge. Further investigation revealed that this was due to a phase difference between the actual output compensation current and the ideal output compensation current when the cascaded STATCOM suppressed supersynchronous oscillation currents at certain frequencies. The magnitude of this phase difference is related to the system's sampling frequency; in the simulation, this phase difference was approximately... Therefore, a phase compensation stage is added to the supersynchronous oscillation component extraction to correct the phase of the compensation current output at individual frequencies. The phase compensation stage uses the transfer function shown in equation (9), and its Bode plot is as follows. Figure 18As shown, in At this point, the gain of the transfer function is 1, and the phase is... ( Without changing the oscillation component extraction gain, it can also compensate for the difference between the phase of the actual output compensation current and the ideal output compensation current. Phase difference.

[0089] (9)

[0090] Figure 19 The diagram shows the block diagram of the subsynchronous / supersynchronous oscillation component extraction control structure with phase compensation. A SIMULINK simulation model was built, with other conditions unchanged, and the given frequency on the network side. Amplitude of 5% For supersynchronous oscillations, at 1 second, suppression control is added, and the suppression effect is as follows: Figure 20 and Figure 21 As shown, after adding the phase compensation stage, the phenomenon of supersynchronous oscillation suppression misalignment at certain frequencies disappears, and the oscillation is effectively suppressed, greatly improving the stability and adaptability of the suppression method proposed in this embodiment of the invention.

[0091] Finally, the reference value of the cascaded STATCOM compensation current is obtained. Then, the actual sampled STATCOM compensation output current was used. The difference is calculated and fed into the quasi-proportional resonant controller; the transfer function of the quasi-proportional resonant controller is shown in equation (10), where... This is the proportional gain, set to 0.16, responsible for adjusting the response speed and steady-state error in the low-frequency range. The resonant gain, set to 1.6, determines the peak gain at the resonant frequency. The target resonant angular frequency is set to the fundamental frequency of 50 Hz. For the cutoff frequency, consider the power grid. Fluctuation, taking values By introducing low-pass filtering characteristics to extend the bandwidth, the robustness to frequency fluctuations is improved.

[0092] (10)

[0093] The output of the quasi-proportional resonant controller is further processed by grid voltage feedforward regulation and normalization to obtain the modulation voltage of the three-phase bridge arm. Based on three-phase bridge arm voltage modulation This generates drive signals for the switching devices of each submodule of the cascaded STATCOM.

[0094] Figure 22The diagram shows a swept-frequency Bode plot of the grid-side impedance and the equivalent impedance of the cascaded STATCOM under conditions of no oscillation suppression, subsynchronous oscillation suppression, and combined subsynchronous / supersynchronous oscillation suppression. The swept frequency is 1-100 Hz, corresponding to the frequency band of the subsynchronous / supersynchronous oscillations. Without oscillation suppression, according to the impedance shunting principle, the grid-side impedance is less than the equivalent impedance of the cascaded STATCOM within this frequency band, and oscillation cannot be suppressed. With subsynchronous oscillation suppression added, the... For example, the equivalent impedance of a cascaded STATCOM will be... The impedance of the nearby STATCOM is less than that of the grid side, which allows the cascaded STATCOM to effectively suppress oscillations. Oscillations; when adding subsynchronous / supersynchronous oscillation co-suppression, the cascaded STATCOM equivalent impedance will... and The impedance is lower than the grid-side impedance, which allows the cascaded STATCOM to effectively suppress oscillations at two frequencies.

[0095] Example 2

[0096] Embodiment 2 of the present invention provides a terminal device corresponding to Embodiment 1 above. The terminal device can be a processing device for a client, such as a mobile phone, a laptop, a tablet computer, a desktop computer, etc., to execute the method of the above embodiments.

[0097] The terminal device in this embodiment includes a memory, a processor, and a computer program stored in the memory; the processor executes the computer program in the memory to implement the steps of the method in Embodiment 1 described above.

[0098] In some implementations, the memory may be high-speed random access memory (RAM), and may also include non-volatile memory, such as at least one disk storage device.

[0099] In other implementations, the processor can be any type of general-purpose processor, such as a central processing unit (CPU) or a digital signal processor (DSP), and there is no limitation here.

[0100] Example 3

[0101] Embodiment 3 of the present invention provides a computer-readable storage medium corresponding to Embodiment 1 above, on which a computer program / instructions are stored. When the computer program / instructions are executed by a processor, they implement the steps of the method of Embodiment 1 above.

[0102] A computer-readable storage medium can be a tangible device that holds and stores instructions for use by an instruction execution device. A computer-readable storage medium can be, for example, but not limited to, an electrical storage device, a magnetic storage device, an optical storage device, an electromagnetic storage device, a semiconductor storage device, or any combination thereof.

[0103] Those skilled in the art will understand that embodiments of this application can be provided as methods, systems, or computer program products. Therefore, this application can take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, this application can take the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code. The solutions in the embodiments of this application can be implemented in various computer languages, such as the object-oriented programming language Java and the interpreted scripting language JavaScript.

[0104] This application is described with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of this application. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, generate instructions for implementing the flowchart... Figure 1 One or more processes and / or boxes Figure 1 A device that provides the functions specified in one or more boxes.

[0105] These computer program instructions may also be loaded onto a computer or other programmable data processing equipment to cause a series of operational steps to be performed on the computer or other programmable equipment to produce a computer-implemented process, thereby providing instructions that execute on the computer or other programmable equipment for implementing the process. Figure 1 One or more processes and / or boxes Figure 1 The steps of the function specified in one or more boxes.

[0106] Although preferred embodiments of this application have been described, those skilled in the art, upon learning the basic inventive concept, can make other changes and modifications to these embodiments. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments as well as all changes and modifications falling within the scope of this application.

[0107] Obviously, those skilled in the art can make various modifications and variations to this application without departing from the spirit and scope of this application. Therefore, if such modifications and variations fall within the scope of the claims of this application and their equivalents, this application also intends to include such modifications and variations.

Claims

1. A method for sub / super synchronous coordinated damping of renewable energy grid connected systems, characterized in that, The method comprises the following steps: S1, connecting the cascaded STATCOM device in parallel into a renewable energy grid-connected system, and detecting and collecting voltage signals of a grid-connected point, output current signals of the cascaded STATCOM device, grid-side current signals, and sub-module capacitor voltage signals in real time; S2, generating a reactive current component compensation value by using the voltage signals of the grid-connected point, the output current signals of the cascaded STATCOM device, and the grid-side current signals; and generating a sub-module capacitor voltage modulation current component based on the collected sub-module capacitor voltage signals and performing sub-module capacitor voltage control; obtaining an oscillation voltage component other than the fundamental frequency of the grid side by processing the collected grid-connected point voltage signals through a fundamental frequency notch filter, and obtaining an oscillation suppression current component of a sub- / super-synchronous oscillation component by using the oscillation voltage component; S3, superimposing the reactive current component compensation value, the sub-module capacitor voltage modulation current component, and the oscillation suppression current component to obtain a cascaded STATCOM suppression current reference value, subtracting the cascaded STATCOM suppression current reference value from the output current signals of the cascaded STATCOM device, processing the difference through a proportional-resonant controller, and feeding forward the grid voltage to the output of the proportional-resonant controller to obtain a cascaded STATCOM bridge arm modulation voltage, and using a CPS-PWM modulation method to control the on-off of each full-bridge sub-module switching device.

2. The method of claim 1, wherein, The calculation formula of the reactive current component compensation value is: ； wherein, is a reactive current component compensation value, , represents three-phase of a cascade STATCOM device, is a coordinate transformation angle, , is a proportional coefficient of a reactive power PI controller, is an integral coefficient of a reactive power PI controller, is a reactive power given command value of a cascade STATCOM device, is a real-time output reactive power of a cascade STATCOM device, i qref is a reactive power current regulation command value, i dref is an active power current regulation regulation value, s is a complex frequency.

3. The method of claim 2, wherein, ; ; ; ; is a voltage signal of a point of common coupling, is an output current signal of the cascaded STATCOM device, .

4. The method of claim 1, wherein, The calculation process of the sub-module capacitor voltage modulation current component includes: taking the average of capacitor voltages of each sub-module of three-phase bridge arms of the cascaded STATCOM device and a direct current capacitor voltage reference instruction After the difference and the unitization, a PI controller is used to obtain the amplitude of the sub-module capacitor voltage modulation , the amplitude is multiplied by , , respectively, that is, the sub-module capacitor voltage modulation current component is obtained , represents three phases of the cascaded STATCOM device.

5. The method of claim 4, wherein, ; wherein N is the number of full-bridge sub-modules connected in series for each phase of the cascaded STATCOM device, is the sum of the output voltages of the sub-modules for each phase of the cascaded STATCOM device, is the output voltage of a single sub-module in each phase of the cascaded STATCOM device.

6. The method of claim 1, wherein, The calculation formula of the oscillation voltage component is: ； wherein is the oscillating voltage component, , denotes the three-phase of the cascaded STATCOM device, , is the fundamental frequency, s is the complex frequency, is the grid-side voltage, is the damping ratio coefficient.

7. The method of claim 1, wherein, The obtaining process of the oscillation suppression current component comprises: performing a sliding window fast Fourier transform on the oscillation voltage component, subtracting 100 Hz from the result of the sliding window fast Fourier transform to obtain an oscillation frequency; taking the inverse of the first virtual resistance, taking the inverse of the result, and multiplying the result by the oscillation voltage component to obtain a first current; taking the inverse of the second virtual resistance, taking the inverse of the result, and multiplying the result by the oscillation voltage component to obtain a second current; taking the first current as the input of a first band-pass filter, and taking the second current as the input of a second band-pass filter; superimposing the output of the first band-pass filter and the output of the second band-pass filter to obtain the oscillation suppression current component; wherein, the center frequency of the first band-pass filter is 100 Hz oscillation frequency, and the frequency of the second band-pass filter is the oscillation frequency.

8. A terminal device comprising a memory, a processor, and a computer program stored on the memory; characterized in that, The processor executes the computer program to implement the steps of the method of any one of claims 1-7.

9. A computer readable storage medium having stored thereon computer programs / instructions; characterized in that, The computer program / instructions are executed by the processor to implement the steps of the method of any one of claims 1-7.

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