Method of singulating semiconductor package structures and related apparatus

Abstract

The application provides a cutting method of a semiconductor packaging structure and a related device, and relates to the technical field of semiconductor manufacturing. The cutting method is used for cutting a semiconductor packaging structure. The semiconductor packaging structure is provided with a plurality of chip groups. Each chip group comprises a plurality of array-arranged chips. The cutting method comprises the following steps: performing image recognition on the semiconductor packaging structure to be cut to obtain the outlines of the plurality of chip groups; determining a cutting path according to the outlines of the plurality of chip groups; cutting the semiconductor packaging structure based on the cutting path to obtain the plurality of chip groups; performing image recognition on each chip group to obtain the positions of each chip on the chip group; fitting the positions of the plurality of chips on the chip group that are located in the same row or the same column according to the least square method to determine the row cutting path and the column cutting path of the chip group; and cutting the chip group based on the row cutting path and the column cutting path. When the semiconductor packaging structure is cut, the cutting method can reduce the cutting deviation rate.

Description

Technical Field

[0001] This invention relates to the field of semiconductor manufacturing technology, and more specifically, to a method for cutting a semiconductor packaging structure and related apparatus. Background Technology

[0002] In related technologies, the semiconductor packaging structure of IC (Integrated Circuit) packaging typically involves mounting chip particles onto a copper frame, followed by wire bonding, molding with molding compound, tin plating, and other multiple processes to complete the packaging. Finally, a dicing machine is used to cut the chips into individual particles. Generally, the frame itself is not very precise before packaging, and the packaged substrate undergoes some deformation after multiple processes. To reduce this deformation, a single product is usually divided into 3 or 4 parts connected by metal. Even so, while this improves the situation, it doesn't completely solve the deformation problem of the dicing path. The common method for cutting IC semiconductor packaging structures using a dicing machine is to cut in two mutually perpendicular directions, first cutting into strips, and then rotating 90° to cut into individual particles. During cutting, the blade cannot directly touch the product; a certain cutting protection distance, such as 5mm, 8mm, or 10mm, is usually set. The deformation of the dicing path causes the resin at the edge of the cut particle to be only tens of micrometers away from the metal electrode in the middle of the particle when cutting small-sized DFN (Dual Flat No-lead Package). This makes it easy to cut into the metal electrode, rendering the chip unusable. In addition, the metal frame of the package substrate causes significant wear on the cutting tool, forcing the tool to move at a slower cutting speed.

[0003] Therefore, there is an urgent need for a cutting method and related apparatus that can reduce the cutting deviation rate, increase blade life, reduce costs, and increase cutting speed when cutting semiconductor packaging structures. Summary of the Invention

[0004] This application proposes a method and related apparatus for cutting semiconductor packaging structures, which solves the problems of high cutting deviation rate, low blade life, high cost, slow cutting speed and low efficiency in related technologies.

[0005] Therefore, the first objective of this application is to provide a method for cutting a semiconductor package structure.

[0006] The second objective of this application is to provide a control system for cutting semiconductor packaging structures.

[0007] The third objective of this application is to provide another control device for cutting semiconductor package structures.

[0008] The fourth objective of this application is to provide a readable storage medium.

[0009] The fifth objective of this application is to provide a semiconductor packaging structure cutting apparatus.

[0010] In view of the above, an embodiment of the first aspect of this application provides a method for cutting a semiconductor package structure, which is used to cut a semiconductor package structure having multiple chip groups disposed on it. Each chip group includes multiple chips arranged in an array. The method for cutting the semiconductor package structure includes: performing image recognition on the semiconductor package structure to be cut to obtain the contours of the multiple chip groups; determining a cutting path based on the contours of the multiple chip groups; cutting the semiconductor package structure based on the cutting path to obtain multiple chip groups; performing image recognition on each chip group to obtain the position of each chip on the chip group; fitting the positions of multiple chips located in the same row on the chip group using the least squares method to determine the row cutting path of the chip group; fitting the positions of multiple chips located in the same column on the chip group using the least squares method to determine the column cutting path of the chip group; and cutting the chip group based on the row cutting path and the column cutting path.

[0011] In this technical solution, exemplarily, a semiconductor package structure cutting method is used to cut a semiconductor package structure, on which multiple chip groups are disposed, each chip group including multiple chips arranged in an array. The semiconductor package structure cutting method includes: performing image recognition on the semiconductor package structure to be cut to obtain the contours of multiple chip groups; determining a cutting path based on the contours of the multiple chip groups; cutting the semiconductor package structure based on the cutting path to obtain multiple chip groups; performing image recognition on each chip group to obtain the position of each chip on the chip group; fitting the positions of multiple chips located in the same row on the chip group using the least squares method to determine the row cutting path of the chip group; fitting the positions of multiple chips located in the same column on the chip group using the least squares method to determine the column cutting path of the chip group; and cutting the chip group based on the row cutting path and the column cutting path. By cutting the semiconductor package structure into chip groups, fitting the chip positions on the chip groups to determine the row cutting path and the column cutting path of the chip groups, and then cutting the chip groups into chips. Because the length of a chipset is shorter than the length of a semiconductor package structure, the number of chips in the same row or column of a chipset is less than the number of chips in the same row or column of a semiconductor package structure. Due to the smaller number of chips, each chip represents a larger proportion of the fitted data, reducing the likelihood that the row and column dicing paths fitted using the least quadratic method will actually cut into the chip. This also allows for adjustments to more parameters, such as ensuring that the size and offset of each chip are within standard tolerances and do not exceed standards. Furthermore, the shorter cutting distance also prevents the cutting components from shifting during the cutting process.

[0012] Optionally, in any of the above technical solutions, the semiconductor packaging structure further includes a frame, with multiple chipsets disposed within the frame, and the outer contour of the chipsets serving as the cutting path within the area where the chipsets are located.

[0013] In this technical solution, the semiconductor packaging structure also includes a frame, with multiple chipsets disposed within the frame. The outer contour of the chipset is used as the cutting path, and the four sides of each chipset serve as four cutting paths. When cutting according to these paths, the cutting component will not cut into the frame, thus protecting the cutting component and accelerating the cutting speed. Specifically, the frame is a metal frame.

[0014] In any of the above technical solutions, optionally, the cutting path includes a cutting direction and a cutting start point and a cutting end point located at both ends of it; the step of cutting the semiconductor package structure based on the cutting path includes: selecting any uncut cutting path, cutting the cutting path, and after the cutting is completed, jumping to the next uncut cutting path, cutting the next cutting path, until all cutting paths are cut; wherein, the step of cutting the cutting path includes: lowering the blade at the cutting start point of the cutting path, cutting along the cutting direction to the cutting end point, and then lifting the blade.

[0015] In this technical solution, during cutting, the cutting component places the blade at the starting point of the cut, rather than on the edge, thus preventing cutting the edge. Similarly, lifting the blade at the ending point of the cut also avoids cutting the edge. Chipsets in semiconductor packaging structures are typically arranged in an array, so the edges of the chipsets are often parallel or on the same straight line. Therefore, the cutting endpoint of one chipet is very close to the cutting starting point of the adjacent chipet, and the cutting direction is basically the same. Only a simple shift in the cutting position is needed to proceed to the next cutting path. The cutting component can skip the edge, thereby reducing wear on the cutting component.

[0016] In any of the above technical solutions, optionally, the semiconductor packaging structure further includes a frame, with multiple chipsets disposed within the frame, and the cutting method further includes: obtaining the outer contour of the frame; the step of determining the cutting path based on the contours of the multiple chipsets includes: determining the inner contour of the frame based on the outer contour of the chipsets, and using the straight line of the inner contour as the cutting direction; obtaining the blade lifting and lowering distance, and using the blade lifting and lowering distance extending from both ends of the outer contour of the frame in the cutting direction as the cutting endpoint and the cutting start point respectively; and determining the cutting path on the frame based on the cutting endpoint, the cutting start point, and the cutting direction.

[0017] In this technical solution, the semiconductor packaging structure also includes a frame, with multiple chipsets disposed within the frame. The cutting method further includes: obtaining the outer contour of the frame; and determining the cutting path based on the contours of the multiple chipsets, including: determining the inner contour of the frame based on the outer contour of the chipsets, using the straight line of the inner contour as the cutting direction; obtaining the blade lift-off distance, and using the blade lift-off distance extending from both ends of the outer contour of the frame in the cutting direction as the cutting endpoint and cutting start point, respectively; and determining the cutting path on the frame based on the cutting endpoint, cutting start point, and cutting direction. In other words, the cutting path is placed on the frame, and the chipsets are cut off from the frame along the inner contour. Due to the blade lift-off distance, the blade first lands on the cutting path, and after a horizontal movement, it completely cuts off the frame along the cutting path. Since only the frame is cut, the blade and cutting parameters for cutting metal frames can be selected, reducing blade wear. Furthermore, in longer directions, the frame can be cut off in one stroke, reducing cutting time.

[0018] In any of the above technical solutions, optionally, when fitting the positions of multiple chips located in the same row on the chipset according to the least squares method, at least three chips are selected; and / or when fitting the positions of multiple chips located in the same column on the chipset according to the least squares method, at least three chips are selected.

[0019] In any of the above technical solutions, the chip may be positioned at a corner or center point.

[0020] The second aspect of this application provides a control system for dicing semiconductor package structures, and a semiconductor package structure dicing apparatus. The semiconductor package structure dicing apparatus includes a dicing component, and the control system includes: an image recognition module for performing image recognition on the semiconductor package structure to be diced to obtain the contours of multiple chipsets; a dicing track planning module for determining a dicing path based on the contours of the multiple chipsets; a dicing control module for controlling the dicing component to dice the semiconductor package structure based on the dicing path to obtain multiple chipsets; the image recognition module is also used for performing image recognition on each chipset to obtain the position of each chip on the chipset; the dicing track planning module is also used for fitting the positions of multiple chips located in the same row on the chipset using the least squares method to determine the row dicing track of the chipset, and fitting the positions of multiple chips located in the same column on the chipset using the least squares method to determine the column dicing track of the chipset; the dicing control module is also used for controlling the dicing component to dice the chipset based on the row dicing track and the column dicing track.

[0021] In any of the above technical aspects, the cutting path includes a cutting direction and a cutting start point and a cutting end point located at both ends of it; the cutting control module is also used to select one of the uncut cutting paths and control the cutting component to cut the cutting path, the cutting of the cutting path includes: lowering the blade at the cutting start point of the cutting path, cutting along the cutting direction to the cutting end point and then lifting the blade; identifying and jumping to the next uncut cutting path, controlling the cutting component to cut the cutting path, until all cutting paths are cut.

[0022] In this technical solution, during cutting, the cutting component places the blade at the starting point of the cut, rather than on the edge, thus preventing cutting the edge. Similarly, lifting the blade at the ending point of the cut also avoids cutting the edge. Chipsets in semiconductor packaging structures are typically arranged in an array, so the edges of the chipsets are often parallel or on the same straight line. Therefore, the cutting endpoint of one chipet is very close to the cutting starting point of the adjacent chipet, and the cutting direction is basically the same. Only a simple shift in the cutting position is needed to proceed to the next cutting path. The cutting component can skip the edge, thereby reducing wear on the cutting component.

[0023] A third aspect of this application provides a control device for cutting semiconductor package structures, including a memory and a processor. The memory stores a program or instructions that can run on the processor. When the program or instructions are executed by the processor, they implement the steps of the cutting method for semiconductor package structures provided in the first aspect.

[0024] The fourth aspect of this application provides a readable storage medium having a program and / or instructions stored thereon, which, when executed by a processor, implement the steps of the dicing method for the semiconductor package structure provided in the first aspect.

[0025] The fifth aspect of this application provides a semiconductor package structure cutting apparatus, comprising: a cutting component for cutting semiconductor package structures; a control system for cutting semiconductor package structures as provided in the second aspect, and / or a control device for cutting semiconductor package structures as provided in the third aspect, and / or a readable storage medium as provided in the fourth aspect.

[0026] Additional aspects and advantages of this application will become apparent in the description which follows, or may be learned by practice of the invention. Attached Figure Description

[0027] To more clearly illustrate the embodiments of this application or related technologies, the accompanying drawings used in the description of the embodiments or related technologies will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on the structures shown in these drawings without creative effort.

[0028] Figure 1 This is a schematic flowchart of a method for cutting a semiconductor package structure according to an embodiment of this application;

[0029] Figure 2 This is a block diagram of a control system for dicing semiconductor package structures according to an embodiment of this application;

[0030] Figure 3 This is a block diagram of a control device for cutting semiconductor package structures according to an embodiment of this application;

[0031] Figure 4 This is one of the schematic diagrams of a semiconductor packaging structure according to an embodiment of this application;

[0032] Figure 5 This is a second schematic diagram of a semiconductor packaging structure according to an embodiment of this application;

[0033] Figure 6 This is a schematic diagram of a semiconductor packaging structure cutting apparatus according to an embodiment of this application;

[0034] Figure 7 This is a third schematic diagram of a semiconductor packaging structure according to an embodiment of this application.

[0035] Among them, 1 is a semiconductor packaging structure, 10 is a chipset, 102 is a chipset outline, 12 is a chip, 122 is a chip position, 124 is a corner position, 126 is a center position, 14 is a cutting path, 142 is a cutting direction, 144 is a cutting start point, 146 is a cutting end point, 16 is a row cutting track, 18 is a column cutting track, 20 is a border, 400 is a semiconductor packaging structure cutting device, and 402 is a cutting assembly. Detailed Implementation

[0036] To better understand the above-mentioned objectives, features, and advantages of this application, the application will be further described in detail below with reference to the accompanying drawings and specific embodiments. It should be noted that, unless otherwise specified, the embodiments and features described in these embodiments can be combined with each other.

[0037] Many specific details are set forth in the following description in order to provide a full understanding of this application. However, this application may also be implemented in other ways different from those described herein. Therefore, the scope of protection of this application is not limited to the specific embodiments disclosed below.

[0038] like Figure 4 , Figure 5 , Figure 6 and Figure 7 As shown, the semiconductor packaging structure cutting method provided by the present invention is used to cut a semiconductor packaging structure 1. The semiconductor packaging structure 1 has multiple chip groups 10 disposed on it. Each chip group 10 includes multiple chips 12 arranged in an array, such as... Figure 1 As shown, the methods for cutting semiconductor package structures include:

[0039] S101: Perform image recognition on the semiconductor package structure to be cut to obtain the outlines of multiple chipsets;

[0040] S103: Determine the cutting path based on the outlines of multiple chipsets;

[0041] S105: The semiconductor packaging structure is cut based on the cutting path to obtain multiple chipsets;

[0042] S107: Perform image recognition on each chipset to obtain the position of each chip on the chipset;

[0043] S109: The positions of multiple chips located in the same row on the chipset are fitted using the least squares method to determine the row cut path of the chipset.

[0044] S111: The positions of multiple chips located in the same column on the chipset are fitted using the least squares method to determine the column cutting path of the chipset;

[0045] S113: The chipset is cut based on row and column dicing channels.

[0046] In this embodiment, exemplarily, such as Figure 4 and Figure 5As shown, the semiconductor package structure cutting method is used to cut a semiconductor package structure 1. The semiconductor package structure 1 has multiple chip groups 10 disposed on it. Each chip group 10 includes multiple chips 12 arranged in an array. The semiconductor package structure cutting method includes: performing image recognition on the semiconductor package structure 1 to be cut to obtain multiple chip group contours 102; determining a cutting path 14 based on the multiple chip group contours 102; cutting the semiconductor package structure 1 based on the cutting path 14 to obtain multiple chip groups 10; performing image recognition on each chip group 10 to obtain the position of each chip on the chip group 10; fitting the positions of multiple chips 12 located in the same row on the chip group 10 using the least squares method to determine the row cutting path 16 of the chip group 10; fitting the positions 122 of multiple chips located in the same column on the chip group 10 using the least squares method to determine the column cutting path 18 of the chip group 10; and cutting the chip group 10 based on the row cutting path 16 and the column cutting path 18. By cutting the semiconductor package structure 1 into chipsets 10, and then fitting the chip positions 122 on the chipsets 10 to determine the row dicing channels 16 and column dicing channels 18 of the chipsets 10, the chipsets 10 are then cut into chips 12. Since the length of the chipsets 10 is less than the length of the semiconductor package structure 1, the number of chips 12 in the same row or column of the chipsets 10 is less than the number of chips 12 in the same row or column of the semiconductor package structure 1. Because there are fewer chips 12, each chip 12 has a larger proportion in the fitted data, making it less likely that the row dicing channels 16 and column dicing channels 18 fitted by the least quadratic method can actually cut the chips. This also allows for adjustments to more parameters, such as ensuring that the size and offset of each chip 12 are within standard tolerances and do not exceed standards. Simultaneously, the shorter cutting distance also prevents the cutting assembly 402 from shifting during cutting, thus avoiding any negative impact.

[0047] In some embodiments, exemplarily, such as Figure 4 and Figure 6 As shown, the semiconductor packaging structure 1 also includes a frame 20, and multiple chipsets 10 are disposed within the frame 20, with the outline of the chipsets 10 serving as the cutting path 14.

[0048] In this embodiment, exemplarily, the semiconductor package structure 1 further includes a frame 20, and multiple chip groups 10 are disposed within the frame 20. The outer contour of each chip group 10 is used as the cutting path 14, and the four sides of each chip group 10 serve as four cutting paths 14. When cutting according to the cutting paths 14, the cutting component 402 will not cut into the frame 20, thus protecting the cutting component 402 and accelerating the cutting speed. Specifically, the frame 20 is a metal frame.

[0049] In some embodiments, exemplarily, the cutting path 14 includes a cutting direction 142 and a cutting start point 144 and a cutting end point 146 located at both ends thereon; the step of cutting the semiconductor package structure 1 based on the cutting path 14 includes: selecting any uncut cutting path 14, cutting the cutting path 14, identifying and jumping to the next uncut cutting path 14 after cutting, cutting the next cutting path 14, until all cutting paths 14 are cut; wherein, the step of cutting the cutting path 14 includes: lowering the blade at the cutting start point 144 of the cutting path 14, cutting along the cutting direction 142 to the cutting end point 146 and then lifting the blade.

[0050] In this embodiment, exemplarily, such as Figure 4 and Figure 6 As shown, during cutting, the cutting component 402 places the blade at the cutting start point 144, rather than on the edge 20, thus preventing cutting the edge 20. Similarly, lifting the blade at the cutting end point 146 also avoids cutting the edge 20. The chipsets 10 on the semiconductor package structure 1 are generally arranged in an array, so the edges of the chipsets 10 are often parallel or on the same straight line. Therefore, the cutting end point 146 of the chipset 10 is very close to the cutting start point 144 of the adjacent chipset 10, and the cutting directions 142 are basically the same. Only a simple shift in the cutting position is needed to cut the next cutting path 14. The cutting component 402 can skip the edge 20, thereby reducing wear on the cutting component 402.

[0051] In some embodiments, exemplarily, such as Figure 7 As shown, the semiconductor package structure 1 also includes a frame 20, and multiple chipsets 10 are disposed within the frame 20. The cutting method further includes: obtaining the outer contour of the frame 20; and determining the cutting path 14 based on the contours of the multiple chipsets 10. The steps include: determining the inner contour of the frame 20 based on the outer contour of the chipsets 10, and taking the straight line of the inner contour as the cutting direction 142; obtaining the blade lifting and lowering distance H1, and taking the blade lifting and lowering distance H1 extending from the outer contour of the frame 20 to both ends in the cutting direction 142 as the cutting endpoint 146 and the cutting start point 144, respectively; and determining the cutting path 14 on the frame 20 based on the cutting endpoint 146, the cutting start point 144, and the cutting direction 142.

[0052] In this embodiment, the semiconductor packaging structure 1 further includes a frame 20, and multiple chipsets 10 are disposed within the frame 20. The cutting method further includes: obtaining the outer contour of the frame 20; and determining the cutting path 14 based on the contours of the multiple chipsets 10, including: determining the inner contour of the frame 20 based on the outer contour of the chipsets 10, and using the straight line of the inner contour as the cutting direction 142; obtaining the blade lifting and lowering distance H1, and using the blade lifting and lowering distance H1 extending from the outer contour of the frame 20 at both ends along the cutting direction 142 as the cutting endpoint 146 and the cutting start point 144; and determining the cutting path 14 on the frame 20 based on the cutting endpoint 146, the cutting start point 144, and the cutting direction 142. In other words, the cutting path 14 is placed on the frame 20, and the chipset 10 is cut off from the frame 20 along the inner contour of the frame 20. Since the blade drop interval is set, the blade will first drop onto the cutting path 14. After a horizontal movement, the frame 20 will be completely cut off along the cutting path 14. Since only the frame 20 is cut, the blade and cutting parameters for cutting the metal frame can be selected, which can reduce the wear of the blade. In the longer direction, the frame 20 can be cut off in one cut, reducing the cutting time.

[0053] In some embodiments, exemplarily, such as Figure 4 As shown, when fitting multiple chip positions 122 located in the same row on the chipset 10 according to the least squares method, at least three chips 12 are selected; and / or when fitting multiple chip positions 122 located in the same column on the chipset 10 according to the least squares method, at least three chips 12 are selected.

[0054] In some embodiments, exemplarily, such as Figure 4 and Figure 7 As shown, chip position 122 is either corner position 124 or center position 126 of chip 12.

[0055] In some embodiments, exemplarily, chip 12 is a DFN chip, the side length of which is greater than or equal to 0.2 mm and less than or equal to 2 mm.

[0056] In this embodiment, for example, chip 12 is a DFN chip, mainly a small-sized DFN chip with a side length greater than or equal to 0.2 mm and less than 2 mm. Compared with conventional DFN chips and QFN (Quad Flat No-lead Package) chips, this type of chip has a smaller size and is therefore more difficult to process, such as DFN0603 and DFN1010.

[0057] In some embodiments, exemplarily, the semiconductor package structure cutting method firstly improves the alignment method, optimizing multi-point alignment (i.e., least squares alignment) instead of the previous two-point alignment. This involves fitting an optimal cutting angle using multiple points (the number of points is configurable). While there may be slight offset during cutting, it ensures that the size and offset of each product are within standard tolerances. Secondly, the frame 20 is removed to address the issue of rapid blade wear and slow cutting speed. Software control first cuts the product frame 20. After cutting the frame 20, the equipment automatically pauses and stops the spindle rotation. Simultaneously, the worktable moves to the tool change door position, and the door lock automatically unlocks. The operator can then open the tool change door to remove the product frame 20, close the door, and continue cutting automatically. With the frame 20 removed, the product can be cut at a faster speed, such as 40mm / s, 50mm / s, or 60mm / s. The cutting speeds for the frame 20 and the product itself can be set separately. Without the frame 20, blade wear is reduced, increasing blade life and cutting efficiency. Meanwhile, the cutting method has been improved. Conventional cutting methods can only cut from one side to the other. Due to frame deformation, especially along the long side of the product, the longer the cutting length, the more severe the offset. Dividing a product into 3 or 4 pieces for separate cutting, such as the DFN0603 product, can be problematic. The distance between some products is very small. Setting the cutting protection distance cannot accurately control the position of the blade drop and lift, which may result in the blade not cutting to the designated position or the blade falling on the product. After software optimization, the blade drop and lift distance can be set by aligning the graphic position, which can accurately control the position of the blade drop and lift during cutting, ensuring that all products are cut without problems.

[0058] As mentioned earlier, small-sized DFN products are usually divided into 3 or 4 parts connected by metal to form a whole. In the new method, we first remove 20mm of the frame and also remove the connecting metal in the middle. In this way, a product becomes 3 or 4 independent small products. Each independent product is cut separately, which reduces the cutting distance and improves the cutting deviation.

[0059] The product is affixed to a UV film (Ultraviolet (Curable) Film) and placed in a material box; the material box is placed on the equipment; the fully automatic process begins, the equipment loads the product and places it on the worktable; image alignment is performed using the least squares method, and the cutting angle and cutting path are adjusted and confirmed; cutting begins, cutting only the border 20; the equipment automatically pauses and stops the spindle rotation, and simultaneously the worktable moves to the tool change door position, the door lock automatically opens, at which point the operator can open the tool change door to remove the product border 20, and then close the tool change door; cutting continues, cutting each small piece of product into individual particles; cutting ends; cleaning; unloading. Through methods such as least squares alignment, border 20 removal cutting, cutting according to small pieces of product, and setting the lifting and lowering positions of the blade based on the alignment pattern, this technology improves upon the problems existing in cutting semiconductor packaging structures. For example, for small-sized DFN products such as 0603 / 1010, meeting the CPK (Process Capability Index) requirements results in high cutting yield and improved blade life.

[0060] like Figure 2 and Figure 6 As shown, a second aspect of this application provides a control system 200 for dicing semiconductor package structures and a dicing apparatus 400 for dicing semiconductor package structures. The dicing apparatus 400 includes a dicing component 402. The control system 200 includes: an image recognition module 202 for performing image recognition on the semiconductor package structure 1 to be diced and obtaining the contours of multiple chipsets 10; a dicing path planning module 204 for determining a dicing path 14 based on the contours of the multiple chipsets 10; and a dicing control module 206 for controlling the dicing component 402 to dice the semiconductor package structure 1 based on the dicing path 14, thereby obtaining... The system includes multiple chipsets 10; an image recognition module 202 is further configured to perform image recognition on each chipset 10 to obtain the position of each chip on the chipset 10; a cutting track planning module 204 is further configured to fit the positions of multiple chips located in the same row on the chipset 10 according to the least squares method to determine the row cutting track 16 of the chipset 10, and fit the positions of multiple chips located in the same column on the chipset 10 according to the least squares method to determine the column cutting track 18 of the chipset 10; and a cutting control module 206 is further configured to control the cutting component 402 to cut the chipset 10 based on the row cutting track 16 and the column cutting track 18.

[0061] A third aspect of this application provides a control device 300 for cutting semiconductor package structures, such as... Figure 3As shown, the control device 300 for cutting semiconductor package structures includes a memory 302 and a processor 304. The memory 302 stores programs or instructions that can be run on the processor 304. When the program or instructions are executed by the processor 304, they implement the steps of the cutting method for semiconductor package structures provided in the first aspect.

[0062] The fourth aspect of this application provides a readable storage medium having a program and / or instructions stored thereon, which, when executed by a processor, implement the steps of the dicing method for the semiconductor package structure provided in the first aspect.

[0063] The fifth aspect of this application provides a semiconductor packaging structure dicing apparatus 400, such as... Figure 6 As shown, the semiconductor package structure cutting apparatus 400 includes: a cutting component 402 for cutting the semiconductor package structure 1; a control system 200 for cutting the semiconductor package structure as provided in the second aspect; and / or a control device 300 for cutting the semiconductor package structure as provided in the third aspect; and / or a readable storage medium as provided in the fourth aspect.

[0064] Furthermore, the use of terms such as "first," "second," etc., in this application is for descriptive purposes only and should not be construed as indicating or implying their relative importance or implicitly specifying the number of technical features indicated. Therefore, a feature defined as "first" or "second" may explicitly or implicitly include at least one of that feature. In the description of this application, "multiple" means at least two, such as two, three, etc., unless otherwise explicitly specified.

[0065] In this application, unless otherwise expressly specified and limited, the terms "connection," "fixed," etc., should be interpreted broadly. For example, "fixed" can mean a fixed connection, a detachable connection, or an integral part; it can mean a mechanical connection or an electrical connection; it can mean a direct connection or an indirect connection through an intermediate medium; it can mean the internal communication of two components or the interaction between two components, unless otherwise expressly limited. Those skilled in the art can understand the specific meaning of the above terms in this application according to the specific circumstances.

[0066] Furthermore, the embodiments of this application can be combined with each other, but only if they are based on what those skilled in the art can do. If the combination of embodiments is contradictory or cannot be implemented, it should be considered that such combination of embodiments does not exist and is not within the scope of protection claimed by this application.

[0067] The above are merely preferred embodiments of this application and are not intended to limit this application. Various modifications and variations can be made to this application by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the protection scope of this application.

Claims

1. A method for cutting a semiconductor package structure, characterized in that, A method for cutting a semiconductor package structure, wherein the semiconductor package structure has multiple chip groups disposed thereon, the chip groups comprising multiple chips arranged in an array, and the method for cutting the semiconductor package structure includes: Image recognition is performed on the semiconductor package structure to be cut to obtain the outlines of multiple chipsets; The cutting path is determined based on the outlines of the multiple chipsets; The semiconductor packaging structure is cut according to the cutting path to obtain multiple chipsets; Perform image recognition on each of the chipsets to obtain the position of each chip on the chipset; The row cut path of the chipset is determined by fitting the positions of multiple chips located in the same row on the chipset using the least squares method. The positions of multiple chips located in the same column on the chipset are fitted using the least squares method to determine the column cutting path of the chipset; The chipset is cut based on the row cutting channels and the column cutting channels; The semiconductor packaging structure further includes a frame, and a plurality of the chipsets are disposed within the frame. The cutting method further includes: obtaining the outer contour of the frame. The step of determining the cutting path based on the contours of the multiple chipsets includes: The inner contour of the frame is determined based on the outer contour of the chipset, and the straight line containing the inner contour is used as the cutting direction. The blade lifting and lowering distance is obtained, and in the cutting direction, the outer contour of the frame extends to both ends at the blade lifting and lowering distance, respectively, as the cutting start point and cutting end point. The cutting path is determined on the border based on the cutting start point, the cutting end point, and the cutting direction.

2. The method for cutting a semiconductor package structure according to claim 1, characterized in that, The semiconductor packaging structure also includes a frame, and a plurality of the chip groups are disposed within the frame. In the area where the chip groups are located, the outer contour of the chip groups is used as the cutting path.

3. The method for cutting a semiconductor package structure according to claim 2, characterized in that, The cutting path includes a cutting direction and a cutting start point and a cutting end point located at both ends of it; The step of cutting the semiconductor package structure based on the cutting path includes: Select any uncut cutting path and cut the cutting path. After the cutting is completed, jump to the next uncut cutting path and cut the next cutting path until all cutting paths have been cut. The step of cutting the cutting path includes: placing the blade at the starting point of the cutting path, cutting along the cutting direction to the ending point of the cutting path, and then lifting the blade.

4. The method for cutting a semiconductor package structure according to claim 1 or 2, characterized in that, When fitting the positions of multiple chips located in the same row on the chipset using the least squares method, at least three chips are selected; and / or When fitting the positions of multiple chips located in the same column on the chipset using the least squares method, at least three chips are selected.

5. The method for cutting a semiconductor package structure according to claim 1 or 2, characterized in that, The chip's position is either its corner point or its center point.

6. A control system for cutting semiconductor package structures, characterized in that, A semiconductor packaging structure dicing apparatus, the semiconductor packaging structure dicing apparatus including a dicing component, the control system for dicing the semiconductor packaging structure, the semiconductor packaging structure having multiple chip groups disposed thereon, the chip groups including multiple chips arranged in an array, the control system including: The image recognition module is used to perform image recognition on the semiconductor package structure to be cut and obtain the outlines of multiple chipsets; The cutting path planning module is used to determine the cutting path based on the contours of the multiple chipsets; A cutting control module is used to control the cutting component to cut the semiconductor packaging structure based on the cutting path to obtain multiple chipsets; The image recognition module is also used to perform image recognition on each of the chipsets to obtain the position of each chip on the chipset; The cutting track planning module is further configured to fit the positions of multiple chips located in the same row on the chipset using the least squares method to determine the row cutting track of the chipset, and to fit the positions of multiple chips located in the same column on the chipset using the least squares method to determine the column cutting track of the chipset. The cutting control module is also used to control the cutting component to cut the chipset based on the row cutting track and the column cutting track; The semiconductor packaging structure further includes a frame, and a plurality of the chipsets are disposed within the frame. The image recognition module further includes: acquiring the outer contour of the frame. The step of determining the cutting path based on the contours of the multiple chipsets includes: The inner contour of the frame is determined based on the outer contour of the chipset, and the straight line containing the inner contour is used as the cutting direction. The blade lifting and lowering distance is obtained, and in the cutting direction, the outer contour of the frame extends to both ends at the blade lifting and lowering distance, respectively, as the cutting start point and cutting end point. The cutting path is determined on the border based on the cutting start point, the cutting end point, and the cutting direction.

7. The control system for cutting semiconductor packaging structures according to claim 6, characterized in that, The cutting path includes a cutting direction and a cutting start point and a cutting end point located at both ends of it; The cutting control module is also used to select any uncut cutting path and control the cutting component to cut the cutting path. Cutting the cutting path includes: lowering the blade at the cutting starting point of the cutting path, cutting along the cutting direction to the cutting ending point, and then lifting the blade. Identify and jump to the next uncut cutting path, and control the cutting component to cut the cutting path until all cutting paths are cut.

8. A control device for cutting semiconductor package structures, characterized in that, include: Memory, which stores programs or instructions; A processor that, when executing the program or instructions, implements the steps of the method for cutting a semiconductor package structure as described in any one of claims 1 to 5.

9. A readable storage medium having a program or instructions stored thereon, characterized in that, When the program or instructions are executed by the processor, they implement the steps of the method for cutting the semiconductor package structure as described in any one of claims 1 to 5.

10. A semiconductor packaging structure cutting apparatus, characterized in that, include: Cutting components are used to cut semiconductor package structures; The control system for cutting semiconductor package structures as described in claim 6 or 7; and / or The control device for cutting semiconductor package structures as described in claim 8; and / or The readable storage medium as described in claim 9.

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