Power transmission line fault signal acquisition circuit and method

Abstract

The invention discloses a power transmission line fault signal acquisition circuit and method, relates to the technical field of signal acquisition, and solves the problem of low precision of a traditional ground fault detection method in the prior art. The circuit comprises a Rogowski coil, a signal conditioning circuit, a high-speed AD sampling front-end circuit and an analog-to-digital conversion chip. Wherein the Rogowski coil induces current of a power transmission line, the signal conditioning circuit converts a voltage signal output by the Rogowski coil into a voltage signal suitable for AD conversion, the high-speed AD sampling front-end circuit converts an analog signal into a digital signal, and the analog-to-digital conversion chip converts the digital signal into a binary complement format. Therefore, high-precision acquisition of defect discharge current is realized, and meanwhile, the sampling speed and precision are ensured by adopting the high-speed AD sampling front-end circuit and the analog-to-digital conversion chip. In a word, the method can accurately detect the grounding fault of the overhead transmission line, and improves the power supply stability and reliability of a power system.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of signal acquisition, in particular to a power transmission line fault signal acquisition circuit and method. BACKGROUND

[0002] In modern power systems, overhead transmission lines, as the main artery of power transmission, bear the heavy responsibility of transmitting power generated by power plants to load centers over long distances. The reliability of its operation is directly related to the safety and stability of the entire power grid and the quality of power supply, and is related to the national economy and people's livelihood. However, due to the long-term exposure of overhead lines to complex natural environments, they are extremely vulnerable to lightning, contamination, tree contact, external damage, and insulator aging, and are affected by multiple factors, resulting in frequent ground faults. Such faults not only threaten the insulation of equipment due to overvoltage, but also may cause short-circuit current to burn the conductor, and even cause large-scale power outages, causing great losses to social production and people's life. Therefore, quickly and accurately detecting and locating ground faults is of great significance to shorten the power outage time, improve the reliability of power supply, and ensure the safe operation of the power grid. For a long time, the industry has mainly relied on electromagnetic current transformers (CT) in conjunction with relay protection devices to collect and distinguish fault signals. However, with the continuous improvement of power grid voltage levels, the continuous expansion of transmission capacity, and the large-scale access of distributed power sources, the traditional detection method has been difficult to meet the urgent needs of modern smart grids for high precision and high sensitivity in fault diagnosis, and technological innovation is needed to break through the existing bottleneck.

[0003] Traditional grounding fault detection methods have many inherent defects that are difficult to overcome, which seriously restricts the accuracy and timeliness of fault identification. First, the electromagnetic current transformer works based on the principle of electromagnetic induction of the core. When the fault current is large, magnetic saturation phenomenon is easy to occur, which leads to serious distortion of the secondary output signal, and the transient characteristics of the primary side current cannot be truly reflected. Especially in the case of weak fault such as high resistance grounding or arc grounding, the sensitivity and linearity decrease significantly, and the detection accuracy is difficult to guarantee. Second, the traditional acquisition circuit lacks effective electromagnetic shielding and signal isolation measures. In the strong electromagnetic interference environment of the substation, the measurement signal is easy to string into noise and common-mode voltage, the signal-to-noise ratio is low, and it is easy to cause the protection device to malfunction or refuse to move. Third, the sampling frequency of the existing scheme is generally low (usually only several kHz to several tens of kHz), which is difficult to completely capture the high-frequency transient components (up to several MHz) generated in the grounding fault instant, and a large amount of valuable fault feature information is lost, limiting the analysis ability of intelligent algorithms. In addition, the traditional A / D conversion output mostly uses formats such as offset binary, which needs to be converted complexly before being used for digital signal processing, increasing the system delay and operation burden. More importantly, there is a lack of electrical isolation between the electromagnetic CT and the subsequent electronic circuit, and the high-voltage side fault may be directly transmitted to the secondary system, threatening personal and equipment safety, and the attenuation and distortion in the signal transmission process also further reduce the measurement accuracy. These technical shortcomings are intertwined with each other, making the traditional method appear to be inadequate when facing complex working conditions, and a new solution is needed to fundamentally break through these limitations. That is, the traditional grounding fault detection method often has low accuracy and is easily disturbed.

[0004] Therefore, a power transmission line fault signal acquisition circuit and method are needed. SUMMARY

[0005] In view of the problem that the traditional grounding fault detection method in the prior art often has low accuracy, the present application provides a power transmission line fault signal acquisition circuit and method, which can accurately detect the grounding fault of the overhead line power transmission line and improve the stability and reliability of the power system power supply. The specific technical solutions are as follows: The utility model relates to a kind of transmission line fault signal acquisition circuit, including ross coil, signal conditioning circuit, high-speed AD sampling front-end circuit and A / D circuit, wherein, ross coil is connected with signal conditioning circuit, signal conditioning circuit is connected with high-speed AD sampling front-end circuit, A / D circuit is equipped with analog-digital conversion chip, ross coil includes sampling resistance, signal conditioning circuit includes an operational amplifier and a ross coil output end with high-speed sampling circuit isolated differential amplifier, high-speed AD sampling front-end circuit uses ADC drive chip as the preamplifier circuit of analog-digital converter, ross coil is used to induct transmission line current, signal conditioning circuit is used to convert the voltage signal of ross coil output into suitable AD conversion voltage signal, high-speed AD sampling front-end circuit is used to convert analog signal into digital signal, and analog-digital conversion chip is used to convert digital signal into binary complement format.

[0006] Preferably, the circuit uses the additional sampling resistance non-inductive resistance Rf of ross coil as 0.5 ohm.In order to collect defect discharge current with high precision and cooperate subsequent AD differential input (input amplitude 1-2V), signal conditioning circuit is added, so that the voltage value of input AD converter is between 1-2V, while the output end of ross coil is isolated from high-speed sampling circuit to avoid mutual influence.Select AD8051 as the operational amplifier of high-speed sampling front-end circuit, and the 3dB small signal bandwidth is 150MHz, which is much larger than the voltage frequency of defect discharge current traveling wave after passing through ross coil, so the signal attenuation caused by the operational amplifier itself is below 1%, which meets the design requirements.

[0007] Preferably, the input voltage noise of the circuit is 16nV / Hz, when the input signal is 1MHz and the load resistance is 10K ohm, the input voltage noise Uin'=8mV, and the output voltage noise U=Uin'×2=32mV, since the maximum value of defect discharge current voltage signal passing through ross coil is 2V, the accuracy is 0.8%, which meets the accuracy requirement. Designing this non-inductive resistance also has the advantage of very small junction capacitance, which is more suitable for parallel connection to signal line without affecting the characteristics of signal, so two resistors are connected in parallel on the signal input line of AD8051 to provide protection for signal line, when the voltage across the power supply exceeds 5.1V, the resistor bears most of the power consumption, providing a bleeder circuit for surge current.

[0008] Preferably, TSMA5.1 transient suppression diode is added to the output end of ross coil to prevent excessive transient voltage and protect the input end of operational amplifier. Defect discharge current can be shown as follows: Wherein, A(t) is the instantaneous amplitude of the defect discharge current signal, ω(t) is the center frequency of the discharge traveling wave current, k is the amplitude coefficient of the discharge traveling wave current. Since the frequency range of the defect discharge current high harmonic is between dozens of KHz to hundreds of KHz, according to the sampling theorem, the frequency of A / D conversion must be greater than 2 times the highest frequency of the signal. In order to better maintain the signal waveform, the sampling frequency of the device is 10MHz. At the same time, according to the theory and experiment, the change range of the discharge current caused by different types of discharge data is not the same, which requires that the A / D circuit has a large input dynamic range. In addition, in order to facilitate the operation of the digital circuit, the A / D circuit can output the sampling data in binary complement format.

[0009] Preferably, the application adopts the AD sampling mode of differential input. The circuit is shown in the drawing. Wherein, the ADC drive chip converts the single-ended signal output by the amplifier circuit into a differential signal, and sends it into the high-speed A / D conversion chip. The common-mode voltage of the differential output of the analog-to-digital converter is set by the pin Vcom.

[0010] Preferably, the conversion chip adopted by the application has a differential sampling and holding amplifier circuit at the input end, and the peak value range of the differential input is 1-2V. The 12-bit sampling accuracy makes the input dynamic range of the A / D circuit reach 66dB. The output end is a multi-stage differential pipeline structure, and is equipped with error correction logic, which ensures the accuracy of the data when sampling at 65MHz. In addition, the output data can be configured in standard binary or binary complement format. The ADC drive chip is used as the preamplifier of the analog-to-digital converter in the high-speed sampling part, and the common-mode input voltage value Vref is set by the conversion chip.

[0011] Compared with the prior art, the application has the following beneficial effects: The application comprises a Rogowski coil, a signal conditioning circuit, a high-speed AD sampling front-end circuit and an analog-to-digital conversion chip. The current of the power transmission line is inducted by the Rogowski coil; the voltage signal output by the Rogowski coil is converted into a voltage signal suitable for AD conversion by the signal conditioning circuit; the analog signal is converted into a digital signal by the high-speed AD sampling front-end circuit; and the digital signal is converted into a binary complement format by the analog-to-digital conversion chip. In summary, the application firstly adopts an additional sampling resistor and a signal conditioning circuit to realize high-precision collection of the defect discharge current; secondly adopts a high-speed AD sampling front-end circuit and an analog-to-digital conversion chip to ensure the sampling speed and accuracy; and finally the application can accurately detect the ground fault of the overhead power transmission line, thereby improving the stability and reliability of the power supply of the power system. BRIEF DESCRIPTION OF DRAWINGS

[0012] In order to more clearly illustrate the technical solutions in the specific embodiments of the present application or the prior art, the drawings needed to be used in the specific embodiments or prior art description will be briefly introduced below. In all the drawings, similar elements or parts are generally identified by similar reference signs. In the drawings, each element or part is not necessarily drawn according to the actual proportion.

[0013] Figure 1 is a discharge current sampling signal conditioning circuit diagram of the present application; Figure 2 is a conversion chip conversion circuit schematic diagram of the present application. DETAILED DESCRIPTION

[0014] The technical solutions in the embodiments of the present application will be described clearly and completely below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are part of, rather than all of, the embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without any creative work fall within the protection scope of the present application.

[0015] It should be understood that, when used in the specification and the appended claims, the terms "comprise" and "include" indicate the presence of described features, integers, steps, operations, elements, and / or components, but do not exclude one or more other features, integers, steps, operations, elements, components, and / or groups thereof.

[0016] It should also be understood that the terms used in the present application specification are only for the purpose of describing specific embodiments and are not intended to limit the present application. As used in the present application specification and the appended claims, unless otherwise clearly indicated by the context, the singular forms "a", "an" and "the" are intended to include the plural forms.

[0017] It should be further understood that the term "and / or" used in the present application specification and the appended claims means any combination of one or more of the associated listed items and all possible combinations, and includes these combinations.

[0018] As Figure 1 , Figure 2As shown, in one embodiment of the present application, a power line fault signal acquisition circuit is provided, comprising a Rogowski coil, a signal conditioning circuit, a high-speed AD sampling front-end circuit and an A / D circuit, wherein the Rogowski coil is connected with the signal conditioning circuit, the signal conditioning circuit is connected with the high-speed AD sampling front-end circuit, an analog-to-digital conversion chip is arranged in the A / D circuit, the Rogowski coil comprises a sampling resistor, the signal conditioning circuit comprises an operational amplifier and a differential amplifier for isolating the output end of the Rogowski coil from the high-speed sampling circuit, the high-speed AD sampling front-end circuit adopts an ADC driving chip as a preamplifier circuit of the analog-to-digital converter, the Rogowski coil is used for sensing the current of the power line, the signal conditioning circuit is used for converting the voltage signal output by the Rogowski coil into a voltage signal suitable for AD conversion, the high-speed AD sampling front-end circuit is used for converting the analog signal into a digital signal, and the analog-to-digital conversion chip is used for converting the digital signal into a binary complement format.

[0019] Further, the circuit adopts the Rogowski coil with an additional sampling resistor non-inductive resistor Rf of 0.5 ohm. In order to accurately collect the defect discharge current and cooperate with the subsequent AD differential input (input amplitude 1-2V), the signal conditioning circuit is added, so that the voltage value input into the AD converter is between 1-2V, and the output end of the Rogowski coil is isolated from the high-speed sampling circuit to avoid mutual influence. The AD8051 is selected as the operational amplifier of the high-speed sampling front-end circuit, and the 3dB small signal bandwidth thereof is 150MHz, which is much larger than the voltage frequency output by the defect discharge current row wave through the Rogowski coil, so that the signal attenuation caused by the operational amplifier itself is below 1%, which meets the design requirement.

[0020] Further, the circuit input voltage noise is 16nV / Hz, when the input signal is 1MHz and the load resistor is 10K ohm, the input voltage noise Uin'=8mV, the output voltage noise U=Uin'x2=32mV, since the maximum value of the voltage signal output by the defect discharge current through the Rogowski coil is 2V, therefore the precision is 0.8%, which meets the precision requirement. The non-inductive resistor also has the advantage of very small junction capacitance, which is more suitable for being connected in parallel to the signal line without affecting the characteristics of the signal, so two resistors are connected in parallel on the signal input line of the AD8051 to provide protection for the signal line, when the voltage across the power supply is greater than 5.1V, the resistor bears most of the power consumption to provide a bleeder circuit for the impact current.

[0021] Further, the TSMA5.1 transient suppression diode is added to the output end of the Rogowski coil to prevent excessive transient voltage and protect the input end of the operational amplifier. The defect discharge current can be shown by the following formula: Wherein, A(t) is the instantaneous amplitude of the defect discharge current signal, ω(t) is the center frequency of the discharge traveling wave current, k is the amplitude coefficient of the discharge traveling wave current. Since the frequency range of the defect discharge current high harmonic is between dozens of KHz to hundreds of KHz, according to the sampling theorem, the frequency of A / D conversion must be greater than 2 times the highest frequency of the signal. In order to better maintain the signal waveform, the sampling frequency of the device is 10MHz. At the same time, according to the theory and experiment, the change range of the discharge current caused by different types of discharge data is not the same, which requires that the A / D circuit has a large input dynamic range. In addition, in order to facilitate the operation of the digital circuit, the A / D circuit can output the sampling data in binary complement format.

[0022] Further, the application adopts the AD sampling mode of differential input. The circuit is shown in the drawing. Wherein, the ADC drive chip converts the single-ended signal output by the amplification circuit into a differential signal, and sends it into the high-speed A / D conversion chip. The common-mode voltage of the differential output of the analog-to-digital converter is set by the pin Vcom.

[0023] Further, the conversion chip adopted by the application has a differential sampling holding amplification circuit at the input end, and the peak value range of the differential input is 1-2V. The 12-bit sampling accuracy makes the input dynamic range of the A / D circuit reach 66dB. The output end is a multi-stage differential pipeline structure, and is equipped with error correction logic, which ensures the accuracy of the data when sampling at 65MHz. In addition, the output data can be configured in standard binary or binary complement format. The ADC drive chip is used as the preamplifier of the analog-to-digital converter in the high-speed sampling part, and the common-mode input voltage value Vref is set by the conversion chip.

[0024] In an embodiment of the application, the sampling resistance of the Rogowski coil is 0.5 ohm, the signal conditioning circuit includes an operational amplifier and a differential amplifier, the operational amplifier adopts AD8051, and the differential amplifier is used to isolate the output end of the Rogowski coil from the high-speed sampling circuit. The analog-to-digital conversion chip adopts the conversion chip of ANALOG DEVICES company, is powered by 3V, has 12-bit sampling accuracy, and is an integrated sampling chip with a maximum sampling frequency of 65MHz. The high-speed AD sampling front-end circuit uses the ADC drive chip as the preamplifier of the analog-to-digital converter.

[0025] (1) ADC drive chip sampling calculation. When the gain G=+1, the-3dB bandwidth is 320MHz, and since the input signal is 1MHz, it meets the 1% accuracy requirement. The input voltage noise of the chip is 10nV / Hz, and according to the circuit, the output voltage noise accounts for 1% of the correct voltage value, which exactly meets the 1% accuracy requirement. Because there is a reference voltage Vref input in the Vref circuit, differential output noise will be brought in: Resistance accuracy at -OUT to +IN: Resistance accuracy at +OUT to -IN: The differential output noise is: VnIN, Vcom is the common-mode input voltage, VnOUT, dm is the differential output noise, since the resistance accuracy of RG, RF is within 1%, so β1-β2=0.499-0.501, and the following can be obtained: The common-mode input voltage is 1V, so: The ratio of the differential output noise and the correct current value is 0.398%, which meets the 1% accuracy requirement.

[0026] (2) Analog-to-digital converter sampling calculation: Since the maximum differential nonlinearity error of the AD conversion part in the conversion chip is 0.95LSB, and the internal integral nonlinearity error is 0.75LSB, the calculation value of the AD conversion can be obtained as follows, which meets the 1% design requirement.

[0027] .

[0028] In summary, the application provides an overhead line transmission line grounding fault signal acquisition method, which comprises the following steps: first, the current of the transmission line is inducted by a Rogowski coil; then the signal conditioning circuit converts the voltage signal output by the Rogowski coil into a voltage signal suitable for AD conversion; then the high-speed AD sampling front-end circuit converts the analog signal into a digital signal; finally, the analog-to-digital conversion chip converts the digital signal into a binary complement format. The method can accurately detect the grounding fault of the overhead line transmission line, and improves the stability and reliability of the power system Those skilled in the art can appreciate that the units of each example described in combination with the embodiments disclosed herein can be realized in electronic hardware, computer software or a combination of both. In order to clearly illustrate the interchangeability of hardware and software, the components of each example have been described in the above description in general terms. Whether the functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. The skilled person can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of the application.

[0029] In the embodiments provided by the present application, it should be understood that the division of the units is merely a logical functional division, and in actual implementation, another division manner can be used, for example, a plurality of units can be combined into one unit, one unit can be split into a plurality of units, or some features can be ignored, etc.

[0030] In addition, each functional unit in each embodiment of the present application can be integrated in one processing unit, or each unit can exist physically, or two or more units can be integrated in one unit. The integrated unit can be realized in the form of hardware or in the form of a software functional unit.

[0031] When the integrated unit is realized in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer readable storage medium. Based on such understanding, the technical solutions of the present application essentially or the part that contributes to the prior art or the whole or part of the technical solutions can be embodied in the form of a software product. The computer software product is stored in a storage medium and includes several instructions for causing a computer device (which can be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the methods described in each embodiment of the present application. The foregoing storage medium includes: a U disk, a read-only memory (ROM, Read-Only Memory), a random access memory (RAM, Random Access Memory), a mobile hard disk, a magnetic disk or an optical disk, and various program code storage media.

[0032] Finally, it should be noted that: the above embodiments are only used to illustrate the technical solutions of the present application, and not to limit them; although the present application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that: it can still modify the technical solutions recorded in the foregoing embodiments, or make equivalent replacement for part or all of the technical features; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the scope of the technical solutions of the embodiments of the present application, and they should be covered in the scope of the claims and the specification of the present application.

Claims

1. A power line fault signal acquisition circuit, characterized by, The circuit comprises a Rogowski coil, a signal conditioning circuit, a high-speed AD sampling front-end circuit and an A / D circuit, wherein the Rogowski coil is connected with the signal conditioning circuit, the signal conditioning circuit is connected with the high-speed AD sampling front-end circuit, an analog-digital conversion chip is arranged in the A / D circuit, the Rogowski coil comprises a sampling resistor, the signal conditioning circuit comprises an operational amplifier and a differential amplifier for isolating the output end of the Rogowski coil from the high-speed sampling circuit, the high-speed AD sampling front-end circuit adopts an ADC driving chip as a preamplifier circuit of the analog-digital conversion chip, the Rogowski coil is used for sensing the current of the power transmission line, the signal conditioning circuit is used for converting the voltage signal output by the Rogowski coil into a voltage signal suitable for AD conversion, the high-speed AD sampling front-end circuit is used for converting an analog signal into a digital signal, and the analog-digital conversion chip is used for converting the digital signal into a binary complement format.

2. A power line fault signal acquisition circuit according to claim 1, characterized in that The Rogowski coil is provided with a sampling resistor, and the sampling resistor is a non-inductive resistor, and the non-inductive resistor Rf is 0.5 ohm.

3. The power line fault signal acquisition circuit according to claim 1, wherein The signal conditioning circuit controls the voltage value input into the AD converter to be between 1-2V, and simultaneously isolates the output end of the Rogowski coil from the high-speed sampling circuit.

4. The power line fault signal acquisition circuit according to claim 1, wherein The AD8051 is selected as the operational amplifier of the high-speed sampling front-end circuit, and the 3dB small signal bandwidth of the AD8051 is 150MHz, which is greater than the voltage frequency output after the defect discharge current traveling wave passes through the Rogowski coil.

5. The power line fault signal acquisition circuit according to claim 1, wherein The circuit input voltage noise is 16nV / Hz, when the input signal is 1MHz and the load resistor is 10K ohm, the input voltage noise Uin' is 8mV, and the output voltage noise U=Uin'x2=32mV.

6. The power line fault signal acquisition circuit according to claim 1, wherein The TSMA5.1 transient suppression diode is arranged at the output end of the Rogowski coil, so as to prevent the transient voltage from being too large and protect the input end of the operational amplifier; the defect discharge current can be shown by the following formula: Wherein, A(t) is the instantaneous amplitude of the defect discharge current signal, ω(t) is the center frequency of the discharge traveling wave current, and k is the amplitude coefficient of the discharge traveling wave current.

7. The power line fault signal acquisition circuit according to claim 1, wherein The input end of the analog-digital conversion chip is a differential sampling holding amplifier circuit, the peak value range of the differential input is 1-2V, the sampling precision of the analog-digital conversion chip is 12 bits, the output end is a multi-stage differential pipeline structure, is provided with error correction logic, and the output data is configured in a standard binary or binary complement format.

8. A method of collecting fault signals of a power transmission line, characterized by, The circuit is applied to any one of claims 1-7, and comprises the following steps: First, the current of the power transmission line is sensed by the Rogowski coil; Then, the signal conditioning circuit converts the voltage signal output by the Rogowski coil into a voltage signal suitable for AD conversion; Next, the high-speed AD sampling front-end circuit converts an analog signal into a digital signal; and finally, the analog-digital conversion chip converts the digital signal into a binary complement format.

9. A computer-readable storage medium, characterized in that, The computer readable storage medium comprises a stored program, wherein the program controls the device where the computer readable storage medium is located to execute the power transmission line fault signal acquisition method in any one of claims 7-8 when the program is running.

10. A processor, comprising: The processor is used for running a program, wherein the program executes the power transmission line fault signal acquisition method in any one of claims 7-8 when the program is running.

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