Non-overlapping control system and method in analog receive beamforming

Abstract

The invention provides a non-overlapping control system and method in analog receiving beam forming, and the system comprises a non-overlapping generator which is used for generating a non-overlapping pulse according to an input multi-phase signal; the beam forming sequence generator is used for generating a sampling sequence for receiving beam forming according to the received effective signal; the phase analyzer is used for analyzing the phase relation between the digital clock and the received beam forming sampling sequence to generate a time reference signal, and the time reference signal is used for controlling the read-write time sequence of a capacitor in the analog beam former; and the beam forming read-write control module is used for generating a non-overlapping capacitance read-write signal from the non-overlapping control pulse, the time reference signal and the sampling sequence, and the non-overlapping capacitance read-write signal is used for controlling read-write of a capacitor in an analog beam former. According to the invention, overlapping of signals during analog beam forming can be avoided, and the stability and the beam forming precision of an analog beam former system are improved.

Description

Technical Field

[0001] This invention relates to ultrasonic chips, and more specifically, to a non-overlapping control system and method for simulating receiving beamforming. Background Technology

[0002] Complementary Metal-Oxide Semiconductor (CMOS) technology, as a core technology in the semiconductor field, is widely used in integrated circuit manufacturing and many other fields. It can integrate a large number of transistors onto a small chip, continuously developing in accordance with Moore's Law, and driving the evolution of semiconductors towards miniaturization and high performance.

[0003] The working principle of an ultrasonic transducer is based on the direct and inverse piezoelectric effects of piezoelectric materials. It achieves efficient transmission and reception of ultrasonic signals through the periodic vibration of a piezoelectric thin film. When the ultrasonic transducer acts as a transmitter, it essentially converts electrical signals into mechanical vibration energy. Under the action of a driving voltage, the piezoelectric thin film deforms due to the inverse piezoelectric effect, radiating ultrasonic waves into the medium. When acting as a receiver, it becomes a sensor that captures mechanical vibration energy. External ultrasonic waves cause the piezoelectric thin film to vibrate, converting the acoustic signal into an electrical signal through the direct piezoelectric effect for subsequent processing.

[0004] In ultrasound imaging systems, CMOS integrated circuits at the transmitting end precisely control the excitation signal of the ultrasound transducer. For example, they can generate electrical pulse signals with specific frequencies, pulse widths, and amplitudes to drive the ultrasound transducer to emit ultrasonic waves. In some medical ultrasound diagnostic devices, CMOS integrated circuits optimize the emitted waveform, improving the emission efficiency and directivity of ultrasound waves, thereby enhancing the resolution and clarity of the imaging. At the receiving end, CMOS integrated circuits are responsible for receiving the echo signals received by the ultrasound transducer and performing preprocessing such as pre-amplification and filtering. CMOS integrated circuits can integrate high-performance, low-noise amplifiers to reduce noise interference in the received signal, while simultaneously processing echo signals of different frequencies and amplitudes quickly and accurately, providing high-quality data for subsequent signal processing and image reconstruction.

[0005] In simulated beamforming of ultrasound imaging systems, signal nonoverlap refers to avoiding signal overlap between different array elements during synthesis by designing time delays, phase differences, or signal windows between array elements. However, existing technologies do not propose systematic nonoverlap control strategies to address the hardware limitations of the analog domain. Summary of the Invention

[0006] To address the problems in the prior art, the purpose of this invention is to provide a non-overlapping control system and method for simulating received beamforming.

[0007] The non-overlapping control system for analog receiving beamforming provided by the present invention includes:

[0008] A non-overlapping generator located in the digital domain is used to generate non-overlapping pulses based on the input multi-phase signal;

[0009] A beamforming sequence generator is used to generate a sampled sequence of received beamforming based on the received valid signal;

[0010] A phase resolver is used to resolve the phase relationship between a digital clock and a received beamforming sampling sequence to generate a time reference signal, which is used to control the read / write timing of capacitors in an analog beamformer.

[0011] The beamforming read / write control module is used to generate a non-overlapping capacitor read / write signal based on the time reference signal, the non-overlapping control pulse, and the sampling sequence. The non-overlapping capacitor read / write signal is used to control the reading and writing of capacitors in the analog beamformer.

[0012] Preferably, the write timing sequence and the read timing sequence of each capacitor are generated according to the time reference signal; the sampling sequence generates the capacitor write sequence and the capacitor read sequence according to the write timing sequence and the read timing sequence of each capacitor.

[0013] The non-overlapping control pulse and the capacitor write sequence are ANDed together to generate the non-overlapping electrical write signal; the non-overlapping control pulse and the capacitor readout sequence are ANDed together to generate the non-overlapping electrical write signal.

[0014] Preferably, the non-overlapping generator includes:

[0015] The delay module includes two first inverters connected in series, used to delay the multi-phase signal and generate a delay control signal;

[0016] The logic processing module includes a NAND gate and a second inverter. The two inputs of the NAND gate are used to receive the multi-phase signal and the delay control signal, respectively, and the output is generated as a non-overlapping control pulse after passing through the inverter.

[0017] Preferably, the time difference between the delay control signal and the multi-phase signal is adjusted by the channel width-to-length ratio of the inverter.

[0018] Preferably, the logic processing module generates the non-overlapping control pulse by controlling the rising edge width relative to the multi-phase signal.

[0019] Preferably, the beamforming read / write control module includes a beamforming write controller and a beamforming read controller; the non-overlapping capacitor read / write signal includes a non-overlapping capacitor write signal and a non-overlapping capacitor read signal.

[0020] The beamforming write controller is used to convert the non-overlapping capacitor write signal into a write one-hot code signal. The write one-hot code signal is used to control the switch WT to close in order to perform the beamforming write operation.

[0021] The beamforming read controller is used to convert the non-overlapping capacitor read signal into a readout hot code signal. The readout hot code signal is used to control the closure of switch RD to perform beamforming read operation.

[0022] The non-overlapping control system for analog receiving beamforming provided by the present invention includes:

[0023] A beamforming sequence generator is used to generate a sampled sequence of received beamforming based on the received valid signal;

[0024] A phase resolver is used to resolve the phase relationship between a digital clock and a received beamforming sampling sequence to generate a time reference signal, which is used to control the read / write timing of capacitors in an analog beamformer.

[0025] A beamforming read / write control module is used to generate a capacitance read / write signal based on the time reference signal and the sampling sequence;

[0026] A digital decoder located in the analog domain is used to convert the capacitor read / write signal into a read / write one-hot code signal; the digital decoder includes a non-overlapping generator, which is used to generate a non-overlapping read / write one-hot code signal based on at least two input read / write one-hot code signals, and the non-overlapping read / write one-hot code signal is used to control the reading and writing of capacitors in the analog beamformer.

[0027] In this embodiment of the invention, the capacitor read / write signal includes a capacitor read signal and a capacitor write signal; the capacitor read signal is converted into a capacitor read unique hot code signal, and the capacitor write signal is converted into a capacitor write unique hot code signal.

[0028] Preferably, the non-overlapping read / write single-hot code signal includes a non-overlapping write single-hot code signal and a non-overlapping read out single-hot code signal;

[0029] The non-overlapping write hot code signal is used to control the WT switch to close in order to perform the beamforming write operation.

[0030] The non-overlapping readout hot code signal is used to control the RD switch to close in order to perform beamforming readout operations.

[0031] Preferably, the digital decoding unit includes a first digital decoder and a second digital decoder; the analog beamformer includes a first beamforming group and a second beamforming group.

[0032] The first digital decoder includes a first non-overlapping generator, which is used to generate a first non-overlapping read / write one-hot code signal based on at least two input read / write one-hot code signals. The first non-overlapping read / write one-hot code signal is used to control the reading and writing of capacitors in the first beamforming group.

[0033] The second digital decoder includes a second non-overlapping generator, which generates a second non-overlapping read / write one-hot code signal based on at least two input read / write one-hot code signals. The second non-overlapping read / write one-hot code signal is used to control the reading and writing of capacitors in the second beamforming group.

[0034] Preferably, the first non-overlapping read / write hotkey signal includes a first non-overlapping write hotkey signal and a first non-overlapping read hotkey signal; the first non-overlapping write hotkey signal is used to control the switch WT in the first beamforming group to close, so as to perform a write operation of beamforming; the first non-overlapping read hotkey signal is used to control the switch RD in the first beamforming group to close, so as to perform a read operation of beamforming.

[0035] The second non-overlapping read / write hotkey signal includes a second non-overlapping write hotkey signal and a second non-overlapping read hotkey signal; the second non-overlapping write hotkey signal is used to control the switch WT in the second beamforming group to close, so as to perform the write operation of beamforming; the second non-overlapping read hotkey signal is used to control the switch RD in the second beamforming group to close, so as to perform the read operation of beamforming.

[0036] The non-overlap control method in simulated receiving beamforming provided by the present invention includes the following steps:

[0037] Step S1: Generate a receiving beamforming sampling sequence based on the received valid signal;

[0038] Step S2: Analyze the phase relationship between the digital clock and the received beamforming sampling sequence to generate a time reference signal. The time reference signal is used to control the read / write timing of the capacitors in the analog beamformer.

[0039] Step S3: Generate non-overlapping pulses based on the input multi-phase signal;

[0040] Step S4: Perform a weighted addition operation on the non-overlapping control pulse, the time reference signal, and the delay control signals of each channel to generate a non-overlapping capacitor read / write signal. The sampling sequence is used to control the reading and writing of capacitors in the analog beamformer.

[0041] Compared with the prior art, the present invention has the following beneficial effects:

[0042] In this invention, a non-overlapping generator located in the digital domain is provided, which can generate non-overlapping pulses based on the input multi-phase signal. A beamforming read / write control module is used to generate non-overlapping capacitor read / write signals based on the time reference signal, the non-overlapping control pulses, and the sampling sequence. The non-overlapping capacitor read / write signals are used to control the reading and writing of capacitors in the analog beamformer, thereby avoiding signal overlap during analog beamforming and improving the stability and beamforming accuracy of the analog beamformer system.

[0043] In this invention, the binary multiphase signal is first processed to avoid overlap and then decoded using a single-hot method, which saves the area of ​​the neutron array in the ultrasonic chip. Attached Figure Description

[0044] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are merely embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on the provided drawings without creative effort. Other features, objects, and advantages of the present invention will become more apparent by reading the following detailed description of non-limiting embodiments with reference to the accompanying drawings:

[0045] Figure 1 This is a schematic diagram illustrating the application scenario of the transesophageal ultrasound imaging system in an embodiment of the present invention;

[0046] Figure 2 This is a schematic diagram of the circuit principle of the transesophageal ultrasound chip in an embodiment of the present invention;

[0047] Figure 3 This is a schematic diagram illustrating the principle of beamforming in an embodiment of the present invention;

[0048] Figure 4 This is a schematic diagram of the capacitor write signal for multiple extension lines in an embodiment of the present invention;

[0049] Figure 5 This is a schematic diagram of a non-overlapping control system in simulated receiving beamforming in the first embodiment of the present invention;

[0050] Figure 6 This is a circuit diagram of the non-overlapping generator in an embodiment of the present invention;

[0051] Figure 7 This is a schematic diagram of a non-overlapping control system in simulated receiving beamforming in the second embodiment of the present invention;

[0052] Figure 8 This is a first circuit diagram of the simulated beamformer in the second embodiment of the present invention;

[0053] Figure 9This is a second circuit diagram of the simulated beamformer in the second embodiment of the present invention;

[0054] Figure 10 This is a flowchart illustrating the steps of a non-overlap control method in simulated receiving beamforming in an embodiment of the present invention. Detailed Implementation

[0055] The present invention will now be described in detail with reference to specific embodiments. These embodiments will help those skilled in the art to further understand the present invention, but do not limit the invention in any way. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of the present invention. These all fall within the scope of protection of the present invention.

[0056] The terms “first,” “second,” “third,” “fourth,” etc. (if present) in the specification, claims, and accompanying drawings of this invention are used to distinguish similar objects and are not necessarily used to describe a particular order or sequence. It should be understood that such data can be interchanged where appropriate so that embodiments of the invention described herein can be implemented, for example, in orders other than those illustrated or described herein. Furthermore, the terms “comprising” and “having,” and any variations thereof, are intended to cover a non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0057] The technical solution of the present invention will be described in detail below with reference to specific embodiments. These specific embodiments can be combined with each other, and the same or similar concepts or processes may not be described again in some embodiments.

[0058] The technical solutions of the present invention and how they solve the above-mentioned technical problems will be described in detail below with specific embodiments. These specific embodiments can be combined with each other, and the same or similar concepts or processes may not be repeated in some embodiments. The embodiments of the present invention will now be described with reference to the accompanying drawings.

[0059] Figure 1 This is a schematic diagram illustrating the application scenario of the transesophageal ultrasound imaging system in an embodiment of the present invention, such as... Figure 1As shown, during transesophageal ultrasound, the probe 100, which transmits and receives ultrasound waves, is inserted through the esophagus via the catheter 200, allowing for close-up imaging of the heart's structure and function. Four-dimensional transesophageal ultrasound (4D transesophageal ultrasound) is an advanced cardiac ultrasound technology developed from traditional transesophageal ultrasound, and it has significant value in the diagnosis, treatment, and surgical monitoring of cardiovascular diseases. 4D transesophageal ultrasound utilizes matrix transducer technology to acquire a series of two-dimensional ultrasound images from different angles in a short time. Then, computer algorithms reconstruct a dynamic three-dimensional cardiac image in real time. Adding a time dimension enables a dynamic display of changes in heart structure and function over time. Compared to traditional two-dimensional transesophageal ultrasound, which can only display information from a single cross-section of the heart, 4D transesophageal ultrasound provides more comprehensive and intuitive three-dimensional structural information of the heart.

[0060] Figure 2 This is a schematic diagram illustrating the working principle of the transesophageal ultrasound chip in an embodiment of the present invention, as shown below. Figure 2 As shown, when ultrasound is transmitted via the transesophageal ultrasound chip provided by this invention, the transmitting beamformer delays and adjusts the phase of the electrical pulse to direct the synthesized beam towards the target area. The pulse generator generates a high-voltage pulse based on the delay and phase of the electrical pulse, which triggers the transducer to vibrate and transmit ultrasound. During ultrasound reception, the ultrasound waves are reflected by tissue and act on the transducer, generating a signal through the positive piezoelectric effect. The signal amplifier amplifies and reduces the noise of the weak electrical signal output by the transducer, improving the signal-to-noise ratio. The receiving beamformer performs phase compensation on the electrical signals received by each array element, superimposing and enhancing the target echo. The target echo is transmitted to the ultrasound control console through the output channel, thereby realizing image reconstruction and real-time display.

[0061] Figure 3 This is a schematic diagram illustrating the principle of beamforming in an embodiment of the present invention, such as... Figure 3 As shown, the transducer array consists of multiple piezoelectric elements, serving both ultrasonic wave transmission and echo reception functions. During the transmission phase, the delay unit applies differentiated delays to the excitation signals of different elements, causing the ultrasonic wavefronts emitted by each element to converge synchronously to a preset focus, achieving electronic focusing without mechanical movement. During the reception phase, it compensates for the time difference in arrival of the echo signals from the focus to each element, aligning the echo signals in phase. The superposition and summation module performs in-phase superposition of the delayed multi-element signals, enhancing the signal. The processed ultrasonic signal is finally input into the ultrasonic host for imaging.

[0062] In analog beamformers, the write and read switch control signals within each channel must meet the "one-hot" characteristic, meaning only one signal is active at any given time. This is to avoid performance degradation (such as signal distortion and power consumption spikes) caused by signal conflicts. Ideally, the control signals output from the digital domain should strictly meet the one-hot requirement. However, in practical applications, due to factors such as signal transmission delay and circuit noise, control signals may briefly overlap, causing switches to conduct simultaneously. This affects the stability and beamforming accuracy of the analog beamformer system.

[0063] Figure 4 This is a schematic diagram of the capacitor write signal of multiple extension lines in an embodiment of the present invention, such as... Figure 4 As shown, each waveform is in pulse form, and the pulses from W1 to W14 exhibit a gradually staggered timing relationship. Therefore, there are overlapping situations caused by circuit errors, such as overlap between W1 and W2. Overlap between capacitor signals leads to confusion of readout signals, affecting focusing accuracy. Overlap between read and write capacitors can cause short circuits, affecting chip circuit performance or even damaging it.

[0064] Figure 5 This is a schematic diagram of a non-overlapping control system in simulated receiving beamforming in the first embodiment of the present invention, as shown below. Figure 5 As shown, the non-overlapping control system for analog receiving beamforming provided by the present invention includes:

[0065] A non-overlapping generator located in the digital domain is used to generate non-overlapping pulses based on the input multi-phase signal;

[0066] A beamforming sequence generator is used to generate a sampled sequence of received beamforming based on the received valid signal;

[0067] A phase resolver is used to resolve the phase relationship between a digital clock and a received beamforming sampling sequence to generate a time reference signal, which is used to control the read / write timing of capacitors in an analog beamformer.

[0068] The beamforming read / write control module is used to generate a non-overlapping capacitor read / write signal based on the time reference signal, the non-overlapping control pulse, and the sampling sequence. The non-overlapping capacitor read / write signal is used to control the reading and writing of capacitors in the analog beamformer.

[0069] In this embodiment of the invention, a write timing sequence and a read timing sequence for each capacitor are generated based on the time reference signal; the sampling sequence generates a capacitor write sequence and a capacitor read sequence based on the write timing sequence and the read timing sequence for each capacitor.

[0070] The non-overlapping control pulse and the capacitor write sequence are ANDed together to generate the non-overlapping electrical write signal; the non-overlapping control pulse and the capacitor readout sequence are ANDed together to generate the non-overlapping electrical write signal.

[0071] In this embodiment of the invention, the binary multiphase signal is first processed in the digital domain to avoid overlap, and then decoded using a single-hot method, which saves the area of ​​the neutron array in the ultrasonic chip.

[0072] Figure 6 The circuit diagram of the non-overlapping generator in an embodiment of the present invention is shown below. Figure 6 As shown, in an optional embodiment of the present invention, the non-overlapping generator includes:

[0073] The delay module includes two first inverters connected in series, used to delay the multi-phase signal and generate a delay control signal;

[0074] The logic processing module includes a NAND gate and a second inverter (INV). The two input terminals of the NAND gate are used to receive the multi-phase signal and the delay control signal, respectively, and the output terminal generates a non-overlapping control pulse after passing through the inverter.

[0075] In an optional embodiment of the present invention, the delay module delays the multi-phase input signal by a fixed time and generates an inverse delayed signal;

[0076] When the multi-phase signal and the delay control signal are both valid, the NAND gate outputs a valid signal. The second inverter inverts the output signal of the NAND gate to restore the original logic level of the signal.

[0077] In an optional embodiment of the present invention, the time difference between the delay control signal and the multi-phase signal is adjusted by the channel width-to-length ratio of the inverter.

[0078] like Figure 6 As shown, the logic processing module generates the non-overlapping control pulse by controlling the rising edge width relative to the multi-phase signal.

[0079] Figure 7 This is a schematic diagram of a non-overlapping control system in simulated receiving beamforming in the second embodiment of the present invention. Figure 8 This is a first circuit diagram of the simulated beamformer in the second embodiment of the present invention, as shown below. Figure 7 , Figure 8 As shown, the non-overlapping control system for analog receiving beamforming provided by the present invention includes:

[0080] A beamforming sequence generator is used to generate a sampled sequence of received beamforming based on the received valid signal;

[0081] A phase resolver is used to resolve the phase relationship between a digital clock and a received beamforming sampling sequence to generate a time reference signal, which is used to control the read / write timing of capacitors in an analog beamformer.

[0082] A beamforming read / write control module is used to generate a capacitance read / write signal based on the time reference signal and the sampling sequence;

[0083] A digital decoder located in the analog domain is used to convert the capacitor read / write signal into a read / write one-hot code signal; the digital decoder includes a non-overlapping generator, which is used to generate a non-overlapping read / write one-hot code signal based on at least two input read / write one-hot code signals, and the non-overlapping read / write one-hot code signal is used to control the reading and writing of capacitors in the analog beamformer.

[0084] In this embodiment of the invention, the capacitor read / write signal includes a capacitor read signal and a capacitor write signal; the capacitor read signal is converted into a capacitor read unique hot code signal, and the capacitor write signal is converted into a capacitor write unique hot code signal.

[0085] like Figure 9 As shown, the digital decoding unit includes a first digital decoder and a second digital decoder; the analog beamformer includes a first beamforming group and a second beamforming group.

[0086] The first digital decoder includes a first non-overlapping generator, which is used to generate a first non-overlapping read / write one-hot code signal based on at least two input read / write one-hot code signals. The first non-overlapping read / write one-hot code signal is used to control the reading and writing of capacitors in the first beamforming group.

[0087] The second digital decoder includes a second non-overlapping generator, which generates a second non-overlapping read / write one-hot code signal based on at least two input read / write one-hot code signals. The second non-overlapping read / write one-hot code signal is used to control the reading and writing of capacitors in the second beamforming group.

[0088] In this embodiment of the invention, the first non-overlapping read / write hotkey signal includes a first non-overlapping write hotkey signal and a first non-overlapping read hotkey signal; the first non-overlapping write hotkey signal is used to control the switch WT in the first beamforming group to close, so as to perform a write operation of beamforming; the first non-overlapping read hotkey signal is used to control the switch RD in the first beamforming group to close, so as to perform a read operation of beamforming.

[0089] The second non-overlapping read / write hotkey signal includes a second non-overlapping write hotkey signal and a second non-overlapping read hotkey signal; the second non-overlapping write hotkey signal is used to control the switch WT in the second beamforming group to close, so as to perform the write operation of beamforming; the second non-overlapping read hotkey signal is used to control the switch RD in the second beamforming group to close, so as to perform the read operation of beamforming.

[0090] In an optional embodiment of the present invention, the first digital decoder first converts the binary capacitor write signal into a capacitor write one-hot code signal, and the first non-overlapping generator then generates a non-overlapping capacitor write control signal from the two capacitor write one-hot code signals.

[0091] Similarly, the first capacitor read signal is first converted into a capacitor readout hot code signal, and the first non-overlapping generator then generates a non-overlapping capacitor read control signal from the two capacitor readout hot code signals.

[0092] The non-overlapping capacitor write control signal is used to control the switch WT in the analog beamformer to close, so as to perform the beamforming write operation; the non-overlapping capacitor read control signal is used to control the switch RD in the analog beamformer to close.

[0093] Figure 10 This is a flowchart illustrating the steps of a non-overlap control method in simulating received beamforming in an embodiment of the present invention, as shown below. Figure 10 As shown, the non-overlap control method in simulated receiving beamforming provided by the present invention includes the following steps:

[0094] Step S1: Generate a receiving beamforming sampling sequence based on the received valid signal;

[0095] Step S2: Analyze the phase relationship between the digital clock and the received beamforming sampling sequence to generate a time reference signal. The time reference signal is used to control the read / write timing of the capacitors in the analog beamformer.

[0096] Step S3: Generate non-overlapping pulses based on the input multi-phase signal;

[0097] Step S4: Perform a weighted addition operation on the non-overlapping control pulse and the delay control signal of each channel to generate a non-overlapping capacitor read / write signal. The non-overlapping capacitor read / write signal is used to control the reading and writing of capacitors in the analog beamformer.

[0098] In this embodiment of the invention, a non-overlapping generator located in the digital domain is provided to generate non-overlapping pulses based on the input multi-phase signal. A beamforming read / write control module is used to generate non-overlapping capacitor read / write signals based on the time reference signal, the non-overlapping control pulses, and the sampling sequence. The non-overlapping capacitor read / write signals are used to control the reading and writing of capacitors in the analog beamformer, thereby avoiding signal overlap during analog beamforming and improving the stability and beamforming accuracy of the analog beamformer system. The binary multi-phase signal is first processed to remove overlap and then decoded using a one-hot method, saving the area of ​​the subarray in the ultrasonic chip.

[0099] The various embodiments described in this specification are presented in a progressive manner, with each embodiment focusing on its differences from other embodiments. Similar or identical parts between embodiments can be referred to interchangeably. The above description of the disclosed embodiments enables those skilled in the art to make or use the invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the invention. Therefore, the invention is not to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

[0100] The specific embodiments of the present invention have been described above. It should be understood that the present invention is not limited to the specific embodiments described above, and those skilled in the art can make various modifications or variations within the scope of the claims, which do not affect the essence of the present invention.

Claims

1. A non-overlapping control system for analog receiving beamforming, characterized in that, include: A non-overlapping generator located in the digital domain is used to generate non-overlapping pulses based on the input multi-phase signal; A beamforming sequence generator is used to generate a sampled sequence of received beamforming based on the received valid signal; A phase resolver is used to resolve the phase relationship between a digital clock and a received beamforming sampling sequence to generate a time reference signal, which is used to control the read / write timing of capacitors in an analog beamformer. The beamforming read / write control module is used to generate a non-overlapping capacitor read / write signal based on the time reference signal, the non-overlapping control pulse, and the sampling sequence. The non-overlapping capacitor read / write signal is used to control the reading and writing of capacitors in the analog beamformer.

2. The non-overlapping control system in analog receiving beamforming according to claim 1, characterized in that, The non-overlapping generator includes: The delay module includes two first inverters connected in series, used to delay the multi-phase signal and generate a delay control signal; The logic processing module includes a NAND gate and a second inverter. The two inputs of the NAND gate are used to receive the multi-phase signal and the delay control signal, respectively, and the output is generated as a non-overlapping control pulse after passing through the inverter.

3. The non-overlapping control system in analog receiving beamforming according to claim 2, characterized in that, The time difference between the delay control signal and the multi-phase signal is adjusted by the channel width-to-length ratio of the inverter.

4. The non-overlapping control system in analog receiving beamforming according to claim 2, characterized in that, The logic processing module generates the non-overlapping control pulse by controlling the rising edge width relative to the multi-phase signal.

5. The non-overlapping control system for analog receiving beamforming according to claim 1, characterized in that, The beamforming read / write control module includes a beamforming write controller and a beamforming read controller; the non-overlapping capacitor read / write signal includes a non-overlapping capacitor write signal and a non-overlapping capacitor read signal. The beamforming write controller is used to convert the non-overlapping capacitor write signal into a write one-hot code signal. The write one-hot code signal is used to control the switch WT to close in order to perform the beamforming write operation. The beamforming read controller is used to convert the non-overlapping capacitor read signal into a readout hot code signal. The readout hot code signal is used to control the closure of switch RD to perform beamforming read operation.

6. A non-overlapping control system for analog receiving beamforming, characterized in that, include: A beamforming sequence generator is used to generate a sampled sequence of received beamforming based on the received valid signal; A phase resolver is used to resolve the phase relationship between a digital clock and a received beamforming sampling sequence to generate a time reference signal, which is used to control the read / write timing of capacitors in an analog beamformer. A beamforming read / write control module is used to generate a capacitance read / write signal based on the time reference signal and the sampling sequence; A digital decoder located in the analog domain is used to convert the capacitor read / write signal into a read / write one-hot code signal; the digital decoder includes a non-overlapping generator, which is used to generate a non-overlapping read / write one-hot code signal based on at least two input read / write one-hot code signals, and the non-overlapping read / write one-hot code signal is used to control the reading and writing of capacitors in the analog beamformer.

7. The non-overlapping control system for analog receiving beamforming according to claim 6, characterized in that, The non-overlapping read / write single-hot code signal includes the non-overlapping write single-hot code signal and the non-overlapping read-out single-hot code signal; The non-overlapping write hot code signal is used to control the WT switch to close in order to perform the beamforming write operation. The non-overlapping readout hot code signal is used to control the RD switch to close in order to perform beamforming readout operations.

8. The non-overlapping control system in analog receiving beamforming according to claim 6, characterized in that, The digital decoding unit includes a first digital decoder and a second digital decoder; the analog beamformer includes a first beamforming group and a second beamforming group; The first digital decoder includes a first non-overlapping generator, which is used to generate a first non-overlapping read / write one-hot code signal based on at least two input read / write one-hot code signals. The first non-overlapping read / write one-hot code signal is used to control the reading and writing of capacitors in the first beamforming group. The second digital decoder includes a second non-overlapping generator, which generates a second non-overlapping read / write one-hot code signal based on at least two input read / write one-hot code signals. The second non-overlapping read / write one-hot code signal is used to control the reading and writing of capacitors in the second beamforming group.

9. The non-overlapping control system in analog receiving beamforming according to claim 8, characterized in that, The first non-overlapping read / write hotkey signal includes a first non-overlapping write hotkey signal and a first non-overlapping read hotkey signal; the first non-overlapping write hotkey signal is used to control the switch WT in the first beamforming group to close, so as to perform the write operation of beamforming; the first non-overlapping read hotkey signal is used to control the switch RD in the first beamforming group to close, so as to perform the read operation of beamforming. The second non-overlapping read / write hotkey signal includes a second non-overlapping write hotkey signal and a second non-overlapping read hotkey signal; the second non-overlapping write hotkey signal is used to control the switch WT in the second beamforming group to close, so as to perform the write operation of beamforming; the second non-overlapping read hotkey signal is used to control the switch RD in the second beamforming group to close, so as to perform the read operation of beamforming.

10. A non-overlap control method in simulated receiving beamforming, characterized in that, Includes the following steps: Step S1: Generate a receiving beamforming sampling sequence based on the received valid signal; Step S2: Analyze the phase relationship between the digital clock and the received beamforming sampling sequence to generate a time reference signal. The time reference signal is used to control the read / write timing of the capacitors in the analog beamformer. Step S3: Generate non-overlapping pulses based on the input multi-phase signal; Step S4: Perform a weighted addition operation on the non-overlapping control pulse, the time reference signal, and the delay control signals of each channel to generate a non-overlapping capacitor read / write signal. The sampling sequence is used to control the reading and writing of capacitors in the analog beamformer.

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