A processing method for a backside-polished-surface heterojunction cell rework piece and application thereof

Abstract

The present application relates to the technical field of battery, especially to a processing method of back-throwing-like heterojunction cell rework piece and application thereof. The processing method comprises the following steps: step S1, if there is a transparent conductive oxide film layer on the surface of the rework piece, the transparent conductive oxide film layer is removed by acid pickling; step S2, the rework piece treated in step S1 is subjected to alkaline micro-corrosion secondary texturing treatment to selectively remove the amorphous silicon functional layer, at the same time, the front pyramid texture is modified to reduce the reflectivity, and the reflectivity reduction of the back back-throwing-like structure is less than or equal to 3.5%; step S3, the silicon substrate after secondary texturing is cleaned and subjected to surface rounding treatment. The present application realizes efficient, low-loss and low-cost rework processing while ensuring the integrity of the back-throwing-like differentiated texture structure, and provides key technical support for large-scale manufacturing of thin heterojunction solar cells.

Description

Technical Field

[0001] This invention relates to the field of battery technology, and in particular to a method for processing reworked heterojunction batteries with a back-polished textured surface and its application. Background Technology

[0002] Heterojunction solar cells (HJTs), as a high-efficiency photovoltaic device, combine the advantages of crystalline silicon and thin-film technology, possessing outstanding advantages such as high open-circuit voltage, low temperature coefficient, and bifacial power generation characteristics. In recent years, they have become a research hotspot in the photovoltaic industry. A typical HJT cell structure includes a crystalline silicon substrate, a bifacial intrinsic amorphous silicon passivation layer, a doped amorphous silicon layer, and a transparent conductive oxide (TCO) layer. Currently, to further improve the passivation effect and absorption of long-wavelength light in heterojunction cells, polishing and back-polishing are often used on the back side. However, polishing significantly reduces the bifaciality of the cell. Therefore, research on differentiated textured surfaces, such as back-polished surfaces, has become a key focus. The concept is to reduce reflection on the front side and reduce reflectivity on the back side to enhance long-wavelength reflection, while simultaneously improving contact and facilitating passivation. The formation of differentiated textured surfaces often requires multi-step wet processes using masks, undoubtedly increasing the complexity of the process. In HJT cell production, defective cells are often produced due to fluctuations in processes such as coating. Traditional rework methods involve removing the transparent conductive film layer and then performing a texturing and cleaning process to rework the textured surface. This process undoubtedly increases the amount of etching on the silicon wafer, further thinning it and thus increasing the breakage rate in subsequent processes. In contrast, the differentiated textured surface, which resembles back polishing, undoubtedly has a higher etching rate than conventional texturing and a more complex process. Using conventional rework processes would undoubtedly result in a significantly higher breakage rate. Summary of the Invention

[0003] The technical solution proposed in this application addresses the long-standing and challenging problem of reworking textured heterojunction solar cells (HJTs) with a back-polished surface. It presents, for the first time, a systematic solution characterized by graded control, selective micro-etching, maskless operation, and low-temperature, low-loss processing. Existing technologies for HJT reworking generally face difficulties: if a mask method is used to reconstruct the differentiated texture, multiple strong etching processes, PECVD mask deposition, and peeling are required. This process is not only lengthy and costly, but also results in a fragmentation rate exceeding 9% due to repeated wafer thinning, making it completely unsuitable for the current trend of ultra-thin silicon wafer mass production. This invention, however, innovatively utilizes the intrinsic etching rate difference between n-type and p-type amorphous silicon layers in an alkaline system. By precisely controlling the alkali concentration, additive ratio, temperature, and time, it achieves efficient removal and textured surface modification of the front-side amorphous silicon functional layer without removing the original pyramid texture or relying on any mask. Simultaneously, it strictly controls the damage to the back-polished structure to a reflectivity reduction of only 0.3%-3.5%. This application abandons the crude rework logic of starting from scratch, and instead adopts a precise repair and surface activation method. This ensures interface cleanliness to support high-quality recoating while preserving the optical advantages of the original differentiated textured surface to the greatest extent. Combined with a low-temperature ozone-acid pickling system, it further avoids the risks of structural corrosion and metal contamination caused by high-temperature alkaline environments. This method solves the core technical problem that has long plagued the industry: the incompatibility between efficient rework and structural protection.

[0004] To achieve the above objectives, the main technical solutions adopted by the present invention include:

[0005] In a first aspect, this application provides a method for processing a reworked heterojunction solar cell wafer with a textured surface, wherein the reworked wafer is a semi-finished heterojunction solar cell with an amorphous silicon functional layer and / or a transparent conductive oxide film layer deposited on a silicon substrate after texturing and cleaning; the processing method includes the following steps:

[0006] Step S1: If a transparent conductive oxide film layer exists on the surface of the rework sheet, the transparent conductive oxide film layer is removed by acid washing.

[0007] Step S2: Perform alkaline micro-etching secondary texturing on the reworked wafer after step S1 to selectively remove the amorphous silicon functional layer, while modifying the pyramid textured surface on the front to reduce reflectivity, and ensuring that the reflectivity reduction of the back-side quasi-polished structure is less than or equal to 3.5%.

[0008] Step S3: Clean and round the surface of the silicon substrate after secondary texturing.

[0009] It also includes step S4, in which the silicon substrate processed in step S3 is re-entered into the amorphous silicon functional layer deposition and transparent conductive oxide film coating process to complete the rework of the heterojunction cell.

[0010] Because the back side is a P-type doped layer, its etching rate is slower than that of an N-type doped layer. Therefore, it is desirable to reduce the reflectivity of the textured surface on the back side by 0.3-3.5%.

[0011] During rework, the alkaline micro-etching system exhibits significant selective etching behavior on the front and back sides of the silicon wafer. The front side, covered by an n-type doped amorphous silicon layer, etches at a relatively fast rate and can be efficiently removed. Simultaneously, the underlying pyramidal textured surface undergoes controllable modification under mild alkaline conditions. For example, the pyramidal surface tends to be homogenized, the tips are moderately rounded, or micro-basin structures are formed, thereby further reducing the front reflectivity and improving light-harvesting ability. The back side, covered by a p-type doped amorphous silicon layer, etches at a significantly slower rate in the same alkaline environment, thus its removal is limited. The underlying quasi-polished structure (a nearly flat, highly reflective surface) is almost unaffected by etch, undergoing only slight etching with minimal morphological changes. It is this selective etching mechanism based on differences in doping type that allows for precise control of the reduction in back reflectivity. This reduction is a key indicator for measuring rework quality: if the reduction is less than 0.3%, it indicates that the amorphous silicon passivation layer or doped layer has not been sufficiently removed, and the residue will interfere with subsequent thin film deposition, leading to increased interface defects and deteriorated electrical performance; if the reduction exceeds 3.5%, it indicates that the back-side reflective structure has been excessively etched, with abnormally increased surface roughness, impairing its effective reflection capability of long-wavelength light, and thus affecting short-circuit current and battery efficiency. Therefore, it is preferable to control the back-side reflectivity reduction within the range of 0.3%-3.5% to balance thorough film removal with effective protection of the back-side optical structure.

[0012] In a further embodiment, the amorphous silicon functional layer includes a passivation layer and / or a doped layer;

[0013] The reworked wafer is a defective wafer that has only undergone amorphous silicon passivation layer deposition, with no doped layer or transparent conductive oxide film on its surface, and directly proceeds to the alkaline micro-etching secondary texturing process in step S2; and / or,

[0014] The reworked wafer is a defective wafer that has already undergone amorphous silicon passivation and doping layer deposition, and whose surface does not contain a transparent conductive oxide film layer. It directly proceeds to the alkaline micro-etching secondary texturing treatment in step S2; and / or,

[0015] The rework wafer is a defective wafer that has already completed the deposition of an amorphous silicon functional layer and a transparent conductive oxide film layer. It is necessary to first perform step S1 to remove the transparent conductive oxide film layer before proceeding to step S2.

[0016] In a further embodiment, in step S2, the alkaline micro-corrosion secondary texturing treatment uses a mixture of an alkaline solution and a secondary texturing additive, wherein the alkali is potassium hydroxide or sodium hydroxide, the concentration of the alkaline solution is 0.1-10%, and the concentration of the secondary texturing additive is 0.1-10%.

[0017] In a further embodiment, in step S2, the reaction temperature of the alkaline micro-corrosion secondary texturing treatment is 60-85℃, and the reaction time is 60-480 seconds.

[0018] This process achieves selective removal of the amorphous silicon functional layer and directional modification of the textured surface of heterojunction reworked silicon wafers. The broad and adjustable process window allows for flexible adaptation to different film structures, such as intrinsic layers only, doped layers, or rework requirements with TCO films and varying degrees of contamination. The alkaline system preferentially etches the n-type doped amorphous silicon layer, while additives provide a light etching and homogenization process to the front pyramid textured surface, thereby reducing front reflectivity and increasing light absorption. The back p-type doped layer etches more slowly, and due to its near-flat, small specific surface area, it is minimally affected by corrosion, undergoing only controllable slight erosion. By adjusting the process parameters, a balance can be struck between thoroughly removing residual film layers and maximizing the preservation of the high-reflectivity back surface, precisely controlling the reduction in back reflectivity within a technical window of 0.3%–3.5%. This hierarchical and controllable micro-etching strategy not only avoids excessive back surface damage caused by traditional strong alkaline cleaning or interface defects introduced by the RCA process, but also significantly reduces the risk of wafer weight reduction and fragmentation.

[0019] In a further embodiment, step S2, before the secondary texturing process, includes a pre-cleaning step: using a mixed solution containing 0.01-10% alkali solution and 1-15% hydrogen peroxide, and treating at 50-80°C for 120-240 seconds, wherein the alkali is potassium hydroxide or sodium hydroxide.

[0020] This process efficiently removes organic contaminants, residual metal ions, and microparticle impurities adhering to the surface of reworked silicon wafers from previous processes. The alkaline-hydrogen peroxide system combines strong oxidizing power with weak alkaline etching capabilities, not only decomposing organic matter and passivating metal contaminants but also slightly activating the silicon surface, providing a clean and uniform reaction interface for subsequent secondary texturing. The pre-cleaning conditions are mild and controllable, avoiding significant damage to existing pyramidal textured surfaces or back-side polished structures. Simultaneously, it effectively removes any residual carbides or polymerization byproducts that may remain after the amorphous silicon film is peeled off, preventing them from forming localized shielding effects during secondary texturing, which could lead to uneven texturing or abnormal reflectivity. This pre-cleaning, combined with subsequent micro-etching texturing, improves the consistency and repeatability of the reworked wafer surface condition, laying the foundation for achieving high-efficiency heterojunction solar cell rework with high open-circuit voltage, high fill factor, and low fragmentation rate.

[0021] In a further embodiment, the cleaning process in step S3 is an ozone cleaning process, which includes immersing the reworked sheet in a solution containing 45-50 ppm ozone and 0.01-1% hydrochloric acid, and treating it at 15-25°C for 120-360 seconds.

[0022] The strong oxidizing properties of ozone are used to oxidize the organic additives, hydrocarbons and trace metal contaminants remaining in the secondary texturing process into soluble substances, which are then dissolved and washed away from the surface by dilute hydrochloric acid, thus avoiding interface pollution or structural damage caused by traditional organic solvents or strong alkali cleaning.

[0023] In a further embodiment, the rounding treatment in step S3 is carried out by reacting a mixture of ozone, hydrochloric acid and hydrofluoric acid, with an ozone concentration of 45-50 ppm, a hydrofluoric acid concentration of 0.1-1%, a hydrochloric acid concentration of 0.01-1%, a temperature of 15-25°C, and a time of 60-240 seconds.

[0024] An ultrathin oxide layer is generated on the silicon surface by continuous oxidation with ozone, and hydrofluoric acid is simultaneously used to isotropically etch it, while hydrochloric acid inhibits metal redeposition and regulates the reaction rate. The three effects enable the pyramid tip and corners to undergo controllable micro-rounding, effectively reducing the surface state density and carrier recombination rate, while maintaining the overall light-trapping ability of the textured surface.

[0025] In a further embodiment, the rounding process further includes treating the sample with a 2-15% hydrofluoric acid solution at 25°C for 120-240 seconds.

[0026] The process thoroughly removes the natural oxide layer and any residual fluorine-silicon complexes from the previous step, exposing a clean, activated hydrogen-terminated silicon surface, providing an ideal interface for the subsequent high-quality deposition of the amorphous silicon passivation layer. This multi-stage ozone-acid washing system is conducted entirely under low-temperature, near-neutral conditions, avoiding the erosion of the back-side polished structure by a high-temperature alkaline environment, and significantly reducing the risk of silicon wafer weight reduction and fragmentation.

[0027] Secondly, the application of the above-mentioned method for processing rework sheets of back-polished textured heterojunction solar cells provided in this application in the preparation of thin-film heterojunction solar cells.

[0028] The reworked sheets are defective sheets caused by abnormal PECVD amorphous silicon deposition, abnormal PVD transparent conductive oxide coating, or film contamination.

[0029] Beneficial effects

[0030] This invention provides a method for processing reworked heterojunction solar cells with a textured surface. This method targets semi-finished heterojunction solar cells with an amorphous silicon functional layer and / or a transparent conductive oxide film deposited on a silicon substrate after texturing and cleaning. Through a three-step core process—acid washing to remove TCO, alkaline micro-etching for secondary texturing, and cleaning and surface rounding—it achieves efficient and low-loss rework of defective wafers. Compared to traditional rework methods that require repeating the entire texturing and cleaning process, this invention avoids excessive etching of the silicon wafer, significantly reduces wafer thinning, and effectively controls the breakage rate. It is particularly suitable for the production of HJT cells under the current trend of thinner wafers.

[0031] The alkaline micro-etching secondary texturing process in step S2 can not only remove the amorphous silicon passivation layer and doped layer, but also simultaneously modify the front pyramid textured surface, further reducing its reflectivity and improving light absorption efficiency. At the same time, this process precisely controls the impact on the back-side quasi-polished structure, ensuring that the reduction in reflectivity does not exceed 3.5%. Thus, while retaining the high reflectivity characteristics of the back side to enhance the utilization of long-wavelength light, it maintains good contact and passivation performance, taking into account both bifaciality and electrical performance.

[0032] The entire rework process is simple and controllable, requiring no complex masks or multi-step wet processes. It is compatible with existing production line equipment and has good mass production feasibility and cost advantages. The processed silicon substrate can be directly reused in the amorphous silicon deposition and TCO coating processes, achieving high-value recycling and significantly improving the overall yield and conversion efficiency of the cells.

[0033] In summary, this invention, while ensuring the integrity of the differentiated textured surface structure, achieves efficient, low-loss, and low-cost rework processing, providing key technical support for the large-scale manufacturing of thin-film heterojunction solar cells. Detailed Implementation

[0034] The embodiments of this application will be described in further detail below with reference to the examples. The detailed description of the following embodiments is used to illustrate the principles of this application, but should not be used to limit the scope of this application. This application can be implemented in many different forms and is not limited to the specific embodiments disclosed herein, but includes all technical solutions falling within the scope of the claims.

[0035] These embodiments are provided to make the application thorough and complete, and to fully express the scope of the application to those skilled in the art. It should be noted that, unless otherwise specifically stated, the relative arrangement of components and steps, material composition, numerical expressions, and values ​​illustrated in these embodiments should be interpreted as merely exemplary and not as limiting.

[0036] It should be noted that, in the description of this application, unless otherwise stated, "a plurality of" means two or more; the terms "upper," "lower," "left," "right," "inner," and "outer," etc., indicating orientation or positional relationship, are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this application. When the absolute position of the described object changes, the relative positional relationship may also change accordingly.

[0037] Furthermore, the terms "first," "second," and similar terms used in this application do not indicate any order, quantity, or importance, but are merely used to distinguish different parts. "Vertical" is not strictly vertical, but within the permissible margin of error. "Parallel" is not strictly parallel, but within the permissible margin of error. Terms such as "including" or "contains" mean that the element preceding the word encompasses the element listed after it, and do not exclude the possibility of encompassing other elements as well.

[0038] All terms used in this application have the same meaning as understood by one of ordinary skill in the art to which this application pertains, unless otherwise specifically defined. It should also be understood that terms defined in general dictionaries should be interpreted as having meanings consistent with their meanings in the context of the relevant art, and not as idealized or highly formalized, unless expressly defined herein.

[0039] Techniques, methods, and equipment known to those skilled in the art may not be discussed in detail, but where appropriate, they should be considered part of the specification.

[0040] All parameters not mentioned in the text refer to conventional processes.

[0041] Unless otherwise stated, all solution concentrations in this article are expressed as a mass percentage.

[0042] The texturing additive used in this application is a product manufactured by Changzhou Shichuang Energy Co., Ltd., model number TS53, version number V01, abbreviated as "Shichuang TS53V01".

[0043] Example 1

[0044] This invention provides a method and process for reworking heterojunction batteries with a textured surface. By performing secondary texturing and micro-etching to remove the doped and passivation layers, as well as modifying the front and back textured surfaces, the reflectivity of the back textured surface is preferably reduced by 0.3-3.5%, achieving efficient and controllable reworking. At the same time, the reflectivity of the front surface is reduced, significantly improving battery performance and yield, and reducing the breakage rate.

[0045] Compared with existing rework processes, the process is short, simple, and easy to implement, resulting in significant cost savings and making it feasible for mass production.

[0046] If the defective wafer does not have a transparent conductive oxide film layer, proceed directly to step 1 in the examples. If it is a transparent conductive oxide film layer deposited after PVD, the transparent conductive oxide film layer needs to be removed. The specific removal process can be divided into four stages: pre-cleaning, main acid washing, multi-stage deionized water rinsing, and drying.

[0047] The first stage is the pre-cleaning stage, which involves treating the silicon wafer surface with a mixture of 1.0% sodium hydroxide solution and 5% hydrogen peroxide at 65°C for 120 seconds to remove organic contaminants and particulate impurities, providing a clean reaction interface for subsequent acid washing. After pre-cleaning, a rapid spray with deionized water is immediately required to prevent the formation of spots after the alkaline residue dries, and to prepare for the main acid washing step.

[0048] The second stage is the main acid washing stage. For aluminum-doped zinc oxide films, 7% dilute hydrochloric acid is usually used to treat them at 25°C for 100 seconds. The hydrochloric acid reacts with ZnO to generate soluble zinc chloride, thus achieving peeling. For indium tin oxide films, which are more difficult to dissolve, 2% hydrogen peroxide is added to the hydrochloric acid as an oxidizing agent, and the films are treated at 30°C for 180 seconds to enhance the solubility of In2O3 and SnO2 and promote the entry of metal ions into the solution.

[0049] The third stage is a multi-stage deionized water rinsing stage, which thoroughly removes residual acid and dissolved metal ions through spraying to prevent cross-contamination or defects in subsequent processes.

[0050] The fourth stage is the drying stage, which uses hot nitrogen purging to dry the silicon wafer without leaving any marks, ensuring that the surface is free of water stains and particle residue. The entire acid pickling process balances efficiency, selectivity, and cleanliness, completely removing the TCO film layer while maximizing the protection of the silicon wafer's unique textured surface structure. This provides a high-quality substrate for subsequent secondary texturing and recoating, making it suitable for the large-scale production needs of HJT cell rework.

[0051] The examples and comparative examples are all reworked pieces from the same production line and batch.

[0052] Rework typically occurs during the quality inspection stage after coating and before screen printing, primarily targeting silicon wafers whose performance fails to meet standards due to defects in the thin film layer. When online testing of HJT cell semi-finished products reveals an open-circuit voltage below 720mV and a fill factor below 80%, the thin film layer is deemed substandard and rework is required. Alternatively, rework may be necessary due to internal factors such as oil contamination on the cell surface or abnormal process control parameters.

[0053] This invention is applicable to large-size silicon wafers used in HJT batteries, especially to 210 mm × 210 mm silicon wafers (i.e., half-wafers of 105 mm × 210 mm) cut into half-wafers by diamond wire during the silicon wafer manufacturing stage, but is not limited to this size.

[0054] Example 1

[0055] Step 1: Take the defective wafer and pre-clean it using 1% sodium hydroxide and 10% hydrogen peroxide at a temperature of 65°C for 240 seconds to remove dirt from the substrate surface.

[0056] Step 2: Perform secondary texturing treatment using 1.5% sodium hydroxide solution and 7% secondary texturing additive TS53V01 micro-corrosion to modify the texturing surface and reduce reflectivity; the reaction temperature is 65℃ and the time is controlled at 120s; the reflectivity reduction of the back-side similar back-polished structure is 0.5%, meeting the technical requirement of ≤3.5%.

[0057] Step 3: Cleaning with a mixture of 50 ppm ozone and 1% hydrochloric acid at 20°C for 240 seconds to remove additive residues and organic matter; spherical treatment using a mixture of ozone, hydrochloric acid, and hydrofluoric acid at 50 ppm ozone, 0.5% hydrofluoric acid, and 1% hydrofluoric acid at 20°C for 150 seconds; finally, removing the oxide layer with 10% hydrofluoric acid at 25°C for 120 seconds.

[0058] The subsequent HJT cell process includes deposition of an intrinsic passivation layer of amorphous silicon, deposition of a doped amorphous silicon layer, TCO film coating, screen printing, and sintering.

[0059] Example 2

[0060] Step 1: Take the defective wafer and pre-clean it using 8% sodium hydroxide and 5% hydrogen peroxide at a temperature of 70°C for 120 seconds to remove dirt from the substrate surface.

[0061] Step 2: Perform secondary texturing treatment using a 3.5% sodium hydroxide solution and a 3% secondary texturing additive, TS53V01 micro-corrosion, to modify the texturing surface and reduce reflectivity; the reaction temperature is 75℃ and the time is controlled at 240s; after testing, the reflectivity reduction of the back-side similar polished structure is 1.5%, which meets the technical requirement of ≤3.5%.

[0062] Step 3: Cleaning with a mixture of 50 ppm ozone and 1% hydrochloric acid at 25°C for 200 seconds to remove additive residues and organic matter; spherical treatment using a mixture of ozone, hydrochloric acid, and hydrofluoric acid at 50 ppm ozone, 0.1% hydrofluoric acid, and 0.5% hydrofluoric acid at 20°C for 150 seconds; finally, removing the oxide layer with 8% hydrofluoric acid at 25°C for 120 seconds.

[0063] The subsequent HJT cell process includes deposition of an intrinsic passivation layer of amorphous silicon, deposition of a doped amorphous silicon layer, TCO film coating, screen printing, and sintering.

[0064] Example 3

[0065] Step 1: Take defective wafers for pre-cleaning. Use a mixture of 0.5% sodium hydroxide solution and 8% hydrogen peroxide to treat at 70°C for 180 seconds to remove organic contaminants and particles adhering to the silicon wafer surface during transport or deposition, ensuring a clean texturing surface and providing a good reaction interface for subsequent secondary texturing.

[0066] Step 2: Perform alkaline micro-etching secondary texturing treatment using a mixture of 8% sodium hydroxide solution and 0.5% secondary texturing additive (TS53V01), reacting at 83℃ for 420 seconds. This treatment selectively removes the amorphous silicon passivation layer and doped layer, while also slightly modifying the front pyramid textured surface to further reduce its reflectivity. Testing showed that the reflectivity reduction of the back-side near-polished structure was 3.2%, meeting the technical requirement of ≤3.5%.

[0067] Step 3, Cleaning and Surface Rounding Treatment:

[0068] A mixture of 50ppm ozone and 0.5% hydrochloric acid was used to treat the product at 22°C for 300 seconds, which effectively removed residual secondary texturing additives and organic byproducts.

[0069] Subsequently, a rounding treatment is performed using a mixture containing 50 ppm ozone, 0.8% hydrofluoric acid, and 0.3% hydrochloric acid, reacting at 20°C for 120 seconds to moderately round the sharp corners of the velvet surface and reduce the surface recombination rate.

[0070] Finally, the silicon surface was treated with a 12% hydrofluoric acid solution at 25°C for 180 seconds to completely remove the natural oxide layer and obtain a clean, activated silicon surface.

[0071] Example 1 is applicable to depositing only an intrinsic amorphous silicon passivation layer; Example 2 is applicable to depositing an intrinsic amorphous silicon passivation layer and a doped layer; Example 3 is applicable to TCO film or cases with severe contamination; Example 3 requires the TCO film to be removed first.

[0072] The key point of step 2 is that the reflectivity reduction of the back-side-mounted reflective structure is divided into three types: extremely low damage (range limited to 0.3%-1.0%), balanced (range 1.0%-2.5%), and strong removal (range 2.5%-3.5%). Under extremely low damage conditions, the reaction is carried out at 60-70℃ with a sodium hydroxide solution concentration of 0.5-2% and an additive solution concentration of 5-10%, for a reaction time of 60-150 seconds. Under balanced conditions, the reaction is carried out at 70-80℃ with a sodium hydroxide solution concentration of 2-5% and an additive solution concentration of 1-5%, for a reaction time of 150-300 seconds. Under strong removal conditions, the reaction is carried out at 80-85℃ with a sodium hydroxide solution concentration of 5-10% and an additive solution concentration of 0.1-1%, for a reaction time of 300-480 seconds.

[0073] In actual heterojunction solar cell rework production, ultra-low-damage processes are not always the preferred choice. While this mode offers the best protection for back-side-mounted structures, helping to maintain high bifaciality and long-wavelength reflection performance, its applicability is clearly limited. Typically, ultra-low-damage conditions are only suitable when the rework wafer has only deposited an intrinsic amorphous silicon passivation layer, the film is thin, and there is no severe contamination, in order to minimize the risk of silicon wafer corrosion and fragmentation. This is especially applicable to ultra-thin silicon wafers, such as high-value recycling wafers ≤100μm.

[0074] In most real-world rework scenarios, defective wafers often already have passivation and doped amorphous silicon layers deposited, or TCO films, and may even have issues such as uneven doping or interface contamination. If an extremely low-damage process is still used in this situation, it may be impossible to completely remove the amorphous silicon functional layer, leading to increased interface defects during subsequent recoating, resulting in decreased open-circuit voltage, deterioration of fill factor, and ultimately, a decrease in reworked cell efficiency instead of an increase. Therefore, a balanced process ensures complete removal of amorphous silicon while keeping back-side structural damage within a reasonable range, balancing rework thoroughness, cell performance recovery rate, and process stability.

[0075] Strong removal processes are only necessary in extreme cases, such as when the amorphous silicon layer is excessively thick (significantly exceeding the normal thickness range for that process node, such as greater than 60 or 70 mm) due to TCO contamination, impurities in the film layer, or persistent organic or metal residues on the surface. While this mode results in greater back-side reflection loss, it ensures a completely clean interface, preventing more severe electrical performance failures due to residues. In summary, the choice between the three modes should be based on the specific condition of the defective wafer, the film structure, the wafer thickness, and the production line quality targets, rather than simply pursuing the lowest possible damage. On-demand rework and tiered control are the core strategies for achieving efficient and high-yield rework.

[0076] Comparative Example 1

[0077] This comparative example is the same as Example 2, except for step 3:

[0078] The obtained substrate underwent post-cleaning using the RCA cleaning process. The RCA cleaning steps were as follows: RCA1 was prepared with a ratio of alkali:hydrogen peroxide:water = 1:1:8, at a temperature of 50℃ for 145 seconds. Then, a rounding treatment was performed using a mixture of ozone, hydrochloric acid, and hydrofluoric acid. The ozone concentration was 50 ppm, the hydrofluoric acid concentration was 0.1%, and the hydrochloric acid concentration was 0.5%, at a temperature of 20℃ for 150 seconds. RCA2 was prepared with a ratio of hydrochloric acid:hydrogen peroxide:water = 1:1:8, at a temperature of 50℃ for 145 seconds. Finally, an 8% hydrofluoric acid solution was used to remove the oxide layer at a temperature of 25℃ for 120 seconds.

[0079] Comparative Example 2

[0080] The rework process on the same production line involves first preparing the first textured surface, then preparing the mask layer, then preparing the second textured surface, then removing the mask layer and cleaning; to obtain a back-polished textured surface, which is then used for subsequent HJT battery processes.

[0081] Specific plan:

[0082] 1. Pre-cleaning of rework wafers removes contaminants using a mixture of 50ppm ozone and 1% hydrochloric acid at 20℃ for 240s. Polishing is then performed using 2% sodium hydroxide at 70℃ for 2 minutes to remove the texturized surface. Next, a mixture of 1% sodium hydroxide and 10% hydrogen peroxide is used at 65℃ for 240s. Finally, a texturizing additive (TS53V01) with 1.25% sodium hydroxide and 0.5% of the texturing additive is applied at 83℃ for 520s. The pyramid size is 3-5 micrometers. Subsequent post-cleaning is then performed. The process primarily involves cleaning with a mixture of 50 ppm ozone and 1% hydrochloric acid at 20°C for 240 seconds. Next, the pyramidal valleys are rounded using hydrofluoric acid and a rounding additive (SIPSE-24 from Zhongke Pury). This is achieved with 5% HF and 2% of the additive, treated for 230 seconds at 30°C. This is followed by cleaning with a mixture of 50 ppm ozone and 1% hydrochloric acid at 20°C for 240 seconds to remove any additive residue. Finally, a 10% hydrofluoric acid solution is used to remove the oxide layer at 25°C for 120 seconds, thus removing the oxide layer from the silicon substrate surface.

[0083] 2. Preparation of single-sided mask layer: Silicon nitride with a refractive index of 1.8 and a thickness of 300 nm was deposited by PECVD as an alkali-resistant mask;

[0084] 3. Pre-clean the substrate from step 2 to remove contaminants using a mixture of 50 ppm ozone and 1% hydrochloric acid at 20°C for 240 seconds. Then, polish the large textured surface on the front side using a 2% sodium hydroxide solution at 70°C for 2 minutes. Next, use a mixture of 1% sodium hydroxide and 10% hydrogen peroxide at 65°C for 240 seconds. Finally, use 1% sodium hydroxide and 0.5% of a conventional texturing additive at 80°C for 520 seconds. The cleaning process involved a mixture of 50 ppm ozone and 1% hydrochloric acid at 20°C for 240 seconds. A circularization (CP) treatment was then performed, using a mixture of ozone, hydrochloric acid, and hydrofluoric acid to simultaneously remove the silicon nitride mask. The ozone concentration was 50 ppm, the hydrofluoric acid concentration was 0.5%, and the hydrochloric acid concentration was 1%, all at 20°C for 90 seconds. Finally, a 10% hydrofluoric acid solution was used to remove the oxide layer at 25°C for 120 seconds, resulting in a textured, brushed surface with a back reflectivity of 20%.

[0085] 4. Subsequent HJT battery process.

[0086] The reflectance of the front and back sides of the rework sheets after two different processing methods was tested using a D8 reflectance meter. The following electrical properties, total fragmentation rate of the rework sheets collected on the production line, and weight changes and weight reduction of the rework sheets before and after the texturing and cleaning process were obtained using an IV tester:

[0087]

[0088] As shown in the table above, Example 1, for ultra-thin rework wafers with only an intrinsic amorphous silicon passivation layer deposited, employed mild micro-etching conditions to selectively remove the amorphous silicon layer, maximizing the protection of the back-side quasi-polished structure. After modification, the reflectivity of its front pyramidal textured surface was reduced to the lowest among all groups, effectively improving light absorption and resulting in the highest short-circuit current and conversion efficiency. The extremely low weight reduction lowered mechanical stress, keeping the breakage rate at 1.14%.

[0089] Example 2 employs a medium-intensity process that completely removes the amorphous silicon functional layer while maintaining the back-side reflectivity at 18.5%, balancing structural integrity with thorough cleaning. Its electrical performance is similar to that of Example 1, with weight reduction and fragmentation remaining at extremely low levels, demonstrating the high feasibility and stability of the on-demand, graded rework strategy of this invention in mainstream production lines.

[0090] For defective sheets containing TCO films (also applicable to severely contaminated sheets), Example 3 employs high-intensity micro-etching. Although this results in a backside reflectance of 16.80%, it ensures a thoroughly clean interface, preventing electrical performance failures caused by residues. While its efficiency is slightly lower than the previous two examples, it is still significantly better than the comparative examples, and the fragmentation rate is only 1.85%, far lower than traditional rework methods.

[0091] Comparative Example 1 retained the micro-etching process of Example 2, but replaced the ozone cleaning and spherical treatment in step S3 with the traditional RCA cleaning process. Although an additional spherical treatment was introduced between RCA1 and RCA2, the use of a strongly alkaline system in RCA1 caused irreversible erosion to the finely controlled differentiated textured surface. Testing showed that the reflectivity of the back side of the reworked silicon wafer decreased from 20.0% of the original back-polished structure to 15.8%, a reduction of 4.2%. This indicates that the high-reflectivity polished area on the back side was over-etched, significantly deteriorating the long-wavelength light reflection capability and leading to a decrease in short-circuit current. Simultaneously, the alkaline oxidation environment introduced surface defects, causing a simultaneous decrease in open-circuit voltage and fill factor. The additional silicon etching brought about by the RCA process increased the weight reduction per wafer to 0.12g, but also increased the total fragmentation rate, verifying the limitations of the traditional cleaning process in HJT rework scenarios.

[0092] Comparative Example 2 illustrates a conventional rework process on a traditional production line. First, the original textured surface is completely removed, and then a near-polished-back structure is reconstructed using a masking method. This process involves multiple strong alkaline etching steps and mask deposition / peeling, resulting in a total wafer weight reduction of up to 0.62g and directly causing a 9.56% breakage rate, severely hindering wafer thinning production. Although the back reflectivity reaches 20% (the reconstructed reflectivity is essentially the same as the original near-polished-back structure before rework, indicating successful morphology reproduction), the front reflectivity is as high as 10.63%, and the overall process is complex, costly, and has a low yield. Its low efficiency fully demonstrates that traditional rework methods cannot compete with this invention in terms of efficiency, cost, and reliability.

[0093] In summary, based on electrical performance, weight reduction, and total fragmentation rate, this invention has the advantages of low weight reduction and low fragmentation rate. At the same time, due to the low weight reduction, the electrical performance shows a gain in current, which has a certain efficiency gain compared with the comparative example.

[0094] While specific embodiments of this application have been described in detail by way of examples, those skilled in the art should understand that the above examples are for illustrative purposes only and are not intended to limit the scope of this application. Those skilled in the art should understand that modifications can be made to the above embodiments or equivalent substitutions can be made to some technical features without departing from the scope and spirit of this application. In particular, as long as there is no structural conflict, the various technical features mentioned in the embodiments can be combined in any manner.

Claims

1. A method for processing reworked sheets of a back-polished textured heterojunction solar cell, characterized in that, The rework wafer is a heterojunction solar cell semi-finished product on a texturized and cleaned silicon substrate with an amorphous silicon functional layer and / or a transparent conductive oxide film already deposited; the processing method includes the following steps: Step S1: If a transparent conductive oxide film layer exists on the surface of the rework sheet, the transparent conductive oxide film layer is removed by acid washing. Step S2: Perform alkaline micro-etching secondary texturing on the reworked wafer after step S1 to selectively remove the amorphous silicon functional layer. At the same time, modify the pyramid textured surface on the front side to reduce reflectivity and reduce the reflectivity of the back-side quasi-polished structure by 0.3%-3.5%. Step S3: Clean and perform surface rounding treatment on the silicon substrate after secondary texturing; In step S2, the alkaline micro-corrosion secondary texturing treatment uses a mixture of an alkaline solution and a secondary texturing additive. The alkaline solution is potassium hydroxide or sodium hydroxide, the concentration of the alkaline solution is 0.1-10%, and the concentration of the secondary texturing additive is 0.1-10%. The reaction temperature for the alkaline micro-corrosion secondary texturing treatment is 60-85℃, and the reaction time is 60-480 seconds. The cleaning process in step S3 is an ozone cleaning process.

2. The method for processing reworked sheets according to claim 1, characterized in that, It also includes step S4, in which the silicon substrate processed in step S3 is re-entered into the amorphous silicon functional layer deposition and transparent conductive oxide film coating process to complete the rework of the heterojunction cell.

3. The method for processing reworked sheets according to claim 1, characterized in that, The amorphous silicon functional layer includes a passivation layer and / or a doped layer; The reworked wafer is a defective wafer that has only undergone amorphous silicon passivation layer deposition, with no doped layer or transparent conductive oxide film on its surface, and directly proceeds to the alkaline micro-etching secondary texturing process in step S2; and / or, The reworked wafer is a defective wafer that has already undergone amorphous silicon passivation and doping layer deposition, and whose surface does not contain a transparent conductive oxide film layer. It directly proceeds to the alkaline micro-etching secondary texturing treatment in step S2; and / or, The rework wafer is a defective wafer that has already completed the deposition of an amorphous silicon functional layer and a transparent conductive oxide film layer. It is necessary to first perform step S1 to remove the transparent conductive oxide film layer before proceeding to step S2.

4. The method for processing reworked sheets according to claim 1, characterized in that, In step S2, before the secondary texturing process, a pre-cleaning step is also included: using a mixed solution containing 0.01-10% alkali solution and 1-15% hydrogen peroxide, and treating at 50-80°C for 120-240 seconds, wherein the alkali is potassium hydroxide or sodium hydroxide.

5. The method for processing reworked sheets according to claim 1, characterized in that, The ozone cleaning process includes immersing the reworked sheet in a solution containing 45-50 ppm ozone and 0.01-1% hydrochloric acid, and treating it at 15-25°C for 120-360 seconds.

6. The method for processing reworked sheets according to claim 1, characterized in that, In step S3, the rounding treatment is carried out using a mixture of ozone, hydrochloric acid, and hydrofluoric acid. The ozone concentration is 45-50 ppm, the hydrofluoric acid concentration is 0.1-1%, the hydrochloric acid concentration is 0.01-1%, the temperature is 15-25℃, and the time is 60-240 seconds.

7. The method for processing reworked sheets according to claim 5, characterized in that, The rounding process also includes treating the sample with a 2–15% hydrofluoric acid solution at 25°C for 120–240 seconds.

8. The method for processing rework sheets of back-polished textured heterojunction solar cells as described in any one of claims 1-7 is applied in the fabrication of thin-film heterojunction solar cells.

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