Temporary wafer bonding method

Abstract

The invention provides a wafer temporary bonding method, which comprises the steps of providing a slide glass wafer which comprises a slide glass substrate, and a buffer silicon oxide layer, a titanium nitride stripping layer and a first bonding silicon oxide layer which are sequentially formed; providing a device wafer, wherein the device wafer comprises a device substrate, and a titanium nitride absorption layer and a second bonding silicon oxide layer which are formed in sequence; bonding the slide glass wafer and the device wafer through the first bonding silicon oxide layer and the second bonding silicon oxide layer; according to the titanium nitride absorption layer and the titanium nitride absorption layer, the de-bonding light beam is used for de-bonding from the surface, close to the first bonding silicon oxide layer, of the titanium nitride stripping layer, and the titanium nitride absorption layer is arranged on the device substrate to protect the device substrate, so that even if peeling defects exist, the de-bonding and subsequent cleaning procedures cannot damage the device substrate.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of integrated circuits, and in particular to a wafer temporary bonding method. BACKGROUND

[0002] With the development of semiconductor manufacturing process, three-dimensional integrated circuit technology is used to deal with the micro-fabrication bottleneck of planar transistors and continue Moore's law development. In the three-dimensional integrated circuit technology, the quality of the bonding and debonding steps required for the vertical stacked chips directly affects the product yield. In the current bonding process, the edge bonding is prone to produce bubbles, and when debonding, the bubbles will form peeling defects. In the multi-film layer design, the peeling defects are often removed by edge over-etching, which is easy to affect the device. SUMMARY

[0003] The embodiments of the present application provide a wafer temporary bonding method, which protects the device wafer by the titanium nitride absorption layer. Thus, even if there are peeling defects on the bonding surface, the device substrate will not be damaged during debonding.

[0004] According to some embodiments of the present application, the embodiments of the present application provide a wafer temporary bonding method, which includes providing a carrier wafer, the carrier wafer including a carrier substrate and a buffer silicon oxide layer, a titanium nitride peeling layer and a first bonding silicon oxide layer formed in sequence; providing a device wafer, the device wafer including a device substrate and a titanium nitride absorption layer and a second bonding silicon oxide layer formed in sequence; bonding the carrier wafer and the device wafer through the first bonding silicon oxide layer and the second bonding silicon oxide layer; and debonding from the surface of the titanium nitride peeling layer close to the first bonding silicon oxide layer using a debonding light beam.

[0005] Further, the thickness of the titanium nitride peeling layer is 150 angstroms to 350 angstroms.

[0006] Further, the titanium nitride peeling layer is formed by a deposition process, and the temperature of the deposition process is between 200°C and 400°C.

[0007] Further, the thickness of the titanium nitride absorption layer is 150 angstroms to 350 angstroms.

[0008] Further, the titanium nitride absorption layer is formed by a deposition process, and the temperature of the deposition process is between 200°C and 400°C.

[0009] Further, the thickness of the buffer silicon oxide layer is 50 angstroms to 300 angstroms, and the buffer silicon oxide layer is formed by a thermal oxidation process, and the temperature of the thermal oxidation process is between 500°C and 1000°C.

[0010] Further, the first bonding silicon oxide layer has a thickness of 300 angstroms to 2000 angstroms, and is formed by a thermal oxidation process with a temperature of 500°C to 1000°C.

[0011] Further, the second bonding silicon oxide layer has a thickness of 300 angstroms to 2000 angstroms, and is formed by a thermal oxidation process with a temperature of 500°C to 1000°C.

[0012] Further, after the debonding, the method further comprises: performing a chemical mechanical polishing and a cleaning process on the carrier wafer to sequentially remove the buffer silicon oxide layer, the titanium nitride stripping layer.

[0013] Further, after the debonding, the method further comprises: performing a cleaning process on the device wafer to sequentially remove the first bonding silicon oxide layer, the second bonding silicon oxide layer and the titanium nitride absorption layer.

[0014] The present application forms a titanium nitride absorption layer on the device substrate, which is used to absorb the debonding light beam while protecting the device substrate from damage, and the device substrate is not damaged during the debonding. In addition, by forming the titanium nitride absorption layer and the second bonding silicon oxide layer on the device substrate, and forming the buffer silicon oxide layer, the titanium nitride stripping layer and the first bonding silicon oxide layer on the carrier substrate in sequence, the first bonding silicon oxide layer is bonded to the second bonding silicon oxide layer, and the first bonding silicon oxide layer is left on the device wafer after the debonding. Therefore, even if there is a peeling defect on the bonding surface formed by the bonding of the first bonding silicon oxide layer and the second bonding silicon oxide layer, the bonding film layer on the device wafer is simple and uniform, and the device substrate will not be damaged during the cleaning process, thereby improving the product yield. BRIEF DESCRIPTION OF DRAWINGS

[0015] One or more embodiments are illustrated by way of example in the figures that form a part of this patent document, and in which like reference numbers typically refer to corresponding or like components throughout the viewing of the figures and text that follow. As embodied herein, the figures of the accompanying drawings are schematic, schematic illustrations of typical embodiments of this application and are not limiting of the present application, unless otherwise specified. In order to show the application more clearly, the accompanying drawings for the embodiments will be briefly introduced. It is obvious for those skilled in the art that other drawings can be obtained from these drawings without any creative effort.

[0016] Figure 1 A flowchart of a wafer temporary bonding method provided by the present embodiment;

[0017] Figure 2 A cross-sectional structure diagram of a carrier wafer in a wafer temporary bonding method provided by the present embodiment;

[0018] Figure 3 A cross-sectional structure diagram of a device wafer in a wafer temporary bonding method provided for the embodiment;

[0019] Figure 4 A cross-sectional structure diagram after bonding in a wafer temporary bonding method provided for the embodiment;

[0020] Figure 5 A cross-sectional structure diagram after debonding in a wafer temporary bonding method provided for the embodiment.

[0021] Reference signs:

[0022] 10 - slide substrate, 11 - buffer silicon oxide layer, 12 - titanium nitride release layer, 13 - first bonding silicon oxide layer, 20 - device substrate, 21 - titanium nitride absorption layer, 22 - second bonding silicon oxide layer. DETAILED DESCRIPTION

[0023] In the related art, a three-dimensional integrated circuit process stacks multiple wafers / chips in a vertical direction and realizes internal interconnection through a through-silicon via (TSV) technology, thereby forming a high-performance and high-integration system. A wafer thinning process is to thin the thickness of the stacked wafers from hundreds of microns to tens or even a few microns through grinding, etching, and other processes while maintaining the thickness of the final package within a reasonable range. The multi-layer stacking in the three-dimensional integrated circuit process uses a bonding process to bond the wafers together. The bonding process includes temporary bonding, which can temporarily combine the device wafer with a supporting carrier for subsequent process treatment, and separate them after the process is completed through a debonding process. The debonding process, as the reverse process of temporary bonding, needs to realize clean and lossless separation without damaging the fragile and thinned device wafer. In the related bonding and debonding process, bubbles are easily generated at the edge of the bonding surface, and when debonding, the bonding force at the edge is smaller than the adhesion force between the release layer and the adjacent layer in the debonding process, and thus the edge is separated, resulting in peeling defects of the bonding film layer. The bonding film layer on the slide substrate and the device substrate is complex, and especially when removing the surface oxide layer of the device substrate, the oxide film layer on the device substrate will be damaged.

[0024] Based on the above research, the application provides a wafer temporary bonding method. A carrier wafer is provided, which includes a carrier substrate and a buffer silicon oxide layer, a titanium nitride stripping layer and a first bonding silicon oxide layer formed in sequence. A device wafer is provided, which includes a device substrate and a titanium nitride absorption layer and a second bonding silicon oxide layer formed in sequence. The carrier wafer and the device wafer are bonded through the first bonding silicon oxide layer and the second bonding silicon oxide layer. The de-bonding is performed from the surface of the titanium nitride stripping layer close to the first bonding silicon oxide layer by using a de-bonding light beam. Since the titanium nitride absorption layer is formed on the device substrate, the titanium nitride absorption layer is used to absorb the de-bonding light beam and protect the device substrate from damage, and the device substrate is not damaged during de-bonding. In addition, the titanium nitride absorption layer and the second bonding silicon oxide layer are formed on the device substrate, and the carrier substrate and the buffer silicon oxide layer, the titanium nitride stripping layer and the first bonding silicon oxide layer formed in sequence. The first bonding silicon oxide layer is bonded and connected with the second bonding silicon oxide layer. After de-bonding, the first bonding silicon oxide layer is added to the device wafer. Therefore, even if there is a peeling defect on the bonding surface formed by bonding the first bonding silicon oxide layer and the second bonding silicon oxide layer, the bonding film layer on the device wafer is simple and uniform, and the device substrate will not be damaged during layer-by-layer cleaning, thereby improving the product yield.

[0025] In the description of the embodiments of the present application, if the technical terms include "first", "second", the technical terms "first", "second" and the like are only used to distinguish different objects, and cannot be understood as indicating or implying relative importance or implicitly indicating the number, specific order or primary and secondary relationship of the indicated technical features. In the description of the embodiments of the present application, the meaning of "multiple" is two or more, unless otherwise explicitly and specifically limited. Similarly, "multiple groups" means two or more groups (including two groups), and "multiple pieces" means two or more pieces (including two pieces).

[0026] In this document, referring to "embodiments" means that the specific features, structures or characteristics described in connection with the embodiments can be included in at least one embodiment of the present application. The appearance of this phrase in various places in the specification does not necessarily mean the same embodiment, nor is it independent or alternative to other embodiments. Those skilled in the art explicitly and implicitly understand that the embodiments described herein can be combined with other embodiments.

[0027] The embodiments of the present application will be described in detail below with reference to the accompanying drawings. However, those skilled in the art can understand that in the embodiments of the present application, many technical details are presented in order to make the reader better understand the present application. However, the technical solutions claimed by the present application can be implemented even without these technical details and various changes and modifications based on the following embodiments.

[0028] As Figure 1As shown in the embodiment of this application, a wafer temporary bonding method includes:

[0029] S11: Provide a carrier wafer, the carrier wafer including a carrier substrate and a buffer silicon oxide layer, a titanium nitride release layer and a first bonding silicon oxide layer formed sequentially;

[0030] S12: Provide a device wafer, the device wafer including a device substrate and a titanium nitride absorber layer and a second bonded silicon oxide layer formed sequentially;

[0031] S13: Bond the carrier wafer to the device wafer through the first bonding silicon oxide layer and the second bonding silicon oxide layer;

[0032] S14: Debonding is performed on the surface of the titanium nitride stripping layer near the first bonded silicon oxide layer using a debonding beam.

[0033] The embodiments of this application will be described in more detail below with reference to the accompanying drawings.

[0034] like Figure 2 As shown, the wafer carrier includes a substrate 10 and a buffer silicon oxide layer 11, a titanium nitride release layer 12, and a first bonding silicon oxide layer 13 sequentially formed on the substrate 10. The substrate 10 provides an operating platform for subsequent processes and can be made of silicon, bulk silicon, germanium, germanium silicon, indium phosphide, gallium arsenide, etc.

[0035] In one embodiment, the titanium nitride release layer 12 has a thickness of 150 to 350 angstroms. The titanium nitride release layer 12 is formed using a deposition process at a temperature between 200°C and 400°C. As a sacrificial layer, the titanium nitride release layer 12 exhibits lower interfacial adhesion, cohesive strength, and repeatability than the silicon dioxide-silicon dioxide bond interface. Before debonding, the titanium nitride release layer 12 can withstand the mechanical and thermal stresses of the process without premature breakage. The uniform thickness of the titanium nitride release layer 12 ensures clean and synchronous separation of the entire wafer interface during debonding, avoiding unpredictable localized tearing.

[0036] In one embodiment, the thickness of the buffer silicon oxide layer 11 is 50 to 300 angstroms. The buffer silicon oxide layer 11 is formed by a thermal oxidation process at a temperature between 500°C and 1000°C. The reaction formula for the thermal oxidation process can be: Si + O₂ → SiO₂ or Si + 2H₂O → SiO₂ + 2H₂. The buffer silicon oxide layer 11 serves to protect the substrate 10 and as a transition layer for the titanium nitride release layer. It buffers the stress caused by the mismatch in thermal expansion coefficients between the substrate 10 and the titanium nitride release layer 12, preventing stress concentration from causing premature peeling of the film during the process, and preventing atoms in the substrate 10 from diffusing into the titanium nitride release layer 12, thus affecting the sacrificial layer performance of the titanium nitride release layer 12.

[0037] In one embodiment, the first bonding silicon oxide layer 13 has a thickness of 300 angstroms to 2000 angstroms and is formed by a thermal oxidation process at a temperature between 500°C and 1000°C. The first bonding silicon oxide layer 13 is used for bonding to the bonding surface of the device wafer and is adjacent to the titanium nitride release layer 12.

[0038] like Figure 3 As shown, in the device wafer, the device wafer includes a device substrate 20 and a titanium nitride absorber layer 21 and a second bonding silicon oxide layer 22 sequentially formed on the device substrate 20. The second bonding silicon oxide layer 22 serves as a device bonding layer.

[0039] In one embodiment, the titanium nitride absorber layer 21 has a thickness of 150 angstroms to 350 angstroms. The titanium nitride absorber layer 21 is formed using a deposition process at a temperature between 200°C and 400°C. The titanium nitride absorber layer 21 absorbs remaining debonding energy. The titanium nitride absorber layer 21 is formed on the device substrate 20 and protects the device substrate 20 from damage during the post-debonding cleaning process.

[0040] In one embodiment, the second bonded silicon oxide layer 22 has a thickness of 300 to 2000 angstroms and is formed using a thermal oxidation process at a temperature between 500°C and 1000°C. The second bonded silicon oxide layer 22 functions similarly to the first bonded silicon oxide layer 13, together forming a robust silicon dioxide-silicon dioxide bonding interface. The second bonded silicon oxide layer 22 protects the device wafer from physical and chemical damage and works in conjunction with the first bonded silicon oxide layer 22 to buffer and absorb process stress.

[0041] like Figure 4 As shown, the carrier wafer and the device wafer are bonded through the first bonding silicon oxide layer 13 and the second bonding silicon oxide layer 22, and as... Figure 5 As shown, debonding is performed from the surface of the titanium nitride stripping layer near the first bonded silicon oxide layer using a debonding beam.

[0042] Further, permanent bonding can be used between the first bonding silicon oxide layer 13 and the second bonding silicon oxide layer 21. For example, the first bonding silicon oxide layer 13 and the second bonding silicon oxide layer 21 are connected by fusion bonding, and the titanium nitride stripping layer 12 is configured as a sacrificial layer that breaks during the debonding process. In the fusion bonding, the first bonding silicon oxide layer 13 and the second bonding silicon oxide layer 21 are connected together by fusion bonding, and at room temperature, a preliminary and weak bonding is achieved by intermolecular forces, and then high-temperature annealing is performed, and at high temperature, the molecules at the bonding interface obtain enough energy to diffuse and chemically react, forming a strong bonding surface.

[0043] Further, the debonding beam is a laser beam, so that the heat generated by the laser beam penetrating the titanium nitride stripping layer 12 destroys the connection structure of the titanium nitride stripping layer 12 and the first bonding silicon oxide layer 13. The laser beam penetrates the titanium nitride stripping layer 12 to destroy the titanium nitride stripping layer 12, and the remaining energy is absorbed by the titanium nitride absorption layer 21.

[0044] In an embodiment, after debonding, the slide wafer is further subjected to a chemical mechanical polishing and cleaning process to sequentially remove the buffer silicon oxide layer, the titanium nitride stripping layer, and the first bonding silicon oxide layer. In this way, the slide substrate is protected from damage during the cleaning process due to the buffer silicon oxide layer.

[0045] In an embodiment, after debonding, the device wafer is further subjected to a cleaning process to sequentially remove the first bonding silicon oxide layer, the second bonding silicon oxide layer, and the titanium nitride absorption layer. In this way, even if the bonding surface formed by the bonding of the first bonding silicon oxide layer and the second bonding silicon oxide layer has a peeling defect, the device substrate is not damaged during the cleaning process due to the simple and uniform bonding film layer on the device wafer, thereby improving product yield.

[0046] Further, the cleaning process can use a wet etching process.

[0047] In the present embodiment, the titanium nitride absorption layer is formed on the device substrate, which is used to absorb the debonding beam and protect the device substrate from damage during debonding. In addition, by forming the titanium nitride absorption layer and the second bonding silicon oxide layer on the device substrate, and the buffer silicon oxide layer, the titanium nitride stripping layer, and the first bonding silicon oxide layer on the slide substrate, the first bonding silicon oxide layer is bonded to the second bonding silicon oxide layer, and after debonding, the first bonding silicon oxide layer is left on the device wafer. In this way, even if the bonding surface formed by the bonding of the first bonding silicon oxide layer and the second bonding silicon oxide layer has a peeling defect, the device substrate is not damaged during the cleaning process due to the simple and uniform bonding film layer on the device wafer, thereby improving product yield.

[0048] Those skilled in the art can understand that the above-mentioned embodiments are specific examples for implementing the present application, and in actual applications, various changes can be made in form and details without departing from the spirit and scope of the present application. Any person skilled in the art can make various changes and modifications without departing from the spirit and scope of the present application, and therefore the protection scope of the present application should be limited by the scope defined by the claims.

Claims

1. A wafer temporary bonding method, characterized by, The method comprises: providing a carrier wafer, the carrier wafer comprising a carrier substrate and sequentially formed thereon a buffer silicon oxide layer, a titanium nitride release layer, and a first bonding silicon oxide layer; providing a device wafer, the device wafer comprising a device substrate and sequentially formed thereon a titanium nitride absorption layer and a second bonding silicon oxide layer; bonding the carrier wafer and the device wafer through the first bonding silicon oxide layer and the second bonding silicon oxide layer; de-bonding the carrier wafer and the device wafer through the titanium nitride release layer close to the surface of the first bonding silicon oxide layer using a de-bonding light beam.

2. The wafer temporary bonding method according to claim 1, wherein The thickness of the titanium nitride release layer is 150 angstroms to 350 angstroms.

3. The wafer temporary bonding method according to claim 2, wherein The titanium nitride release layer is formed by a deposition process with a temperature between 200℃ and 400℃.

4. The wafer temporary bonding method according to claim 1, wherein The thickness of the titanium nitride absorption layer is 150 angstroms to 350 angstroms.

5. The wafer temporary bonding method according to claim 4, wherein The titanium nitride absorption layer is formed by a deposition process with a temperature between 200℃ and 400℃.

6. The wafer temporary bonding method according to claim 1, wherein The thickness of the buffer silicon oxide layer is 50 angstroms to 300 angstroms, and the buffer silicon oxide layer is formed by a thermal oxidation process with a temperature between 500℃ and 1000℃.

7. The wafer temporary bonding method according to claim 1, wherein The thickness of the first bonding silicon oxide layer is 300 angstroms to 2000 angstroms, and the first bonding silicon oxide layer is formed by a thermal oxidation process with a temperature between 500℃ and 1000℃.

8. The wafer temporary bonding method according to claim 1, wherein The thickness of the second bonding silicon oxide layer is 300 angstroms to 2000 angstroms, and the second bonding silicon oxide layer is formed by a thermal oxidation process with a temperature between 500℃ and 1000℃.

9. The wafer temporary bonding method according to claim 1, wherein After de-bonding, the method further comprises performing a chemical mechanical polishing and cleaning process on the carrier wafer to sequentially remove the buffer silicon oxide layer and the titanium nitride release layer.

10. The wafer temporary bonding method according to claim 1, wherein After de-bonding, the method further comprises performing a cleaning process on the device wafer to sequentially remove the first bonding silicon oxide layer, the second bonding silicon oxide layer, and the titanium nitride absorption layer.

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