Circuit board, preparation method thereof and display screen

Abstract

The invention provides a circuit board, a preparation method thereof and a display screen. According to the invention, the side wall of the slot is provided with the reflecting part comprising the reflecting layer and the optical film layer, and when the light-emitting element is connected in the slot, light emitted by the light-emitting element is refracted by the optical film layer and then reflected by the reflecting layer, so that the light reflectivity is improved, and higher brightness can be provided.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of circuit board, in particular to a circuit board, a preparation method thereof and a display screen. BACKGROUND

[0002] With the progress of science and technology, miniaturization of components has become a regular demand, and various Mini LED (next-millimeter light-emitting diode) and Micro LED (micro light-emitting diode) applications are also becoming more and more widespread. However, when the LED lamp bead is miniaturized to the Mini or Micro level, the miniaturization of the lamp bead will result in insufficient brightness.

[0003] In the prior art, LED lamp beads are usually arranged in the slot of the circuit board (carrier plate) by using a front opening cover or a rear opening cover. However, as the LED lamp bead is miniaturized, the slot becomes smaller and cannot be made by using the traditional rear opening cover method. The front opening cover cannot effectively protect the groove bottom conductor layer, and the cup pasting method is easy to cause pure glue flow to contaminate the conductor layer, affecting the product yield. SUMMARY

[0004] Therefore, the present application provides a preparation method of a circuit board to improve light reflectivity, thereby improving brightness, and improving production efficiency and yield.

[0005] An embodiment of the present application provides a preparation method of a circuit board, comprising the following steps:

[0006] A substrate is provided, the substrate comprising a dielectric layer and a first circuit layer formed on a surface of the dielectric layer, the first circuit layer comprising a pad, and the pad being provided with a first protective layer away from the surface of the dielectric layer;

[0007] A copper-clad plate is laminated on the surface of the substrate; wherein the copper-clad plate comprises a base material layer and a copper foil layer, the base material layer is located between the copper foil layer and the first circuit layer, the base material layer has a groove penetrating through the base material layer along the thickness direction of the base material layer, and the groove is arranged corresponding to the pad;

[0008] The copper foil layer arranged corresponding to the groove is removed to form a slot, and a part of the remaining copper foil layer is removed to form a circuit pattern; wherein the pad is exposed from the slot;

[0009] A copper plating layer is arranged on a part of the surface of the circuit pattern away from the base material layer, and the copper plating layer and the circuit pattern are made to form a second circuit layer;

[0010] A reflective layer is arranged on the inner wall of the slot;

[0011] An optical film layer is arranged on the surface of the reflective layer.

[0012] In one embodiment, the optical film layer comprises the following components by mass percentage: acrylic resin 45% to 65%; acrylic monomer 10% to 30%; epoxy resin 20% to 25%. The optical film layer further comprises photopolymerization initiator, propylene glycol methyl ether acetate, diethylene glycol ethyl ether acetate, and ethyl acetate. The content of the photopolymerization initiator is less than 5%, the content of the propylene glycol methyl ether acetate is less than 0.6%, the content of the diethylene glycol ethyl ether acetate is less than 0.6%, and the content of the ethyl acetate is less than 0.4%.

[0013] In one embodiment, the material of the reflective layer comprises one or more of silver, tin, and nickel.

[0014] In one embodiment, the step of "removing the copper foil layer arranged corresponding to the groove to form a slot, and removing part of the remaining copper foil layer to form a circuit pattern" further comprises:

[0015] arranging a second protective layer on the part of the surface of the copper foil layer away from the substrate layer; wherein the surface of the copper foil layer arranged corresponding to the groove is not covered by the second protective layer, and the second protective layer comprises tin;

[0016] removing the copper foil layer arranged corresponding to the groove by etching to form a slot, and at the same time, the copper foil layer exposed from the second protective layer is removed by etching to form a circuit pattern;

[0017] removing the second protective layer.

[0018] In one embodiment, the step of "arranging a copper plating layer on the surface of the circuit pattern away from the substrate layer, and manufacturing the copper plating layer and the circuit pattern to form a second circuit layer" further comprises:

[0019] forming a blind hole penetrating through the substrate layer along the thickness direction of the substrate layer on the substrate layer;

[0020] arranging a thin copper layer on the inner wall of the blind hole and the inner wall of the slot;

[0021] arranging a copper plating layer on the part of the surface of the circuit pattern away from the substrate layer, arranging the copper plating layer in the blind hole to form a conductive hole, and arranging the copper plating layer on the surface of the thin copper layer of the slot;

[0022] arranging a third protective layer on the surface of the copper plating layer away from the circuit pattern;

[0023] removing the circuit pattern exposed from the copper plating layer by etching, thereby forming a second circuit layer;

[0024] removing the third protective layer.

[0025] In one embodiment, the first protective layer comprises tin, and the third protective layer comprises tin.

[0026] In one embodiment, before the step of "providing a reflective layer on the inner wall of the slot", the preparation method further comprises: providing a solder resist layer on the surface of the second circuit layer.

[0027] In one embodiment, the present application provides a circuit board, comprising a substrate layer, a first circuit layer, a reflective part, and a second circuit layer. The substrate layer has a slot extending through the substrate layer along the thickness direction of the substrate layer. The first circuit layer is formed on one surface of the substrate layer, and the first circuit layer comprises a pad. The surface of the pad is provided with a first protective layer, and the pad is exposed from the slot. The reflective part is provided on the inner wall of the slot, and the reflective part comprises a reflective layer and an optical film layer, wherein the reflective layer is located between the inner wall and the optical film layer. The second circuit layer is formed on another surface of the substrate layer, and the first circuit layer is electrically connected to the second circuit layer.

[0028] In one embodiment, the circuit board further comprises a dielectric layer and a third circuit layer. The dielectric layer is located between the first circuit layer and the third circuit layer, and the third circuit layer is electrically connected to the first circuit layer.

[0029] In one embodiment, the present application provides a display screen, comprising a light emitting element and the circuit board as described above, wherein the light emitting element is electrically connected to the pad.

[0030] By providing the reflective part comprising the reflective layer and the optical film layer on the side wall of the slot, when the light emitting element is connected in the slot, the light emitted by the light emitting element can be refracted by the optical film layer and then reflected by the reflective layer, thereby improving the reflectivity of light and providing higher brightness. BRIEF DESCRIPTION OF DRAWINGS

[0031] Figures 1A-1D A cross-sectional view of a substrate prepared in one embodiment of the present application.

[0032] Figure 2 A cross-sectional view of a structure shown in Figure 1D A schematic view of a copper clad plate being pressed on the substrate shown in

[0033] Figures 3A-3D A cross-sectional view of a structure shown in Figure 2 A cross-sectional view of a structure shown in

[0034] Figures 4A-4G A cross-sectional view of a structure shown in Figure 3D A cross-sectional view of a structure shown in

[0035] Figure 5 A cross-sectional view of a structure shown in Figure 4G A cross-sectional view of a structure shown in

[0036] Figure 6 A circuit board obtained by providing an optical film layer on the surface of a reflective layer of the structure shown in Figure 5 A cross-sectional view of a display screen according to an embodiment of the present application.

[0037] Figure 7 A cross-sectional view of a display screen according to an embodiment of the present application.

[0038] Explanation of main component symbols

[0039] Circuit board 100

[0040] Substrate 10

[0041] Dielectric layer 11

[0042] First circuit layer 12

[0043] Copper-clad board 10a, 20

[0044] Copper foil layer 12a, 22

[0045] Resist film 13

[0046] Window 130

[0047] First protective layer 14

[0048] Land 15

[0049] Surface treatment layer 151

[0050] Third circuit layer 16

[0051] Substrate layer 21

[0052] Groove 210

[0053] Second protective layer 23

[0054] Groove 220

[0055] Circuit pattern 24

[0056] Blind via 101, 201

[0057] Thin copper layer 25

[0058] Copper-plated layer 26

[0059] Conductive via 202

[0060] Third protective layer 27

[0061] Second circuit layer 28

[0062] Solder resist layer 30

[0063] Reflective portion 40

[0064] Reflective layer 41

[0065] Optical film layer 42

[0066] Display screen 200

[0067] Light emitting element 300

[0068] The following detailed description will further describe the embodiments of the present application in conjunction with the above-mentioned drawings. DETAILED DESCRIPTION

[0069] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which embodiments of the application belong. The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of embodiments of the application. Unless otherwise defined, technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which embodiments of the application belong. The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of embodiments of the application. In this detailed description, procedures, apparatuses, and methodologies are described principally for purposes of example and not limitation. Embodiments have not noted specific conditions unless otherwise indicated. They are carried out according to conventional conditions or manufacturer's recommendations. The reagents or apparatuses used are not noted by the manufacturer unless they are conventional products that can be purchased on the market.

[0070] It will be understood that when a layer is referred to as being "on" another layer, it can be directly on the other layer or intervening layers can also be present. In contrast, when a layer is referred to as being "directly on" another layer, there are no intervening layers present. When an element is referred to as being "fixed", "attached", "connected" or "set" to another element, it can be directly on the other element or intervening elements can also be present.

[0071] Embodiments of the present application are described herein with reference to cross-sectional illustrations that are schematic illustrations of idealized embodiments (and intermediate structures) of the present application. As such, variations from the shapes of the illustrations as a result, for example, of manufacturing techniques and / or tolerances, are to be expected. Thus, embodiments of the present application should not be construed as limited to the particular shapes of regions illustrated herein but are to include deviations in shapes that result, for example, from manufacturing. The regions illustrated in the figures are schematic in nature and their shapes are not intended to illustrate the actual shape of a region of a device and are not intended to limit the scope of the present application.

[0072] Some embodiments of the present application are described in detail below with reference to the accompanying drawings. The following embodiments and features of the embodiments can be combined with each other in the case of no conflict.

[0073] Referring to Figures 1A-6 , a first aspect of the present application provides a preparation method of a circuit board 100, which includes steps S10-S70. It can be understood that the steps are numbered to clearly describe the specific preparation method, and do not mean to limit the order of the steps.

[0074] Step S10, referring to Figures 1A-1DA substrate 10 is provided. The substrate 10 can be prepared by steps S11 to S14.

[0075] like Figure 1A As shown in S11, a copper-clad laminate 10a is provided, which includes a dielectric layer 11 and a copper foil layer 12a located on the surface of the dielectric layer 11. In this embodiment, the copper foil layer 12a is located on two opposite surfaces of the dielectric layer 11; in other embodiments, the copper foil layer 12a may be located on only one surface of the dielectric layer 11.

[0076] Furthermore, the dielectric layer 11 may be made of, but is not limited to, polyimide (PI), polyethylene terephthalate (PET), polyethylene naphthalate (PEN), polydimethylsiloxane (PDMS), liquid crystal polymer (LCP), modified polyimide (MPI), etc.

[0077] like Figure 1B As shown, in step S12, a resist film 13 is laminated onto one surface of the copper-clad laminate 10a. Then, through exposure and development steps, a portion of the resist film 13 is removed, thereby forming an opening 130. A portion of the surface of the copper foil layer 12a can be exposed through the opening 130. The resist film 13 can be, but is not limited to, a dry film.

[0078] like Figure 1C As shown, in step S13, a first protective layer 14 can be formed in the window 130 by means of, but not limited to, electroplating. Then, the resist film 13 is removed, exposing a portion of the surface of the copper foil layer 12a through the first protective layer 14. It is understood that the surface of the copper foil layer 12a without the resist film 13 will be completely covered by the first protective layer 14. The first protective layer 14 can be formed of tin. The first protective layer 14 can protect the copper foil layer 12a it covers from alkaline etching solutions during subsequent etching steps, thereby obtaining a circuit layer with a predetermined pattern.

[0079] like Figure 1DAs shown, in step S14, an alkaline etching solution can be used to etch away the copper foil layer 12a not covered by the first protective layer 14, thereby forming the first circuit layer 12. Then, the first protective layer 14 on a portion of the surface of the first circuit layer 12 is removed. That is, part of the surface of the first circuit layer 12 is covered by the first protective layer 14, while another part is not covered by the first protective layer 14. The first circuit layer 12 covered by the first protective layer 14 forms pads 15. The first protective layer 14 on the pads 15 can prevent the surface of the pads 15 from being oxidized and affecting their electrical characteristics. The number of pads 15 can be set according to the electronic components (e.g., light-emitting elements LEDs) to be connected and the number of their pins.

[0080] Furthermore, the alkaline etching solution can be an alkaline copper chloride etching solution. The first protective layer 14 can be removed by a tin stripping solution (also known as tin stripping water). The tin stripping solution can be fluoride type, nitric acid type, nitric acid-alkyl sulfonic acid type, etc. This application does not impose any restrictions, as long as it can react with tin and not react with copper.

[0081] like Figure 1D As shown, the substrate 10 includes a dielectric layer 11 and a first circuit layer 12 formed on the surface of the dielectric layer 11. The first circuit layer 12 includes pads 15, and a first protective layer 14 is provided on the surface of the pads 15 facing away from the dielectric layer 11. In this embodiment, the first circuit layer 12 is located on one surface of the dielectric layer 11, and the other surface of the dielectric layer 11 is a copper foil layer 12a, which can be used to form a third circuit layer 16 in a subsequent step (see Figure 12a). Figure 3C ).

[0082] For step S20, please refer to... Figure 2 A copper-clad laminate 20 is laminated onto one surface of the substrate 10.

[0083] like Figure 2 As shown, the copper clad laminate 20 includes a substrate layer 21 and a copper foil layer 22 located on one surface of the substrate layer 21. The substrate layer 21 is located between the copper foil layer 22 and the first circuit layer 12. The substrate layer 21 has a groove 210 extending through the substrate layer 21 along its thickness direction, and a portion of the surface of the copper foil layer 22 near the substrate layer 21 can be exposed through the groove 210. The groove 210 is provided corresponding to the pad 15, that is, the groove 210 can cover the pad 15.

[0084] In some embodiments, the substrate layer 21 may be a prepreg (PP).

[0085] For step S30, please refer to... Figures 3A-3D The copper foil layer 22 corresponding to the groove 210 is removed to form a slot 220, and the remaining copper foil layer 22 is partially removed to form a circuit pattern 24. The solder pad 15 is exposed from the slot 220. In some embodiments, step S30 may further include steps S31 to S34.

[0086] like Figure 3A As shown, in step S31, a resist film 13 is laminated onto the surface of the copper foil layer 22 facing away from the substrate layer 21. Then, the resist film 13 is exposed and developed, causing a portion of the resist film 13 to be removed, thereby forming a window 130. A portion of the surface of the copper foil layer 22 can be exposed through the window 130. The resist film 13 can be, but is not limited to, a dry film. A resist film 13 can also be laminated onto the surface of the copper foil layer 12a facing away from the dielectric layer 11.

[0087] like Figure 3B As shown in step S32, a second protective layer 23 can be formed in the opening 130 by means of electroplating, but not limited to electroplating, and then the resist film 13 is removed. The second protective layer 23 is formed on a portion of the surface of the copper foil layer 22, and another portion of the surface of the copper foil layer 22 can be exposed from the second protective layer 23. The surface of the copper foil layer 22 corresponding to the groove 210 is not covered by the second protective layer 23. The second protective layer 23 can be formed of tin, and the second protective layer 23 can protect the copper foil layer 22 it covers from alkaline etching solution attack during subsequent etching steps, thereby obtaining a circuit layer with a preset pattern. A second protective layer 23 can also be formed on the surface of the copper foil layer 12a facing away from the dielectric layer 11.

[0088] like Figure 3C As shown, in step S33, the copper foil layer 22 corresponding to the groove 210 can be removed by an alkaline etching solution. The blank space formed by the removed part is connected to the groove 210, thereby forming a slot 220, from which the pad 15 is exposed. At the same time, the alkaline etching solution will also etch away the copper foil layer 22 exposed in the second protective layer 23, and the copper foil layer 22 covered by the second protective layer 23 forms a circuit pattern 24. It can be understood that in this step, the alkaline etching solution will also etch away the copper foil layer 12a not covered by the second protective layer 23, thereby forming a circuit layer (third circuit layer 16).

[0089] In some embodiments, the length of the slot 220 can be 0.2mm to 1.8mm, the width can be 0.2mm to 1.4mm, and the thickness (depth) can be 20μm to 80μm.

[0090] like Figure 3D As shown in S34, the second protective layer 23 can be removed by the solder stripping solution (the first protective layer 14 on the pad 15 is still retained).

[0091] For step S40, please refer to... Figures 4A-4G A copper plating layer 26 is formed on the surface of the circuit pattern 24 that faces away from the substrate layer 21, and the copper plating layer 26 and the circuit pattern 24 are used to form a second circuit layer 28. In some embodiments, step S40 may further include steps S41 to S47.

[0092] like Figure 4AAs shown, in step S41, a blind via 201 can be formed on the substrate layer 21 by means of, but not limited to, laser. The blind via 201 can be set to correspond to the gaps in the circuit pattern 24 and penetrate the substrate layer 21 along the thickness direction. A portion of the surface of the first circuit layer 12 near the substrate layer 21 can be exposed through the blind via 201.

[0093] In some embodiments, a blind via 101 extending through the dielectric layer 11 along its thickness direction may also be formed on the dielectric layer 11. A portion of the surface of the third circuit layer 16 near the dielectric layer 11 may be exposed through the blind via 101. The blind via 101 may be provided corresponding to the blind via 201, and there may be one or more of them.

[0094] like Figure 4B As shown in step S42, a thin copper layer 25 is provided on the inner walls of blind vias 201 and 101 and the inner walls of slot 220 (the portions of the sidewalls and bottom walls not covered by the first circuit layer 12). The thin copper layer 25 can be provided by chemical copper plating and / or flash copper plating. The thin copper layer 25 can serve as a substrate for subsequent copper electroplating, making the subsequent copper electroplating steps easier.

[0095] like Figure 4C As shown, in step S43, a resist film 13 is laminated onto the surface of the circuit pattern 24 facing away from the substrate layer 21. The resist film 13 also covers the pads 15. Then, through exposure and development steps, a portion of the resist film 13 is removed, thereby forming an opening 130. A resist film 13 can also be laminated onto the surface of the third circuit layer 16, and then exposed and developed to form an opening 130. The resist film 13 can be, but is not limited to, a dry film.

[0096] like Figure 4D As shown in S44, a copper plating layer 26 (covering a portion of the surface of the circuit pattern 24 facing away from the substrate layer 21) can be formed within the window 130 by electroplating, and a copper plating layer 26 can be formed within the blind holes 201 and 101 to create conductive holes 202. A copper plating layer 26 can also be formed on the surface of the thin copper layer 25 in the slot 220. A portion of the thin copper layer 25 and the copper plating layer 26 can extend from within the slot 220 to the surface of the substrate layer 21 near the circuit pattern 24.

[0097] like Figure 4D and Figure 4E As shown in step S45, a third protective layer 27 is formed on the surface of the copper plating layer 26 facing away from the circuit pattern 24, and a third protective layer 27 is also formed on the surface of the copper plating layer 26 facing away from the thin copper layer 25 within the slot 220. Then, the resist film 13 is removed. The third protective layer 27 can protect the parts covered by it from alkaline etching solution in subsequent etching steps. The third protective layer 27 can be formed of tin.

[0098] like Figure 4E and Figure 4FAs shown in S46, the circuit pattern 24 exposed from the copper plating layer 26 can be etched away by an alkaline etching solution to form a second circuit layer 28. The thin copper layer 25 on the bottom wall of the slot 220 can also be etched away by the alkaline etching solution. The alkaline etching solution can be an alkaline copper chloride etching solution.

[0099] As shown in S47, the third protective layer 27 and part of the first protective layer 14 can be removed by a tin stripping solution. The first protective layer 14 embedded in the base material layer 21 can be retained. Figure 4F

[0100] As shown in S48, a solder resist layer 30 can be formed on the surface of the second circuit layer 28, and a surface treatment layer 151 can be formed on the surface of the pad 15 facing away from the dielectric layer 11. The solder resist layer 30 can cover the second circuit layer 28 and the surface of the base material layer 21 exposed from the second circuit layer 28. The solder resist layer 30 can also be formed on the surface of the third circuit layer 16 facing away from the dielectric layer 11. The surface treatment layer 151 can be a tin plating layer or a nickel plating layer. Figure 4G Step S50, please refer to

[0101] The reflective layer 41 can be formed on the inner wall of the slot 220 by electroplating, but is not limited thereto. Specifically, the reflective layer 41 is formed on the surface of the copper plating layer 26 facing away from the thin copper layer 25. Compared with directly forming the reflective layer 41 on the surface of the base material layer 21 of the slot 220, it is easier to form the reflective layer 41 on the surface of the copper plating layer 26 after forming the thin copper layer 25 and the copper plating layer 26 on the surface of the base material layer 21 of the slot 220. The reflective layer 41 can extend from the inside of the slot 220 to the outside of the slot 220 and contact the solder resist layer 30. Figure 5 In some embodiments, the material of the reflective layer 41 can be one or more of silver, tin, and nickel. Silver, tin, and nickel have high reflectivity and are silver-white or close to silver-white, which can improve the reflectivity of light and thus provide higher brightness.

[0102] Step S60, please refer to

[0103] A transparent optical film layer 42 can be formed on the surface of the reflective layer 41. The cross-section of the optical film layer 42 can be substantially in the shape of an inverted "L", and the top surface of the optical film layer 42 can be flush with the top surface of the solder resist layer 30. After the light source is diffused and refracted by the optical film layer 42 and then reflected by the reflective layer 41, the brightness of the reflection can be improved. The optical film layer 42 can also protect the reflective layer 41. The thickness of the optical film layer 42 can be 5 μm to 30 μm. Figure 6

[0104] ​​In some embodiments, the optical film layer 42 includes the following main components by mass percentage: acrylic resin 45-65%, acrylic monomer 10-30%, and epoxy resin 20-25%. The optical film layer further includes a photopolymerization initiator, propylene glycol methyl ether acetate, diethylene glycol ethyl ether acetate, and ethyl acetate. The content of the photopolymerization initiator (mass percentage of the entire optical film layer) is less than 5%, the content of the propylene glycol methyl ether acetate (mass percentage) is less than 0.6%, the content of the diethylene glycol ethyl ether acetate (mass percentage) is less than 0.6%, and the content of the ethyl acetate (mass percentage) is less than 0.4%. The photopolymerization initiator can be, but is not limited to, photoinitiator-1173, photoinitiator-184, Irgacure 184, Irgacure 907, Irgacure 369, and the like.

[0105] Referring to Figure 6 , the second aspect of the present application provides a circuit board 100 prepared by the above preparation method, which includes a substrate layer 21, a first circuit layer 12, a reflecting portion 40, and a second circuit layer 28. The substrate layer 21 has a slot 220 extending through the substrate layer 21 along the thickness direction thereof. The first circuit layer 12 is formed on one surface of the substrate layer 21, and includes a pad 15, the surface of which is provided with a surface treatment layer 151, and the pad 15 is exposed from the slot 220. The reflecting portion 40 can be arranged around the inner wall of the slot 220 and can extend to the outside of the slot 220 to cover part of the top surface of the substrate layer 21. The reflecting portion 40 includes a reflecting layer 41 and an optical film layer 42, and the reflecting layer 41 is located between the inner wall and the optical film layer 42. The second circuit layer 28 is formed on the other surface of the substrate layer 21, and the first circuit layer 12 is electrically connected to the second circuit layer 28.

[0106] In some embodiments, as shown in Figure 6 , the circuit board 100 further includes a dielectric layer 11 and a third circuit layer 16. The dielectric layer 11 is located between the first circuit layer 12 and the third circuit layer 16, and the third circuit layer 16 is electrically connected to the first circuit layer 12.

[0107] In some embodiments, as shown in Figure 6 , the surfaces of the second circuit layer 28 and the third circuit layer 16 can be provided with a solder mask layer 30.

[0108] Referring to Figure 7 , the third aspect of the present application provides a display screen 200, which includes at least one light emitting element 300 and the above-mentioned circuit board 100. The display screen 200 can be, but is not limited to, an RGB display screen. The light emitting element 300 is arranged on the pad 15 and is electrically connected to the pad 15. The light emitting element 300 can be a Mini LED, a Micro LED, or the like.

[0109] The preparation method of the embodiment of the present application sets the reflecting part 40 including the reflecting layer 41 and the optical film layer 42 on the sidewall of the slot 220. When the light emitting element 300 is connected in the slot 220, the light emitted by the light emitting element 300 can be refracted by the optical film layer 42 and then reflected by the reflecting layer 41, thereby improving the reflectivity of the light and further providing higher brightness. In addition, the slot 220 described in the present application is formed by the pre-opened substrate layer 21, which improves the production efficiency compared with the laser method. Moreover, the protective layer is arranged on the surface of the copper foil layer or the circuit layer, which can effectively protect the copper foil layer or the circuit layer from being attacked by the etching liquid or being contaminated by other impurities (for example, glue), thereby improving the product yield.

[0110] The above description is some specific embodiments of the present application, but in the actual application process, it cannot be limited to these embodiments only. Other modifications and changes made by the ordinary skilled person in the art according to the technical concept of the present application should belong to the protection scope of the present application.

Claims

1. A method for manufacturing a circuit board, characterized in that, Includes the following steps: A substrate is provided, the substrate including a dielectric layer and a first circuit layer formed on the surface of the dielectric layer, the first circuit layer including pads, and a first protective layer is provided on the surface of the pads facing away from the dielectric layer; A copper-clad laminate is laminated onto the surface of the substrate; wherein the copper-clad laminate includes a substrate layer and a copper foil layer, the substrate layer is located between the copper foil layer and the first circuit layer, and the substrate layer has a groove penetrating the substrate layer along its thickness direction, the groove being provided corresponding to the pads; The copper foil layer corresponding to the groove is removed to form a slot, and the remaining copper foil layer is partially removed to form a circuit pattern; wherein the solder pads are exposed from the slot; A copper plating layer is formed on the surface of the circuit pattern that is away from the substrate layer, and the copper plating layer and the circuit pattern are used to form a second circuit layer. A reflective layer is provided on the inner wall of the slot; An optical film layer is disposed on the surface of the reflective layer.

2. The preparation method according to claim 1, characterized in that, The optical film layer comprises the following components by mass percentage: Acrylic resin 45%–65%; Acrylic monomer 10%–30%; Epoxy resin 20%–25%; The optical film layer further includes a photopolymerization initiator, propylene glycol methyl ether acetate, diethylene glycol ethyl ether acetate, and ethyl acetate. The content of the photopolymerization initiator is less than 5%, the content of the propylene glycol methyl ether acetate is less than 0.6%, the content of the diethylene glycol ethyl ether acetate is less than 0.6%, and the content of the ethyl acetate is less than 0.4%.

3. The preparation method according to claim 1, characterized in that, The reflective layer is made of one or more of silver, tin, and nickel.

4. The preparation method according to claim 1, characterized in that, The step of "removing the copper foil layer corresponding to the groove to form a slot, and removing the remaining copper foil layer to form a circuit pattern" further includes: A second protective layer is provided on the portion of the copper foil layer facing away from the substrate layer; wherein the surface of the copper foil layer corresponding to the groove is not covered by the second protective layer, and the second protective layer comprises tin; The copper foil layer corresponding to the groove is removed by etching to form a groove. At the same time, the copper foil layer exposed from the second protective layer is etched away to form a circuit pattern. Remove the second protective layer.

5. The preparation method according to claim 1, characterized in that, The step of "depositing a copper plating layer on the surface of the circuit pattern away from the substrate layer, and fabricating the copper plating layer and the circuit pattern to form a second circuit layer" further includes: A blind hole is formed in the substrate layer, penetrating the substrate layer along its thickness direction; A thin copper layer is provided on the inner wall of the blind hole and the inner wall of the slot; A copper plating layer is provided on the surface of the circuit pattern that is away from the substrate layer, the copper plating layer is provided in the blind hole to form a conductive hole, and the copper plating layer is provided on the surface of the slotted thin copper layer. A third protective layer is provided on the surface of the copper plating layer that is opposite to the circuit pattern; The exposed circuit pattern from the copper plating layer is etched away to form a second circuit layer; Remove the third protective layer.

6. The preparation method according to claim 5, characterized in that, The first protective layer comprises tin, and the third protective layer comprises tin.

7. The preparation method according to claim 1, characterized in that, Before the step of "setting a reflective layer on the inner wall of the slot", the preparation method further includes: setting a solder resist layer on the surface of the second circuit layer.

8. A circuit board, characterized in that, include: A substrate layer having a groove penetrating the substrate layer along its thickness direction; A first circuit layer is formed on a surface of the substrate layer. The first circuit layer includes pads, the surface of which is provided with a surface treatment layer, and the pads are exposed from the slot. A reflective portion is disposed on the inner wall of the slot, the reflective portion comprising a reflective layer and an optical film layer, the reflective layer being located between the inner wall and the optical film layer; and A second circuit layer is formed on the other surface of the substrate layer, and the first circuit layer is electrically connected to the second circuit layer.

9. The circuit board as described in claim 8, characterized in that, The circuit board further includes a dielectric layer and a third circuit layer, the dielectric layer being located between the first circuit layer and the third circuit layer, and the third circuit layer being electrically connected to the first circuit layer.

10. A display screen, characterized in that, It includes a light-emitting element and a circuit board as described in claim 8 or 9, wherein the light-emitting element is electrically connected to the pad.

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