Pick-up control method and transfer device for light-emitting element chip

Abstract

The invention discloses a pickup control method and a transfer device of a light-emitting element chip. The pickup control method includes: a first operation of loading a stamp on a transfer head, transporting the transfer head to a first substrate, and picking up a light emitting element chip having the stamp; a second operation of transporting the transfer head to a second substrate together with a stamp that picks up the light emitting element chip, and inspecting a pickup state of the light emitting element chip transferred to the second substrate using an image detector positioned below the transfer head; a third operation of transporting the transfer head to a chip removal system together with the stamp that picks up the light emitting element chip when a pickup failure is detected from the light emitting element chip as a result of analyzing the image captured by the image detector; and a fourth operation of blowing ionized air from the chip removal system toward the stamp, and removing the light emitting element chip from the stamp in a non-contact manner.

Description

TECHNICAL FIELD

[0001] The present disclosure relates to a pick-up control method and transfer apparatus of a light emitting element chip, and more particularly, for example, but not limited to, a pick-up control method and transfer apparatus of a light emitting element chip that allows reducing the possibility of damaging a stamp and increasing the use time of the stamp, thereby reducing the time of unnecessary replacement of the stamp. BACKGROUND

[0002] Examples of display apparatuses include organic light emitting diode (OLED) display apparatuses that emit light by themselves, liquid crystal display (LCD) apparatuses that require a separate light source, and the like.

[0003] Recently, display apparatuses including light emitting diodes (LEDs) have attracted attention as next-generation display apparatuses. Since the LEDs are formed of inorganic materials, not organic materials, the display apparatuses including the LEDs have a faster turn-on speed, better light emitting efficiency, and higher brightness images than LCD apparatuses or OLED display apparatuses.

[0004] The description provided in the description of the background section should not be assumed to be prior art solely because of its inclusion in the background section of the description. The background section of the description can include information that describes one or more aspects of the subject technology, and that is not limited to the present disclosure. The description of the background section is not limiting of the present disclosure. SUMMARY

[0005] The inventors have recognized that in the prior art, in a process of forming micro light emitting elements of a display apparatus, damage to a stamp can occur. Accordingly, a process of transferring micro light emitting elements performed in order to manufacture a display apparatus using the micro light emitting elements can use a method of transferring a plurality of micro light emitting element chips onto a panel substrate on which a driving circuit is formed using a stamp through which the plurality of micro light emitting element chips are picked up.

[0006] An exemplary embodiment of the present disclosure aims to provide a pick-up control method and transfer apparatus of a light emitting element chip that allows reducing the possibility of damaging a stamp and increasing the use time of the stamp, such that the time of unnecessary replacement of the stamp is reduced.

[0007] A pick-up control method of a light emitting element chip according to one exemplary embodiment of the present disclosure can include a first operation of locating a plurality of stamps on a transfer head, transporting the transfer head to a first substrate, and picking up a plurality of light emitting element chips with the stamps; a second operation of transporting the transfer head with the stamps picking up the light emitting element chips to a second substrate, and inspecting a pick-up state of the light emitting element chips transferred to the second substrate using a camera located below the transfer head; a third operation of transporting the transfer head with the stamps picking up the light emitting element chips toward a chip removal system when a pick-up failure is detected from the light emitting element chips as a result of analyzing an image captured by the camera; and a fourth operation of blowing ionized air toward the stamps from the chip removal system and removing the light emitting element chips from the stamps in a non-contact manner.

[0008] A transfer apparatus according to another exemplary embodiment of the present disclosure can include stamps picking up a plurality of light emitting element chips located on a first substrate and transferring the plurality of light emitting element chips onto a second substrate; a transfer head transporting the stamps to perform the transferring and the picking up; an image detector inspecting a pick-up state of the plurality of picked-up light emitting element chips; and a chip removal system removing the light emitting element chips when a pick-up failure is detected from the light emitting element chips.

[0009] The objects of the exemplary embodiments of the present disclosure are not limited to the above-mentioned objects, and other objects not mentioned will become apparent to those skilled in the art from the following description. BRIEF DESCRIPTION OF DRAWINGS

[0010] The above and other objects, features and advantages of the present disclosure will become more apparent to one of ordinary skill in the art by describing in detail exemplary embodiments thereof with reference to the attached drawings that illustrate preferred embodiments of the application. It is to be understood that the drawings are designed solely for the purpose of illustration and description and in a manner that conveys the essential characteristics of the present disclosure.

[0011] Figure 1 is an exploded perspective view of a display device according to one exemplary embodiment of the present disclosure;

[0012] Figure 2 is a plan view of a display device according to one exemplary embodiment of the present disclosure;

[0013] Figure 3 is an enlarged plan view of a connection structure of a display device according to one exemplary embodiment of the present disclosure;

[0014] Figure 4 is a diagram illustrating a circuit structure according to one exemplary embodiment of the present disclosure;

[0015] Figure 5 is an enlarged view of a display device according to one exemplary embodiment of the present disclosure;

[0016] Figure 6is a plan view of a display device according to an exemplary embodiment of the present disclosure;

[0017] Figure 7 is a plan view of a display device according to an exemplary embodiment of the present disclosure;

[0018] Figure 8 is a cross-sectional view of a display device according to an exemplary embodiment of the present disclosure;

[0019] Figure 9 is an enlarged cross-sectional view of a display device according to an exemplary embodiment of the present disclosure;

[0020] Figure 10 is a perspective view showing a state in which a light emitting element chip of a display device according to an exemplary embodiment of the present disclosure is picked up;

[0021] Figure 11 is a perspective view showing a state in which a light emitting element chip of a display device according to an exemplary embodiment of the present disclosure is transferred;

[0022] Figure 12 is a plan view of a transfer device in a display device according to an exemplary embodiment of the present disclosure;

[0023] Figure 13 is a cross-sectional view of a chip removing system of a transfer device in a display device according to an exemplary embodiment of the present disclosure;

[0024] Figure 14 is a view of an electrostatic remover of a chip removing system of a transfer device in a display device according to an exemplary embodiment of the present disclosure;

[0025] Figure 15 is a view of an ion generator of an electrostatic remover of a chip removing system of a transfer device in a display device according to an exemplary embodiment of the present disclosure;

[0026] Figure 16 is a view of an ion generator of an electrostatic remover of a chip removing system of a transfer device in a display device according to an exemplary embodiment of the present disclosure;

[0027] Figure 17 is a perspective view of a light emitting element chip collector and a stamp of a chip removing system of a transfer device in a display device according to an exemplary embodiment of the present disclosure;

[0028] Figure 18 is a cross-sectional view of a light emitting element chip collector of a chip removing system of a transfer device in a display device according to an exemplary embodiment of the present disclosure;

[0029] Figure 19is a perspective view showing a defective light emitting element suction unit of a chip removing system of a transfer device in a display device according to an exemplary embodiment of the present disclosure;

[0030] Figure 20 is a cross-sectional view showing a light emitting element chip collector of a transfer device in a display device according to an exemplary embodiment of the present disclosure;

[0031] Figure 21 is a flowchart showing a normal chip transfer process of a transfer device in a display device according to an exemplary embodiment of the present disclosure; and

[0032] Figure 22A 、 Figure 22B and Figure 22C is a cross-sectional view showing a defective chip removing process of a transfer device in a display device according to an exemplary embodiment of the present disclosure.

[0033] Throughout the drawings and detailed description, unless otherwise described, the same drawing reference numerals should be understood to refer to the same element, feature, and structure. The relative size and depiction of these elements can be exaggerated for clarity, illustration, and convenience. DETAILED DESCRIPTION

[0034] Reference will now be made in detail embodiments of the present disclosure, examples of which can be illustrated in the accompanying drawings. The progress of the described processing steps and / or operations is exemplary; however, the order of steps and / or operations is not limited to that described herein and can be changed as known in the art, except for steps and / or operations that must occur in a particular order. The names of the various elements used in the following explanation can simply be chosen for the convenience of writing the specification and can be different from the names used in the actual product.

[0035] The advantages and features of the present disclosure and methods of achieving them will become apparent by referring to the embodiments described in detail below in conjunction with the accompanying drawings. However, the present disclosure is not limited to the following embodiments disclosed herein, but can be implemented in various different forms; instead, the present embodiments are provided in order to make the disclosure of the present disclosure complete and to enable those skilled in the art to fully understand the scope of the present disclosure.

[0036] The shapes, sizes, dimensions (e.g., length, width, height, thickness, radius, diameter, area, etc.), ratios, angles, numbers, etc. of the elements used to illustrate the embodiments of the present disclosure shown in the drawings are merely illustrative and are not intended to be limiting. Throughout the description, the same drawing reference numerals can denote the same components. Also, in describing the present disclosure, detailed descriptions of related known technologies can be omitted in order not to obscure the essence of the present disclosure.

[0037] The dimensions of the various components shown in the drawings are chosen for the purpose of illustration suitably, and the present disclosure is not limited to the size and thickness of the components shown, but it is noted that the relative dimensions, including relative size, position and thickness, of the components shown in the various drawings submitted herewith are part of the present disclosure.

[0038] The terms "comprise", "have", "include", "contain", "consist of", "consist essentially of", "consisting of", and the like, as used herein, are open-ended and allow for addition of other components, unless the terms are used with the "only" or "exactly" with the term. The reference to components of a singular noun includes the plural of the noun, unless specifically stated otherwise.

[0039] In explaining components, they are interpreted as including error margins, even if not explicitly stated.

[0040] For example, in describing positional relationships, "on", "above", "over", "under", "below", "beside", "underneath", "near", "close to", "adjacent to", "to the side of", "proximate to" describe positional relationships of two parts, unless "immediately", "directly" or "close to" is used, one or more other parts can be located between the two parts.

[0041] It should be understood that spatially relative terms can include different orientations of the elements in use or operation in addition to the orientations depicted in the figures. For example, if an element in a figure is turned over, elements described as "below" or "under" other elements or features would then be oriented "above" the other elements or features. The exemplary term "below" can thus include both an orientation of below and above. Likewise, the exemplary terms "above" or "over" can include both an orientation of above and below. Thus, the exemplary term "below" can include both an orientation of below and above. Similarly, the exemplary terms "above" or "over" can include both an orientation of above and below.

[0042] In describing temporal relationships, "after", "subsequently", "then" or "before" and the like describe temporal precedence or succession, unless "immediately" or "directly" is used, discontinuous cases can also be included.

[0043] Although first, second, etc. are used to describe various components, these components are not limited by these terms. These terms are only used to distinguish one component from another component. Therefore, the first component described below can also be a second component within the technical spirit of the present disclosure.

[0044] Terms such as first, second, A, B, (a) and (b) can be used to describe components of the present disclosure. These terms are only used to distinguish one component from another component, and are not intended to limit the nature, order, sequence or number of such components.

[0045] When a component is described as being "connected," "coupled," "accessed," or "attached" to another component, it should be understood that the component can be directly connected, coupled, accessed, or attached to the other component, but other components can be interposed therebetween unless otherwise explicitly stated.

[0046] When a component or layer is described as being "in contact with" or "overlapping" another component or layer, it should be understood that the component or layer can be in direct contact or directly overlapping with the other component or layer, but unless otherwise explicitly stated, still another component or layer can be interposed therebetween which can be in direct contact or directly overlapping with each other.

[0047] It should be understood that "at least one" includes a combination of one or more relevant components. For example, the term "at least one of a first component, a second component, and a third component" includes not only a case where the first component, the second component, or the third component is included alone, but also a case where two or more of the first component, the second component, and the third component are included in any combination.

[0048] The terms first direction, second direction, third direction, X-axis direction, Y-axis direction, and Z-axis direction should not be understood as merely a geometric relationship in which the relationship therebetween is perpendicular to each other, but rather represent a wider range of orientations in which the configurations of the present disclosure functionally play a role.

[0049] The term "device" used herein can refer to a display device including a display panel and a driver for driving the display panel. Examples of the display device can include a light emitting element or the like. In addition, examples of the device can include a notebook computer, a television, a computer monitor, an automobile device, a wearable device, and an automotive equipment device, and a complete product or an end product including a light emitting element or the like as a complete product or an end product, such as a mobile electronic device such as a smartphone or an electronic tablet, but embodiments of the present disclosure are not limited thereto.

[0050] Each feature of various exemplary embodiments of the present disclosure can be combined or integrated with each other in whole or in part, and can be technically interlocked and operated in various ways, and each exemplary embodiment can be executed independently or in conjunction with each other.

[0051] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which example embodiments belong. It will be further understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the relevant art and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.

[0052] In aspects of the disclosure, a source electrode and a drain electrode are distinguished from each other for convenience of description. However, the source electrode and the drain electrode can be used interchangeably. The source electrode can be the drain electrode, and the drain electrode can be the source electrode. Also, the source electrode in any aspect of the disclosure can be the drain electrode in another aspect of the disclosure, and the drain electrode in any aspect of the disclosure can be the source electrode in another aspect of the disclosure.

[0053] Hereinafter, various exemplary embodiments of the disclosure will be described in detail with reference to the accompanying drawings.

[0054] Figure 1 is an exploded perspective view of a display device according to one exemplary embodiment of the disclosure. Figure 2 is a plan view of a display device according to one exemplary embodiment of the disclosure. Figure 3 is an enlarged plan view of a connection structure of a display device according to one exemplary embodiment of the disclosure.

[0055] Referring to Figures 1 to 3 The display device 1000 according to one exemplary embodiment of the disclosure can include a display panel, a polarization layer 293, an adhesive layer 295, a cover member 120, a support substrate 110, a flexible circuit board CB, and a printed circuit board 160.

[0056] For example, the display device 1000 can include a substrate 110. The substrate 110 can be a member that supports other components of the display device 1000. The substrate 110 can be made of an insulating material. For example, the substrate 110 can be made of glass, resin, or the like. Also, the substrate 110 can be made of a material having flexibility. For example, the substrate can include a flexible polymer film. For example, the flexible polymer film can be made of any one of polyimide (PI), polyethylene terephthalate (PET), acrylonitrile-butadiene-styrene copolymer (ABS), polymethyl methacrylate (PMMA), polyethylene naphthalate (PEN), polycarbonate (PC), polyethersulfone (PES), polyarylate (PAR), polysulfone (PSF), cyclic olefin copolymer (COC), triacetyl cellulose (TAC), polyvinyl alcohol (PVA), and polystyrene (PS), and the disclosure is not limited thereto. For example, the substrate 110 can be a film made of a flexible plastic material film such as polyimide (PI) or the like. However, exemplary embodiments of the disclosure are not limited thereto.

[0057] The display panel can have a width in a Y-axis direction, a length in an X-axis direction, and a thickness in a Z-axis direction, but is not limited thereto. For example, the display panel can have a width in an X-axis direction, a length in a Y-axis direction, and a thickness in a Z-axis direction. The X-axis direction and the Y-axis direction can cross on a plane of the display panel. For example, the X-axis direction and the Y-axis direction can be orthogonal to each other, but are not limited thereto.

[0058] The display panel can implement information, a video, and / or an image provided to a user. For example, the display panel can include a display area AA and a non-display area NA. For example, the substrate 110 can include the display area AA and the non-display area NA. The display area AA and the non-display area NA are not limited to being described only with respect to the substrate 110, but can be described throughout the entire display device 1000.

[0059] The display area AA can be an area in which an image is displayed. The display area AA can include a plurality of pixels PX. Each of the plurality of pixels PX can be composed of a plurality of sub-pixels. Each of the plurality of sub-pixels is the smallest unit constituting the display area, and n sub-pixels form one pixel. Each of the plurality of sub-pixels can emit light having a wavelength different from each other. The plurality of sub-pixels can include first, second, and third sub-pixels that emit light of different colors from each other. For example, the sub-pixels can include red, green, and blue sub-pixels. In addition, each pixel can further include a white sub-pixel. The plurality of sub-pixels can be variously modified in color and configuration as needed. However, the disclosure is not limited thereto.

[0060] For example, the plurality of sub-pixels can include red, green, and blue sub-pixels, in which the red, green, and blue sub-pixels can be disposed in a repeated manner. Alternatively, the plurality of sub-pixels can include red, green, blue, and white sub-pixels, in which the red, green, blue, and white sub-pixels can be disposed in a repeated manner, or the red, green, blue, and white sub-pixels can be disposed in a quadrilateral type. For example, the red, blue, and green sub-pixels can be sequentially disposed along a row direction, or the red, blue, green, and white sub-pixels can be sequentially disposed along the row direction. However, in the embodiment of the disclosure, the color type, the arrangement type, and the arrangement order of the sub-pixels are not limited, and can be variously configured according to a light emitting characteristic, a device lifespan, and a device specification.

[0061] In addition, according to a light emitting characteristic, the sub-pixels can have different light emitting areas. For example, a sub-pixel that emits light of a color different from that of a blue sub-pixel can have a light emitting area different from that of the blue sub-pixel. For example, red, blue, and green sub-pixels or red, blue, white, and green sub-pixels can each have different light emitting areas.

[0062] The plurality of micro light emitting diodes can be respectively arranged in the plurality of sub-pixels. The plurality of micro light emitting diodes can be variously configured depending on the type of the display device 1000.

[0063] The non-display area NA can be an area in which an image is not displayed. The non-display area NA can be disposed outside the display area AA. For example, the non-display area NA can be an area adjacent to the display area AA. Further, the non-display area NA can be an area disposed adjacent to the display area AA and configured to surround the display area AA. Various wirings and circuits for driving the plurality of pixels PX of the display area AA can be located in the non-display area NA. For example, in the non-display area NA, various wirings and driving circuits can be mounted, and a pad portion PAD to which an integrated circuit, a printed circuit, or the like is connected can be provided, but exemplary embodiments of the present disclosure are not limited thereto.

[0064] For example, the driving circuit can be a data driving circuit and / or a gate driving circuit, but exemplary embodiments of the present disclosure are not limited thereto. A wiring through which a control signal for controlling the driving circuit is provided can be provided. For example, the control signal can include various timing signals including a clock signal, an input data enable signal, and a synchronization signal (e.g., a horizontal synchronization signal and a vertical synchronization signal), but exemplary embodiments of the present disclosure are not limited thereto. Here, the horizontal synchronization signal is a signal indicating a time used for one horizontal line of a display screen, and the vertical synchronization signal is a signal indicating a time used for displaying one frame of a picture. The input data enable signal can correspond to a signal indicating a period in which a data voltage is supplied to a pixel. The control signal can be received through the pad portion PAD. For example, a link wiring LL for transmitting a signal can be located in the non-display area NA. For example, the pad portion PAD can be connected to a driving component such as a flexible circuit board CB and a printed circuit board 160.

[0065] The non-display area NA can include a first non-display area NA1, a bending area BA, and a second non-display area NA2. For example, the first non-display area NA1 can be an area surrounding at least a portion of the display area AA. The bending area BA can be an area extending from at least one of a plurality of edges of the first non-display area NA1, and can be a bendable area. The second non-display area NA2 can be an area extending from the bending area BA, and the pad portion PAD can be located in the second non-display area NA2. For example, the bending area BA can be in a bent state, and a remaining area of the substrate 110 other than the bending area BA can be in a flat state. In this case, since the bending area BA is in the bent state, the second non-display area NA2 can be located on a rear surface of the display area AA. However, exemplary embodiments of the present disclosure are not limited thereto.

[0066] The substrate 110 or the display area AA of the display device 1000 can be configured in various shapes depending on the design of the display device 1000. For example, the display area AA can be configured in a rectangular shape having four rounded corners, but exemplary embodiments of the present disclosure are not limited thereto. In another example, the display area AA can be configured in a rectangular shape having four right angles, a circular shape, or the like, but exemplary embodiments of the present disclosure are not limited thereto.

[0067] According to the present disclosure, the width of the second non-display area NA2 in which the plurality of pad electrodes PE are arranged can be greater than the width of the bending area BA in which only the plurality of link wirings LL are arranged. Further, the width of the display area AA in which the plurality of sub-pixels are arranged can be greater than the width of the bending area BA in which only the plurality of link wirings LL are arranged. In the drawings, the width of the bending area BA is shown to be smaller than the width of other areas of the substrate 110. However, the shape of the substrate 110 including the bending area BA is merely exemplary, and exemplary embodiments of the present disclosure are not limited thereto.

[0068] Referring to Figure 2 In the display device according to an exemplary embodiment of the present disclosure, a display area AA in which a plurality of pixels PX are disposed and a first non-display area NA1 surrounding the display area AA can be provided.

[0069] Referring to Figure 3 A plurality of pixel driving circuits PD can be arranged in the display area AA. The plurality of pixel driving circuits PD can be circuits for driving micro light emitting diodes (micro-LEDs) of the plurality of sub-pixels. Each of the plurality of pixel driving circuits PD can include a plurality of transistors including a driving transistor, a storage capacitor, and the like, and can supply a control signal, power, and a driving current to the micro-LEDs of the plurality of sub-pixels to control the light emitting operation of the plurality of micro-LEDs. For example, the pixel driving circuit PD can include a power wiring and a signal wiring for controlling the on / off state and / or the light emitting time of the micro-LED. For example, the plurality of pixel driving circuits PD can be driving drivers manufactured using a metal oxide silicon field effect transistor (MOSFET) manufacturing process on a semiconductor substrate, but exemplary embodiments of the present disclosure are not limited thereto. The driving driver can include the plurality of pixel driving circuits PD and can drive the plurality of sub-pixels.

[0070] For example, the pixel driving circuit PD of each of the plurality of sub-pixels can include a capacitor, at least one thin film transistor, and a light emitting element such as an OLED. For example, the at least one thin film transistor can include a driving transistor, a first switching transistor, and a second switching transistor. Also, the light emitting element can include a first electrode / second electrode (or anode electrode, pixel electrode), an inorganic light emitting layer (or an organic light emitting layer), and a second electrode / first electrode (or cathode electrode, common electrode). However, the pixel driving circuit PD of each of the plurality of sub-pixels is not limited thereto, and each of the plurality of sub-pixels can further include a compensation circuit. In this case, each of the plurality of sub-pixels can have various structures such as 4T2C, 5T2C, 6T1C, 6T2C, 7T1C, and 7T2C.

[0071] The transistor including the driving transistor and the switching transistor can be implemented as a thin film transistor (TFT).

[0072] The active layer of the thin film transistor TFT can be formed of a semiconductor material, for example, an oxide semiconductor, an amorphous semiconductor, or a polycrystalline semiconductor, but is not limited thereto.

[0073] The oxide semiconductor material can have an excellent effect of preventing a leakage current and a relatively inexpensive manufacturing cost. The oxide semiconductor can be made of a metal oxide such as zinc (Zn), indium (In), gallium (Ga), tin (Sn), and titanium (Ti), or a combination of a metal such as zinc (Zn), indium (In), gallium (Ga), tin (Sn), or titanium (Ti) and an oxide thereof. Specifically, the oxide semiconductor can include zinc oxide (ZnO), zinc-tin oxide (ZTO), zinc-indium oxide (ZIO), indium oxide (InO), titanium oxide (TiO), indium-gallium-zinc oxide (IGZO), indium-zinc-tin oxide (IZTO), indium-zinc oxide (IZO), indium-gallium-tin oxide (IGTO), and indium-gallium oxide (IGO), but is not limited thereto.

[0074] The polycrystalline semiconductor material has a fast moving speed of a carrier such as an electron and a hole, thus has a high mobility, and has a low power consumption and excellent reliability. The polycrystalline semiconductor can be made of poly-Si, but is not limited thereto.

[0075] The amorphous semiconductor material can be made of a-Si, but is not limited thereto.

[0076] Referring again to Figure 1 The flexible circuit board CB and the printed circuit board 160 can be positioned below the display panel. The flexible circuit board CB and the printed circuit board 160 can be positioned on at least one edge of the display panel, but exemplary embodiments of the disclosure are not limited thereto.

[0077] One side of the flexible circuit board CB can be attached to the display panel, and the other side of the flexible circuit board CB can be attached to the printed circuit board 160, but exemplary embodiments of the present disclosure are not limited thereto. The flexible circuit board CB can be a flexible film, but exemplary embodiments of the present disclosure are not limited thereto.

[0078] The pad portion PAD including a plurality of pad electrodes PE can be located in the second non-display area NA2. A driving assembly including one or more flexible circuit boards (or flexible films) CB and the printed circuit board 160 can be attached or bonded to the pad portion PAD. The plurality of pad electrodes PE of the pad portion PAD can be electrically connected to the one or more flexible circuit boards (or flexible films) CB, and can transmit various signals (or power) from the printed circuit board 160 and the flexible circuit board (or flexible film) CB to the plurality of pixel driving circuits PD of the display area AA.

[0079] The flexible circuit board (or flexible film) CB can be a film in which various components are disposed on a base film having flexibility. For example, a driving IC such as a gate driver IC or a data driver IC can be located on the flexible circuit board (or flexible film) CB, but exemplary embodiments of the present disclosure are not limited thereto.

[0080] The driving IC can be a component that processes a driving signal and data for displaying an image. Depending on a mounting method, the driving IC can be disposed by a method such as a chip on glass (COG) method, a chip on film (COF) method, or a tape carrier package (TCP) method, but exemplary embodiments of the present disclosure are not limited thereto. The flexible circuit board (or flexible film) CB can be attached or bonded to the plurality of pad electrodes PE by a conductive adhesive layer, but exemplary embodiments of the present disclosure are not limited thereto.

[0081] The printed circuit board 160 can be a component that is electrically connected to the one or more flexible circuit boards (or flexible films) CB and supplies signals to the driving IC. The printed circuit board 160 can be disposed on one side of the flexible circuit board (or flexible film) CB and electrically connected to the flexible circuit board (or flexible film) CB. Various components for supplying various signals to the driving IC can be disposed on the printed circuit board 160. For example, various components such as a timing controller, a power supply unit, a memory, a processor, etc. can be disposed on the printed circuit board 160. For example, the printed circuit board 160 can include a power management integrated circuit (PMIC), but exemplary embodiments of the present disclosure are not limited thereto.

[0082] The printed circuit board 160 can include at least one hole 180, but exemplary embodiments of the present disclosure are not limited thereto. Internal components for sensing ambient light, temperature, etc., which can be provided to a plurality of sensors, can be located in an area corresponding to the at least one hole 180. For example, the internal components can include an ambient light sensor (ALS), a temperature sensor, etc., but exemplary embodiments of the present disclosure are not limited thereto. For example, the hole 180 can be a transmissive hole, etc., but exemplary embodiments of the present disclosure are not limited thereto.

[0083] Referring to Figure 1 , a polarization layer 293 can be located on the display panel. The polarization layer 293 can prevent or reduce light generated from an external light source from entering the inside of the display panel and affecting the micro-LED, etc.

[0084] A cover member 120 can be located on the polarization layer 293. The cover member 120 can be a member for protecting the display panel. An adhesive layer 295 can be located between the polarization layer 293 and the cover member 120. The cover member 120 can be attached to the display panel by using the adhesive layer 295. The adhesive layer 295 can include an optical clear adhesive (OCA), an optical clear resin (OCR), a pressure sensitive adhesive (PSA), etc., but exemplary embodiments of the present disclosure are not limited thereto.

[0085] A support substrate 110 can be located between the display panel and the printed circuit board 160. The support substrate 110 can enhance the rigidity of the display panel. The support substrate 110 can be a back plate, but exemplary embodiments of the present disclosure are not limited thereto.

[0086] Referring to Figures 1 to 3 , a plurality of link wirings LL can be arranged in the first non-display area NA1 and the second non-display area NA2. The plurality of link wirings LL can be wirings for transmitting various signals from the one or more flexible circuit boards (or flexible films) CB and the printed circuit board 160 to the display area AA. The plurality of link wirings LL can extend from the plurality of pad electrodes PE of the second non-display area NA2 toward the bending area BA and the first non-display area NA1, and can be electrically connected to the plurality of drive wirings VL of the display area AA.

[0087] The plurality of pixel driving circuits PD can be driven by receiving signals from the one or more flexible circuit boards (or flexible films) CB and the printed circuit board 160 through the drive wirings VL in the display area AA and the link wirings LL in the non-display area NA.

[0088] For example, the plurality of drive wirings VL can be wirings for transmitting signals output from the flexible circuit board (or flexible film) CB and the printed circuit board 160 and the plurality of link wirings LL together to the plurality of pixel driving circuits PD. The plurality of drive wirings VL can be disposed in the display area AA and electrically connected to each of the plurality of pixel driving circuits PD. The plurality of drive wirings VL can extend from the display area AA toward the non-display area NA and can be electrically connected to the plurality of link wirings LL.

[0089] Accordingly, signals output from the flexible circuit board (or flexible film) CB and the printed circuit board 160 can be transmitted to each of the plurality of pixel driving circuits PD through the plurality of link wirings LL and the plurality of drive wirings VL.

[0090] As the bending area BA is bent, a portion of the plurality of link wirings LL can also be bent together. Stress can be concentrated on the portion of the bent link wiring LL, thereby causing a crack to occur in the link wiring LL. Accordingly, the plurality of link wirings LL can be formed of a high-flexibility conductive material to reduce the crack when the bending area BA is bent. For example, the plurality of link wirings LL can be formed of a high-flexibility conductive material such as gold (Au), silver (Ag), or aluminum (Al), but exemplary embodiments of the present disclosure are not limited thereto.

[0091] In addition, the plurality of link wirings LL can be formed of one of various conductive materials used in the display area AA. For example, the plurality of link wirings LL can be made of an alloy of molybdenum (Mo), chromium (Cr), titanium (Ti), nickel (Ni), neodymium (Nd), copper (Cu), silver (Ag), and magnesium (Mg), or other alloys thereof, but exemplary embodiments of the present disclosure are not limited thereto. The plurality of link wirings LL can have a multi-layer structure made of various conductive materials. For example, the plurality of link wirings LL can have a three-layer structure of titanium (Ti) / aluminum (Al) / titanium (Ti), but exemplary embodiments of the present disclosure are not limited thereto.

[0092] The plurality of link wirings LL can be configured in various shapes to reduce stress. At least a portion of the plurality of link wirings LL disposed on the bending area BA can extend in the same direction as the extension direction of the bending area BA, or can extend in a direction different from the extension direction of the bending area BA to reduce stress. For example, when the bending area BA extends in one direction from the first non-display area NA1 to the second non-display area NA2, at least a portion of the link wirings LL disposed on the bending area BA can extend in a direction oblique to the one direction.

[0093] For example, at least a portion of the plurality of link wirings LL can be configured in various shapes. For example, at least a portion of the plurality of link wirings LL disposed on the bending area BA can have a shape in which a conductive pattern having at least one of a diamond shape, a lozenge shape, a trapezoidal shape, a triangular wave shape, a sawtooth wave shape, a sinusoidal shape, a circular shape, and an omega (Ω) shape is repeatedly arranged, but exemplary embodiments of the present disclosure are not limited thereto.

[0094] Accordingly, in order to minimize or reduce stress and a corresponding crack concentrated on the plurality of link wirings LL, a shape of the plurality of link wirings LL can be formed in various shapes including the above-described shapes, but exemplary embodiments of the present disclosure are not limited thereto.

[0095] Figure 4 FIG. 1 is a diagram illustrating a circuit structure according to an exemplary embodiment of the present disclosure.

[0096] Although Figure 4 One light emitting device ED is illustrated as being connected to one micro driver, but the present disclosure is not limited thereto. For example, eight light emitting devices ED can be connected to one micro driver. For example, 16 light emitting devices ED can be connected to one micro driver, 32 light emitting devices ED or 64 light emitting devices ED can be simultaneously connected to one micro driver. The light emitting device ED can be a micro light emitting device μLED.

[0097] In one micro driver μDriver, the μDriver can include a driving transistor T DR and a light emitting transistor T EM , but exemplary embodiments of the present disclosure are not limited thereto.

[0098] For example, in the driving transistor T DR , a high potential power voltage VDD can be applied to a first electrode, a first electrode of the light emitting transistor T EM can be connected to a second electrode, and a scan signal SC can be applied to a gate electrode. The scan signal SC applied to the gate electrode of the driving transistor T DR is a direct current power source, and a fixed reference voltage Vref can be applied to each frame, but exemplary embodiments of the present disclosure are not limited thereto.

[0099] In the light emitting transistor T EM , a second electrode of the driving transistor T DR is connected to a first electrode, a light emitting device ED is connected to a second electrode, and a light emitting signal EM can be applied to a gate electrode. The light emitting signal EM applied to the gate electrode of the light emitting transistor TEM can be a pulse width modulation signal that changes every frame, but exemplary embodiments of the present disclosure are not limited thereto.

[0100] In a light-emitting device (ED), the first electrode can be connected to the light-emitting transistor (T). EM The second electrode can be grounded. For example, the first electrode can be an anode electrode and the second electrode can be a cathode electrode, but the configuration of this disclosure is not limited to this.

[0101] Drive transistor T DR and light-emitting transistor T EM Each of them can be an n-type transistor or a p-type transistor.

[0102] In the micro-driver μDR, the driving transistor T DR The light-emitting transistor TEM can be turned on by the scan signal SC applied from the timing controller T-CON, and the light-emitting transistor TEM can be turned on by the light-emitting signal EM. As a result, by applying a scan signal SC to the driving transistor T-CON... DR The high potential voltage VDD of the first electrode drives the current through the drive transistor T. DR and light-emitting transistor T EM An energy is applied to the light-emitting device (ED), so the ED can emit light.

[0103] Figure 5 , Figure 6 and Figure 7 This is a plan view of a display device according to an exemplary embodiment of the present disclosure. For example, Figure 5 It is a magnified planar view of a display area that includes multiple pixels. For example, Figure 6 It is a magnified planar view of a display area including one pixel. For example, Figure 7 It is a magnified planar view of a display area that includes multiple pixels.

[0104] exist Figure 5 and Figure 6 The present invention only shows multiple signal wirings TL, multiple communication wirings NL, multiple first electrodes CE1, multiple embankments BNK, and multiple light-emitting devices ED, but the exemplary embodiments of the present invention are not limited thereto. Figure 7 Multiple second electrodes CE2 are additionally disposed thereon. Figure 6 An enlarged plan view.

[0105] Reference Figure 5 and Figure 6 Multiple pixels PX, comprising multiple sub-pixels, can be disposed within a display area AA. Each of the multiple sub-pixels includes a light-emitting device ED and can emit light independently. The multiple sub-pixels can form multiple rows and columns and can be arranged in a matrix, but the configuration disclosed herein is not limited thereto.

[0106] The plurality of sub-pixels can include a first sub-pixel SP1, a second sub-pixel SP2, and a third sub-pixel SP3. For example, any one of the first sub-pixel SP1, the second sub-pixel SP2, and the third sub-pixel SP3 can be a red sub-pixel, another can be a green sub-pixel, and the rest can be a blue sub-pixel. The types of the plurality of sub-pixels are exemplary, and exemplary embodiments of the disclosure are not limited thereto.

[0107] Each of the plurality of pixels PX can include one or more first sub-pixels SP1, one or more second sub-pixels SP2, and one or more third sub-pixels SP3. For example, one pixel PX can include a pair of first sub-pixels SP1, a pair of second sub-pixels SP2, and a pair of third sub-pixels SP3. The pair of first sub-pixels SP1 can include a 1-1 sub-pixel SP1a and a 1-2 sub-pixel SP1b. The pair of second sub-pixels SP2 can include a 2-1 sub-pixel SP2a and a 2-2 sub-pixel SP2b.

[0108] The pair of third sub-pixels SP3 can include a 3-1 sub-pixel SP3a and a 3-2 sub-pixel SP3b. For example, one pixel PX can include a 1-1 sub-pixel SP1a, a 1-2 sub-pixel SP1b, a 2-1 sub-pixel SP2b, a 2-2 sub-pixel SP2b, a 3-1 sub-pixel SP3a, and a 3-2 sub-pixel SP3b, but exemplary embodiments of the disclosure are not limited thereto.

[0109] The plurality of sub-pixels constituting one pixel PX can be variously arranged. For example, in one pixel PX, a pair of first sub-pixels SP1 can be disposed in the same column, a pair of second sub-pixels SP2 can be disposed in the same column, and a pair of third sub-pixels SP3 can be disposed in the same column. The first sub-pixel SP1, the second sub-pixel SP2, and the third sub-pixel SP3 can be disposed in the same row. Alternatively, in one pixel PX, a pair of first sub-pixels SP1 can be disposed in the same row, a pair of second sub-pixels SP2 can be disposed in the same row, and a pair of third sub-pixels SP3 can be disposed in the same row. The first sub-pixel SP1, the second sub-pixel SP2, and the third sub-pixel SP3 can be disposed in the same column. The number and arrangement of the plurality of sub-pixels constituting one pixel PX are exemplary, and the configuration of the disclosure is not limited thereto.

[0110] The plurality of signal wirings TL can be disposed in the area between the plurality of sub-pixels. The plurality of signal wirings TL can extend in the column direction between the plurality of sub-pixels. The plurality of signal wirings TL can be wirings that transmit an anode voltage from the pixel driving circuit PD to the plurality of sub-pixels. For example, the plurality of signal wirings TL can be electrically connected to the plurality of pixel driving circuits PD and the first electrodes CE1 of the plurality of sub-pixels.

[0111] The anode voltage output from the pixel driving circuit PD can be transmitted to the first electrodes CE1 of the plurality of sub-pixels through a plurality of signal wirings TL. For example, the first electrode CE1 can be an electrode electrically connected to the anode electrode 134 of the light emitting device ED. Accordingly, the anode voltage from the signal wiring TL can be transmitted to the anode electrode 134 of the light emitting device ED through the first electrode CE1.

[0112] Accordingly, instead of forming a plurality of transistors and storage capacitors in each of the plurality of sub-pixels, the structure of the display device 1000 can be simplified by using the pixel driving circuit PD in which a plurality of pixel circuits are integrated. Further, since the circuits provided in each of the plurality of sub-pixels are integrated in one pixel driving circuit PD, high efficiency and low power driving are possible.

[0113] The plurality of signal wirings TL can include a first signal wiring TL1, a second signal wiring TL2, a third signal wiring TL3, a fourth signal wiring TL4, a fifth signal wiring TL5, and a sixth signal wiring TL6. Each of the first signal wiring TL1 and the second signal wiring TL2 can be electrically connected to each of a pair of first sub-pixels SP1. The third signal wiring TL3 and the fourth signal wiring TL4 can be electrically connected to each of a pair of second sub-pixels SP2. The fifth signal wiring TL5 and the sixth signal wiring TL6 can be electrically connected to each of a pair of third sub-pixels SP3.

[0114] The first signal wiring TL1 can be located at one side of the pair of first sub-pixels SP1, and the second signal wiring TL2 can be located at the other side of the pair of first sub-pixels SP1. The first signal wiring TL1 can be electrically connected to the first electrode CE1 of one (e.g., 1-1 sub-pixel SP1a) of the pair of first sub-pixels SP1. The second signal wiring TL2 can be electrically connected to the first electrode CE1 of the other (e.g., 1-2 sub-pixel SP1b) of the pair of first sub-pixels SP1.

[0115] The third signal wiring TL3 can be located at one side of the pair of second sub-pixels SP2, and the fourth signal wiring TL4 can be located at the other side of the pair of second sub-pixels SP2. For example, the third signal wiring TL3 can be adjacent to the second signal wiring TL2. The third signal wiring TL3 can be electrically connected to the first electrode CE1 of one (e.g., 2-1 sub-pixel SP2a) of the pair of second sub-pixels SP2. The fourth signal wiring TL4 can be electrically connected to the first electrode CE1 of the other (e.g., 2-2 sub-pixel SP2b) of the pair of second sub-pixels SP2.

[0116] The fifth signal wiring TL5 can be located on one side of the pair of third sub-pixels SP3, and the sixth signal wiring TL6 can be located on the other side of the pair of third sub-pixels SP3. For example, the fifth signal wiring TL5 can be adjacent to the fourth signal wiring TL4. The sixth signal wiring TL6 can be adjacent to the first signal wiring TL1 connected to the adjacent pixel PX. The fifth signal wiring TL5 can be electrically connected to the first electrode CE1 of one of the pair of third sub-pixels SP3 (e.g., sub-pixel 3-1 SP3a). The sixth signal wiring TL6 can be electrically connected to the first electrode CE1 of the other of the pair of third sub-pixels SP3 (e.g., sub-pixel 3-2 SP3b).

[0117] like Figure 5 As shown, the first pixel includes a pair of first sub-pixels SP1, a pair of second sub-pixels SP2, and a pair of third sub-pixels SP3. The pair of first sub-pixels SP1 includes sub-pixels SP1a (1-1) and SP1b (1-2), the pair of second sub-pixels SP2 includes sub-pixels SP2a (2-1) and SP2b (2-2), and the pair of third sub-pixels SP3 includes sub-pixels SP3a (3-1) and SP3b (3-2). A first signal wiring TL1 can be electrically connected to the first electrode CE1 of sub-pixel SP1a (1-1), a second signal wiring TL2 can be electrically connected to the first electrode CE1 of sub-pixel SP1b (1-2), a third signal wiring TL3 can be electrically connected to the first electrode CE1 of sub-pixel SP2a (2-1), a fourth signal wiring TL4 can be electrically connected to the first electrode CE1 of sub-pixel SP2b (2-2), a fifth signal wiring TL5 can be electrically connected to the first electrode CE1 of sub-pixel SP3a (3-1), and a sixth signal wiring TL6 can be electrically connected to the first electrode CE1 of sub-pixel SP3b (3-2). Furthermore, a first signal wiring TL1 connected to the first pixel is adjacent to a sixth signal wiring TL6 connected to a second pixel adjacent to the first pixel. However, this disclosure is not limited thereto.

[0118] Multiple signal traces (TLs) can be made of conductive materials. For example, multiple signal traces (TLs) can be formed of conductive materials such as titanium (Ti), aluminum (Al), copper (Cu), molybdenum (Mo), nickel (Ni), chromium (Cr), indium tin oxide (ITO), indium zinc oxide (IZO), or indium gallium zinc oxide (IGZO), but the exemplary embodiments of this disclosure are not limited thereto. In another example, multiple signal traces (TLs) can have a multilayer structure of conductive materials. For example, multiple signal traces (TLs) can have a multilayer structure of titanium (Ti) / aluminum (Al) / titanium (Ti) / indium tin oxide (ITO), but the exemplary embodiments of this disclosure are not limited thereto.

[0119] Multiple communication lines (NLs) can be arranged in the area between multiple pixels (PX). Multiple communication lines (NLs) can extend along the row direction in the area between multiple pixels (PX). Multiple communication lines (NLs) can be arranged at multiple second electrodes (…). Figure 8 The multiple communication lines NL can be located in the region between CE2 and may not overlap with multiple second electrodes CE2. For example, the multiple communication lines NL can be wiring for short-range communication such as near field communication (NFC). The multiple communication lines NL can be used as antenna wiring. For example, the multiple communication lines NL can be multiple connection wiring, etc., but the exemplary embodiments of this disclosure are not limited thereto.

[0120] According to this disclosure, the embankment BNK can be located in each of the plurality of sub-pixels. The plurality of embankments can be structures on which a plurality of microLEDs are mounted. During the transfer process of transferring the plurality of microLEDs to the display device 1000, the plurality of embankments can guide the position of the plurality of microLEDs. During the transfer process of the plurality of microLEDs, the plurality of microLEDs can be transferred onto the plurality of BNKs. The plurality of embankment BNKs can be embankment patterns or structures, but the exemplary embodiments of this disclosure are not limited thereto.

[0121] The dam portions BNK of the first sub-pixel SP1, the second sub-pixel SP2, and the third sub-pixel SP3 can be spaced apart from each other. The dam portions BNK of the first sub-pixel SP1, the second sub-pixel SP2, and the third sub-pixel SP3 can be configured to be separated from each other. Therefore, it is easy to distinguish the dam portions BNK of the first sub-pixel SP1, the second sub-pixel SP2, and the third sub-pixel SP3 transferred thereto by different types of micro-LEDs.

[0122] The dam portion BNK of sub-pixel 1-1 SP1a and the dam portion BNK of sub-pixel 1-2 SP1b can be connected to each other or can be spaced apart. For example, considering design requirements such as transfer process requirements, the dam portion BNK of sub-pixel 1-1 SP1a and the dam portion BNK of sub-pixel 1-2 SP1b, which are provided with the same type of light-emitting device ED, can be connected to each other, spaced apart, or separated from each other. Furthermore, the dam portion BNK of sub-pixel 3-1 SP3a and the dam portion BNK of sub-pixel 3-2 SP3b can be connected to each other or can be spaced apart.

[0123] Therefore, the embankment BNK of a pair of first sub-pixels SP1, the embankment BNK of a pair of second sub-pixels SP2, and the embankment BNK of a pair of third sub-pixels SP3 can be formed differently, and the exemplary embodiments of this disclosure are not limited thereto.

[0124] The plurality of banks BNK can be formed of an opaque material (e.g., black) so as to prevent light interference between adjacent pixels. In this case, the banks BNK can include a light-shielding material composed of at least one of a color pigment, an organic black, or carbon, but are not limited thereto.

[0125] For example, the plurality of banks BNK can be formed of an organic insulating material. The plurality of banks BNK can be configured as a single layer or multiple layers of the organic insulating material. For example, the plurality of banks BNK can be formed of a photoresist, a polyimide (PI), or an acrylic-based material, but exemplary embodiments of the disclosure are not limited thereto.

[0126] In addition, the plurality of banks BNK can include an inorganic insulating material such as silicon nitride (SiNx) or silicon oxide (SiOx), or the banks BNK can be formed of a black resin. However, the disclosure is not limited thereto.

[0127] The first electrode CE1 can be located in each of the plurality of sub-pixels. The first electrode CE1 can be located on the banks BNK. For example, the first electrode CE1 can be located on the top surface and the side surface of the plurality of banks BNK.

[0128] At least a portion of the first electrode CE1 can extend outside the banks BNK and be electrically connected to the signal wiring TL closest to the first electrode CE1. For example, a portion of the first electrode CE1 of the 1-1 sub-pixel SP1a can extend to one side region of the 1-1 sub-pixel SP1a and be electrically connected to the first signal wiring TL1, and a portion of the first electrode CE1 of the 1-2 sub-pixel SP1b can extend to an opposite side region of the 1-2 sub-pixel SP1b and be electrically connected to the second signal wiring TL2.

[0129] A portion of the first electrode CE1 of the 2-1 sub-pixel SP2a can extend to one side region of the 2-1 sub-pixel SP2a to be electrically connected to the third signal wiring TL3, and a portion of the first electrode CE1 of the 2-2 sub-pixel SP2b can extend to the other side region of the 2-2 sub-pixel SP2b to be electrically connected to the fourth signal wiring TL4. A portion of the first electrode CE1 of the 3-1 sub-pixel SP3a can extend to one side region of the 3-1 sub-pixel SP3a to be electrically connected to the fifth signal wiring TL5, and a portion of the first electrode CE1 of the 3-2 sub-pixel SP3b can extend to the other side region of the 3-2 sub-pixel SP3b to be electrically connected to the sixth signal wiring TL6.

[0130] The first electrode CE1 can be electrically connected to the anode electrode 134 of the micro LED ED, and can transmit an anode voltage from the pixel driving circuit PD to the micro LED ED of each of the plurality of sub-pixels through the signal wiring TL. According to an image to be displayed, different voltages can be applied to the respective first electrodes CE1 of the plurality of sub-pixels. For example, different voltages can be applied to the respective first electrodes CE1 of the plurality of sub-pixels. Accordingly, the first electrode CE1 can be a pixel electrode, and exemplary embodiments of the present disclosure are not limited thereto.

[0131] The first electrode CE1 can be formed of an electrically conductive material. For example, the first electrode CE1 can be integrally formed with the plurality of signal wirings TLs. For example, the first electrode CE1 can be formed of the same electrically conductive material as the plurality of signal wirings TLs, but exemplary embodiments of the present disclosure are not limited thereto. For example, the first electrode CE1 can be formed of a multi-layer structure of titanium (Ti), aluminum (Al), copper (Cu), molybdenum (Mo), nickel (Ni), chromium (Cr), indium tin oxide (ITO), indium zinc oxide (IZO), indium gallium zinc oxide (IGZO), or the like, but exemplary embodiments of the present disclosure are not limited thereto. For another example, the first electrode CE1 can be formed of a multi-layer structure of an electrically conductive material. For example, the plurality of first electrodes CE1 can be formed of a multi-layer structure of titanium (Ti) / aluminum (Al) / titanium (Ti) / indium tin oxide (ITO), but exemplary embodiments of the present disclosure are not limited thereto.

[0132] The light emitting device ED can be disposed in each of the plurality of sub-pixels. The plurality of light emitting devices ED can be any one of a light emitting diode (LED) and a micro light emitting diode (micro LED), but exemplary embodiments of the present disclosure are not limited thereto. The plurality of light emitting devices ED can be disposed on the bank BNK and the first electrode CE1. The plurality of light emitting devices ED can be disposed on the first electrode CE1 and can be electrically connected to the first electrode CE1. Accordingly, the light emitting device ED can emit light by receiving an anode voltage from the pixel driving circuit PD through the signal wiring TL and the first electrode CE1.

[0133] The plurality of micro-LEDs can include a first micro-LED 130, a second micro-LED 140, and a third micro-LED 150. The first micro-LED 130 can be located in the first sub-pixel SP1. The second micro-LED 140 can be located in the second sub-pixel SP2. The third micro-LED 150 can be located in the third sub-pixel SP3. For example, one of the first micro-LED 130, the second micro-LED 140, and the third micro-LED 150 can be a red micro-LED, another can be a green micro-LED, and the remaining one can be a blue micro-LED, for example, the first micro-LED 130 is a red micro-LED, the second micro-LED 140 is a green micro-LED, and the third micro-LED 150 is a blue micro-LED, but exemplary embodiments of the present disclosure are not limited thereto. Thus, by combining red light, green light, and blue light emitted from the plurality of micro-LEDs, light of various colors including white light can be implemented. The types of the plurality of micro-LEDs are merely exemplary, and exemplary embodiments of the present disclosure are not limited thereto.

[0134] The first light emitting device 130 can include a 1-1 light emitting device 130a disposed in a 1-1 sub-pixel SP1a and a 1-2 light emitting device 130b disposed in a 1-2 sub-pixel SP1b. The second light emitting device 140 can include a 2-1 light emitting device 140a disposed in a 2-1 sub-pixel SP2a and a 2-2 light emitting device 140b disposed in a 2-2 sub-pixel SP2b. The third light emitting device 150 can include a 3-1 light emitting device 150a disposed in a 3-1 sub-pixel SP3a and a 3-2 light emitting device 150b disposed in a 3-2 sub-pixel SP3b.

[0135] Referring to Figures 5 to 7 The second electrode CE2 can be located in each of the plurality of sub-pixels. The second electrode CE2 can be located on the micro-LED ED. The second electrode CE2 can be electrically connected to the pixel driving circuit PD through the plurality of contact electrodes CCE.

[0136] For example, the second electrode CE2 can be electrically connected to the cathode electrode 135 of the micro-LED ED and can transmit a cathode voltage from the pixel driving circuit PD to the micro-LED ED. The same cathode voltage can be applied to the second electrode CE2 of each of the plurality of sub-pixels. For example, the same voltage can be applied to the second electrode CE2 of each of the plurality of sub-pixels and the cathode electrode 135 of the micro-LED ED. Thus, the second electrode CE2 can be a common electrode, but exemplary embodiments of the present disclosure are not limited thereto.

[0137] At least some of the plurality of sub-pixels can share the second electrode CE2. At least some of the second electrodes CE2 of the plurality of sub-pixels can be electrically connected to each other. The second electrodes CE2 of at least some of the sub-pixels can be shared since the same voltage is applied to the second electrodes CE2. For example, the second electrodes CE2 of at least some of the pixels PX arranged in the same row can be connected to each other. For example, a single second electrode CE2 can be provided for the plurality of pixels PX. One second electrode CE2 can be provided for every n sub-pixels.

[0138] For example, some of the second electrodes CE2 of the plurality of sub-pixels can be spaced apart or separated from each other. For example, the second electrode CE2 connected to the pixels PX in the nth row and the second electrode CE2 connected to the pixels PX in the (n+1)th row can be spaced apart or separated from each other. For example, the plurality of second electrodes CE2 can be separated from each other with a plurality of communication lines NL extending in the row direction interposed therebetween.

[0139] The plurality of second electrodes CE2 can be made of a transparent conductive material, but exemplary embodiments of the disclosure are not limited thereto. The plurality of second electrodes CE2 can be made of a transparent conductive material, allowing light emitted from the micro-LED ED to be upwardly directed through the second electrode CE2. For example, the second electrode CE2 can be made of a transparent conductive material such as indium tin oxide (ITO), indium zinc oxide (IZO), or indium gallium zinc oxide (IGZO), but exemplary embodiments of the disclosure are not limited thereto.

[0140] The plurality of contact electrodes CCE can be arranged on the substrate 110. For example, the plurality of contact electrodes CCE can be spaced apart from the plurality of banks BNK and the plurality of signal lines TL. Each of the plurality of second electrodes CE2 can overlap at least one contact electrode CCE. For example, one second electrode CE2 can overlap the plurality of contact electrodes CCE.

[0141] For example, the plurality of contact electrodes CCE can be electrically connected to the plurality of second electrodes CE2. The plurality of contact electrodes CCE can be located between the substrate 110 and the plurality of second electrodes CE2 and can transmit a cathode voltage from the pixel driving circuit PD to the second electrode CE2.

[0142] For example, when a micro LED is used as a micro LED ED, a plurality of micro LEDs can be formed on a wafer and transferred to the substrate 110 of the display device 1000 to manufacture the display device 1000. In the process of transferring a plurality of micro LED EDs having a fine size from the wafer to the substrate 110, various defects can occur. For example, in some sub-pixels, transfer failure can occur in which the micro LED ED is not transferred, and in some other sub-pixels, defects can occur in which the micro LED ED is transferred to an incorrect position due to alignment errors. In addition, even if the transfer process proceeds normally, the transferred micro LED ED itself can be defective. Therefore, in the transfer process of a plurality of micro LED EDs, a plurality of micro LED EDs emitting the same color light can be transferred to one sub-pixel in consideration of defects. The plurality of micro LEDs can be subjected to a burn-in test, and only one micro LED ED finally determined to be normal can be used.

[0143] For example, the 1-1 micro LED 130a and the 1-2 micro LED 130b can be transferred together to one pixel PX, and their defect states can be checked. If both the 1-1 micro LED 130a and the 1-2 micro LED 130b are determined to be normal, only the 1-1 micro LED 130a can be used, and the 1-2 micro LED 130b can remain unused. In another example, if only the 1-2 micro LED 130b is determined to be normal among the 1-1 micro LED 130a and the 1-2 micro LED 130b, the 1-1 micro LED 130a can remain unused, and only the 1-2 micro LED 130b can be used. Therefore, even if a plurality of micro LED EDs emitting the same color light are transferred to one pixel PX, only one micro LED ED can be finally used.

[0144] Therefore, in a pair of micro LED EDs, one can be a main (or primary) micro LED ED, and the other can be a redundant micro LED ED. The redundant micro LED ED can be an additional micro LED ED that is transferred in preparation for a defect in the main micro LED ED. In the event of a failure of the main micro LED, the redundant micro LED can be used as a replacement. Therefore, by transferring the main micro LED ED and the redundant micro LED ED to one pixel PX, a decrease in display quality due to a defect in the main micro LED ED or the redundant micro LED ED can be minimized. In addition, the main micro LED ED and the redundant micro LED ED differ only in name, and their structures and functions can be exactly the same, for example, the main micro LED ED can also be referred to as a redundant micro LED ED, and the redundant micro LED ED can also be referred to as a main micro LED ED, but are not limited thereto.

[0145] For example, the 1-1 light emitting device 130a, the 2-1 light emitting device 140a, and the 3-1 light emitting device 150a transferred to one pixel PX can be used as a main light emitting device ED, and the 1-2 light emitting device 130b, the 2-2 light emitting device 140b, and the 3-2 light emitting device 150b can be used as a redundant light emitting device ED.

[0146] Figure 8 FIG. 1 is a cross-sectional view of a display device according to an exemplary embodiment of the present disclosure. Figure 9 FIG. 2 is an enlarged cross-sectional view of a display device according to an exemplary embodiment of the present disclosure. For example, Figure 8 FIG. 3 is a cross-sectional view of a display area AA, a first non-display area NA1, and a second non-display area NA2, and a bending area BA.

[0147] Referring to Figure 8 The buffer layer 111 can be disposed in the remaining area of the substrate 110 except for the bending area BA. The buffer layer 111 can include a first buffer layer 111a and a second buffer layer 111b.

[0148] The first buffer layer 111a and the second buffer layer 111b can be located in the display area AA, but can not be disposed on the first non-display area NA1 and the second non-display area NA2, but exemplary embodiments of the present disclosure are not limited thereto.

[0149] The first buffer layer 111a and the second buffer layer 111b can reduce the penetration of moisture or impurities through the substrate 110. The first buffer layer 111a and the second buffer layer 111b can be made of an inorganic insulating material. For example, the first buffer layer 111a and the second buffer layer 111b can be configured as a single layer or a plurality of layers of silicon oxide (SiOx) or silicon nitride (SiNx), for example, the first buffer layer 111a and the second buffer layer 111b can be formed by a single layer or a plurality of layers of an inorganic film, for example, a single layer of an inorganic film can be a silicon oxide (SiOx) film or a silicon nitride (SiNx) film, and a plurality of layers of an inorganic film can be formed by alternately stacking one or more layers of a silicon oxide (SiOx) film, one or more layers of a silicon nitride (SiNx) film, and one or more layers of amorphous silicon (a-Si), but exemplary embodiments of the present disclosure are not limited thereto. The first buffer layer 111a and the second buffer layer 111b can not be included according to the structure or characteristics of the display device. However, exemplary embodiments of the present disclosure are not limited thereto.

[0150] In addition, in order to prevent moisture from penetrating from the non-display area NA, the buffer layer 111 can be disposed only in the display area AA. The present disclosure is not limited thereto.

[0151] The non-display area NA can include the first non-display area NA1, the bending area BA, and the second non-display area NA2.

[0152] For example, the buffer layer 111 can be formed of a single layer or multiple layers of silicon oxide (SiOx) or silicon nitride (SiNx) as an inorganic film material, but exemplary embodiments of the present disclosure are not limited thereto. For example, portions of the first buffer layer 111a and the second buffer layer 111b on the bending area BA can be removed. The upper surface of the substrate 110 located in the bending area BA can be exposed from the first buffer layer 111a and the second buffer layer 111b. By removing the first buffer layer 111a and the second buffer layer 111b made of an inorganic insulating material from the bending area BA, cracks that can occur in the first buffer layer 111a and the second buffer layer 111b during bending can be minimized.

[0153] A plurality of alignment keys (alignment marks) MK can be disposed between the first buffer layer 111a and the second buffer layer 111b. The plurality of alignment marks MK can be configured to identify the position of the pixel driving circuit PD in the manufacturing process of the display device 1000. For example, the plurality of alignment marks MK can be configured to align the position of the pixel driving circuit PD transferred onto the adhesive layer 112. In another example, the plurality of alignment marks MK can be omitted.

[0154] The adhesive layer 112 can be located on the second buffer layer 111b. The adhesive layer 112 can be located in the display area AA, the first non-display area NA1, the bending area BA, and the second non-display area NA2. In another example, at least a portion of the adhesive layer 112 can be removed from the non-display area NA including the bending area BA. For example, the adhesive layer 112 can be made of any one of an adhesive polymer, an epoxy resin, a UV-cured resin, a polyimide-based material, an acrylate-based material, a polyurethane-based material, or a polydimethylsiloxane (PDMS), but exemplary embodiments of the present disclosure are not limited thereto.

[0155] In the display area AA, the pixel driving circuit PD can be located on the adhesive layer 112. When the pixel driving circuit PD is implemented as a driving driver, the driving driver can be mounted on the adhesive layer 112 through a transfer process, but exemplary embodiments of the present disclosure are not limited thereto.

[0156] The first protective layer 113a and the second protective layer 113b can be located on the top surface or the side surface of the adhesive layer 112 and the pixel driving circuit PD. The first protective layer 113a and the second protective layer 113b can be positioned to surround the side surface of the pixel driving circuit PD, but exemplary embodiments of the present disclosure are not limited thereto. For example, the second protective layer 113b can be positioned to cover at least a portion of the top surface of the pixel driving circuit PD. For example, at least one of the first protective layer 113a and the second protective layer 113b located in the bending area BA can be omitted.

[0157] For example, the first protective layer 113a can be positioned entirely over the display region AA and the non-display region NA, and the second protective layer 113b can be positioned partially over the display region AA, the first non-display region NA1, and the second non-display region NA2. For example, a portion of the second protective layer 113b in the bending region BA can be removed. However, the example embodiments of the present disclosure are not limited thereto.

[0158] The first protective layer 113a and the second protective layer 113b can be formed of an organic insulating material, but the example embodiments of the present disclosure are not limited thereto. For example, the first protective layer 113a and the second protective layer 113b can be formed of a photoresist, a polyimide (PI), or a photoarylic material, but the example embodiments of the present disclosure are not limited thereto. For example, the first protective layer 113a and the second protective layer 113b can be an overcoat layer or an insulating layer, but the example embodiments of the present disclosure are not limited thereto.

[0159] According to the present disclosure, a plurality of first connection wirings 121 can be arranged on the second protective layer 113b in the display region AA. The plurality of first connection wirings 121 can be wirings for electrically connecting the pixel driving circuit PD to other components. For example, the pixel driving circuit PD can be electrically connected to the plurality of signal wirings TL, the plurality of contact electrodes CCE, and the like through the plurality of first connection wirings 121. For example, the plurality of first connection wirings 121 can include a 1-1 connection wiring 121a, a 1-2 connection wiring 121b, a 1-3 connection wiring 121c, and a 1-4 connection wiring 121d, and the 1-1 connection wiring 121a, the 1-2 connection wiring 121b, the 1-3 connection wiring 121c, and the 1-4 connection wiring 121d can be electrically connected to each other through contact holes formed in an insulating layer between the connection wirings, but the example embodiments of the present disclosure are not limited thereto.

[0160] For example, a plurality of 1-1 connection wirings 121a can be provided on the second protective layer 113b. The plurality of 1-1 connection wirings 121a can be electrically connected to the pixel driving circuit PD. The plurality of 1-1 connection wirings 121a can transmit a voltage output from the pixel driving circuit PD to the first electrode CE1 or the second electrode CE2.

[0161] For example, the first protective layer 113a and the second protective layer 113b can be formed of an organic insulating material. For example, the first protective layer 113a and the second protective layer 113b can be formed of a photoresist, a polyimide (PI), a photoarylic material, or the like, but the example embodiments of the present disclosure are not limited thereto. For example, the first protective layer 113a and the second protective layer 113b can be formed of the same material. The example embodiments of the present disclosure are not limited thereto. For example, the first protective layer 113a and the second protective layer 113b can be an insulating layer, but the example embodiments of the present disclosure are not limited thereto.

[0162] Further, a first insulating layer 114 can be disposed on the second protective layer 113b. For example, the first insulating layer 114 can be disposed in the entire display area AA and the non-display area NA. For example, the first insulating layer 114 can be formed of a single layer or multiple layers of silicon oxide (SiOx) or silicon nitride (SiNx) as an inorganic film material, for example, the first insulating layer 114 can be formed by a single layer or multiple layers of inorganic film, for example, the single layer of inorganic film can be a silicon oxide (SiOx) film or a silicon nitride (SiNx) film, and the multiple layers of inorganic film can be formed by alternately stacking one or more layers of a silicon oxide (SiOx) film, one or more layers of a silicon nitride (SiNx) film, and one or more layers of amorphous silicon (a-Si), but exemplary embodiments of the present disclosure are not limited thereto.

[0163] For example, as shown in FIG. 1A, in order to prevent moisture from penetrating from the non-display area NA, the first insulating layer 114 can be disposed only in the display area AA. The present disclosure is not limited thereto. Figure 8

[0164] A first organic insulating layer 115a can be disposed on the first insulating layer 114. The first organic insulating layer 115a can be formed of an organic insulating material, but embodiments of the present disclosure are not limited thereto. For example, the first organic insulating layer 115a can be formed of a photoresist, a polyimide (PI), a photo-aryl material, or the like, but exemplary embodiments of the present disclosure are not limited thereto.

[0165] Further, a plurality of 1-2 connection wirings 121b can be disposed on the first organic insulating layer 115a. The plurality of 1-2 connection wirings 121b can be connected to or directly connected to the pixel driving circuit PD. For example, a portion of the 1-2 connection wirings 121b can be directly connected to the pixel driving circuit PD through a contact hole of the first insulating layer 114. Another portion of the 1-2 connection wirings 121b can be electrically connected to the 1-1 connection wirings 121a through a contact hole of the first insulating layer 114. However, exemplary embodiments of the present disclosure are not limited thereto. A voltage output from the pixel driving circuit PD can be transmitted to the first electrode CE1 or the second electrode CE2 through a connection wiring different from the plurality of 1-2 connection wirings 121b.

[0166] A second organic insulating layer 115b can be located on the plurality of 1-2 connection wirings 121b. The second organic insulating layer 115b can be located entirely on the display area AA and the non-display area NA, but exemplary embodiments of the present disclosure are not limited thereto. The second organic insulating layer 115b can be made of an organic insulating material, but exemplary embodiments of the present disclosure are not limited thereto. For example, the first organic insulating layer 115a can be made of a photoresist, a polyimide (PI), or a photo-aryl material, but exemplary embodiments of the present disclosure are not limited thereto.​

[0167] The plurality of 1-3 connection wirings 121c can be located on the second organic insulating layer 115b. The plurality of 1-3 connection wirings 121c can be electrically connected to the plurality of 1-2 connection wirings 121b. For example, the 1-3 connection wiring 121c can be electrically connected to the 1-2 connection wiring 121b through a contact hole of the second organic insulating layer 115b.

[0168] The third organic insulating layer 115c can be located on the plurality of 1-3 connection wirings 121c. The third organic insulating layer 115c can be located in a region other than the bending area BA, but exemplary embodiments of the present disclosure are not limited thereto. The third organic insulating layer 115c can be located in the display area AA, the first non-display area NA1, and the second non-display area NA2, but exemplary embodiments of the present disclosure are not limited thereto. For example, a portion of the third organic insulating layer 115c located in the bending area BA can be removed. The third organic insulating layer 115c can be made of an organic insulating material, but embodiments of the present disclosure are not limited thereto. For example, the third organic insulating layer 115c can be made of a photoresist, a polyimide (PI), or a photoarylate material, but exemplary embodiments of the present disclosure are not limited thereto.

[0169] The plurality of 1-4 connection wirings 121d can be located on the third organic insulating layer 115c. The plurality of 1-4 connection wirings 121d can be electrically connected to the plurality of 1-3 connection wirings 121c. For example, the 1-4 connection wiring 121d can be electrically connected to the 1-3 connection wiring 121c through a contact hole of the third organic insulating layer 115c.

[0170] The fourth organic insulating layer 115d can be disposed on the plurality of 1-4 connection wirings 121d. The fourth organic insulating layer 115d can be disposed in a remaining region other than the bending area BA, but exemplary embodiments of the present disclosure are not limited thereto. The fourth organic insulating layer 115d can be disposed in the display area AA, the first non-display area NA1, and the second non-display area NA2, but exemplary embodiments of the present disclosure are not limited thereto.

[0171] According to the present disclosure, the plurality of second connection wirings 122 can be located on the second protective layer 113b in the non-display area NA. The plurality of second connection wirings 122 can be wirings for transmitting signals, which have been transmitted from the flexible circuit board (or flexible film) CB and the printed circuit board 160 (see Figure 1 ), to the pad portion PAD, to the pixel driving circuit PD of the display area AA. For example, the plurality of second connection wirings 122 can be electrically connected to the plurality of pad electrodes PE to receive signals from the flexible circuit board (or flexible film) CB and the printed circuit board 160.

[0172] A plurality of 2-1 connection wirings 122a can be disposed on the second protection layer 113b. The plurality of 2-1 connection wirings 122a can extend from the second non-display area NA2 to the bending area BA and the first non-display area NA1. The plurality of 2-1 connection wirings 122a can transmit signals transmitted from the flexible circuit board (or flexible film) CB and the printed circuit board to the pixel driving circuit PD of the display area AA to the pad portion PAD.

[0173] A plurality of 2-2 connection wirings 122b can be disposed on the first insulation layer 114 and the first organic insulation layer 115a. The plurality of 2-2 connection wirings 122b can be disposed in the second non-display area NA2. The 2-2 connection wirings 122b can be electrically connected to the 2-1 connection wirings 122a through contact holes of the first insulation layer 114. Accordingly, signals from the flexible circuit board (or flexible film) CB and the printed circuit board can be transmitted to the 2-1 connection wirings 122a through the 2-2 connection wirings 122b.

[0174] A third organic insulation layer 115c can be disposed on the second organic insulation layer 115b and the 2-3 connection wirings 122c. Also, a 2-4 connection wiring 122d can be disposed on the third organic insulation layer 115c. The 2-4 connection wiring 122d can be disposed in the second non-display area NA2. The 2-4 connection wiring 122d can be electrically connected to the 2-3 connection wirings 122c through a contact hole of the third organic insulation layer 115c. Accordingly, signals from the flexible film FF and the printed circuit board can be transmitted to the 2-1 connection wirings 122a through the 2-4 connection wiring 122d, the 2-3 connection wiring 122c, and the 2-2 connection wiring 122b.

[0175] The plurality of first connection wirings 121 and the plurality of second connection wirings 122 can be formed of any one of a high flexible conductive material or various conductive materials used in the display area AA.

[0176] For example, the second connection wiring 122 in which a portion is disposed in the bending area BA can be made of a conductive material having excellent ductility, such as gold (Au), silver (Ag), or aluminum (Al), but exemplary embodiments of the present disclosure are not limited thereto.

[0177] For another example, the plurality of first connection wirings 121 and the plurality of second connection wirings 122 can be made of an alloy of molybdenum (Mo), chromium (Cr), titanium (Ti), nickel (Ni), neodymium (nd), copper (Cu), silver (Ag), and magnesium (Mg), or other alloys thereof, but exemplary embodiments of the present disclosure are not limited thereto.

[0178] The fourth organic insulating layer 115d can be positioned on the plurality of first connection wirings 121 and the plurality of second connection wirings 122. The fourth organic insulating layer 115d can be positioned in a region other than the bending region BA, but the example embodiment of the present disclosure is not limited thereto. The fourth organic insulating layer 115d can be positioned in the display region AA, the first non-display region NA1, and the second non-display region NA2. A portion of the fourth organic insulating layer 115d positioned in the bending region BA can be removed. The fourth organic insulating layer 115d can be made of an organic insulating material, but the example embodiment of the present disclosure is not limited thereto. For example, the fourth organic insulating layer 115d can be made of a photoresist, a polyimide (PI), or a photoarylate material, but the example embodiment of the present disclosure is not limited thereto.

[0179] Referring to Figure 8 In the display region AA, a plurality of bank portions BNK can be positioned on the fourth organic insulating layer 115d. The plurality of BNKs can respectively overlap with the plurality of sub-pixels. One or more micro light emitting LEDs ED emitting light of the same color can be positioned above each of the plurality of BNKs.

[0180] The plurality of signal wirings TL can be disposed on the fourth organic insulating layer 115d in the display region AA. The plurality of signal wirings TL can be disposed in a region between the plurality of bank portions BNK. For example, the plurality of signal wirings TL can be disposed adjacent to any one of the plurality of bank portions BNK.

[0181] The plurality of contact electrodes CCE can be positioned on the third organic insulating layer 115c in the display region AA. The plurality of contact electrodes CCE can supply a cathode voltage from the pixel driving circuit PD to the second electrode CE2.

[0182] The first electrode CE1 can be positioned on the bank portion BNK. For example, the first electrode CE1 can extend from the adjacent signal wiring TL toward the top of the bank portion BNK. The first electrode CE1 can be positioned on the top surface and the side surface of the bank portion BNK. For example, the first electrode CE1 can extend from the signal wiring TL on the top surface of the third organic insulating layer 115c to the side surface of the bank portion BNK and the top surface of the bank portion BNK.

[0183] Referring to Figure 8 and 9 The first electrode CE1 can be composed of a plurality of conductive layers. For example, the first electrode CE1 can include a first conductive layer CE1a, a second conductive layer CE1b, a third conductive layer CE1c, and a fourth conductive layer CE1d, but the example embodiment of the present disclosure is not limited thereto.

[0184] The first conductive layer CE1a can be located on the bank BNK. The second conductive layer CE1b can be located on the first conductive layer CE1a. The third conductive layer CE1c can be located on the second conductive layer CE1b. The fourth conductive layer CE1d can be located on the third conductive layer CE1c. For example, each of the first conductive layer CE1a, the second conductive layer CE1b, the third conductive layer CE1c, and the fourth conductive layer CE1d can be made of titanium (Ti), molybdenum (Mo), aluminum (Al), or titanium (Ti) and indium tin oxide (ITO), but exemplary embodiments of the present disclosure are not limited thereto.

[0185] According to the present disclosure, among the plurality of conductive layers constituting the first electrode CE1, some conductive layers having a high reflection efficiency can be configured as an alignment key for aligning the micro-LED ED and / or a reflection plate.

[0186] For example, in order to configure the second conductive layer CE1b as a reflection plate, the third conductive layer CE1c and the fourth conductive layer CE1d covering the second conductive layer CE1b can be partially removed or etched. For example, portions of the third conductive layer CE1c and the fourth conductive layer CE1d located on the bank BNK can be removed or etched to expose the top surface of the second conductive layer CE1b. For example, in the third conductive layer CE1c and the fourth conductive layer CE1d, a central portion where the solder pattern SDP is located and a boundary portion (or an edge portion) can be left, and the remaining portion can be removed. For example, the boundary portion (or the edge portion) of each of the third conductive layer CE1c formed of titanium (Ti) and the fourth conductive layer CE1d formed of indium tin oxide (ITO) can not be etched. Accordingly, it can be possible to prevent another conductive layer of the first electrode CE1 from being corroded by a tetramethylammonium hydroxide (TMAH) solution used in a masking process of the first electrode CE1.

[0187] According to the present disclosure, the first conductive layer CE1a and the third conductive layer CE1c can be made of titanium (Ti) or molybdenum (Mo). The second conductive layer CE1b can be made of aluminum (Al). The fourth conductive layer CE1d can include a transparent conductive oxide layer, such as indium tin oxide (ITO) or indium zinc oxide (IZO), which has good adhesion to the solder pattern SDP and exhibits corrosion resistance and acid resistance. However, exemplary embodiments of the present disclosure are not limited thereto.

[0188] The first conductive layer CE1a, the second conductive layer CE1b, the third conductive layer CE1c, and the fourth conductive layer CE1d can be sequentially deposited and then patterned through a photolithography process and an etching process, but exemplary embodiments of the present disclosure are not limited thereto.

[0189] According to this disclosure, the signal wiring TL, contact electrode CCE, and pad electrode PE located in the same layer as the first electrode CE1 can be composed of multiple layers of conductive material, but the exemplary embodiments of this disclosure are not limited thereto. For example, the signal wiring TL, contact electrode CCE, and pad electrode PE can be formed from multiple layers of indium tin oxide (ITO) / titanium (Ti) / aluminum (Al) / titanium (Ti), but the exemplary embodiments of this disclosure are not limited thereto.

[0190] According to this disclosure, a solder pattern SDP can be located on a first electrode CE1 in each of a plurality of sub-pixels. The solder pattern SDP can bond a micro-LED ED to the first electrode CE1 to electrically connect the first electrode CE1 to the micro-LED ED. For example, the first electrode CE1 and the anode electrode 134 of the micro-LED ED can be electrically connected to each other using a eutectic bond of the solder pattern SDP, but exemplary embodiments of this disclosure are not limited thereto. For example, when the solder pattern SDP is made of indium (In) and the anode electrode 134 of the micro-LED ED is made of gold (Au), the solder pattern SDP and the anode electrode 134 can be bonded by applying heat and pressure during the transfer process of the micro-LED ED. Through eutectic bonding, the micro-LED ED can be bonded to the solder pattern SDP and the first electrode CE1 without the need for a separate adhesive material. For example, the solder pattern SDP can be made of indium (In), tin (Sn), or alloys thereof, but exemplary embodiments of this disclosure are not limited thereto. For example, the solder pattern SDP can be a bonding pad or a bonding pad, but exemplary embodiments of this disclosure are not limited thereto.

[0191] In addition, refer to Figure 8 The second insulating layer 116 can be disposed on the fourth organic insulating layer 115d, which includes the first electrode CE1 and the embankment BNK. For example, the second insulating layer 116 can be disposed in the entire display area AA and the non-display area NA.

[0192] For example, to prevent moisture from penetrating from the non-display area NA, the second insulating layer 116 may be provided only in the display area AA. This disclosure is not limited thereto.

[0193] Furthermore, the second insulating layer 116 can be formed from a single layer or multiple layers of silicon oxide (SiOx) or silicon nitride (SiNx) as inorganic film materials. For example, the second insulating layer 116 can be formed by a single layer or multiple layers of inorganic film. For example, the single layer of inorganic film can be a silicon oxide (SiOx) film or a silicon nitride (SiNx) film, while the multiple layers of inorganic film can be formed by alternately stacking one or more layers of silicon oxide (SiOx) film, one or more layers of silicon nitride (SiNx) film and one or more layers of amorphous silicon (a-Si). However, the exemplary embodiments of this disclosure are not limited thereto.

[0194] According to the disclosure, the second insulating layer 116 serving as a passivation layer can be disposed on the plurality of signal wirings TL, the plurality of first electrodes CE1, the plurality of contact electrodes CCE, and the third organic insulating layer 115c.

[0195] For example, the second insulating layer 116 can be located in the display area AA, the first non-display area NA1, and the second non-display area NA2. A portion of the second insulating layer 116 located in the bending area BA can be removed. In the second non-display area NA2, a portion of the second insulating layer 116 covering the plurality of pad electrodes PE can be removed. Since the second insulating layer 116 is positioned to cover the remaining area except for the bending area BA and the area in which the plurality of pad electrodes PE and the solder pattern SDP are positioned, moisture or impurities can be reduced from penetrating into the micro LED ED. For example, the second insulating layer 116 can be composed of a single layer or multiple layers of silicon oxide (SiOx) or silicon nitride (SiNx), but exemplary embodiments of the disclosure are not limited thereto.

[0196] In each of the plurality of sub-pixels, the micro LED can be located on the solder pattern SDP. The first micro LED 130 can be located in the first sub-pixel SP1. The second micro LED 140 can be located in the second sub-pixel SP2. The third micro LED 150 can be located in the third sub-pixel SP3.

[0197] The micro LED ED can be formed on a silicon wafer using a method such as metal organic chemical vapor deposition (MOCVD), chemical vapor deposition (CVD), plasma-enhanced chemical vapor deposition (PECVD), molecular beam epitaxy (MBE), hydride vapor phase epitaxy (HVPE), or sputtering, but exemplary embodiments of the disclosure are not limited thereto.

[0198] Referring to Figure 8 and Figure 9 The first micro LED 130 can include an anode electrode 134, a first semiconductor layer 131, an active layer 132, a second semiconductor layer 133, a cathode electrode 135, and an encapsulation layer 136, but exemplary embodiments of the disclosure are not limited thereto. For example, the first micro LED 130 can not include the encapsulation layer 136.

[0199] The first semiconductor layer 131 can be disposed on the solder pattern SDP. The second semiconductor layer 133 can be disposed on the first semiconductor layer 131.

[0200] For example, one of the first semiconductor layer 131 and the second semiconductor layer 133 can be implemented as a compound semiconductor of Group III-V or Group II-VI, and can be doped with an impurity (or a dopant). For example, one of the first semiconductor layer 131 and the second semiconductor layer 133 can be a semiconductor layer doped with an n-type impurity, and the other can be a semiconductor layer doped with a p-type impurity, but exemplary embodiments of the present disclosure are not limited thereto. For example, at least one of the first semiconductor layer 131 and the second semiconductor layer 133 can be a layer in which an n-type or a p-type impurity is doped into a material such as gallium nitride (GaN), gallium phosphide (GaP), gallium arsenide phosphide (GaAsP), aluminum indium phosphide (AlGaInP), indium aluminum phosphide (InAlP), aluminum gallium nitride (AlGaN), aluminum indium nitride (AlInN), aluminum indium gallium nitride (AlInGaN), gallium aluminum arsenide (AlGaAs), or gallium arsenide (GaAs), but exemplary embodiments of the present disclosure are not limited thereto.

[0201] The active layer 132 can be located between the first semiconductor layer 131 and the second semiconductor layer 133. The active layer 132 can emit light by receiving holes and electrons from the first semiconductor layer 131 and the second semiconductor layer 133. For example, the active layer 132 can be configured as one of a single-well structure, a multi-well structure, a single quantum well structure, a multi-quantum well (MQW) structure, a quantum dot structure, and a quantum wire structure, but exemplary embodiments of the present disclosure are not limited thereto. For example, the active layer 132 can be made of indium gallium nitride (InGaN) or gallium nitride (GaN), but exemplary embodiments of the present disclosure are not limited thereto.

[0202] For another example, the active layer 132 can include a well layer and a multi-quantum well (MQW) structure having a barrier layer having a band gap higher than that of the well layer. For example, the active layer 132 can include InGaN as a well layer and an AlGaN layer as a barrier layer, but exemplary embodiments of the present disclosure are not limited thereto.

[0203] The anode electrode 134 can be disposed between the first semiconductor layer 131 and the solder pattern SDP. For example, the anode electrode 134 can electrically connect the first semiconductor layer 131 to the first electrode CE1. An anode voltage output from the pixel driving circuit PD can be applied to the first semiconductor layer 131 through the signal wiring TL, the first electrode CE1, and the anode electrode 134. For example, the anode electrode 134 can be formed of a conductive material capable of being eutectically bonded with the solder pattern SDP. For example, the anode electrode 134 can be made of gold (Au), tin (Sn), tungsten (W), silicon (Si), silver (Ag), titanium (Ti), iridium (Ir), chromium (Cr), indium (In), zinc (Zn), lead (Pb), nickel (Ni), platinum (Pt), and copper (Cu), or an alloy thereof, but exemplary embodiments of the present disclosure are not limited thereto.

[0204] The cathode electrode 135 can be located on the second semiconductor layer 133. For example, the cathode electrode 135 can electrically connect the second semiconductor layer 133 to the second electrode CE2. A cathode voltage output from the pixel driving circuit PD can be applied to the second semiconductor layer 133 through the contact electrode CCE, the second electrode CE2, and the cathode electrode 135. The cathode electrode 135 can be formed of a transparent conductive material so that light emitted from the micro LED ED can be directed to the upper side of the micro LED ED, but exemplary embodiments of the present disclosure are not limited thereto. For example, the cathode electrode 135 can be formed of a material such as indium tin oxide (ITO), indium zinc oxide (IZO), or indium gallium zinc oxide (IGZO), but exemplary embodiments of the present disclosure are not limited thereto.

[0205] The encapsulation layer 136 can be located on at least a portion of the first semiconductor layer 131, the active layer 132, the second semiconductor layer 133, the anode electrode 134, and the cathode electrode 135. For example, the encapsulation layer 136 can surround at least a portion of the first semiconductor layer 131, the active layer 132, the second semiconductor layer 133, the anode electrode 134, and the cathode electrode 135.

[0206] For example, the encapsulation layer 136 can be disposed on at least a portion of the anode electrode 134 and the cathode electrode 135, for example, on an edge portion (or edge part or one side) of the anode electrode 134 and an edge portion (or edge part or one side) of the cathode electrode 135. At least a portion of the anode electrode 134 can be exposed from the encapsulation layer 136 to connect the anode electrode 134 and the solder pattern SDP. For example, at least a portion of the cathode electrode 135 can be exposed from the encapsulation layer 136 to connect the cathode electrode 135 and the second electrode CE2. For example, the encapsulation layer 136 can be formed of an insulating material such as silicon nitride (SiNx) or silicon oxide (SiOx), for example, the encapsulation layer 136 can be formed by a single layer or a plurality of layers of inorganic films, for example, a single layer of inorganic films can be a silicon oxide (SiOx) film or a silicon nitride (SiNx) film, and a plurality of layers of inorganic films can be formed by alternately stacking one or more layers of a silicon oxide (SiOx) film, one or more layers of a silicon nitride (SiNx) film, and one or more layers of amorphous silicon (a-Si), but exemplary embodiments of the present disclosure are not limited thereto.

[0207] As another example, the encapsulation layer 136 can have a structure in which a reflective material is dispersed in a resin layer, but exemplary embodiments of the present disclosure are not limited thereto. For example, the encapsulation layer 136 can be manufactured as a reflector having various structures, but exemplary embodiments of the present disclosure are not limited thereto. Light emitted from the active layer 132 by the encapsulation layer 136 can be reflected upward to improve light extraction efficiency. For example, the encapsulation layer 136 can be a reflective layer, but exemplary embodiments of the present disclosure are not limited thereto.

[0208] Although the light emitting device ED has been described as a vertical type structure according to the present disclosure, exemplary embodiments of the present disclosure are not limited thereto. For example, the light emitting device ED can have a lateral STA structure or a flip chip STA structure.

[0209] Although the first light emitting device 130 has been described with reference to Figure 9 The second light emitting device 140 and the third light emitting device 150 can have substantially the same structure as the first light emitting device 130. For example, the first semiconductor layer 131, the active layer 132, the second semiconductor layer 133, the anode electrode 134, the cathode electrode 135, and the encapsulation layer 136 of the second light emitting device 140 and the third light emitting device 150 can be substantially the same as the first semiconductor layer 131, the active layer 132, the second semiconductor layer 133, the anode electrode 134, the cathode electrode 135, and the encapsulation layer 136 of the first light emitting device 130.

[0210] According to the disclosure, the first optical layer 117a can be located on the second insulating layer 116 to surround the plurality of micro-LEDs ED in the display area AA. For example, the first optical layer 117a can be positioned to cover the plurality of micro-LEDs ED and the bank BNK in the area of the plurality of sub-pixels. For example, the first optical layer 117a can cover the bank BNK, a portion of the second insulating layer 116, and a space between the plurality of micro-LEDs ED. The first optical layer 117a can be located between the plurality of banks BNK and the plurality of micro-LEDs ED included in one pixel PX, or can cover the spaces. For example, the first optical layer 117a can extend in the first direction X and can be separated in the second direction y. For example, the first optical layer 117a can be located between the second insulating layer 116 and the second electrode CE2 to surround the side of the micro-LED ED and the bank BNK, but the exemplary embodiments of the disclosure are not limited thereto. For example, the first optical layer 117a can be a diffusion layer, a sidewall diffusion layer, or the like, but the exemplary embodiments of the disclosure are not limited thereto.

[0211] The first optical layer 117a can be formed of an organic insulating material in which fine particles are dispersed, but the exemplary embodiments of the disclosure are not limited thereto. For example, the first optical layer 117a can be made of silicone in which fine metal particles such as titanium dioxide (TiO2) particles are dispersed, but the exemplary embodiments of the disclosure are not limited thereto. Light from the plurality of micro-LEDs ED can be scattered by the fine particles dispersed in the first optical layer 117a and emitted to the outside of the display device 1000. Accordingly, the first optical layer 117a can improve the light extraction efficiency of light emitted from the plurality of micro-LEDs ED.

[0212] For example, the first optical layer 117a can be located in each of the plurality of pixels PX, or can be commonly located in some pixels PX arranged in the same row, but the exemplary embodiments of the disclosure are not limited thereto. For example, the first optical layer 117a can be located in each of the plurality of pixels PX, or a single first optical layer 117a can be shared by the plurality of pixels PX. In another example, each of the plurality of sub-pixels can include the first optical layer 117a, respectively, but the exemplary embodiments of the disclosure are not limited thereto.

[0213] According to the disclosure, the second optical layer 117b can be disposed on the second insulating layer 116 in the display area AA. For example, the second optical layer 117b can be disposed to surround the first optical layer 117a. For example, the second optical layer 117b can be in contact with the side surface of the first optical layer 117a. For example, the second optical layer 117b can be disposed in an area between the plurality of pixels PX. However, the exemplary embodiments of the disclosure are not limited thereto, for example, the second optical layer 117b can be a diffusion layer, a diffusion layer window, a window diffusion layer, etc., but the exemplary embodiments of the disclosure are not limited thereto.

[0214] The second optical layer 117b can be formed of an organic insulating material, but the exemplary embodiments of the disclosure are not limited thereto. The second optical layer 117b can be formed of the same material as the first optical layer 117a, but the exemplary embodiments of the disclosure are not limited thereto. For example, the first optical layer 117a can include fine particles, and the second optical layer 117b can not include fine particles. For example, the second optical layer 117b can be formed of silicone, but the exemplary embodiments of the disclosure are not limited thereto.

[0215] For example, the thickness of the first optical layer 117a can be less than the thickness of the second optical layer 117b, but the exemplary embodiments of the disclosure are not limited thereto. Accordingly, when viewed in a plan view, the area in which the first optical layer 117a is disposed can include a recessed portion recessed inward from the upper surface of the second optical layer 117b.

[0216] According to the disclosure, the second electrode CE2 can be disposed on the first optical layer 117a and the second optical layer 117b. For example, the second electrode CE2 can be electrically connected to the plurality of contact electrodes CCE through the contact hole of the second optical layer 117b. For example, the second electrode CE2 can be disposed on the plurality of light emitting devices ED. For example, the second electrode CE2 can include a transparent conductive oxide such as indium tin oxide (ITO) or indium zinc oxide (IZO), but the exemplary embodiments of the disclosure are not limited thereto. For example, the second electrode CE2 can be disposed to be in contact with the cathode electrode 135. For example, the second electrode CE2 can overlap the first optical layer 117a. For example, the outer plane of the first optical layer 117a can be covered. The second electrode CE2 can continuously extend in the first direction X of the substrate 110.

[0217] Accordingly, the substrate 110 can be commonly connected to the plurality of pixels PX arranged in the first direction X. For example, the second electrode CE2 can be commonly connected to the plurality of pixels PX.

[0218] According to the disclosure, the second electrode CE2 can continuously extend on the first optical layer 117a, the second optical layer 117b, and the light emitting device ED. The area in which the first optical layer 117a is disposed can include a recessed portion recessed inward from an upper surface of the second optical layer 117b. Thus, since a first portion of the second electrode CE2 disposed on the first optical layer 117a is disposed along the recessed portion, the first portion can be disposed at a lower position than a second portion of the second electrode CE2 disposed on the second optical layer 117b.

[0219] Further, a third insulating layer (not shown) can be disposed on the second electrode CE2 and the first optical layer 117a. For example, the third insulating layer (not shown) can be disposed in the entire display area AA and the non-display area NA. For example, the third insulating layer (not shown) can be formed of a single layer or multiple layers of silicon oxide (SiOx) or silicon nitride (SiNx) as an inorganic film material, but exemplary embodiments of the disclosure are not limited thereto.

[0220] For example, in order to prevent moisture from penetrating from the non-display area NA, the third insulating layer (not shown) can be disposed only in the display area AA. However, the disclosure is not limited thereto.

[0221] The third optical layer 117c can be disposed to overlap the plurality of light emitting devices ED and the first optical layer 117a. Since the third optical layer 117c is disposed on the second electrode CE2 and the plurality of light emitting devices ED, a stain (clouding / Mura) that can occur in some of the plurality of light emitting devices ED can be improved. For example, when the plurality of light emitting devices ED are transferred onto the substrate 110 of the display device 1000, due to process variation or the like, a region in which a gap between the plurality of light emitting devices ED is not uniform can occur. When the gap between the plurality of light emitting devices ED is not uniform, a light emitting region of each of the plurality of light emitting devices ED can be disposed non-uniformly, and thus a user can visually recognize a stain (Mura).

[0222] Thus, since the third optical layer 117c configured to uniformly diffuse light on the plurality of light emitting devices ED is configured, light emitted from some of the plurality of light emitting devices ED can be reduced in being visually recognized as a stain.

[0223] Thus, since light emitted from the plurality of light emitting devices ED is uniformly diffused by the third optical layer 117c and extracted to the outside of the display device 1000, luminance uniformity of the display device 1000 can be improved.

[0224] The third optical layer 117c can be formed of an organic insulating material in which fine particles are dispersed, but exemplary embodiments of the present disclosure are not limited thereto. For example, the third optical layer 117c can be formed of silicone in which fine metal particles such as titanium dioxide (TiO2) particles are dispersed, but exemplary embodiments of the present disclosure are not limited thereto. For example, the third optical layer 117c can be formed of the same material as the first optical layer 117a, but exemplary embodiments of the present disclosure are not limited thereto. For example, the third optical layer 117c can be a diffusion layer, an upper diffusion layer, or the like, but exemplary embodiments of the present disclosure are not limited thereto.

[0225] According to the present disclosure, light from the plurality of light emitting devices ED can be scattered by the fine particles dispersed in the third optical layer 117c and emitted to the outside of the display device 1000. The third optical layer 117c can uniformly mix light emitted from the plurality of light emitting devices ED to further improve the brightness uniformity of the display device 1000. In addition, the light extraction efficiency of the display device 1000 can be improved by light scattered from the plurality of fine particles, and thus the display device 1000 can be driven with low power.

[0226] In the display area AA, the black matrix BM can be disposed on the second electrode CE2, the first optical layer 117a, the second optical layer 117b, the third optical layer 117c, and the fourth stop layer 118. For example, the black matrix BM can fill the contact hole of the second optical layer 117b. Since the black matrix BM is configured to cover the display area AA, color mixing of the plurality of sub-pixels and reflection of external light can be reduced. For example, since the black matrix BM is disposed in the contact hole in which the second electrode CE2 is connected to the contact electrode CCE, light leakage between the plurality of adjacent sub-pixels can be prevented.

[0227] For example, the black matrix BM can be formed of an opaque material, but exemplary embodiments of the present disclosure are not limited thereto. For example, the black matrix BM can be an organic insulating material to which a black pigment or a black dye is added, for example, the black matrix BM can be formed of an organic layer such as an acrylic-based material, an epoxy-based material, a phenol-based material, a polyamide-based material, or a polyimide-based material to which a black pigment or a black dye is added, but exemplary embodiments of the present disclosure are not limited thereto.

[0228] In the display area AA, Figure 8A cover layer 119 can be disposed on the black matrix BM. The cover layer 119 can protect elements under the third insulating layer, for example, the cover layer 119 can be formed of an organic insulating material, but exemplary embodiments of the present disclosure are not limited thereto. For example, the cover layer 119 can be formed of a photoresist, a polyimide (PI), a photoacryl material, or the like, but exemplary embodiments of the present disclosure are not limited thereto. For example, the cover layer 119 can be an overcoat layer, an insulating layer, or the like, but exemplary embodiments of the present disclosure are not limited thereto.

[0229] As shown in FIG. 29, a polarizing layer 293 can be disposed on the cover layer 119 by a first adhesive layer 291. A cover member 120 can be disposed on the polarizing layer 293 via a second adhesive layer 295. For example, the first adhesive layer 291 and the second adhesive layer 295 can include an optical clear adhesive (OCA), an optical clear resin (OCR), a pressure sensitive adhesive (PSA), or the like, but exemplary embodiments of the present disclosure are not limited thereto. Figure 1

[0230] According to the present disclosure, a plurality of pad electrodes PE can be disposed on the fourth organic insulating layer 115d in the second non-display area NA2. For example, at least a portion of the plurality of pad electrodes PE can be exposed from the second insulating layer 116. For example, the plurality of pad electrodes PE can be electrically connected to the 2-4 connection wiring 122d through a contact hole of the fourth organic insulating layer 115d.

[0231] An adhesive layer (not shown) can be disposed on the plurality of pad electrodes PE. The adhesive layer can be an adhesive layer in which conductive balls are dispersed in an insulating material, but exemplary embodiments of the present disclosure are not limited thereto. When heat or pressure is applied to the adhesive layer, the conductive balls can be electrically connected to a portion to which heat or pressure is applied to have a conductive characteristic. The adhesive layer can be disposed between the plurality of pad electrodes PE and the flexible circuit board (or flexible film) CB to attach or bond the flexible circuit board (or flexible film) CB to the plurality of pad electrodes PE. For example, the adhesive layer can be an anisotropic conductive film (ACF), but exemplary embodiments of the present disclosure are not limited thereto.

[0232] The flexible circuit board (or flexible film) CB can be disposed on the adhesive layer. The flexible circuit board (or flexible film) CB can be electrically connected to the plurality of pad electrodes PE through the adhesive layer. Accordingly, signals output from the flexible circuit board (or flexible film) CB and the printed circuit board can be transmitted to the pixel driving circuit PD of the display area AA through the plurality of pad electrodes PE, the 2-4 connection wiring 122d, the 2-3 connection wiring 122c, the 2-2 connection wiring 122b, and the 2-1 connection wiring 122a.

[0233] Figure 10 ​is a perspective view showing a state in which the light emitting element chips of the display device according to an exemplary embodiment of the present disclosure are picked up. Figure 11 is a perspective view showing a state in which the light emitting element chips of the display device according to an exemplary embodiment of the present disclosure are transferred.

[0234] Referring to Figure 10 and 11 , in order to transfer a plurality of light emitting element chips 100 constituting a display device according to an exemplary embodiment of the present disclosure, a wafer 200 having a plurality of light emitting element chips 100, a light emitting element transfer stamp 500 for picking up and transferring the plurality of light emitting element chips 100, and a substrate 110 on which the plurality of light emitting element chips 100 are transferred to constitute a display panel can be provided.

[0235] The wafer 200 can be used as a substrate for growing the light emitting element chips 100, the light emitting element chips 100 are light emitting diode (LED) chips, and are formed of any one selected from silicon (Si), sapphire (Al2O3), silicon carbide (SiC), gallium arsenide (GaAs), gallium nitride (GaN), gallium phosphide (GaP), indium phosphide (InP), zinc oxide (ZnO), spinel (MgAl2O4), magnesium oxide (MgO), lithium aluminate (LiAlO2), aluminum nitride (AlN), and lithium gallate oxide (LiGaO2), but is not limited thereto.

[0236] A plurality of micro light emitting element chips 100 can be grown on the wafer 200. The light emitting element chips 100 are semiconductor elements that emit light energy of various wavelengths by applying an electrical signal using the characteristics of compound semiconductors. The light emitting element chips 100 can be provided to have a small thickness of several micrometers.

[0237] The plurality of light emitting element chips 100 can be arranged in parallel in one direction on the wafer 200. The interval between adjacent light emitting element chips 100 can be provided to have the smallest gap possible in the process. That is, in order to reduce the manufacturing cost of the wafer 200, it is preferable to integrate many light emitting element chips 100 on a small wafer 200.

[0238] The light emitting element transfer stamp 500 can be used as a transport device that transports the plurality of light emitting element chips 100 from the wafer 200 to the substrate 110. The light emitting element transfer stamp 500 can selectively pick up the plurality of light emitting element chips 100 from the wafer 200. The light emitting element transfer stamp 500 can selectively pick up the light emitting element chips 100 at a predetermined position and transfer the light emitting element chips 100 to one-to-one corresponding pixels on the substrate 110.

[0239] The substrate 110 is a substrate constituting a display device, and a plurality of pixels can be arranged thereon. An area in which a plurality of pixels are provided can be defined as a display area. At least one light emitting element chip 100 can be finally assigned to each of the plurality of pixels. On the substrate 110, a signal wiring and an electrode for applying a driving signal to the light emitting element chip 100 can be arranged. When implemented in an active matrix (AM) manner, the substrate 110 can further include a thin film transistor assigned to each pixel.

[0240] Referring to Figure 11 , the light emitting element chips 100 transferred onto the adjacent pixels can be arranged to be spaced apart from each other by a predetermined interval. The interval between the adjacent light emitting element chips 100 among the light emitting element chips 100 transferred onto the substrate 110 can be appropriately selected in consideration of display characteristics, element arrangement, or the like. The substrate 110 can be provided to have a relatively larger size than the light emitting element transfer stamp 500.

[0241] Specifically, the display area AA of the substrate 110 can be provided to have a larger area than the light emitting element transfer stamp 500. In this case, as Figure 11 indicated, in order to transfer the light emitting element chips 100 to all the pixels arranged in the display area AA, respectively, a plurality of pick-up / transfer operations corresponding to the area difference between the display area AA and the light emitting element transfer stamp 500 need to be repeatedly performed.

[0242] Further, the light emitting element transfer process using the light emitting element transfer stamp 500, for example, a plurality of transfer processes, can be performed not only on the display area AA but also on a dummy area (i.e., a display non-operation area) of the substrate 110. The present exemplary embodiment is not limited thereto.

[0243] Figure 12 is a plan view illustrating a transfer device in a display device according to an exemplary embodiment of the present disclosure.

[0244] Referring to Figure 12 , the transfer device 800 of the display device according to the exemplary embodiment of the present disclosure can include a wafer loader 210 loading a wafer 200, a stamp 500 picking up a plurality of light emitting element chips provided on the wafer 200, a stamp loader 550 loading the stamp 500 to be mounted on a transfer head 520, and the transfer head 520 moving the stamp 500 to be positioned on the wafer 200 to mount the plurality of light emitting element chips by mounting the stamp 500, or moving the stamp 500 to be positioned on the substrate 110 to transfer the plurality of picked-up light emitting element chips. The present exemplary embodiment is not limited thereto.

[0245] Further, the transfer device 800 can include an image detector 600 disposed at a predetermined distance below the stamp 500 to check whether there are defective light emitting element chips 100a among the plurality of light emitting element chips 100 picked up from the wafer 200, and a chip removing system 700 which separates and removes the plurality of light emitting element chips 100a and 100b picked up by the stamp 500 from the pickup unit 510 of the stamp 500, which are captured by the image detector 600. Here, the light emitting element chips 100 can include defective picked-up chips 100a and normal picked-up chips 100b.

[0246] The transfer device 800 can include a substrate stage 400 on which the substrate 110 is loaded and positioned to transfer the plurality of light emitting element chips 100 picked up by the stamp 500.

[0247] The wafer 200 can be moved forward by the wafer loader 210 while being seated on the wafer loader 210 and located on a transfer track 530 on which the transfer head 520 moves. Further, after the plurality of light emitting element chips located on the wafer 200 are picked up by the stamp 500 while being positioned on the transfer track 530, the wafer 200 can be returned to its original position by the wafer loader 210.

[0248] The stamp 500 can be mounted on the transfer head 520 while moving on the transfer track 530 by the stamp loader 550. The stamp 500 mounted in this way can be moved by the transfer head 520 and positioned above the wafer 200 located on the transfer track 530. Further, the plurality of light emitting element chips 100 located on the wafer 200 are picked up by the pickup unit 510 disposed on the lower surface of the stamp 500.

[0249] In addition, the image detector 600 can be provided with a camera (not shown) capable of capturing an image of the plurality of light emitting element chips 100 picked up by the pickup unit 510 disposed on the lower surface of the stamp 500. The present exemplary embodiment is not limited thereto. The image detector 600 can detect the state of the plurality of light emitting element chips 100 captured by the camera.

[0250] For example, the image detector 600 can detect a defective pick-up chip 100a that is weakly attached to the pick-up unit 510 by static electricity or is captured between the pick-up units 510, and a normal pick-up chip 100b that is normally picked up by the pick-up unit 510, among the captured light emitting element chips 100. In this way, through the capturing of the camera of the image detector 600, it can be identified whether the light emitting element chips 100 picked up by the pick-up units 510 of the stamp 500 are the defective pick-up chip 100a or the normal pick-up chip 100b. In this case, when at least one of the picked-up light emitting element chips 100 is the defective light emitting element chip 100a, all of the light emitting element chips 100 picked up by the pick-up units 510 of the stamp 500 can be removed through the removing process of the chip removing system 700.

[0251] On the other hand, when there is no defective light emitting element chip 100a among the picked-up light emitting element chips 100, it can be determined that all of the light emitting element chips 100 picked up by the pick-up units 510 of the stamp 500 are the normal pick-up chip 100b.

[0252] Accordingly, the transfer head 520 can directly move the stamp 500 by the transfer head 520 to be positioned above the substrate 110 without moving the stamp 500 to the chip removing system 700. The stamp 500 can transfer the normal pick-up chip 100b picked up by the pick-up units 510 onto the substrate 110.

[0253] The transfer head 520 can position the stamp 500 on the wafer 200 to pick up a plurality of light emitting element chips 100 located on the wafer 200 by moving the stamp 500 back and forth on the transfer track. Further, when the plurality of picked-up light emitting element chips 100 are the normal pick-up chip 100b, the transfer head 520 can move the stamp 500 to be positioned above the substrate 110 so that the normal pick-up chip 100b can be transferred onto the substrate 110 by the stamp 500.

[0254] Alternatively, when some of the plurality of light emitting element chips 100 picked up by the pick-up units 510 of the stamp 500 are the defective pick-up chip 100a, the transfer head 520 can move the stamp 500 toward the chip removing system 700 to remove all of the defective pick-up chip 100a and the normal pick-up chip 100b picked up by the pick-up units 510 of the stamp 500.

[0255] Further, while the plurality of light emitting element chips 100 are picked up from the wafer 200 by the pickup units 510 of the stamp 500, the transfer head 520 can move the stamp 500 to a position where the image detector 600 is disposed to check whether the plurality of light emitting element chips 100 are defective. If there are some defective pickup chips 100a among the plurality of light emitting element chips 100, the transfer head 520 can move the stamp 500 toward the chip removal system 700 to remove all of the defective pickup chips 100a and the normal pickup chips 100b picked up by the pickup units 510 of the stamp 500, but is not limited thereto.

[0256] The substrate 110 can be seated on the substrate stage 400 such that the plurality of picked normal pickup chips 100b can be transferred onto the substrate 110 by the stamp 500. For example, while the plurality of light emitting element chips 100 are picked up from the wafer 200 by the pickup units 510 of the stamp 500, the transfer head 520 can move the stamp 500 to a position where the image detector 600 is disposed to check whether the plurality of light emitting element chips 100 are defective. When the plurality of picked light emitting element chips 100 are all normal pickup chips 100b, the transfer head 520 can move the stamp 500 to be positioned above the substrate 110 such that the normal pickup chips 100b can be transferred onto the substrate 110 by the stamp 500.

[0257] In the transfer apparatus 800, the stamp 500 can be loaded on the transfer track 530 by the stamp loader 550 in a state where the wafer 200 is loaded on the transfer track 530 by the wafer loader 210. Further, while the stamp 500 loaded on the transfer track 530 is mounted, the transfer head 520 is moved to a position where the wafer 200 is positioned such that the stamp 500 is positioned on the wafer 200.

[0258] Further, the stamp 500 picks up the plurality of light emitting element chips 100 positioned on the wafer 200. The transfer head 520 moves the stamp 500 picking up the plurality of light emitting element chips 100 to a position where the image detector 600 is loaded.

[0259] Referring to Figure 12 , the chip removal system 700 can remove the defective pickup chips 100a by the electrostatic remover 720 (see Figure 13) toward the pickup unit 510. In this case, the plurality of ions come into contact with the pickup unit 510 as a charged target object to remove static electricity from the pickup unit 510, so that the plurality of defective pickup chips 100a and the plurality of normal pickup chips 100b attached to the pickup unit 510 having weak static electricity are separated from the pickup unit 510. In this way, not only the light emitting element chips 100 attached to the plurality of pickup units 510 by static electricity, but also the light emitting element chips 100 captured between the plurality of pickup units 510 or picked up in a misaligned manner can be separated from the pickup unit 510.

[0260] The chip removal system 700 can be provided with a light emitting element chip collector 750 (see Figure 13 ) to suction the light emitting element chips 100, e.g., the defective pickup chips 100a and the normal pickup chips 100b, separated from the pickup unit 510. For example, when there are some defective pickup chips 100a among the plurality of light emitting element chips 100, the transfer head 520 can move the stamp 500 toward the chip removal system 700, and the light emitting element chip collector 750 of the chip removal system 700 can suction the light emitting element chips 100 separated from the pickup unit 510 to remove all the defective pickup chips 100a and the normal pickup chips 100b picked up by the pickup unit 510 of the stamp 500.

[0261] Further, after the plurality of light emitting element chips 100 are removed from the chip removal system 700, the transfer head 520 moves the stamp 500 to a position where the wafer 200 is loaded on the transfer track 530 in order to re-pick up the plurality of light emitting element chips 100 located on the wafer 200.

[0262] The stamp 500 can re-pick up the plurality of light emitting element chips 100 located on the wafer 200 through the pickup unit 510.

[0263] The image detector 600 can check whether the plurality of picked light emitting element chips 100 are defective pickup chips 100a or normal pickup chips 100b.

[0264] Further, when it is confirmed that the plurality of picked light emitting element chips 100 are normal pickup chips 100b, the stamp 500 can transfer the normal pickup chips 100b onto the substrate 110 by the transfer head 520 while moving to a position where the substrate 110 is positioned.

[0265] Figure 13 FIG. 7 is a cross-sectional view illustrating a chip removal system of a transfer device in a display apparatus according to an exemplary embodiment of the present disclosure. Figure 14 FIG. 8 is a view illustrating an electrostatic remover of a chip removal system of a transfer device in a display apparatus according to an exemplary embodiment of the present disclosure. Figure 15is a view illustrating an ion generator of an electrostatic eliminator of a chip removal system of a transfer device in a display device according to an exemplary embodiment of the present disclosure. Figure 16 is a view illustrating an ion generator of an electrostatic eliminator of a chip removal system of a transfer device in a display device according to an exemplary embodiment of the present disclosure.

[0266] Referring to Figure 13 , the chip removal system 700 according to the present disclosure can include at least one electrostatic eliminator 720 and a light emitting element chip collector 750 located between the electrostatic eliminators 720 to aspirate and collect light emitting element chips 100, for example, defective pick-up chips 100a and normal pick-up chips 100b separated from the pick-up unit 510 of the stamp 500. For example, when there are some defective pick-up chips 100a among the plurality of light emitting element chips 100, the transfer head 520 can move the stamp 500 toward the chip removal system 700, and the electrostatic eliminators 720 and the light emitting element chip collector 750 of the chip removal system 700 can aspirate and collect the light emitting element chips 100 separated from the pick-up unit 510 to remove all the defective pick-up chips 100a and the normal pick-up chips 100b picked up by the pick-up unit 510 of the stamp 500. The present exemplary embodiment is not limited thereto.

[0267] Referring to Figure 14 , the electrostatic eliminator 720 can include an ion generator 730 and an ion blower 740 that blows ions 737 generated from the ion generator 730 toward the pick-up unit 510 of the stamp 500. The present exemplary embodiment is not limited thereto.

[0268] The electrostatic eliminator 720 including the ion generator 730 and the ion blower 740 can be installed obliquely below the stamp 500, and the ions 737 blown from the electrostatic eliminator 720 can be blown toward the entire surface of the stamp 500.

[0269] Referring to Figure 15 and 16 , the ion generator 730 can include a high-voltage power supply 732 and an electrode needle 734. The ion generator 730 applies a voltage to a tip 734a of the electrode needle 734 using power of the high-voltage power supply 732, and weak discharge called corona discharge occurs. When the corona discharge occurs, air around the electrode needle 734 becomes ions 737.

[0270] The ions 737 generated in this way can remove static electricity by coming into contact with the pickup units 510 of the stamp 500 that are charged target objects. For example, when the ions 737 move toward the pickup units 510 by the fan 742 in the ion blower 740, static electricity that keeps the light emitting element chips 100 (for example, the defective pickup chip 100a and the normal pickup chip 100b) in contact with the plurality of pickup units 510 can be removed so that the defective pickup chip 100a and the normal pickup chip 100b can be separated from the pickup units 510.

[0271] Figure 17 FIG. 7 is a perspective view illustrating a light emitting element chip collector and a stamp of a chip removing system of a transfer device in a display apparatus according to an exemplary embodiment of the present disclosure. Figure 18 FIG. 8 is a cross-sectional view illustrating a light emitting element chip collector of a chip removing system of a transfer device in a display apparatus according to an exemplary embodiment of the present disclosure. Figure 19 FIG. 9 is a perspective view illustrating a defective light emitting element suction unit of a chip removing system of a transfer device in a display apparatus according to an exemplary embodiment of the present disclosure. Figure 20 FIG. 10 is a cross-sectional view illustrating a light emitting element chip collector of a chip removing system of a transfer device in a display apparatus according to an exemplary embodiment of the present disclosure.

[0272] Referring to Figures 17 to 20 According to the present disclosure, the light emitting element chip collector 750 can include an air suction unit 752 disposed at an inner side of a lower portion thereof and having a predetermined space, a light emitting element chip seating unit 754 disposed at a position vertically spaced apart from the air suction unit 752 by a predetermined distance, and a light emitting element chip insertion unit 756 disposed at an inner side of an upper portion of the light emitting element chip collector 750. The present exemplary embodiment is not limited thereto.

[0273] The light emitting element chip collector 750 can have a structure in which the light emitting element chips 100 (for example, the defective pickup chip 100a and the normal pickup chip 100b removed from the pickup units 510 of the stamp 500 by the static electricity remover 720 of the chip removing system 700) are separated and collected.

[0274] In addition, the stamp 500 that picks up a plurality of light emitting element chips 100 can be positioned above the light emitting element chip collector 750.

[0275] Using a plurality of fans 752a in the air suction unit 752 of the light emitting element chip collector 750, the picked-up defective pickup chip 100a can be suctioned in a vacuum and safely fall on the mesh light emitting element chip seating unit 754 by the light emitting element chip insertion unit 756. The present exemplary embodiment is not limited thereto.

[0276] The light emitting device chip collector 750 can have an area equal to or greater than that of the stamp 500. For example, the light emitting device chip insertion unit 756 of the light emitting device chip collector 750 can have an area equal to or greater than that of the stamp 500. For example, in order to effectively suction and collect the defective pickup chip 100a and the normal pickup chip 100b separated from the stamp 500 into the light emitting device chip collector 750, the light emitting device chip insertion unit 756 of the light emitting device chip collector 750 can have an area equal to or greater than that of the stamp 500. The present exemplary embodiment is not limited thereto.

[0277] In addition, a plurality of fans 752a capable of suctioning air in the same manner as a vacuum cleaner can be provided in the air suction unit 752 of the light emitting device chip collector 750.

[0278] The light emitting device chip seating unit 754 can be formed to have a mesh structure and provided with holes smaller than the defective pickup chip 100a and the normal pickup chip 100b so that the defective pickup chip 100a and the normal pickup chip 100b can be separated from the stamp 500 and seated in the holes. For example, the light emitting device chip seating unit 754 can be formed to have a mesh structure and provided with a plurality of holes each of which is smaller than each of the defective pickup chip 100a and the normal pickup chip 100b so that each of the defective pickup chip 100a and the normal pickup chip 100b can be separated from the stamp 500 and seated in a corresponding hole of the plurality of holes, respectively. For example, when the defective pickup chip 100a and the normal pickup chip 100b pass through the light emitting device chip seating unit 754 and fall into the air suction unit 752 below the light emitting device chip seating unit 754, the suction function of the light emitting device chip can be weakened due to interference with the air suction operation of the air suction unit 752. Accordingly, the holes (not shown) of the light emitting device chip seating unit 754 can be formed to have a size corresponding to or smaller than the light emitting device chip 100 so that the defective pickup chip 100a and the normal pickup chip 100b can be separated from the stamp 500 and seated on the light emitting device chip seating unit 754. The present exemplary embodiment is not limited thereto.

[0279] Referring to Figure 18The separation distance between the pickup unit 510 of the stamp 500 and the light emitting element chip collector 750 can include the sum of the size H1 of the light emitting element chips 100a and 100b and the distance H2 between the light emitting element chips 100a and 100b and the upper end of the light emitting element chip collector 750. The distance between the pickup unit 510 and the upper end of the light emitting element chip collector 750 can be formed as the sum of the size H1 of the defective pickup chip 100a and the distance H2 of about 100 µm or more. However, the present exemplary embodiment is not limited thereto. For example, the distance from the surface of the pickup unit 510 of the stamp 500 to the upper end of the non-contact light emitting element chip collector 750 can be at least greater than the size H1 of each of the defective pickup chip 100a and the normal pickup chip 100b. The present exemplary embodiment is not limited thereto. For example, the maximum safe distance between the pickup unit 510 and the light emitting element chip collector 750 can be set only to a distance that facilitates removal of the defective pickup chip 100a. The present exemplary embodiment is not limited thereto.

[0280] Further, referring to Figures 17 to 20 The position of the light emitting element chip removal system 700 can be preferably located at a position spaced apart from the loader of the transfer device by a predetermined distance, since chip fragments of impurities or defects can be generated in the process of ion blowing and collection of the light emitting element chips.

[0281] Figure 21 FIG. 7 is a flowchart illustrating a normal chip transfer process of a transfer device in a display device according to an exemplary embodiment of the present disclosure. Figure 22A 、 Figure 22B and Figure 22C FIGS. 8A to 8C are cross-sectional views illustrating a defective chip removal process of a transfer device in a display device according to an exemplary embodiment of the present disclosure.

[0282] Referring to Figure 21 As a first operation S110, the wafer 200 can be positioned on the transfer track 530 on which the transfer head 520 moves forward, by the wafer loader 210 while being seated on the wafer loader 210.

[0283] Next, after the plurality of light emitting element chips located on the wafer 200 are picked up by the stamp 500, the wafer 200 can be returned to its original position by the wafer loader 210 while the wafer 200 is positioned on the transfer track 530.

[0284] Subsequently, after the stamp 500 is seated on the stamp loader 550 while moving on the transfer track 530, the stamp 500 can be seated on the transfer head 520.

[0285] Next, the mold 500 installed on the transfer head 520 can be moved by the transfer head 520 and positioned above the wafer 200 located on the transfer track 530.

[0286] In this case, the transfer head 520 can position the mold 500 on the wafer 200 so that the mold 500 is installed to pick up a plurality of light emitting element chips 100 located on the wafer 200 while moving back and forth on the transfer track 530, or position the mold 500 above the substrate 110 so that a plurality of picked up light emitting element chips 100 can be transferred to the substrate 110 through the mold 500 when it is a normal pick-up chip 100b. The present exemplary embodiment is not limited thereto.

[0287] Subsequently, the pick-up unit 510 provided on the lower surface of the mold 500 can pick up a plurality of light emitting element chips 100 located on the wafer 200.

[0288] Next, after picking up a plurality of light emitting element chips 100, the transfer head 520 can move the mold 500 to a position where the image detector 600 is located.

[0289] Subsequently, as a second operation S120, the image detector 600 can capture an image of a plurality of light emitting element chips 100 picked up by the pick-up unit 510 provided on the lower surface of the mold 500 using a camera. At this time, the image detector 600 can check the attachment state of a plurality of light emitting element chips 100 captured by the camera.

[0290] Next, as a third operation S130, the image detector 600 can detect whether a pick-up defective chip 100a is weakly attached to the pick-up unit 510 or caught between the pick-up units 510 due to static electricity between a plurality of captured light emitting element chips 100, and whether there is a normal pick-up chip 100b normally picked up by the pick-up unit 510.

[0291] Subsequently, when it is confirmed through the analysis of the image detector 600 that the light emitting element chips picked up by the pick-up unit 510 of the mold 500 are normal pick-up chips 100b, as provided in a fourth operation S140, the transfer head 520 can move the mold 500 toward the substrate stage 400 loaded with the substrate 110 without moving the mold 500 to the chip removal system 700.

[0292] Next, as a fifth operation S150, a transfer process of the normal picked chips 100b is completed by transferring the plurality of normal picked chips 100b picked by the picking unit 510 to the transfer positions of the substrates 110, respectively. For example, the substrates 110 can be seated on the substrate stage 400 so that the plurality of picked normal picked chips 100b can be transferred to the substrates 110 through the stamp 500. For example, while the plurality of light emitting element chips 100 are picked from the wafer 200 by the picking unit 510 of the stamp 500, the transfer head 520 can move the stamp 500 to a position where the image detector 600 is disposed to inspect whether the plurality of light emitting element chips 100 are defective. When the plurality of picked light emitting element chips 100 are all normal picked chips 100b, the transfer head 520 can move the stamp 500 to be positioned above the substrates 110 so that the normal picked chips 100b can be transferred to the substrates 110 through the stamp 500.

[0293] On the other hand, referring to the third operation S130 and Figure 22A In the sixth operation S160, when it is confirmed by the image detector 600 that some of the light emitting element chips 100 picked by the picking unit 510 of the stamp 500 are defective picked chips 100a, the transfer head 520 can move the stamp 500 toward the non-contact chip removing system 700.

[0294] Subsequently, the transfer head 520 can position the stamp 500 above the chip removing system 700.

[0295] Next, referring to the seventh operation S170 and Figure 22B The chip removing system 700 can blow the plurality of ions 737 toward the side surface of the picking unit 510 disposed on the stamp 500 through the electrostatic remover 720 and separate and remove the defective picked chips 100a and the normal picked chips 100b from the picking unit 510. For example, while the plurality of light emitting element chips 100 are picked from the wafer 200 by the picking unit 510 of the stamp 500, the transfer head 520 can move the stamp 500 to a position where the image detector 600 is disposed to inspect whether the plurality of light emitting element chips 100 are defective. If there are some defective picked chips 100a among the plurality of light emitting element chips 100, the transfer head 520 can move the stamp 500 toward the chip removing system 700 to remove all of the defective picked chips 100a and the normal picked chips 100b picked by the picking unit 510 of the stamp 500. In this case, since the plurality of ions 737 come into contact with the picking unit 510, which is a charged target object, to remove the electrostaticity of the picking unit 510, not only the plurality of defective picked chips 100a but also the plurality of normal picked chips 100b attached to the picking unit 510 due to weak electrostaticity are separated from the picking unit 510.

[0296] In this case, the defective pickup chips 100a and the normal pickup chips 100b separated from the pickup unit 510 can be sucked and collected by the light emitting element chip collector 750.

[0297] In this case, the defective pickup chips 100a and the normal pickup chips 100b separated from the pickup unit 510 can be sucked and collected by the light emitting element chip collector 750. Figure 22C In this case, the defective pickup chips 100a and the normal pickup chips 100b separated from the pickup unit 510 can be sucked and collected by the light emitting element chip collector 750.

[0298] The light emitting element chip collector 750 can include an air suction unit 752 having a space with a predetermined hole, a mesh light emitting element chip seating unit 754 located at a position vertically spaced apart from the air suction unit 752 by a predetermined distance, and a light emitting element chip insertion unit 756 on which the defective pickup chips 100a and the normal pickup chips 100b fall. The present exemplary embodiment is not limited thereto.

[0299] The light emitting element chip collector 750 can have a structure in which the light emitting element chips are separated and collected from the pickup unit 510 of the stamp 500 by the electrostatic remover 720 of the chip removal system 700.

[0300] In this case, the light emitting element chips 100a and 100b can be sucked in a vacuum using a plurality of fans 752a in the air suction unit 752 of the light emitting element chip collector 750 to safely fall on the mesh light emitting element chip seating unit 754 through the light emitting element chip insertion unit 756. The present exemplary embodiment is not limited thereto.

[0301] The light emitting element chip collector 750 can have an area equal to or greater than that of the stamp 500. For example, the light emitting element chip insertion unit 756 of the light emitting element chip collector 750 can have an area equal to or greater than that of the stamp 500. For example, in order to effectively suck and collect the defective pickup chips 100a and the normal pickup chips 100b separated from the stamp 500 into the light emitting element chip collector 750, the area of the light emitting element chip insertion unit 756 of the light emitting element chip collector 750 can be equal to or greater than that of the stamp 500. The present exemplary embodiment is not limited thereto.

[0302] The light emitting element chip seating unit 754 can be formed to have a mesh structure and provided with holes smaller than the defective pickup chip 100a and the normal pickup chip 100b so that the defective pickup chip 100a and the normal pickup chip 100b can be separated from the stamp 500 and seated in the holes. For example, the light emitting element chip seating unit 754 can be formed to have a mesh structure and provided with a plurality of holes each of which is smaller than each of the defective pickup chip 100a and the normal pickup chip 100b so that each of the defective pickup chip 100a and the normal pickup chip 100b can be separated from the stamp 500 and seated in a corresponding hole of the plurality of holes, respectively. For example, when the light emitting element chip 100 passes through the light emitting element chip seating unit 754 and falls into the air suction unit 752 below the light emitting element chip seating unit 754, the suction function of the defective pickup chip 100a and the normal pickup chip 100b cannot be effectively performed due to the interference of the air suction operation of the air suction unit 752.

[0303] Accordingly, the holes (not shown) of the light emitting element chip seating unit 754 can be formed to have a size corresponding to the defective pickup chip 100a and the normal pickup chip 100b or a size smaller than the defective pickup chip 100a and the normal pickup chip 100b so that the defective pickup chip 100a and the normal pickup chip 100b can be separated from the stamp 500 and seated on the light emitting element chip seating unit 754. The present exemplary embodiment is not limited thereto.

[0304] Subsequently, in a seventh operation S170, after the plurality of light emitting element chips 100a and 100b are removed from the chip removal system 700, the transfer head 520 moves the stamp 500 toward the transfer track 530 on which the wafer 200 is loaded, and the process of the first operation S110 is performed again.

[0305] For example, in a state in which the stamp 500 is located above the loaded wafer 200, the pickup unit 510 provided on the lower surface of the stamp 500 can pick up the plurality of light emitting element chips 100a and 100b located on the wafer 200 again.

[0306] Next, after the plurality of light emitting element chips 100 are picked up, the transfer head 520 can move the stamp 500 to a position at which the image detector 600 is loaded.

[0307] Subsequently, with reference to the second operation S120, the image detector 600 can capture an image of the plurality of light emitting element chips 100a and 100b picked up by the pickup unit 510 provided on the lower surface of the stamp 500 using a camera. In this case, the image detector 600 can check the attachment state of the plurality of light emitting element chips 100a and 100b captured by the camera.

[0308] Next, referring to a third operation S130, the image detector 600 can detect whether the defective pick-up chip 100a is weakly attached to the pick-up unit 510 or caught between the pick-up units 510 due to static electricity between the plurality of captured light emitting element chips 100a and 100b, and whether there is a normal pick-up chip 100b normally picked up by the pick-up unit 510.

[0309] Subsequently, when it is confirmed through the analysis of the image detector 600 that the light emitting element chip picked up by the pick-up unit 510 of the stamp 500 is the normal pick-up chip 100b, as provided in a fourth operation S140, the transfer head 520 can move the stamp 500 toward the substrate stage 400 loaded with the substrate 110 without moving the stamp 500 toward the chip removal system 700.

[0310] Next, as provided in a fifth operation S150, the transfer process of the normal pick-up chip 100b is completed by transferring the plurality of normal pick-up chips 100b picked up by the pick-up unit 510 of the stamp 500 to the transfer positions of the substrate 110, respectively.

[0311] The transfer apparatus for light emitting element chips and the pick-up control method can be applied to a mobile device, a video phone, a smart watch, a watch phone, a wearable device, a foldable device, a rollable device, a bendable device, a flexible device, a curved device, a sliding device, a variable device, an electronic notebook, an electronic book, a portable multimedia player (PMP), a personal digital assistant (PDA), an MP3 player, a mobile medical device, a desktop PC, a laptop PC, a netbook computer, a workstation, a navigation system, a vehicle display device, a theater display device, a television, a wallpaper device, a sign device, a game device, a laptop computer, a monitor, a camera, a camcorder, a home appliance, etc. Also, the display device according to one or more exemplary embodiments of the present disclosure can be applied to an organic light emitting display device or an inorganic light emitting display device.

[0312] In this way, according to the present disclosure, by installing a non-contact chip removal system to remove a defective chip in a light emitting element transfer apparatus, it is possible to reduce the possibility of damaging the stamp and increase the usage time of the stamp, thereby shortening the time of unnecessarily replacing the stamp.

[0313] According to the present disclosure, even when a camera erroneously detects a defective chip and / or a normal chip among light emitting element chips picked up by a pick-up portion of a stamp, it is possible to use a non-contact chip removal system to reduce the possibility of damaging components of the stamp.

[0314] According to the present disclosure, by installing a non-contact chip removal system in a light emitting element transfer device, it is possible to reduce the possibility of damaging the stamp and increase the use time of the stamp, thereby shortening the time for unnecessarily replacing the stamp.

[0315] According to the present disclosure, even when the camera erroneously detects a light emitting element chip picked up by the pickup portion of the stamp, it is possible to reduce the possibility of damaging the components of the stamp using a non-contact chip removal system.

[0316] Effects of the present disclosure are not limited to the above-mentioned effects, and those skilled in the art to which the present disclosure pertains will be able to clearly understand other effects not mentioned from the following description.

[0317] The light emitting element chip transfer device and the pickup control method according to various exemplary embodiments of the present disclosure can be described as follows.

[0318] The pickup control method for a light emitting element chip according to various exemplary embodiments of the present disclosure can include: a first operation of loading a plurality of stamps on a transfer head, transporting the transfer head to a first substrate, and picking up a plurality of light emitting element chips having the stamps; a second operation of transporting the transfer head with the stamps that picked up the light emitting element chips to a second substrate, and checking a pickup state of the light emitting element chips transported to the second substrate using an image detector located below the transfer head; a third operation of transporting the transfer head with the stamps that picked up the light emitting element chips toward a chip removal system when a pickup failure is detected from the light emitting element chips as a result of analyzing an image captured by the image detector; and a fourth operation of blowing ionized air toward the stamps from the chip removal system and removing the light emitting element chips from the stamps in a non-contact manner.

[0319] According to one exemplary embodiment of the present disclosure, the pickup control method can further include a fifth operation of transferring the light emitting element chips onto the second substrate when a pickup failure is not detected from the light emitting element chips in the third operation.

[0320] According to one exemplary embodiment of the present disclosure, the pickup control method can further include performing the first operation to the fifth operation by transporting the transfer head with the stamps from which the light emitting element chips are removed back to the first substrate in the fourth operation.

[0321] According to one example embodiment of the disclosure, the fourth operation of removing the light emitting element chips in a non-contact manner can include moving the stamps picking up the plurality of light emitting element chips to be positioned above the chip removing system; blowing ionized ions generated by an electrostatic remover of the chip removing system toward the pickup units of each of the stamps and removing electrostatic of the plurality of light emitting element chips picked up by the pickup units; and sucking the plurality of light emitting element chips separated by the electrostatic removal of the plurality of light emitting element chips by a light emitting element chip collector.

[0322] According to one example embodiment of the disclosure, the blowing of the ionized ions generated by the electrostatic remover toward the pickup units of each of the stamps can further include generating a plurality of ionized ions by an ion generator of the electrostatic remover; and blowing the plurality of ionized ions toward the pickup units of each of the stamps using a fan of an ion blower.

[0323] According to one example embodiment of the disclosure, the generating of the plurality of ionized ions by the ion generator of the electrostatic remover includes: applying a voltage to a tip of an electrode needle using power of a high-voltage power source by the ion generator, so that air around the electrode needle becomes the plurality of ionized ions.

[0324] According to one example embodiment of the disclosure, when a pickup failure is not detected from the light emitting element chip in the third operation, the fifth operation of transferring the light emitting element chip to the second substrate further includes: in a state in which the stamps picking up the plurality of light emitting element chips are moved to the second substrate, transferring the plurality of light emitting element chips picked up by the pickup units of each of the stamps to a transfer position of the second substrate using a transfer head.

[0325] According to one example embodiment of the disclosure, the image detector includes a camera.

[0326] A transfer apparatus according to various example embodiments of the disclosure can include: stamps picking up a plurality of light emitting element chips positioned on a first substrate and transferring the plurality of light emitting element chips to a second substrate; a transfer head transporting the stamps to perform the transferring and the picking up; an image detector checking a pickup state of the plurality of picked light emitting element chips; and a chip removing system removing a light emitting element chip when a pickup failure is detected from the light emitting element chip.

[0327] According to one example embodiment of the disclosure, the transfer apparatus further includes a stamp loader configured to load the stamps to be mounted on the transfer head.

[0328] According to one example embodiment of the disclosure, the transfer apparatus further includes a transfer track on which the stamp loader is positioned and on which the transfer head moves.

[0329] According to one exemplary embodiment of the present disclosure, the image detector can include a camera.

[0330] According to one exemplary embodiment of the present disclosure, the chip removing system can include at least one electrostatic remover and a light emitting element chip collector located below the stamp and sucking the light emitting element chips separated from the pickup unit of the stamp.

[0331] According to one exemplary embodiment of the present disclosure, the electrostatic remover can include an ion generator and an ion blower blowing ionized ions output from the ion generator toward the pickup unit of the stamp.

[0332] According to one exemplary embodiment of the present disclosure, the ion generator can include a high voltage power supply unit and an electrode chip.

[0333] According to one exemplary embodiment of the present disclosure, the ion blower can include a plurality of fans.

[0334] According to one exemplary embodiment of the present disclosure, the light emitting element chip collector can include an air suction unit, a light emitting element chip seating unit, and a light emitting element chip insertion unit.

[0335] According to one exemplary embodiment of the present disclosure, the light emitting element chip collector can have an area greater than or the same as that of the stamp.

[0336] According to one exemplary embodiment of the present disclosure, a separation distance between the pickup unit of the stamp and the light emitting element chip collector can be equal to a sum of a size of the pickup defective chip and a distance between an end of the pickup defective chip and an upper end of the light emitting element chip collector.

[0337] According to one exemplary embodiment of the present disclosure, the distance between the end of the pickup defective chip and the upper end of the light emitting element chip collector can be 100 micrometers or more.

[0338] According to one exemplary embodiment of the present disclosure, the light emitting element chip seating unit of the light emitting element chip collector can include a mesh light emitting element chip seating unit.

[0339] According to one exemplary embodiment of the present disclosure, a plurality of light emitting element chips removed from the stamp on the chip removing system can be seated on the light emitting element chip seating unit.

[0340] According to one exemplary embodiment of the present disclosure, the light emitting element chip seating unit includes holes corresponding to the light emitting element chips.

[0341] According to one exemplary embodiment of the present disclosure, each hole has a size smaller than that of each light emitting element chip, and the light emitting element chip can be separated from the stamp and seated in the hole.

[0342] According to one exemplary embodiment of the present disclosure, the suction unit can include a plurality of fans.

[0343] Although exemplary embodiments of the present disclosure have been described in detail with reference to the accompanying drawings, the present disclosure is not necessarily limited to the exemplary embodiments, and various modifications can be made without departing from the technical spirit of the present disclosure.

[0344] Therefore, the exemplary embodiments disclosed in the present disclosure are not intended to limit the technical spirit of the present disclosure, but to describe the present disclosure, and the scope of the technical spirit of the present disclosure is not limited by the exemplary embodiments. Therefore, it should be understood that the above-described exemplary embodiments are illustrative rather than restrictive in all aspects.

[0345] Cross Reference to Related Applications

[0346] This application claims priority to and the benefit of Korean Patent Application No. 10-2024-0100623, filed July 30, 2024, the disclosure of which is hereby incorporated by reference herein in its entirety for all purposes.

Claims

1. A pick-up control method of a light emitting element chip, the pick-up control method comprising the steps of: a first operation of loading a print on a transfer head, transporting the transfer head to a first substrate, and picking up a light emitting element chip with the print; a second operation of transporting the transfer head with the print that picked up the light emitting element chip to a second substrate, and checking a pick-up state of the light emitting element chip transported to the second substrate using an image detector located below the transfer head; a third operation of transporting the transfer head with the print that picked up the light emitting element chip toward a chip removal system when a pick-up failure is detected from the light emitting element chip as a result of analyzing an image captured by the image detector; and a fourth operation of blowing ionized air from the chip removal system toward the print, and removing the light emitting element chip from the print in a non-contact manner.

2. The pick-up control method according to claim 1, further comprising a fifth operation of transferring the light emitting element chip onto the second substrate when the pick-up failure is not detected from the light emitting element chip in the third operation.

3. The pickup control method according to claim 2, further comprising the steps of: In the fourth operation, the first operation to the fifth operation are performed by transporting the transfer head with the print from which the light emitting element chip was removed back to a first substrate.

4. The pickup control method according to claim 1, wherein The fourth operation of removing the light emitting element chip in the non-contact manner includes: moving the print that picked up the light emitting element chip to be positioned above the chip removal system; blowing ionized ions generated by an electrostatic remover of the chip removal system toward a pick-up unit of each of the prints, and removing electrostatics of the light emitting element chip picked up by the pick-up unit; and sucking the light emitting element chip separated by electrostatic removal of the light emitting element chip by a light emitting element chip collector.

5. The pickup control method according to claim 4, wherein Blowing the ionized ions generated by the electrostatic remover of the chip removal system toward the pick-up unit of each of the prints further includes the steps of: generating a plurality of ionized ions by an ion generator of the electrostatic remover; and blowing the plurality of ionized ions toward the pick-up unit of each of the prints using a fan of an ion blower.

6. The pickup control method according to claim 5, wherein The step of generating the plurality of ionized ions by the ion generator of the electrostatic remover includes: applying a voltage to a tip of an electrode needle using power of a high-voltage power source by the ion generator, so that air around the electrode needle becomes the plurality of ionized ions.

7. The pickup control method according to claim 2, wherein The fifth operation of transferring the light emitting element chip onto the second substrate when the pick-up failure is not detected from the light emitting element chip in the third operation further includes the step of transferring the light emitting element chip picked up by a pick-up unit of each of the prints onto a transfer position of the second substrate using the transfer head in a state where the print that picked up the light emitting element chip is moved to the second substrate.

8. The pickup control method according to claim 1, wherein The image detector includes a camera.

9. A transfer apparatus comprising: a stamp picks up a light emitting element chip located on a first substrate and transfers the light emitting element chip onto a second substrate; a transfer head that carries the stamp to perform the transfer and pick up; an image detector that inspects a pick-up state of the picked-up light emitting element chip; and a chip removal system that removes the light emitting element chip when a pick-up failure is detected from the light emitting element chip.

10. The transfer apparatus of claim 9, further comprising a stamp loader configured to load the stamp to be mounted on the transfer head.

11. The transfer apparatus of claim 10, further comprising a transfer track on which the stamp loader is loaded and on which the transfer head moves.

12. The transfer device of claim 9, wherein, The image detector includes a camera.

13. The transfer device of claim 9, wherein, The chip removal system includes at least one electrostatic remover and a light emitting element chip collector located below the stamp and sucking a light emitting element chip separated from a pick-up unit of the stamp.

14. The transfer device of claim 13, wherein, The electrostatic remover includes an ion generator and an ion blower that blows ionized ions output from the ion generator toward the pick-up unit of the stamp.

15. The transfer device of claim 14, wherein, The ion generator includes a high-voltage power supply unit and an electrode chip.

16. The transfer device of claim 14, wherein, The ion blower includes a fan.

17. The transfer device of claim 13, wherein, The light emitting element chip collector includes an air suction unit, a light emitting element chip seating unit, and a light emitting element chip insertion unit.

18. The transfer device of claim 17, wherein, An area of the light emitting element chip collector is greater than or equal to an area of the stamp.

19. The transfer device of claim 17, wherein, A separation distance between the pick-up unit of the stamp and the light emitting element chip collector is equal to a sum of a size of a pick-up defective chip and a distance between an end of the pick-up defective chip and an upper end of the light emitting element chip collector.

20. The transfer device of claim 19, wherein, The distance between the end of the pick-up defective chip and the upper end of the light emitting element chip collector is 100 μm or more.

21. The transfer device of claim 17, wherein, The light emitting element chip seating unit of the light emitting element chip collector is a mesh light emitting element chip seating unit.

22. The transfer device of claim 17, wherein, The light emitting element chip removed from the stamp on the chip removal system is seated on the light emitting element chip seating unit.

23. The transfer device of claim 22, wherein, The light emitting element chip seating unit includes holes corresponding to the light emitting element chips.

24. The transfer device of claim 23, wherein, A size of each hole is smaller than a size of each of the light emitting element chips, and the light emitting element chips can be separated from the stamp and seated in the holes.

25. The transfer device of claim 17, wherein, The air suction unit includes a fan.

Images