Method for improving small leakage jump in WAT test
By applying Force 0V discharge to the wafer chuck, probe card, and test channel during WAT testing, the phenomenon of small leakage current jumps was resolved, improving the stability and accuracy of the test.
Patent Information
- Application Number
- CN202511725094.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-11-21
- Publication Date
- 2026-02-06
AI Technical Summary
In WAT testing, small current parameters are easily affected by the charge noise of the equipment and the wafer itself, leading to unstable parameter testing, small leakage current spikes, and affecting process judgment.
During WAT testing, Force 0V discharge operations are performed on the wafer chuck, probe card, and test channel through the SMU and PDS systems to improve the discharge unit and ensure stability.
It significantly improves the problem of unstable leakage current in the back metal layer, and enhances the stability and accuracy of the test.
Smart Images
Figure CN121476884A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of semiconductor technology, and specifically to a method for improving the small leakage current jump in WAT testing. Background Technology
[0002] Wafer Acceptance Test (WAT) quantitatively evaluates the electrical, physical, and reliability parameters of a wafer to ensure process stability and product yield. WAT testing performs electrical, physical, reliability, and functional parameter tests on the test structure, thereby achieving purposes such as process quality control, process capability monitoring, yield prediction and improvement, design-process co-optimization, and customized verification of customer needs.
[0003] In routine WAT testing, low-current parameters (pA and below) are quite sensitive and easily affected by noise from the equipment and the wafer itself, leading to unstable parameter testing and issues such as… Figure 1 The small leakage current spike phenomenon shown can affect engineers' judgment of the process. Summary of the Invention
[0004] In view of the shortcomings of the prior art described above, the purpose of this application is to provide a method to improve the small leakage current jump in WAT testing, so as to solve the problem of insufficient parameter testing in WAT testing in the prior art.
[0005] To achieve the above and other related objectives, this application provides a method for improving the small leakage current jump height in WAT testing, comprising: Step 1: Perform a discharge operation on the wafer chuck; Step 2: After the wafer is fixed in the wafer chuck, a discharge operation is performed on the probe card; Step 3: After the probe card contacts the wafer, the WAT test begins. During the test, a discharge operation is performed on the test channel and the wafer chuck. Step 4: After the WAT test is completed, the probe card is separated from the wafer, and a discharge operation is performed on the wafer chuck. Step 5: The wafer is removed from the wafer chuck.
[0006] Preferably, in step three, a discharge operation is performed on the test channel and the wafer chuck via the SMU.
[0007] Preferably, the SMU uses the Force 0V discharge mode.
[0008] Preferably, in steps one and four, the wafer chuck is discharged using the PDS system built into the WAT test machine.
[0009] Preferably, in step two, the probe card is discharged using the probe discharge device of the WAT test machine.
[0010] Preferably, after the wafer is removed from the wafer chuck, it is fed into the wafer boat by a transfer mechanism.
[0011] As described above, the method for improving the small leakage current jump in WAT testing provided in this application has the following beneficial effects: by changing the discharge unit used in the WAT testing process, the problem of unstable leakage current in the later metal layer is improved. Attached Figure Description
[0012] To more clearly illustrate the technical solutions in the specific embodiments of this application or the prior art, the drawings used in the description of the specific embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this application. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.
[0013] Figure 1 This is a schematic diagram showing a small leakage current spike in the existing WAT test; Figure 2 The flowchart shown is a method for improving the small leakage current jump in WAT testing according to an embodiment of this application; Figure 3 The diagram shows a significant improvement in the small leakage current parameter jump phenomenon through the method for improving the small leakage current jump in WAT testing provided by the embodiments of this application. Detailed Implementation
[0014] The following specific examples illustrate the implementation of this application. Those skilled in the art can easily understand other advantages and effects of this application from the content disclosed in this specification. This application can also be implemented or applied through other different specific embodiments, and various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of this invention.
[0015] The technical solutions of this application will now be clearly and completely described with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this application. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.
[0016] In the description of this application, it should be noted that the terms "center," "upper," "lower," "left," "right," "vertical," "horizontal," "inner," and "outer," indicating orientation or positional relationships, are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation on this application. Furthermore, the terms "first," "second," and "third" are used for descriptive purposes only and should not be construed as indicating or implying relative importance.
[0017] In the description of this application, it should be noted that, unless otherwise expressly specified and limited, the terms "installation," "connection," and "linking" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal connection of two components; and they can refer to a wireless connection or a wired connection. Those skilled in the art can understand the specific meaning of the above terms in this application based on the specific circumstances.
[0018] Furthermore, the technical features involved in the different embodiments of this application described below can be combined with each other as long as they do not conflict with each other.
[0019] like Figure 1 As shown, when performing WAT testing on the same batch of wafers, both the forward and reverse order of the wafer number results show an increasing trend in metal layer leakage current. The existing testing procedure uses GNDU (Ground Unit) for discharge, but incomplete discharge causes small leakage current parameters to jump.
[0020] To address this issue, this application provides a method for improving the small leakage current jump in WAT testing.
[0021] Please see Figure 2 The flowchart illustrates a method for improving the small leakage current jump in WAT testing provided by an embodiment of this application.
[0022] like Figure 2 As shown, the method for improving the small leakage current jump height in WAT testing includes the following steps: Step 1: Perform a discharge operation on the wafer chuck; Step 2: After the wafer is fixed in the wafer chuck, a discharge operation is performed on the probe card; Step 3: After the probe card contacts the wafer, the WAT test begins. During the test, a discharge operation is performed on the test channel and the wafer chuck. Step 4: After the WAT test is completed, the probe card is separated from the wafer, and a discharge operation is performed on the wafer chuck. Step 5: The wafer is removed from the wafer chuck.
[0023] In step one, the wafer chuck is discharged using the PDS system built into the WAT test machine.
[0024] In step two, the probe card is discharged using the probe discharge device of the WAT test machine.
[0025] In step three, a discharge operation is performed on the test channel and wafer chuck using the SMU (Source Measurement Unit). An SMU is an electronic test device that integrates a high-precision voltage source, current source, voltmeter, and ammeter, widely used in integrated circuit semiconductor device testing, power module performance verification, and other fields. The SMU uses a Force 0V discharge mode; during the discharge operation, the voltage applied to the wafer by the SMU is 0V. Figure 3 As shown, this can significantly improve the phenomenon of high leakage current parameters.
[0026] In step four, the wafer chuck is discharged using the PDS system built into the WAT test machine.
[0027] After the wafer is removed from the wafer chuck, it is fed into the wafer boat through a transfer mechanism.
[0028] It should be noted that the illustrations provided in this embodiment are only schematic representations of the basic concept of this application. Therefore, the drawings only show the components related to this invention and are not drawn according to the actual number, shape and size of the components. In actual implementation, the form, quantity and proportion of each component can be arbitrarily changed, and the layout of the components may also be more complex.
[0029] In summary, the method for improving leakage current jump in WAT testing provided in this application improves the problem of unstable leakage current in the subsequent metal layer by changing the discharge unit used in the WAT testing process. Therefore, this application effectively overcomes the various shortcomings of the prior art and has high industrial application value.
[0030] The above embodiments are merely illustrative of the principles and effects of this application and are not intended to limit this application. Any person skilled in the art can modify or alter the above embodiments without departing from the spirit and scope of this application. Therefore, all equivalent modifications or alterations made by those skilled in the art without departing from the spirit and technical concept disclosed in this invention should still be covered by the claims of this application.
Claims
1. A method for improving the small leakage current jump height in WAT testing, characterized in that, The method includes: Step 1: Perform a discharge operation on the wafer chuck; Step 2: After the wafer is fixed in the wafer chuck, a discharge operation is performed on the probe card; Step 3: After the probe card contacts the wafer, the WAT test begins. During the test, a discharge operation is performed on the test channel and the wafer chuck. Step four: After the WAT test is completed, the probe card is separated from the wafer, and a discharge operation is performed on the wafer chuck. Step 5: The wafer is detached from the wafer chuck.
2. The method according to claim 1, characterized in that, In step three, a discharge operation is performed on the test channel and the wafer chuck via the SMU.
3. The method according to claim 2, characterized in that, The SMU uses Force 0V discharge mode.
4. The method according to claim 1, characterized in that, In steps one and four, the wafer chuck is discharged using the PDS system built into the WAT test machine.
5. The method according to claim 1, characterized in that, In step two, the probe card is discharged using the probe discharge device of the WAT test machine.
6. The method according to claim 1, characterized in that, After the wafer is detached from the wafer chuck, it is fed into the wafer boat by a transfer mechanism.