Multi-channel synchronous control direct current charging method and related equipment

Abstract

The invention provides a multi-channel synchronous control direct current charging method and related equipment, and the method comprises the steps: comparing the steady-state voltage data of the output ends of all channels with a synchronous tolerance threshold value, and determining the first state identifiers of all channels; performing synchronous regulation and control on the steady-state voltage data of the synchronization allowing channel to generate a synchronous control signal group; processing channel PWM parameters of the synchronous control signal group, generating a control instruction, outputting a synchronous control signal to a boost-buck circuit of a synchronous allowing channel, controlling the output voltage of the boost-buck circuit by adjusting the PWM duty ratio, determining a second state identifier, and driving an electrical switching circuit of the synchronous allowing channel, according to the scheme, the problem that control is not synchronous when the batteries are charged through multi-channel parallel connection can be solved, the charging risk is effectively reduced, and the charging efficiency is improved.

Description

Technical Field

[0001] This application relates to the field of charger technology, and in particular to a multi-channel synchronous control DC charging method and related equipment. Background Technology

[0002] In the model aircraft industry, users often need to charge multiple lithium batteries simultaneously. These batteries typically have large capacities, especially common in long-endurance, high-power-output model aircraft. To improve charging efficiency and reduce waiting time, users generally choose multi-channel DC chargers with multiple independent charging channels. However, existing charger designs primarily treat each channel as a completely independent control unit, with each channel's output current usually limited to 1-5A, which cannot meet the demand for high-current fast charging of large-capacity batteries. If users attempt to connect multiple channels in parallel to the same battery in an attempt to superimpose current for faster charging, the voltage output differences between channels and the asynchrony of control strategies can lead to current circulation, unstable output, and even burn out the hardware of one or more channels, posing a high risk. Summary of the Invention

[0003] This application provides a multi-channel synchronous control DC charging method and related equipment to solve the problem of high risk caused by voltage output differences and different control strategies between channels in related technologies.

[0004] The first aspect of this application provides a multi-channel synchronous control DC charging method, the multi-channel synchronous control DC charging method comprising: Collect steady-state voltage data from all channels output in the charger, and determine the first state identifier of all channels by comparing the steady-state voltage data with a preset synchronization tolerance threshold. Based on the first state identifier, the steady-state voltage data of all channels that are allowed to synchronize are synchronously adjusted to generate a synchronization control signal group; By processing the channel PWM parameters of the synchronization control signal group, control commands for voltage synchronization output are generated. According to the control command, a synchronous control signal is output to the buck-boost circuit of the synchronous enable channel, and the output voltage of the buck-boost circuit is controlled by adjusting the PWM duty cycle to determine the second state indicator that meets the parallel connection requirement; The electrical switching circuit of the synchronization enable channel is driven according to the second state identifier, the output terminal of the synchronization enable channel is electrically connected in parallel, and the battery is charged by combined output.

[0005] A second aspect of this application provides a multi-channel synchronous control DC charging device, which is used to implement a multi-channel synchronous control DC charging method. The multi-channel synchronous control DC charging device includes: The determination module is used to collect steady-state voltage data of all channel output terminals in the charger, and determine the first state identifier of all channels by comparing the steady-state voltage data with a preset synchronization tolerance threshold. The control module is used to synchronously control the steady-state voltage data of all synchronously enabled channels according to the first state identifier, and generate a synchronous control signal group. The processing module is used to process the channel PWM parameters of the synchronization control signal group to generate control commands for voltage synchronization output; The control module is used to output a synchronous control signal to the buck-boost circuit of the synchronous enable channel according to the control command, and to control the output voltage of the buck-boost circuit by adjusting the PWM duty cycle, and to determine the second state indicator that meets the parallel connection requirement; The output module is used to drive the electrical switching circuit of the synchronization enable channel according to the second state identifier, electrically connect the output terminals of the synchronization enable channel in parallel, and perform combined output charging of the battery.

[0006] A third aspect of this application provides an electronic device, including a memory and a processor, wherein the processor is configured to execute a computer program stored in the memory, and when the processor executes the computer program, it implements the steps of the multi-channel synchronous control DC charging method provided in the first aspect of this application.

[0007] In summary, the multi-channel synchronous control DC charging method and related equipment provided in this application can solve the problem of asynchronous control when multiple channels are connected in parallel to charge the same battery by means of synchronous allowable state judgment, unified PWM control signal generation and output voltage consistency control, effectively reducing charging risks and improving charging efficiency. Attached Figure Description

[0008] Figure 1 A schematic flowchart of a multi-channel synchronous control DC charging method provided in an embodiment of this application; Figure 2 A schematic diagram of the program modules of a multi-channel synchronous control DC charging device provided in an embodiment of this application; Figure 3 This is a schematic diagram of the structure of an electronic device provided in an embodiment of this application. Detailed Implementation

[0009] To make the inventive objectives, features, and advantages of this application more apparent and understandable, the technical solutions in the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of them. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0010] To address the high risks posed by voltage output differences and varying control strategies among channels in related technologies, this application provides a multi-channel synchronous control DC charging method, such as... Figure 1 This is a flowchart illustrating the multi-channel synchronous control DC charging method provided in this embodiment. The multi-channel synchronous control DC charging method includes the following steps: Step 110: Collect steady-state voltage data of all channel output terminals in the charger. By comparing the steady-state voltage data with the preset synchronization tolerance threshold, determine the first state identifier of all channels.

[0011] In this embodiment, for the DC charging method with multi-channel synchronous control, steady-state voltage data needs to be collected from the output terminal of each channel. By periodically sampling and filtering and stabilizing the raw data, the current steady-state output voltage value of each channel is obtained. Subsequently, using a preset synchronization tolerance threshold, the voltage deviations between different channels are compared to determine whether each channel meets the basic conditions for entering synchronous control. Channels with voltage deviations exceeding the set tolerance range are marked as being in a non-synchronous allowed state, while channels that meet the conditions will continue to participate in the subsequent parallel control process, thus providing a data basis for the initial screening of synchronous control channels.

[0012] In some embodiments, the step of acquiring steady-state voltage data at the output terminal of the synchronization-allowed channel and determining the first state identifier of all channels by comparing the steady-state voltage data with a preset synchronization tolerance threshold includes: acquiring a voltage sampling sequence of the output terminal voltage of all channels in the charger, and performing data smoothing processing on the voltage sampling sequence to generate a steady-state voltage data set corresponding to all channels; obtaining voltage deviation parameters of all channels by calculating the difference between the voltage values ​​of all channels in the steady-state voltage data set and the central reference voltage value; determining the deviation tolerance state of all channels by comparing the voltage deviation parameters with the preset synchronization tolerance threshold; and encoding the deviation tolerance state to generate a first state identifier for identifying whether the channel meets the parallel control conditions.

[0013] In this embodiment, to determine whether each channel meets the control conditions for entering parallel output, the output voltage of all channels in the charger needs to be periodically sampled, and the voltage sampling results of each channel at multiple time points are constructed into a voltage sampling sequence. This voltage sampling sequence contains multiple sets of digital voltage values ​​collected by the analog-to-digital converter from the output node of the buck-boost circuit within a unit time interval. The sampling frequency is set according to the system control cycle. In a fast feedback control system, the sampling frequency can be set to above 1kHz to ensure that the system has sufficient data to support the stability of subsequent judgments. The collected voltage sequence is uncertain when used directly for state judgment, so the original data needs to be smoothed. Data smoothing can be performed using a moving average filtering algorithm or an exponentially weighted moving average method. A certain number of continuous sampling points are constructed as a data window, and the data within the window is weighted and averaged to suppress voltage fluctuations caused by sudden interference and eliminate instantaneous sampling errors. In the fast charging scenario of model aircraft batteries, small voltage disturbances caused by battery chemical reactions will be mixed in with the sampled values. If not smoothed, the system will misjudge the voltage deviation as abnormal, causing the channel to erroneously exit the synchronization process. Through the aforementioned data smoothing process, the steady-state voltage value of each channel is obtained, forming a set containing the steady-state voltages of all channels, which serves as the basis for subsequent voltage deviation analysis. In the unified control logic defined by the system, all channels use one of the channel's values ​​or a system-defined reference value as the central reference voltage value. Based on this reference voltage, the steady-state voltages of all channels are calculated to obtain the voltage deviation parameter of each channel relative to the central reference. The difference calculation can use absolute value processing to ensure that it reflects the degree of deviation rather than positive or negative direction. The voltage deviation parameter is used to determine the consistency between channels. The system presets a synchronization tolerance threshold, such as 0.1V. In charging merging control, this threshold reflects the maximum allowable deviation range between different channels. The obtained deviation parameter is compared one by one with this synchronization tolerance threshold. If the deviation value of a channel is less than or equal to the threshold, its voltage output is considered consistent with the central reference and can enter the synchronization control area; otherwise, it is considered to have an unacceptable deviation and will not participate in subsequent merging output. When identifying and encoding the deviation tolerance status, the system sets an independent status flag bit for each channel. The status flags use Boolean encoding; for example, "1" represents that the channel meets the synchronization requirements, and "0" represents that the channel deviation exceeds the limit. The status flags of multiple channels will be combined into a unified data structure, such as a bitmap or array structure. This structure is defined as the first status identifier, used in the control algorithm to quickly retrieve which channels are currently in a synchronized permission state. For example, if the system contains four channels, and the current identifier is encoded as "1101," it means that channels 1, 2, and 4 meet the synchronization tolerance requirements, while channel 3 is excluded from synchronization control due to exceeding the deviation limit.This identifier will directly serve as the basis for selecting channels for subsequent synchronous PWM (Pulse Width Modulation) signal generation and control command issuance, ensuring that all channels participating in parallel control have consistent output conditions, thereby avoiding reverse current or hardware damage caused by voltage inconsistency in parallel operation.

[0014] Step 120: Synchronize and regulate the steady-state voltage data of all channels that are allowed to synchronize, based on the first state identifier, to generate a synchronization control signal group.

[0015] In this embodiment, based on the first state identifier obtained above, the steady-state voltage data of the channels that are allowed to be synchronized is input into the synchronization control module for processing. During this process, a target output voltage reference value is determined by performing equalization calculations on the voltage values ​​of the effective channels, and an error compensation amount is generated based on the deviation of each channel from this reference value. At the control strategy level, a set of synchronization control signals is generated based on the error compensation results and adjustment rate constraints. These signals are used to subsequently drive each buck-boost circuit to synchronously adjust its output voltage, thereby establishing a parallel connection basis under unified control.

[0016] In some embodiments, the step of synchronously regulating the steady-state voltage data of all synchronously enabled channels in all channels according to a first state identifier to generate a synchronization control signal group includes: extracting a target channel index set corresponding to the enabled state by structural decoding of the first state identifier; constructing a target voltage mapping table by associating the target channel index set with the steady-state voltage data set; wherein the target voltage mapping table includes valid channels and their steady-state voltage values; determining a target voltage reference value by statistically analyzing the voltage values ​​of synchronously enabled channels in the target voltage mapping table; generating a channel error compensation amount by performing error inverse analysis on the difference between the current voltage of the synchronously enabled channel and the target voltage reference value; and generating a synchronization control signal group for controlling the buck-boost circuit according to the channel error compensation amount and a preset adjustment rate limit condition.

[0017] In this embodiment, structural decoding is performed based on the previously obtained first state identifier to extract the target channel set currently allowed to participate in synchronization control. This first state identifier is a sequence of flags formed by Boolean tags, such as a binary bitmap or an array of equal length expressing whether each channel meets the parallel control conditions. In the system configuration, if the system has six channels and the state identifier is "101011", it means that channels 1, 3, 5, and 6 meet the synchronization requirements, while channels 2 and 4 are excluded because their voltage deviation exceeds the tolerance threshold. The structural decoding process involves extracting the channel index value corresponding to "1" from this flag structure and forming an index set, which serves as the target channel input for subsequent control. After extraction, the target channel index set needs to be associated and mapped with the previously generated steady-state voltage data set. The steady-state voltage data set is a structure containing the stable output voltage values ​​of all channels after data smoothing, generally organized in key-value pair form, where the key is the channel number and the value is the steady-state voltage value. Through the mapping operation between the index set and this data set, a target voltage mapping table containing only the synchronization-allowed channels and their steady-state voltage values ​​can be constructed. For example, in a six-channel structure, if channels 1, 3, 5, and 6 are allowed, corresponding to voltages of 14.80V, 14.82V, 14.78V, and 14.81V respectively, then the target voltage mapping table will include four sets of correspondences for subsequent voltage reference calculations. Based on this mapping table, the target voltage reference value needs to be determined through statistical analysis. This reference value is used to guide the convergence direction and control target of the output voltage of all subsequent synchronous channels. The statistical method can be an arithmetic average or a weighted average. If the above voltage value is calculated using an arithmetic average, then the reference value is (14.80 + 14.82 + 14.78 + 14.81) / 4 = 14.8025V. This value is the unified voltage target that all synchronous channels should be adjusted to in the current stage of the system, used to control consistent output. If the voltage of a certain channel deviates significantly from this value, it may cause voltage inconsistency problems in subsequent parallel connections, leading to current backflow or abnormal channel load. To ensure that each channel output approaches the reference voltage value, the difference between each steady-state voltage value in the target voltage mapping table and the synchronous output voltage reference value needs to be calculated to form an error parameter set. Furthermore, these error values ​​are used as input to perform reverse error analysis to determine the control direction and adjustment amplitude, and to generate the error compensation amount for each channel. The error compensation amount is defined as the required adjustment amplitude between the current channel output voltage and the target voltage; its sign indicates an increase or decrease, and its value represents the adjustment intensity. For example, if the current voltage of channel 5 is 14.78V and the target is 14.8025V, the error is -0.0225V, and its corresponding compensation amount is a positive upward adjustment value. The compensation amounts of all channels constitute the channel error compensation amount, which is the core data support for subsequent adjustments. Based on this channel error compensation amount and combined with preset adjustment rate limits, a synchronous control signal set that can be used to drive the buck-boost circuit is generated.The adjustment rate limit is the upper limit of the duty cycle change rate set by the system, used to prevent system oscillation or overshoot caused by excessively rapid voltage adjustment. For example, to limit the PWM duty cycle change to no more than ±2% per cycle, the compensation amount needs to be segmented and mapped to a controllable duty cycle increment, and output synchronously by the PWM control module according to the current cycle. The final output PWM control signal group consists of multiple sets of duty cycle control parameters, each corresponding to one channel, used to adjust the buck-boost circuit so that its output voltage gradually converges to the reference value, ensuring that the voltage between channels remains consistent before parallel output. This control flow achieves precise adjustment of the multi-channel output state, ensuring synchronization and system stability during subsequent merging output.

[0018] Step 130: By processing the channel PWM parameters of the synchronization control signal group, a control command for voltage synchronization output is generated.

[0019] In this embodiment, the PWM parameters of each channel in the generated synchronization control signal group need to be processed. Specific operations include extracting the channel control parameters in a structured manner, normalizing and comparing the duty cycle field for consistency, and dynamically adjusting the values ​​of the channel identifiers with deviations based on the error compensation from the previous stage. After the adjustment information is fused, a channel control command structure is constructed, and complete control commands are generated accordingly. These commands are then uniformly issued to the buck-boost circuits of each channel for execution, ensuring that all synchronization channels operate under the same control logic.

[0020] In some embodiments, the step of generating control instructions for voltage synchronization output by processing the channel PWM parameters of the synchronization control signal group includes: extracting the PWM parameters of the synchronization-enabled channels in the synchronization control signal group in a structured manner to obtain a set of channel PWM control parameters, and normalizing the format of the parameter set according to the buck-boost topology type corresponding to the synchronization-enabled channels to construct a standardized PWM parameter template; identifying the channel identifier whose duty cycle deviates from the target synchronization output range by performing a consistency comparison on the duty cycle field of the synchronization-enabled channels in the standardized PWM parameter template; obtaining the dynamic adjustment flag bit corresponding to the channel by jointly associating the channel identifier with the error compensation amount; generating a channel instruction structure set by fusing and matching the dynamic adjustment flag bit with the standardized PWM parameter template; and generating control instructions for voltage synchronization output according to the content of each control field in the channel instruction structure set.

[0021] In this embodiment, the parameters of each channel in the generated synchronous control signal group are extracted in a structured manner to extract the core fields related to the actual control logic. The synchronous control signal group refers to the set of PWM parameters calculated for multiple channels, including the PWM duty cycle, frequency, adjustment direction, update cycle, etc. of each channel. Structured extraction means classifying and organizing the information in the signal group by channel through a data parsing mechanism, so that each channel has an independent data block, which facilitates subsequent processing. After the structured extraction is completed, the set of PWM control parameters that meet the conditions needs to be selected from the effective channel range determined by the first state identifier, and the response differences of the buck-boost topology used by each channel to the PWM signal are further considered. Buck-boost topologies include buck, boost, or buck-boost. Different topologies have different response relationships to the PWM duty cycle. For example, the duty cycle in a buck circuit is proportional to the output voltage, while in a boost circuit it is non-linear. In order to ensure that the control logic is comparable and consistent across multiple topologies, the extracted parameter set needs to be formatted. This process maps all duty cycle parameters, frequency parameters, and adjustment step size parameters to a standard control domain and converts them into equivalent adjustment quantities of the same control model under different topologies, thereby constructing a standardized PWM parameter template as a unified reference for multi-channel coordinated control. After the standardized PWM parameter template is constructed, the duty cycle field is further compared for consistency to identify channels that deviate from the target synchronous output range. The target synchronous output range is a PWM reference range mapped based on the reference voltage and the current system requirements. For example, when the target output voltage is 14.8V, after determining the linear relationship between the control model of the buck-boost circuit and the PWM duty cycle, the corresponding duty cycle range is set to 62% to 64%. If the duty cycle of a certain channel is 66%, which exceeds the upper limit of the target range, the channel is recorded as deviating. Deviation detection considers not only the absolute difference in values ​​but also the system's allowable adjustment tolerance for sensitivity judgment, avoiding unnecessary adjustments due to small deviations. After obtaining the deviation channel identifier, it needs to be jointly correlated with the error compensation amount generated in the previous stage to determine the actual adjustment direction and amplitude of the current channel, and finally obtain the dynamic adjustment flag bit corresponding to each channel. A dynamic adjustment flag is a logical variable describing the trend of control behavior, indicating whether the current channel needs to increase, decrease, or maintain its current duty cycle. This flag is determined jointly based on the current error direction and the actual PWM deviation. For example, if the duty cycle of channel A is low and the error is negative, an "increase" flag is generated; if the duty cycle of channel B is high and the error is positive, a "decrease" flag is generated. Subsequently, the generated dynamic adjustment flag is fused and matched with the standardized PWM parameter template to form a channel instruction structure set.This structure set is a control state encapsulation unit for each channel. Internally, it records the difference between the current PWM parameters and the upcoming adjustment strategy, and may include historical state fields for determining the convergence of the control strategy. For example, if channel C performed an "increase" operation in the previous control cycle, and this increase is confirmed again in the current cycle, the continuous operation flag is set, providing a basis for subsequent judgment on whether to increase the adjustment amplitude. Finally, based on the content of each field in the channel instruction structure set, control instructions that can be sent to the PWM driver are generated through parameter assembly logic and control protocol. This control instruction is a standard format signal control block, containing the target duty cycle value, update timing, and synchronization flag for each channel. It is used to drive the buck-boost circuit to maintain a consistent output voltage, thereby supporting the parallel charging control target of the entire multi-channel system. In the field of model aircraft, this control instruction ensures that multiple channels with different output capabilities maintain safety and control synchronization when charging high-capacity batteries with high current through coordinated adjustments.

[0022] Step 140: Output a synchronization control signal to the buck-boost circuit of the synchronization enable channel according to the control command, and control the output voltage of the buck-boost circuit by adjusting the PWM duty cycle to determine the second state indicator that meets the parallel connection requirements.

[0023] In this embodiment, the generated control commands are sent to the PWM output control modules of each channel, driving the buck-boost circuits of each channel to operate according to the specified PWM duty cycle. During this process, the voltage changes at the output terminals of each channel are sampled to determine whether the preset synchronization target voltage value has been successfully reached, with the voltage consistency between channels serving as the criterion. If the output voltages of all channels involved in the control are within the synchronization tolerance range, a second status flag is generated, indicating that the group of channels has met the conditions for safe parallel output.

[0024] In some embodiments, the step of outputting a synchronization control signal to the buck-boost circuit of the synchronization-allowed channel according to the control command, and controlling the output voltage of the buck-boost circuit by adjusting the PWM duty cycle to determine the second state identifier that meets the parallel requirements includes: parsing the control command to extract the target duty cycle control value and synchronization flag bit of the synchronization-allowed channel, and generating a channel control signal; applying the duty cycle to the PWM output port of the synchronization-allowed channel through the channel control signal to obtain the synchronization control signal of the synchronization-allowed channel, and transmitting the synchronization control signal to the corresponding buck-boost circuit to drive the output; performing a synchronous comparison analysis between the actual output voltage value of the buck-boost circuit and the target voltage value in the control command to generate the voltage output error of the synchronization-allowed channel, and determining the output voltage state according to the voltage deviation distribution between the synchronization-allowed channels in the error state vector; performing a synchronization threshold test on the output voltage state to determine whether all allowed channels meet the set parallel output conditions; and generating a second state identifier if all allowed channels meet the parallel output conditions.

[0025] In this embodiment, the generated control instructions are parsed to extract the target duty cycle control value and synchronization flag of the synchronization-enabled channel. The control instructions are a standardized set of control parameters generated in the previous stage based on error compensation, topology, and dynamic adjustment strategy. Their internal field structure includes key control information such as channel index, target PWM duty cycle, control period, and synchronization flag. Through field parsing, the information of the synchronization-enabled channel can be filtered and extracted into structured data to form channel control signals. This set consists of PWM control instruction streams for multiple channels, often existing in the form of arrays, linked lists, or mapping tables in the control structure for binding with the underlying hardware interface. After establishing the channel control signals, they need to be loaded into the corresponding PWM output port. The PWM output port is the control channel connecting the digital controller and the buck-boost circuit, outputting a control signal with a variable duty cycle at a fixed frequency through digital pulse width modulation technology. The duty cycle, i.e., the proportion of time the PWM signal is in a high-level state within one cycle, directly affects the output voltage of the buck-boost circuit. By loading the duty cycle, the target duty cycle value from the control signal set is written into the control register of the PWM module, and the output is started synchronously, causing each channel to generate a new PWM control signal. After loading, the synchronous control signal is transmitted to the corresponding buck-boost circuit, driving the output voltage of each channel's power path at the physical layer. To verify whether the duty cycle control achieves the expected effect, the system samples the actual output voltage value of each buck-boost circuit during the control cycle and performs synchronous comparison and analysis with the target voltage value in the control command. The target voltage value is the expected output voltage reference uniformly set based on the multi-channel synchronous control strategy. By comparing the difference between the actual voltage and the target value, a voltage output error is constructed. This vector records the degree of deviation of the current output voltage of each synchronously allowed channel relative to the target voltage. The elements in the error state vector can be either absolute error values ​​or further quantified into discrete levels, such as too low, normal, or too high, for subsequent judgment logic. Then, by statistically analyzing the deviation distribution between each channel in the voltage output error, it can be determined whether the current multi-channel output state meets the voltage consistency requirements. Voltage consistency state is a logical state used to characterize the degree of coordination among the outputs of each channel. Its evaluation criterion is whether the voltage difference between all channels is within a preset synchronization threshold range. The synchronization threshold is set by the system; for example, in a model aircraft battery charging scenario, it can be set to ±0.05V to ensure that multiple channels do not compensate for each other or reverse charge due to voltage differences during the charging process. By comparing the error state vector with this threshold channel by channel, the system can quickly determine whether there are channels deviating from the synchronization range. If the judgment result shows that the output voltage of all synchronization-allowed channels is within the threshold limit, it indicates that each channel has completed voltage synchronization adjustment within the control cycle and is ready to construct a parallel output structure.At this point, the control system generates a second state identifier to indicate that the current system has met the prerequisites for entering the physical parallel state. This second state identifier is also a Boolean type code, which is used in subsequent control flows as the basis for triggering the electrical switching circuit connection operation. This ensures that subsequent output path connection actions are only performed when the channel voltages are completely consistent, avoiding voltage difference surges or output instability caused by early connections. This logic control chain, from duty cycle execution to voltage consistency determination, constitutes a key guarantee mechanism for the safety of multi-channel parallel control.

[0026] Step 150: Drive the electrical switching circuit of the synchronization enable channel according to the second state flag, connect the output of the synchronization enable channel in parallel, and charge the battery by combining output.

[0027] In this embodiment, after confirming that the output status meets the unified standard, the electrical switching circuit is controlled to connect the output terminals of each channel according to the second status identifier, thereby establishing an actual electrical parallel path. By controlling MOS switches, relays, or other electrical switching devices, the output terminals of multiple channels are connected to the same battery port, constructing a parallel output path. At the same time, the voltage and current status of the parallel nodes are continuously monitored to ensure that the output after parallel connection is stable and without significant disturbance, thereby enabling combined charging of the batteries.

[0028] In some embodiments, after the steps of electrically paralleling the output terminals of the synchronous enabling channels and performing combined output charging of the battery according to the second state flag driving the electrical switching circuit of the synchronous enabling channel, the method further includes: generating total current deviation data by performing difference analysis on the total current of the parallel output channels generated by the electrical parallel connection and the target current value of the battery in the current charging stage; adjusting the PWM duty cycle parameter of the synchronous enabling channel according to the total current deviation data to obtain the channel duty cycle adjustment parameter; comparing the temperature monitoring data of each synchronous enabling channel in the parallel output channel with a preset thermal threshold to determine the channel index with over-temperature risk, and performing amplitude compression processing on the duty cycle adjustment value of the corresponding channel according to the channel index to generate temperature control adjustment parameter; generating a channel duty cycle correction command by jointly mapping the channel duty cycle adjustment parameter and the temperature control adjustment parameter, and sending the channel duty cycle correction command to the PWM output module of each synchronous enabling channel for correction.

[0029] In this embodiment, when multiple channels complete their electrical parallel connection and begin to output power to the battery, the system needs to continuously adjust the output duty cycle of each channel to ensure that the total current remains consistent with the target current value of the battery at the current charging stage. To this end, a difference analysis must first be performed on the total current of the currently parallel output channels and the target current value. The total current is the cumulative value of the output currents from multiple channels, acquired by the current sampling module through a Hall sensor or resistor sampling circuit, and input to the controller after filtering to eliminate instantaneous pulsation interference. The target current value is dynamically set by the battery management system based on the current battery state of charge, charging stage (e.g., constant current, constant voltage, trickle charging), and cell temperature. In high-rate charging applications, this value can reach 10A to 20A. By calculating the difference between the collected total current and the target current value, the total current deviation data of the current system can be obtained. This data serves as the basis for multi-channel output adjustment. Based on the total current deviation data, the controller needs to adjust the PWM duty cycle parameters of the synchronously allowed channels in a coordinated manner, forming a consistent dynamic control strategy. Since multiple channels output in parallel, a positive total current deviation indicates insufficient output current, requiring an increase in the PWM duty cycle of each channel to boost the output voltage, thereby indirectly increasing the total current output. Conversely, a negative total current deviation indicates excessive output current, necessitating a reduction in the duty cycle. To achieve coordinated control, the controller proportionally allocates the deviation to each channel, combining the output capacity weights of each channel to generate channel duty cycle adjustment parameters. Each element represents the change in duty cycle that the corresponding channel should adjust within the current cycle. For example, when the total current deviation is +1.5A, the system can allocate it proportionally to the maximum output capacity of each channel, potentially increasing the duty cycle of channel A by 1.0% and channel B by 0.5%. To ensure the safety and long-term stable operation of each channel during adjustment, a temperature control protection mechanism is further introduced. During this process, the system periodically collects the internal temperature of all parallel output channels. Temperature monitoring data can be obtained in real time through thermistors mounted on power MOSFETs or magnetic devices. The temperature data is compared with the system's set thermal threshold, which is typically between 70°C and 85°C, with the specific value determined based on heat dissipation capacity, package specifications, and safety margin. When the temperature of a channel exceeds the thermal threshold or approaches the critical value, that channel is marked as having an over-temperature risk, and the system extracts the corresponding channel index information accordingly. Subsequently, for the marked channels, the amplitude of their originally adjusted duty cycle adjustment is compressed to slow down the rate of load growth or perform partial power unloading. This process constitutes a temperature control protection adjustment strategy, and its output is the temperature control adjustment parameter. This flag set has a one-to-one correspondence with the original duty cycle adjustment set at the channel level.To ensure the adjustment strategy achieves actual control at the hardware level, the system needs to jointly map the channel duty cycle adjustment parameters with the temperature control adjustment parameters, integrating the adjustment intentions from both data sources, and generating the final channel duty cycle correction instruction used to drive the output. This instruction set includes the final duty cycle target value, update flag, synchronization execution flag, and temperature control flag for each synchronized channel, used to construct the next cycle output state of the hardware PWM module. After the instruction is generated, the controller sends it to each PWM output module. The PWM module updates the duty cycle value in its internal control register accordingly and synchronously initiates output switching, making the adjustment effective at the hardware execution layer. Through this mechanism, the system can not only adjust the output level in real time according to the total current demand, but also dynamically allocate the load based on the channel temperature status, ensuring stable, efficient, and thermally protected operation of the multi-channel parallel structure in high-current charging applications, which is particularly valuable in scenarios requiring high-power fast charging, such as model aircraft and drone ground stations.

[0030] In some embodiments, by jointly analyzing the current change rate, voltage response stability, and cumulative charging time at the common output terminal, the determination parameters for charging process termination are obtained; based on the matching relationship between the determination parameters for charging process termination and the preset charging termination conditions, a termination judgment identifier is generated; by parsing the termination judgment identifier, it is determined that the multi-channel output structure is in a disconnectable state, and a phased disconnection command sequence is generated; according to the disconnection command sequence, disconnection control signals are sequentially sent to the electrical switching circuit of the synchronization-allowed channel to control the drive switch module in the output path of the synchronization-allowed channel to turn off; after the synchronization-allowed channel is disconnected, the residual voltage change trend at the corresponding output terminal is collected to generate a channel de-excitation status confirmation signal; by synchronously comparing the de-excitation status confirmation signals of all channels, a charging process termination confirmation flag is generated.

[0031] In this embodiment, to ensure that the charging process terminates at the appropriate time and that the channel disconnection process is safe and stable, a joint analysis based on multiple real-time operating indicators is required. First, the controller collects and processes key operating data from the common output terminal to construct decision parameters for termination judgment. These parameters include three key factors: current change rate, voltage response stability, and cumulative charging time. The current change rate is obtained by performing differential calculations on the total current of the combined output within a continuous time window, reflecting the current absorption trend of the battery. When the battery enters saturation, the current absorption rate slows down, gradually approaching zero. Voltage response stability is determined by statistically analyzing the amplitude and average change of the output voltage fluctuation. If the voltage remains within a stable range over multiple cycles, it indicates that the charging system is in a steady-state platform. The cumulative time is the total working time recorded by the timer module since the start of this charging cycle. It serves as a criterion in different battery strategies; for example, when charging lithium polymer batteries, a termination assessment must be forcibly triggered if the longest charging time exceeds 25 minutes. These three indicators are combined to form the decision parameters for charging process termination and input to the control decision module for matching against preset termination conditions in the system. The preset charging termination conditions are a set of threshold conditions based on battery type, capacity, maximum carrying voltage, and charging protocol. These include current change rate below 0.05A / min, voltage stability fluctuation not exceeding 0.01V for more than 30 seconds, and cumulative charging time exceeding a set threshold. By logically comparing the above termination judgment parameters with the termination conditions, the controller generates a termination judgment flag when all judgment conditions are met or the combined logic is valid. This flag serves as the logic trigger signal for subsequent channel disconnection operations, and its status in the control logic indicates that the current system has entered the stage where channels can be safely disconnected. After the termination judgment flag is generated, its status needs to be further analyzed to determine whether the current multi-channel output structure is in a disconnectable state. Status analysis includes identifying which channels are still in a high-output state, whether there is a residual current surge, and whether the channel control logic is in an idle, non-blocking state. After status analysis is completed and the disconnection conditions are met, the control system generates a phased disconnection command sequence based on the current synchronized allowed channel index. This instruction sequence is a set of control signaling structures, including parameters such as the disconnection priority of each channel, the output control signal waveform, and the switch drive execution delay. Its design takes into account avoiding a sharp change in the common output voltage caused by the simultaneous disconnection of parallel channels, which could lead to battery voltage rebound or interference with other channels. Based on the generated disconnection instruction sequence, the controller sequentially sends disconnection control signals to the electrical switching circuits corresponding to the synchronized enable channels. These control signals, via drive logic, control the power MOSFETs, relays, or solid-state switch modules in the output paths of each channel to turn off one by one.After each channel is shut down, the electrical path at the output terminal is disconnected. The system needs to sample the residual voltage at the output terminal of the disconnected channel and analyze its voltage decay trend over time. If the voltage decays rapidly to a safe range (e.g., less than 0.5V) within a set time and there is no reverse current feedback, the channel can be determined to have successfully completed the de-excitation operation. This process generates a channel de-excitation status confirmation signal, which indicates that the current channel output section has been safely isolated. When all synchronously enabled channels have completed the disconnection operation and successfully returned the de-excitation status confirmation signal, the system performs a synchronous comparison of all confirmation signals. If no channel is in an unde-excited or abnormal state, a charging process termination confirmation flag is generated. This flag indicates that the entire multi-channel synchronous charging system has completed the charging termination logic, and all channels are in a disconnected, safe, and non-operating state. The subsequent control system can enter the standby, log recording, or re-initialization stage to avoid erroneous control behavior and protect the electrical integrity of the battery and charging equipment. This process, through coordinated control and sampling, forms a safe disconnection mechanism for the end of charging, suitable for high-current parallel output environments. It is particularly suitable for applications with high requirements for control synchronization and electrical safety, such as fast charging of model aircraft and multi-cell charging management of power tools.

[0032] According to the multi-channel synchronous control DC charging method provided in this application, the steady-state voltage data of all channel output terminals are compared with the synchronization tolerance threshold to determine the first state identifier of all channels; the steady-state voltage data of the synchronously enabled channels are synchronously regulated to generate a synchronization control signal group; the channel PWM parameters of the synchronization control signal group are processed to generate control commands and output synchronization control signals to the buck-boost circuit of the synchronously enabled channel; the output voltage of the buck-boost circuit is controlled by adjusting the PWM duty cycle to determine the second state identifier; the electrical switching circuit of the synchronously enabled channel is driven to electrically connect the output terminals of the synchronously enabled channel in parallel to charge the battery in a combined output manner. This application can solve the problem of asynchronous control when charging the battery in parallel with multiple channels, effectively reduce charging risks, and improve charging efficiency.

[0033] Figure 2 This application provides a multi-channel synchronous control DC charging device, which can be used to implement the multi-channel synchronous control DC charging method described in the foregoing embodiments. For example... Figure 2 As shown, the multi-channel synchronously controlled DC charging device mainly includes: The determination module 10 is used to collect steady-state voltage data of all channel output terminals in the charger, and determine the first state identifier of all channels by comparing the steady-state voltage data with a preset synchronization tolerance threshold. The control module 20 is used to synchronously control the steady-state voltage data of all synchronously enabled channels according to the first state identifier, and generate a synchronous control signal group. Processing module 30 is used to process the channel PWM parameters of the synchronization control signal group to generate control commands for voltage synchronization output; Control module 40 is used to output a synchronous control signal to the buck-boost circuit of the synchronous enable channel according to the control command, and to control the output voltage of the buck-boost circuit by adjusting the PWM duty cycle, and to determine the second state indicator that meets the parallel requirements; The output module 50 is used to drive the electrical switching circuit of the synchronization enable channel according to the second state flag, electrically connect the output terminals of the synchronization enable channel in parallel, and perform combined output charging of the battery.

[0034] In one optional implementation of this embodiment, the determining module is specifically used to: acquire the voltage sampling sequence of the output voltage of all channels in the charger, and perform data smoothing processing on the voltage sampling sequence to generate a steady-state voltage data set corresponding to all channels; obtain the voltage deviation parameter of all channels by calculating the difference between the voltage value of all channels in the steady-state voltage data set and the central reference voltage value; determine the deviation tolerance state of all channels by comparing the voltage deviation parameter with a preset synchronization tolerance threshold; and identify and encode the deviation tolerance state to generate a first state identifier for identifying whether the channel meets the parallel control conditions.

[0035] In one optional implementation of this embodiment, the control module is specifically used to: extract the target channel index set corresponding to the allowed state by structural decoding of the first state identifier; construct a target voltage mapping table by associating the target channel index set with the steady-state voltage data set; wherein the target voltage mapping table includes effective channels and their steady-state voltage values; determine the target voltage reference value by statistically analyzing the synchronous allowed channel voltage values ​​in the target voltage mapping table; generate a channel error compensation amount by performing error back-analysis on the difference between the current voltage of the synchronous allowed channel and the target voltage reference value; and generate a synchronous control signal group for controlling the buck-boost circuit according to the channel error compensation amount and the preset adjustment rate limit conditions.

[0036] In one optional implementation of this embodiment, the processing module is specifically used to: extract the PWM parameters of the synchronization-allowed channels in the synchronization control signal group in a structured manner to obtain a set of channel PWM control parameters, and normalize the format of the parameter set according to the buck-boost topology type corresponding to the synchronization-allowed channel to construct a standardized PWM parameter template; identify the channel identifier whose duty cycle deviates from the target synchronization output range by performing a consistency comparison on the duty cycle field of the synchronization-allowed channels in the standardized PWM parameter template; obtain the dynamic adjustment flag bit corresponding to the channel by jointly associating the channel identifier with the error compensation amount; generate a channel instruction structure set by fusing and matching the dynamic adjustment flag bit with the standardized PWM parameter template; and generate control instructions for voltage synchronization output according to the content of each control field in the channel instruction structure set.

[0037] In an optional implementation of this embodiment, the control module is specifically used to: parse the control command to extract the target duty cycle control value and synchronization flag of the synchronization-allowed channel, and generate a channel control signal; apply the channel control signal to the PWM output port of the synchronization-allowed channel to obtain the synchronization control signal of the synchronization-allowed channel, and transmit the synchronization control signal to the corresponding buck-boost circuit to drive the output; perform a synchronous comparison analysis between the actual output voltage value of the buck-boost circuit and the target voltage value in the control command to generate the voltage output error of the synchronization-allowed channel, and determine the output voltage state based on the voltage deviation distribution between the synchronization-allowed channels in the error state vector; perform a synchronization threshold test on the output voltage state to determine whether all allowed channels meet the set parallel output conditions; if all allowed channels meet the parallel output conditions, generate a second state identifier.

[0038] In one optional implementation of this embodiment, the correction module is used to: generate total current deviation data by performing difference analysis between the total current of the parallel output channels generated by electrical parallel connection and the target current value of the battery at the current charging stage; adjust the PWM duty cycle parameter of the synchronously allowed channel according to the total current deviation data to obtain the channel duty cycle adjustment parameter; compare the temperature monitoring data of each synchronously allowed channel in the parallel output channel with a preset thermal threshold to determine the channel index with over-temperature risk, and perform amplitude compression processing on the duty cycle adjustment value of the corresponding channel according to the channel index to generate temperature control adjustment parameter; generate a channel duty cycle correction command by jointly mapping the channel duty cycle adjustment parameter and the temperature control adjustment parameter, and send the channel duty cycle correction command to the PWM output module of each synchronously allowed channel for correction.

[0039] In one optional implementation of this embodiment, the generation module is used to: obtain the determination parameters for the termination of the charging process by jointly analyzing the current change rate, voltage response stability, and cumulative charging time of the common output terminal; generate a termination judgment identifier based on the matching relationship between the determination parameters for the termination of the charging process and the preset charging termination conditions; determine that the multi-channel output structure is in a disconnectable state by parsing the termination judgment identifier, and generate a phased disconnection command sequence; send disconnection control signals to the electrical switching circuit of the synchronization-allowed channel in sequence according to the disconnection command sequence, and control the drive switch module in the output path of the synchronization-allowed channel to turn off; collect the residual voltage change trend of the corresponding output terminal after the synchronization-allowed channel is disconnected, and generate a channel de-excitation status confirmation signal; and generate a charging process termination confirmation flag by synchronously comparing the de-excitation status confirmation signals of all channels.

[0040] According to the multi-channel synchronous control DC charging device provided in this application, the steady-state voltage data of all channel output terminals are compared with the synchronization tolerance threshold to determine the first state identifier of all channels; the steady-state voltage data of the synchronously enabled channels are synchronously regulated to generate a synchronization control signal group; the channel PWM parameters of the synchronization control signal group are processed to generate control commands and output synchronization control signals to the buck-boost circuit of the synchronously enabled channel; the output voltage of the buck-boost circuit is controlled by adjusting the PWM duty cycle to determine the second state identifier; the electrical switching circuit of the synchronously enabled channel is driven to electrically connect the output terminals of the synchronously enabled channel in parallel to charge the battery in a combined output manner. This application can solve the problem of asynchronous control when charging the battery in parallel with multiple channels, effectively reduce charging risks, and improve charging efficiency.

[0041] According to the scheme provided in this application Figure 3 An electronic device is provided as an embodiment of this application. This electronic device can be used to implement the multi-channel synchronous control DC charging method described in the foregoing embodiments, and mainly includes: The processor 301 can be implemented using a microprocessor (MCU), an application-specific integrated circuit (ASIC), or one or more integrated circuits, and is used to execute relevant programs to implement the technical solutions provided in the embodiments of this application; the memory 302 can be implemented using ROM (Read Only Memory), static storage device, dynamic storage device, or RAM (Random Access Memory). The memory 302 can store the operating system and other applications. When the technical solutions provided in the embodiments of this specification are implemented through software or firmware, the relevant program code is stored in the memory 302 and is called and executed by the processor 301 to implement the multimodal recognition model training method of the embodiments of this application. The input / output interface 303 is used to realize information input and output. The communication interface 304 is used to realize communication interaction between this device and other devices. Communication can be realized through wired means (such as USB, network cable, etc.) or through wireless means (such as mobile network, WIFI, Bluetooth, etc.). The bus 305 transmits information between various components of the device (such as processor 301, memory 302, input / output interface 303 and communication interface 304). The processor 301, memory 302, input / output interface 303 and communication interface 304 realize communication connection between each other within the device through the bus 305.

[0042] The above-described embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this application.

Claims

1. A multi-channel synchronous control DC charging method, characterized in that, include: Collect steady-state voltage data from all channels output in the charger, and determine the first state identifier of all channels by comparing the steady-state voltage data with a preset synchronization tolerance threshold. Based on the first state identifier, the steady-state voltage data of all channels that are allowed to synchronize are synchronously adjusted to generate a synchronization control signal group; By processing the channel PWM parameters of the synchronization control signal group, control commands for voltage synchronization output are generated. According to the control command, a synchronous control signal is output to the buck-boost circuit of the synchronous enable channel, and the output voltage of the buck-boost circuit is controlled by adjusting the PWM duty cycle to determine the second state indicator that meets the parallel connection requirement; The electrical switching circuit of the synchronization enable channel is driven according to the second state identifier, the output terminal of the synchronization enable channel is electrically connected in parallel, and the battery is charged by combined output.

2. The DC charging method with multi-channel synchronous control according to claim 1, characterized in that, The step of acquiring steady-state voltage data at the output of the synchronization-allowed channel and determining the first state identifier of all channels by comparing the steady-state voltage data with a preset synchronization tolerance threshold includes: Obtain the voltage sampling sequence of the output voltage of all channels in the charger, and perform data smoothing processing on the voltage sampling sequence to generate a set of steady-state voltage data corresponding to all channels; By calculating the difference between the voltage values ​​of all channels in the steady-state voltage dataset and the central reference voltage value, the voltage deviation parameters of all channels are obtained. By comparing the voltage deviation parameter with a preset synchronization tolerance threshold, the allowable deviation status of all channels is determined; The deviation tolerance state is identified and encoded to generate a first state identifier for identifying whether the channel meets the parallel control conditions.

3. The DC charging method with multi-channel synchronous control according to claim 2, characterized in that, The step of synchronously regulating the steady-state voltage data of all synchronously enabled channels in all channels according to the first state identifier to generate a synchronization control signal group includes: By performing structural decoding on the first state identifier, the target channel index set corresponding to the allowed state is extracted; A target voltage mapping table is constructed by associating the target channel index set with the steady-state voltage data set; wherein, the target voltage mapping table includes effective channels and their steady-state voltage values; The target voltage reference value is determined by statistical analysis of the synchronous allowable channel voltage values ​​in the target voltage mapping table; By performing error back-analysis on the difference between the current voltage of the synchronization allowable channel and the target voltage reference value, a channel error compensation amount is generated. Based on the channel error compensation amount and the preset adjustment rate limit, a set of synchronous control signals for controlling the buck-boost circuit is generated.

4. The DC charging method with multi-channel synchronous control according to claim 1, characterized in that, The step of processing the channel PWM parameters of the synchronization control signal group to generate control commands for voltage synchronization output includes: By structurally extracting the PWM parameters of the synchronization enable channel in the synchronization control signal group, a set of channel PWM control parameters is obtained, and the parameter set is normalized according to the buck-boost topology type corresponding to the synchronization enable channel to construct a standardized PWM parameter template. By performing a consistency comparison on the duty cycle field of the synchronization-enabled channel in the standardized PWM parameter template, the channel identifiers whose duty cycles deviate from the target synchronization output range are identified. By jointly associating the channel identifier with the error compensation amount, the dynamic adjustment flag bit corresponding to the channel is obtained; By fusing and matching the dynamic adjustment flag with the standardized PWM parameter template, a channel instruction structure set is generated; Based on the contents of each control field in the channel instruction structure set, control instructions for voltage synchronization output are generated.

5. The DC charging method with multi-channel synchronous control according to claim 1, characterized in that, The step of outputting a synchronization control signal to the buck-boost circuit of the synchronization enable channel according to the control command, and controlling the output voltage of the buck-boost circuit by adjusting the PWM duty cycle to determine the second state indicator that meets the parallel connection requirement includes: By parsing the control commands, the target duty cycle control value and synchronization flag of the synchronization enabled channel are extracted, and a channel control signal is generated. The duty cycle of the PWM output port of the synchronization enable channel is applied by the channel control signal to obtain the synchronization control signal of the synchronization enable channel, and the synchronization control signal is transmitted to the corresponding buck-boost circuit to drive the output. The actual output voltage value of the buck-boost circuit is synchronously compared and analyzed with the target voltage value in the control command to generate the voltage output error of the synchronous allowable channel, and the output voltage state is determined according to the voltage deviation distribution between the synchronous allowable channels in the voltage output error. By performing a synchronization threshold test on the output voltage state, it is determined whether all allowed channels meet the set parallel output conditions; If all allowed channels meet the parallel output conditions, a second state identifier is generated.

6. The DC charging method with multi-channel synchronous control according to claim 1, characterized in that, After the step of driving the electrical switching circuit connected to the synchronization enable channel according to the second state identifier, electrically paralleling the output terminals of the synchronization enable channel, and performing combined output charging of the battery, the method further includes: By performing a difference analysis between the total current of the parallel output channel generated by the electrical parallel connection and the target current value of the battery in the current charging stage, total current deviation data is generated. The PWM duty cycle parameter of the synchronous allowable channel is adjusted in conjunction with the total current deviation data to obtain the channel duty cycle adjustment parameter. The temperature monitoring data of each synchronously allowed channel in the parallel output channel is compared with the preset thermal threshold to determine the channel index with over-temperature risk. The duty cycle adjustment value of the corresponding channel is then compressed according to the channel index to generate temperature control adjustment parameters. By jointly mapping the channel duty cycle adjustment parameter with the temperature control adjustment parameter, a channel duty cycle correction command is generated, and the channel duty cycle correction command is sent to the PWM output module of each synchronously enabled channel for correction.

7. The DC charging method with multi-channel synchronous control according to claim 1, characterized in that, The method further includes: By jointly analyzing the current change rate, voltage response stability, and cumulative charging time at the common output terminal, the parameters for determining the termination of the charging process are obtained. Based on the matching relationship between the determination parameters and the preset charging termination conditions, a termination determination identifier is generated; If the state parsing of the termination judgment flag determines that the multi-channel output structure is in a disconnectable state, then a phased disconnection instruction sequence is generated. According to the disengagement command sequence, disengagement control signals are sequentially sent to the electrical switching circuit of the synchronization enable channel to control the drive switch module in the output path of the synchronization enable channel to turn off; After the synchronization enable channel is disconnected, the residual voltage change trend of the corresponding output terminal is collected to generate a channel de-excitation status confirmation signal. By synchronously comparing the de-excitation status confirmation signals of all channels, a charging process termination confirmation flag is generated.

8. A multi-channel synchronously controlled DC charging device, characterized in that, The multi-channel synchronous control DC charging device is used to implement the multi-channel synchronous control DC charging method of claim 1, wherein the multi-channel synchronous control DC charging device comprises: The determination module is used to collect steady-state voltage data of all channel output terminals in the charger, and determine the first state identifier of all channels by comparing the steady-state voltage data with a preset synchronization tolerance threshold. The control module is used to synchronously control the steady-state voltage data of all synchronously enabled channels according to the first state identifier, and generate a synchronous control signal group. The processing module is used to process the channel PWM parameters of the synchronization control signal group to generate control commands for voltage synchronization output; The control module is used to output a synchronous control signal to the buck-boost circuit of the synchronous enable channel according to the control command, and to control the output voltage of the buck-boost circuit by adjusting the PWM duty cycle, and to determine the second state indicator that meets the parallel connection requirement; The output module is used to drive the electrical switching circuit of the synchronization enable channel according to the second state identifier, electrically connect the output terminals of the synchronization enable channel in parallel, and perform combined output charging of the battery.

9. An electronic device, characterized in that, Includes memory and processor, of which: The processor is used to execute computer programs stored in the memory; When the processor executes the computer program, it implements the steps in the DC charging method with multi-channel synchronous control as described in any one of claims 1 to 7.

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