High linearity low noise amplifier and radio frequency chip

Abstract

The application relates to the field of wireless communication technology and provides a high-linearity low-noise amplifier and a radio frequency chip, which comprises an input matching module, a power amplification module and an output matching module which are electrically connected in sequence; the gate of a first MOS tube of the power amplification module is connected with the first end of a first capacitor; the source of the first MOS tube is connected with the second end of the first capacitor, the first end of a first inductor and the first end of a second inductor respectively; the second end of the first inductor is grounded; the first inductor is coupled with the second inductor; the second end of the second inductor is connected with the first end of a second capacitor and the source of a second MOS tube respectively; the gate of the second MOS tube is connected with the second end of the second capacitor and the gate of the first MOS tube respectively; and the drain of the second MOS tube is connected with the drain of the first MOS tube and the source of a third MOS tube. The high-linearity low-noise amplifier has adjustable gain, low noise, high linearity and low power consumption.

Description

Technical Field

[0001] This invention relates to the field of wireless communication technology, and in particular to a high linearity, low noise amplifier and radio frequency chip. Background Technology

[0002] High-linearity low-noise amplifiers (LNAs), as the first-stage active devices in an RF front-end system, typically require a certain gain to amplify weak signals received from the antenna and provide some noise suppression for subsequent modules. They also need to have very low noise themselves to ensure the system's receiving sensitivity. Simultaneously, high linearity is required to ensure the receiver's RX branch (receiving branch) functions correctly even when large interference signals appear in the link. Therefore, achieving a balance between gain, noise figure, and linearity is a crucial design consideration.

[0003] In related technologies, a high-linearity low-noise amplifier includes an input matching module, an amplification module, and an output matching module. The input matching module is connected to the input signal of the low-noise amplifier. The amplification module is used to amplify the signal. The output matching module is connected to the output terminal of the low-noise amplifier and is used to suppress interference signals and output the processed signal to the output terminal of the low-noise amplifier.

[0004] However, in the current RF front-end chain, the low noise amplifier itself needs to adjust the gain level to meet the receiving gain under different conditions. Due to the limitations of gain switching and power consumption, it is difficult to achieve a good balance between the noise figure and linearity of the LNA itself at all levels. The current mainstream design achieves linearity improvement by input attenuation or source negative feedback, which has a significant impact on noise. Therefore, improving linearity at the cost of a smaller noise figure and power consumption is a problem that needs to be solved. Summary of the Invention

[0005] To address the shortcomings of the existing technologies, this invention proposes a high-linearity, low-noise amplifier to solve the problem of low linearity in existing high-linearity, low-noise amplifiers.

[0006] To solve the above-mentioned technical problems, the present invention adopts the following technical solution:

[0007] In a first aspect, embodiments of the present invention provide a high-linearity, low-noise amplifier, comprising an input matching module, a power amplification module, and an output matching module electrically connected in sequence; the input matching module is used to receive a radio frequency signal and achieve input impedance matching, the power amplification module is used to amplify the radio frequency signal, and the output matching module is used to perform output impedance matching on the amplified radio frequency signal and output it; the power amplification module includes a first MOSFET, a second MOSFET, a third MOSFET, a first capacitor, a second capacitor, a first inductor, and a second inductor;

[0008] The gate of the first MOSFET serves as the input terminal of the power amplifier module. The source of the first MOSFET is connected to the first terminal of the first inductor and the first terminal of the second inductor, respectively. The drain of the first MOSFET is connected to the source of the third MOSFET. The first terminal of the first capacitor is connected to the gate of the first MOSFET, and the second terminal of the first capacitor is connected to the source of the first MOSFET. The second terminal of the first inductor is grounded, and the first inductor and the second inductor are coupled together. The second terminal of the second inductor is connected to the first terminal of the second capacitor and the source of the second MOSFET, respectively. The gate of the second MOSFET is connected to the second terminal of the second capacitor and the gate of the first MOSFET, respectively. The drain of the second MOSFET is connected to the drain of the first MOSFET and the source of the third MOSFET, respectively. The drain of the third MOSFET serves as the output terminal of the power amplifier module. The gate of the third MOSFET is used to connect to an external logic control circuit, and the external logic control circuit provides a bias voltage to the gate of the third MOSFET. The second MOSFET is used to provide an operating state to cancel the nonlinearity generated by the first MOSFET, realizing transconductance cancellation between the second MOSFET and the first MOSFET. The second inductor is used to implement negative feedback to improve the impedance point.

[0009] Preferably, the high linearity low noise amplifier includes a first resistor, a first end of which is connected to a first external logic control circuit, and a second end of which is connected to the gate of the first MOS transistor. The first external logic control circuit is used to provide a first gate bias voltage to the first MOS transistor.

[0010] Preferably, the high linearity low noise amplifier further includes a second resistor, the first end of which is used to connect to a second external logic control circuit, and the second end of which is connected to the gate of the second MOS transistor. The second external logic control circuit is used to provide a second gate bias voltage to the first MOS transistor.

[0011] Preferably, the operating voltage of the first gate bias voltage is different from that of the second gate bias voltage.

[0012] Preferably, the high linearity low noise amplifier further includes a third resistor, the first end of which is connected to the gate of the third MOS transistor, and the second end of which is used to connect to the external logic control circuit.

[0013] Preferably, the output matching module includes a third inductor, a fourth inductor, a switch, a third capacitor, a fourth capacitor, a fifth capacitor, and a fourth resistor with adjustable resistance.

[0014] The first end of the third inductor serves as the input end of the output matching module. The first end of the third inductor is connected to the output end of the power amplifier module, the control end of the switch, and the first end of the fourth resistor. The second end of the third inductor is connected to the first end of the fourth inductor and the first end of the fifth capacitor. The output end of the switch is connected to the first end of the third capacitor and the first end of the fourth capacitor. The second end of the fourth capacitor is connected to the second end of the fourth resistor and the second end of the fourth inductor and is used to connect to the power supply. The second end of the third capacitor is connected to the second end of the fifth capacitor and serves as the output end of the output matching module.

[0015] Preferably, the input matching module includes a fifth inductor and a sixth capacitor; the first end of the fifth inductor serves as the input terminal of the input matching module, the second end of the fifth inductor is connected to the first end of the sixth capacitor, and the second end of the sixth capacitor serves as the output terminal of the input matching module.

[0016] Preferably, the high linearity low noise amplifier further includes a seventh capacitor, the first terminal of which is connected to the power supply, and the second terminal of which is grounded.

[0017] Preferably, both the first capacitor and the second capacitor are tuning capacitors.

[0018] Secondly, embodiments of the present invention provide a radio frequency chip, the radio frequency chip including the high linearity low noise amplifier described above.

[0019] Compared with related technologies, in the embodiments of the present invention, an input matching module is used to input radio frequency signals, a power amplification module is used to amplify radio frequency signals, and an output matching module is used for output. The gate of the first MOS transistor in the power amplification module serves as the input terminal of the power amplification module. The gate of the first MOS transistor is connected to the first terminal of the first capacitor. The source of the first MOS transistor is connected to the second terminal of the first capacitor, the first terminal of the first inductor, and the first terminal of the second inductor, respectively. The drain of the first MOS transistor is connected to the source of the third MOS transistor. The first terminal of the first capacitor is connected to the gate of the first MOS transistor, and the second terminal of the first capacitor is connected to the source of the first MOS transistor. The second terminal of the first inductor is grounded, and the first inductor is coupled to the second inductor. The second terminal of the second inductor is connected to the first terminal of the second capacitor and the source of the second MOS transistor, respectively. The gate of the second MOS transistor is connected to the first terminal of the second capacitor and the source of the second MOS transistor, respectively. The second terminal of the second capacitor is connected to the gate of the first MOSFET. The drain of the second MOSFET is connected to the drain of the first MOSFET and the source of the third MOSFET. The second MOSFET is used to provide a suitable operating state to cancel the nonlinearity generated by the first MOSFET, thus achieving transconductance cancellation between the second and first MOSFETs. The second inductor is used to achieve negative feedback to improve the impedance point. In this way, by reasonably adjusting the size configuration of the first and second MOSFETs, good linearity at high gain levels can be achieved without introducing degraded noise and power loss under the same or different bias voltages. At the same time, when operating at low gain levels, the gain, noise and linearity indicators at different gain levels can be achieved by adjusting the operating states of the first and second MOSFETs, without introducing degraded device area, which saves costs for the RF chip itself. Attached Figure Description

[0020] The present invention will now be described in detail with reference to the accompanying drawings. The above and other aspects of the present invention will become clearer and more readily understood through the detailed description following the accompanying drawings. In the drawings:

[0021] Figure 1 The circuit diagram of the high linearity low noise amplifier provided in Embodiment 1 of the present invention;

[0022] Figure 2 The circuit diagram of the high linearity low noise amplifier provided in Embodiment 2 of the present invention.

[0023] Among them, 100 is a high linearity low noise amplifier, 1 is an input matching module, 2 is a power amplification module, and 3 is an output matching module. Detailed Implementation

[0024] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application pertains; the terminology used herein in the specification of the application is for the purpose of describing particular embodiments only and is not intended to be limiting of the application; the terms "comprising" and "having," and any variations thereof, in the specification, claims, and foregoing drawings of this application, are intended to cover non-exclusive inclusion. The terms "first," "second," etc., in the specification, claims, or foregoing drawings of this application are used to distinguish different objects, not to describe a particular order.

[0025] In this document, the term "embodiment" means that a particular feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment of this application. The appearance of this phrase in various places throughout the specification does not necessarily refer to the same embodiment, nor is it a separate or alternative embodiment mutually exclusive with other embodiments. It will be explicitly and implicitly understood by those skilled in the art that the embodiments described herein can be combined with other embodiments.

[0026] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0027] Example 1

[0028] Please see Figure 1 As shown, this embodiment of the invention provides a high-linearity, low-noise amplifier 100, which includes an input matching module 1, a power amplification module 2, and an output matching module 3 connected in sequence. The input matching module 1 is used to receive a radio frequency (RF) signal and achieve input impedance matching. The power amplification module 2 is used to amplify the RF signal. The output matching module 3 is used to perform output impedance matching on the amplified RF signal and output it. The input terminal of the input matching module 1 is connected to the signal input terminal (RFIN), and the output terminal of the output matching module 3 is connected to the signal output terminal (RFOUT1). The power amplification module 2 includes a first MOSFET M1, a second MOSFET M2, a third MOSFET M3, a first capacitor C1, a second capacitor C2, a first inductor L1, and a second inductor L2.

[0029] The gate of the first MOSFET M1 serves as the input terminal of the power amplifier module 2. The source of the first MOSFET M1 is connected to the second terminal of the first capacitor C1, the first terminal of the first inductor L1, and the first terminal of the second inductor L2, respectively. The drain of the first MOSFET M1 is connected to the source of the third MOSFET M3. The first terminal of the first capacitor C1 is connected to the gate of the first MOSFET M1, and the second terminal of the first capacitor C1 is connected to the source of the first MOSFET M1. The second terminal of the first inductor L1 is grounded, and the first inductor L1 and the second inductor L2 are coupled to each other. The second terminal of the second inductor L2 is connected to the first terminal of the second capacitor C2 and the source of the second MOSFET M2. The gate of the second MOSFET M2 is connected to the second terminal of the second capacitor C2 and the gate of the first MOSFET M1. The drain of the second MOSFET M2 is connected to the drain of the first MOSFET M1 and the source of the third MOSFET M3. The drain of the third MOSFET M3 serves as the output terminal of the power amplifier module 2. The gate of the third MOSFET M3 is used to connect to an external logic control circuit, which provides a bias voltage Vb3 to the gate of the third MOSFET M3. The second MOSFET M2 provides a suitable operating state to counteract the nonlinearity generated by the first MOSFET M1, achieving transconductance cancellation between the second MOSFET M2 and the first MOSFET M1. The second inductor L2 provides negative feedback to improve the impedance point. By having the first capacitor C1 and the second capacitor C2, along with the first inductor L1 and the second inductor L2, participate in the input matching of the circuit, the linearity can be improved. By utilizing the second MOSFET M2 to operate in the subthreshold region, third-order transconductance cancellation is achieved, and the high-linearity low-noise amplifier 100 can also provide high performance when operating at low gain levels. This method allows for high linearity performance without introducing excessive additional power consumption or degrading the noise figure. By adjusting the size ratio of the transistors and biasing the first MOSFET M1 and the second MOSFET M2 at the same operating point, the third-order nonlinearity term of the high-linearity low-noise amplifier 100 is made zero. The third-order nonlinearity term represents the nonlinearity of the high-linearity low-noise amplifier 100; when this value is zero, the linearity of the high-linearity low-noise amplifier 100 is optimal.

[0030] By reasonably adjusting the size configuration of the first MOSFET M1 and the second MOSFET M2, good linearity at high gain levels can be achieved without introducing degraded noise and power loss under the same or different bias voltages. At the same time, when operating at low gain levels, the gain, noise and linearity indicators at different gain levels can be achieved by adjusting the operating states of the first MOSFET M1 and the second MOSFET M2, without introducing degraded device area. This has a cost-saving effect on the RF chip itself.

[0031] In this embodiment, the high-linearity low-noise amplifier 100 includes a first resistor R1. The first end of the first resistor R1 is connected to the first external logic control circuit, and the second end of the first resistor R1 is connected to the gate of the first MOSFET M1. The first external logic control circuit provides a first gate bias voltage Vb1 to the first MOSFET M1. The control signal output by the first external logic control circuit, after passing through the first resistor R1, outputs the first gate bias voltage Vb1, which can provide a stable bias for the first MOSFET M1. Simultaneously, it can participate in input impedance matching, optimize noise figure and signal transmission efficiency, filter and suppress bias noise, and improve the stability and linearity of the high-linearity low-noise amplifier 100.

[0032] Example 2

[0033] like Figure 2 As shown in the figure, this embodiment of the invention also provides a high linearity low noise amplifier 100. In this embodiment, the high linearity low noise amplifier 100 includes a second resistor R2. The first end of the second resistor R2 is used to connect to a second external logic control circuit, and the second end of the second resistor R2 is connected to the gate of the second MOSFET M2. The second external logic control circuit is used to provide a second gate bias voltage Vb2 to the first MOSFET M1. The control signal output by the second external logic control circuit, after passing through the second resistor R2, outputs the second gate bias voltage Vb2, which can provide a stable bias for the second MOSFET M2; at the same time, it can also participate in input impedance matching, optimize noise figure and signal transmission efficiency; filter and suppress bias noise, and improve the stability and linearity of the high linearity low noise amplifier 100.

[0034] In this embodiment, the operating voltages of the first gate bias voltage Vb1 and the second gate bias voltage Vb2 are different. The first MOSFET M1 and the second MOSFET M2 operate under different first gate bias voltages Vb1 and second gate bias voltages Vb2, respectively. Optimizing the dimensions of the first MOSFET M1 and the second MOSFET M2 can achieve high linearity. Similarly, by using the first inductor L1 and the second inductor L2 in a coupled manner, the overall area can be saved.

[0035] In this embodiment, the high-linearity low-noise amplifier 100 further includes a third resistor R3. The first end of the third resistor R3 is connected to the gate of the third MOS transistor M3, and the second end of the third resistor R3 is used to connect to the external logic control circuit. The third resistor R3 can provide a stable bias; it can also participate in input impedance matching, optimize noise figure and signal transmission efficiency; filter and suppress bias noise, and improve the stability and linearity of the high-linearity low-noise amplifier 100.

[0036] In this embodiment, the output matching module 3 includes a third inductor L3, a fourth inductor L4, a switch SW1, a third capacitor C3, a fourth capacitor C4, a fifth capacitor C5, and a fourth resistor R4 with adjustable resistance.

[0037] The first end of the third inductor L3 serves as the input terminal of the output matching module 3. The first end of the third inductor L3 is connected to the output terminal of the power amplifier module 2, the control terminal of the switch SW1, and the first end of the fourth resistor R4. The second end of the third inductor L3 is connected to the first end of the fourth inductor L4 and the first end of the fifth capacitor C5. The output terminal of the switch SW1 is connected to the first end of the third capacitor C3 and the first end of the fourth capacitor C4. The second end of the fourth capacitor C4 is connected to the second end of the fourth resistor R4 and the second end of the fourth inductor L4, and is used to connect to the power supply VDD. The second end of the third capacitor C3 and the second end of the fifth capacitor C5 are connected and serve as the output terminal of the output matching module 3. When operating at low gain, the selective switching on and off of the first MOSFET M1 and the second MOSFET M2 allows for flexible adjustment of linearity using the inductance combination of the first inductor L1 and the second inductor L2. Furthermore, the fourth resistor R4 is used to improve the output impedance, thus improving linearity while reducing gain.

[0038] Specifically, the matching is switched via switch SW1 in output matching module 3 to improve overall compatibility. Simultaneously, when switch SW1 is off, the fifth capacitor C5 is connected to the circuit, meaning the output matching operates using the third inductor L3, the fourth inductor L4, and the fifth capacitor C5. When switch SW1 is on, the fifth capacitor C5 and the fourth capacitor C4 are introduced to adjust the output matching to achieve wideband performance. In this case, the effect of the fifth capacitor C5 is minimal and has virtually no impact on the output matching. Furthermore, when only one matching device is allowed at the input end and cannot be replaced to meet different frequency performance requirements, this architecture can achieve wideband input matching performance. The flexible gain adjustment also contributes to good noise and linearity performance at different gain levels. A combination of the third inductor L3 and the fourth inductor L4 can also achieve high gain.

[0039] In this embodiment, the input matching module 1 includes a fifth inductor L5 and a sixth capacitor C6. The first end of the fifth inductor L5 serves as the input terminal of the input matching module 1, the second end of the fifth inductor L5 is connected to the first end of the sixth capacitor C6, and the second end of the sixth capacitor C6 serves as the output terminal of the input matching module 1. The fifth inductor L5 and the sixth capacitor C6 are used to achieve input DC blocking and off-chip matching.

[0040] In this embodiment, the high linearity low noise amplifier 100 further includes a seventh capacitor C7. The first terminal of the seventh capacitor C7 is connected to the power supply VDD, and the second terminal of the seventh capacitor C7 is grounded. Connecting the seventh capacitor C7 to the power supply VDD can provide circuit protection and energy storage.

[0041] In this embodiment, both the first capacitor C1 and the second capacitor C2 are tuning capacitors. This allows the capacitance values ​​of the first capacitor C1 and the second capacitor C2 to be adjusted, further optimizing the overall gain and linearity.

[0042] Example 3

[0043] This invention provides a radio frequency (RF) chip, which includes the high linearity low noise amplifier 100 described above.

[0044] It should be noted that the various embodiments described above with reference to the accompanying drawings are merely illustrative of the present invention and not intended to limit its scope. Those skilled in the art should understand that any modifications or equivalent substitutions made to the present invention without departing from its spirit and scope should be included within the scope of the present invention. Furthermore, unless the context otherwise requires, words appearing in the singular include those in the plural, and vice versa. Additionally, unless specifically stated otherwise, all or part of any embodiment may be used in conjunction with all or part of any other embodiment.

Claims

1. A high-linearity, low-noise amplifier, comprising an input matching module, a power amplification module, and an output matching module electrically connected in sequence; the input matching module is used to receive a radio frequency (RF) signal and achieve input impedance matching, the power amplification module is used to amplify the RF signal, and the output matching module is used to output the amplified RF signal after output impedance matching; characterized in that, The power amplifier module includes a first MOSFET, a second MOSFET, a third MOSFET, a first capacitor, a second capacitor, a first inductor, and a second inductor; The gate of the first MOSFET serves as the input terminal of the power amplifier module. The source of the first MOSFET is connected to the first terminal of the first inductor and the first terminal of the second inductor, respectively. The drain of the first MOSFET is connected to the source of the third MOSFET. The first terminal of the first capacitor is connected to the gate of the first MOSFET, and the second terminal of the first capacitor is connected to the source of the first MOSFET. The second terminal of the first inductor is grounded, and the first inductor is coupled to the second inductor. The second terminal of the second inductor is connected to the first terminal of the second capacitor and the source of the second MOSFET. The gate of the second MOSFET is connected to the second terminal of the second capacitor and the gate of the first MOSFET. The drain of the second MOSFET is connected to the drain of the first MOSFET and the source of the third MOSFET. The drain of the third MOSFET serves as the output terminal of the power amplifier module. The gate of the third MOSFET is used to connect to an external logic control circuit, and the external logic control circuit provides a bias voltage to the gate of the third MOSFET. The second MOSFET provides an operating state to cancel the transconductance nonlinearity generated by the first MOSFET, thereby achieving transconductance cancellation between the second MOSFET and the first MOSFET. The second inductor is used to implement negative feedback to improve the impedance point.

2. The high linearity, low noise amplifier according to claim 1, characterized in that, The high linearity low noise amplifier includes a first resistor, a first end of which is connected to a first external logic control circuit, and a second end of which is connected to the gate of the first MOS transistor. The first external logic control circuit is used to provide a first gate bias voltage to the first MOS transistor.

3. The high linearity, low noise amplifier according to claim 2, characterized in that, The high linearity low noise amplifier further includes a second resistor, the first end of which is used to connect to a second external logic control circuit, and the second end of which is connected to the gate of the second MOS transistor. The second external logic control circuit is used to provide a second gate bias voltage for the second MOS transistor.

4. The high linearity, low noise amplifier according to claim 3, characterized in that, The first gate bias voltage is different from the second gate bias voltage.

5. The high linearity, low noise amplifier according to claim 1, characterized in that, The high linearity low noise amplifier also includes a third resistor, the first end of which is connected to the gate of the third MOS transistor, and the second end of which is used to connect to the external logic control circuit.

6. The high linearity, low noise amplifier according to claim 1, characterized in that, The output matching module includes a third inductor, a fourth inductor, a switch, a third capacitor, a fourth capacitor, a fifth capacitor, and a fourth resistor with adjustable resistance. The first end of the third inductor serves as the input end of the output matching module. The first end of the third inductor is connected to the output end of the power amplifier module, the control end of the switch, and the first end of the fourth resistor. The second end of the third inductor is connected to the first end of the fourth inductor and the first end of the fifth capacitor. The output end of the switch is connected to the first end of the third capacitor and the first end of the fourth capacitor. The second end of the fourth capacitor is connected to the second end of the fourth resistor and the second end of the fourth inductor and is used to connect to the power supply. The second end of the third capacitor is connected to the second end of the fifth capacitor and serves as the output end of the output matching module.

7. The high linearity, low noise amplifier according to claim 1, characterized in that, The input matching module includes a fifth inductor and a sixth capacitor; the first end of the fifth inductor serves as the input terminal of the input matching module, the second end of the fifth inductor is connected to the first end of the sixth capacitor, and the second end of the sixth capacitor serves as the output terminal of the input matching module.

8. The high linearity, low noise amplifier according to claim 6, characterized in that, The high linearity low noise amplifier also includes a seventh capacitor, the first end of which is connected to the power supply, and the second end of which is grounded.

9. The high linearity, low noise amplifier according to claim 1, characterized in that, Both the first capacitor and the second capacitor are tuning capacitors.

10. A radio frequency chip, characterized in that, The radio frequency chip includes a high linearity, low noise amplifier as described in any one of claims 1-9.

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